1dea3101eS /******************************************************************* 2dea3101eS * This file is part of the Emulex Linux Device Driver for * 3c44ce173SJames.Smart@Emulex.Com * Fibre Channel Host Bus Adapters. * 450611577SJames Smart * Copyright (C) 2004-2016 Emulex. All rights reserved. * 5c44ce173SJames.Smart@Emulex.Com * EMULEX and SLI are trademarks of Emulex. * 6dea3101eS * www.emulex.com * 7dea3101eS * * 8dea3101eS * This program is free software; you can redistribute it and/or * 9c44ce173SJames.Smart@Emulex.Com * modify it under the terms of version 2 of the GNU General * 10c44ce173SJames.Smart@Emulex.Com * Public License as published by the Free Software Foundation. * 11c44ce173SJames.Smart@Emulex.Com * This program is distributed in the hope that it will be useful. * 12c44ce173SJames.Smart@Emulex.Com * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 13c44ce173SJames.Smart@Emulex.Com * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 14c44ce173SJames.Smart@Emulex.Com * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 15c44ce173SJames.Smart@Emulex.Com * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 16c44ce173SJames.Smart@Emulex.Com * TO BE LEGALLY INVALID. See the GNU General Public License for * 17c44ce173SJames.Smart@Emulex.Com * more details, a copy of which can be found in the file COPYING * 18c44ce173SJames.Smart@Emulex.Com * included with this package. * 19dea3101eS *******************************************************************/ 20dea3101eS 21dea3101eS #define FDMI_DID 0xfffffaU 22dea3101eS #define NameServer_DID 0xfffffcU 23dea3101eS #define SCR_DID 0xfffffdU 24dea3101eS #define Fabric_DID 0xfffffeU 25dea3101eS #define Bcast_DID 0xffffffU 26dea3101eS #define Mask_DID 0xffffffU 27dea3101eS #define CT_DID_MASK 0xffff00U 28dea3101eS #define Fabric_DID_MASK 0xfff000U 29dea3101eS #define WELL_KNOWN_DID_MASK 0xfffff0U 30dea3101eS 31dea3101eS #define PT2PT_LocalID 1 32dea3101eS #define PT2PT_RemoteID 2 33dea3101eS 34dea3101eS #define FF_DEF_EDTOV 2000 /* Default E_D_TOV (2000ms) */ 35dea3101eS #define FF_DEF_ALTOV 15 /* Default AL_TIME (15ms) */ 3621bf0b97SJames Smart #define FF_DEF_RATOV 10 /* Default RA_TOV (10s) */ 37dea3101eS #define FF_DEF_ARBTOV 1900 /* Default ARB_TOV (1900ms) */ 38dea3101eS 39dea3101eS #define LPFC_BUF_RING0 64 /* Number of buffers to post to RING 40dea3101eS 0 */ 41dea3101eS 42dea3101eS #define FCELSSIZE 1024 /* maximum ELS transfer size */ 43dea3101eS 44dea3101eS #define LPFC_FCP_RING 0 /* ring 0 for FCP initiator commands */ 45a4bc3379SJames Smart #define LPFC_EXTRA_RING 1 /* ring 1 for other protocols */ 46dea3101eS #define LPFC_ELS_RING 2 /* ring 2 for ELS commands */ 47dea3101eS #define LPFC_FCP_NEXT_RING 3 481ba981fdSJames Smart #define LPFC_FCP_OAS_RING 3 49dea3101eS 50dea3101eS #define SLI2_IOCB_CMD_R0_ENTRIES 172 /* SLI-2 FCP command ring entries */ 51dea3101eS #define SLI2_IOCB_RSP_R0_ENTRIES 134 /* SLI-2 FCP response ring entries */ 52a4bc3379SJames Smart #define SLI2_IOCB_CMD_R1_ENTRIES 4 /* SLI-2 extra command ring entries */ 53a4bc3379SJames Smart #define SLI2_IOCB_RSP_R1_ENTRIES 4 /* SLI-2 extra response ring entries */ 54dea3101eS #define SLI2_IOCB_CMD_R1XTRA_ENTRIES 36 /* SLI-2 extra FCP cmd ring entries */ 55dea3101eS #define SLI2_IOCB_RSP_R1XTRA_ENTRIES 52 /* SLI-2 extra FCP rsp ring entries */ 56dea3101eS #define SLI2_IOCB_CMD_R2_ENTRIES 20 /* SLI-2 ELS command ring entries */ 57dea3101eS #define SLI2_IOCB_RSP_R2_ENTRIES 20 /* SLI-2 ELS response ring entries */ 58dea3101eS #define SLI2_IOCB_CMD_R3_ENTRIES 0 59dea3101eS #define SLI2_IOCB_RSP_R3_ENTRIES 0 60dea3101eS #define SLI2_IOCB_CMD_R3XTRA_ENTRIES 24 61dea3101eS #define SLI2_IOCB_RSP_R3XTRA_ENTRIES 32 62dea3101eS 63ed957684SJames Smart #define SLI2_IOCB_CMD_SIZE 32 64ed957684SJames Smart #define SLI2_IOCB_RSP_SIZE 32 65ed957684SJames Smart #define SLI3_IOCB_CMD_SIZE 128 66ed957684SJames Smart #define SLI3_IOCB_RSP_SIZE 64 67ed957684SJames Smart 686d368e53SJames Smart #define LPFC_UNREG_ALL_RPIS_VPORT 0xffff 696d368e53SJames Smart #define LPFC_UNREG_ALL_DFLT_RPIS 0xffffffff 7092d7f7b0SJames Smart 71ddcc50f0SJames Smart /* vendor ID used in SCSI netlink calls */ 72ddcc50f0SJames Smart #define LPFC_NL_VENDOR_ID (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX) 73ddcc50f0SJames Smart 746b5151fdSJames Smart #define FW_REV_STR_SIZE 32 75dea3101eS /* Common Transport structures and definitions */ 76dea3101eS 77dea3101eS union CtRevisionId { 78dea3101eS /* Structure is in Big Endian format */ 79dea3101eS struct { 80dea3101eS uint32_t Revision:8; 81dea3101eS uint32_t InId:24; 82dea3101eS } bits; 83dea3101eS uint32_t word; 84dea3101eS }; 85dea3101eS 86dea3101eS union CtCommandResponse { 87dea3101eS /* Structure is in Big Endian format */ 88dea3101eS struct { 89dea3101eS uint32_t CmdRsp:16; 90dea3101eS uint32_t Size:16; 91dea3101eS } bits; 92dea3101eS uint32_t word; 93dea3101eS }; 94dea3101eS 9592d7f7b0SJames Smart #define FC4_FEATURE_INIT 0x2 9692d7f7b0SJames Smart #define FC4_FEATURE_TARGET 0x1 9792d7f7b0SJames Smart 98dea3101eS struct lpfc_sli_ct_request { 99dea3101eS /* Structure is in Big Endian format */ 100dea3101eS union CtRevisionId RevisionId; 101dea3101eS uint8_t FsType; 102dea3101eS uint8_t FsSubType; 103dea3101eS uint8_t Options; 104dea3101eS uint8_t Rsrvd1; 105dea3101eS union CtCommandResponse CommandResponse; 106dea3101eS uint8_t Rsrvd2; 107dea3101eS uint8_t ReasonCode; 108dea3101eS uint8_t Explanation; 109dea3101eS uint8_t VendorUnique; 11076b2c34aSJames Smart #define LPFC_CT_PREAMBLE 20 /* Size of CTReq + 4 up to here */ 111dea3101eS 112dea3101eS union { 113dea3101eS uint32_t PortID; 114dea3101eS struct gid { 115dea3101eS uint8_t PortType; /* for GID_PT requests */ 116dea3101eS uint8_t DomainScope; 117dea3101eS uint8_t AreaScope; 118dea3101eS uint8_t Fc4Type; /* for GID_FT requests */ 119dea3101eS } gid; 120dea3101eS struct rft { 121dea3101eS uint32_t PortId; /* For RFT_ID requests */ 122dea3101eS 123dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 124dea3101eS uint32_t rsvd0:16; 125dea3101eS uint32_t rsvd1:7; 126dea3101eS uint32_t fcpReg:1; /* Type 8 */ 127dea3101eS uint32_t rsvd2:2; 128dea3101eS uint32_t ipReg:1; /* Type 5 */ 129dea3101eS uint32_t rsvd3:5; 130dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 131dea3101eS uint32_t rsvd0:16; 132dea3101eS uint32_t fcpReg:1; /* Type 8 */ 133dea3101eS uint32_t rsvd1:7; 134dea3101eS uint32_t rsvd3:5; 135dea3101eS uint32_t ipReg:1; /* Type 5 */ 136dea3101eS uint32_t rsvd2:2; 137dea3101eS #endif 138dea3101eS 139dea3101eS uint32_t rsvd[7]; 140dea3101eS } rft; 141dea3101eS struct rnn { 142dea3101eS uint32_t PortId; /* For RNN_ID requests */ 143dea3101eS uint8_t wwnn[8]; 144dea3101eS } rnn; 145dea3101eS struct rsnn { /* For RSNN_ID requests */ 146dea3101eS uint8_t wwnn[8]; 147dea3101eS uint8_t len; 148dea3101eS uint8_t symbname[255]; 149dea3101eS } rsnn; 1507ee5d43eSJames Smart struct da_id { /* For DA_ID requests */ 1517ee5d43eSJames Smart uint32_t port_id; 1527ee5d43eSJames Smart } da_id; 15392d7f7b0SJames Smart struct rspn { /* For RSPN_ID requests */ 15492d7f7b0SJames Smart uint32_t PortId; 15592d7f7b0SJames Smart uint8_t len; 15692d7f7b0SJames Smart uint8_t symbname[255]; 15792d7f7b0SJames Smart } rspn; 15892d7f7b0SJames Smart struct gff { 15992d7f7b0SJames Smart uint32_t PortId; 16092d7f7b0SJames Smart } gff; 16192d7f7b0SJames Smart struct gff_acc { 16292d7f7b0SJames Smart uint8_t fbits[128]; 16392d7f7b0SJames Smart } gff_acc; 16451ef4c26SJames Smart #define FCP_TYPE_FEATURE_OFFSET 7 16592d7f7b0SJames Smart struct rff { 16692d7f7b0SJames Smart uint32_t PortId; 16792d7f7b0SJames Smart uint8_t reserved[2]; 16892d7f7b0SJames Smart uint8_t fbits; 16992d7f7b0SJames Smart uint8_t type_code; /* type=8 for FCP */ 17092d7f7b0SJames Smart } rff; 171dea3101eS } un; 172dea3101eS }; 173dea3101eS 17476b2c34aSJames Smart #define LPFC_MAX_CT_SIZE (60 * 4096) 17576b2c34aSJames Smart 176dea3101eS #define SLI_CT_REVISION 1 17792d7f7b0SJames Smart #define GID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 17892d7f7b0SJames Smart sizeof(struct gid)) 17992d7f7b0SJames Smart #define GFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 18092d7f7b0SJames Smart sizeof(struct gff)) 18192d7f7b0SJames Smart #define RFT_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 18292d7f7b0SJames Smart sizeof(struct rft)) 18392d7f7b0SJames Smart #define RFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 18492d7f7b0SJames Smart sizeof(struct rff)) 18592d7f7b0SJames Smart #define RNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 18692d7f7b0SJames Smart sizeof(struct rnn)) 18792d7f7b0SJames Smart #define RSNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 18892d7f7b0SJames Smart sizeof(struct rsnn)) 1897ee5d43eSJames Smart #define DA_ID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 1907ee5d43eSJames Smart sizeof(struct da_id)) 19192d7f7b0SJames Smart #define RSPN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 19292d7f7b0SJames Smart sizeof(struct rspn)) 193dea3101eS 194dea3101eS /* 195dea3101eS * FsType Definitions 196dea3101eS */ 197dea3101eS 198dea3101eS #define SLI_CT_MANAGEMENT_SERVICE 0xFA 199dea3101eS #define SLI_CT_TIME_SERVICE 0xFB 200dea3101eS #define SLI_CT_DIRECTORY_SERVICE 0xFC 201dea3101eS #define SLI_CT_FABRIC_CONTROLLER_SERVICE 0xFD 202dea3101eS 203dea3101eS /* 204dea3101eS * Directory Service Subtypes 205dea3101eS */ 206dea3101eS 207dea3101eS #define SLI_CT_DIRECTORY_NAME_SERVER 0x02 208dea3101eS 209dea3101eS /* 210dea3101eS * Response Codes 211dea3101eS */ 212dea3101eS 213dea3101eS #define SLI_CT_RESPONSE_FS_RJT 0x8001 214dea3101eS #define SLI_CT_RESPONSE_FS_ACC 0x8002 215dea3101eS 216dea3101eS /* 217dea3101eS * Reason Codes 218dea3101eS */ 219dea3101eS 220dea3101eS #define SLI_CT_NO_ADDITIONAL_EXPL 0x0 221dea3101eS #define SLI_CT_INVALID_COMMAND 0x01 222dea3101eS #define SLI_CT_INVALID_VERSION 0x02 223dea3101eS #define SLI_CT_LOGICAL_ERROR 0x03 224dea3101eS #define SLI_CT_INVALID_IU_SIZE 0x04 225dea3101eS #define SLI_CT_LOGICAL_BUSY 0x05 226dea3101eS #define SLI_CT_PROTOCOL_ERROR 0x07 227dea3101eS #define SLI_CT_UNABLE_TO_PERFORM_REQ 0x09 228dea3101eS #define SLI_CT_REQ_NOT_SUPPORTED 0x0b 229dea3101eS #define SLI_CT_HBA_INFO_NOT_REGISTERED 0x10 230dea3101eS #define SLI_CT_MULTIPLE_HBA_ATTR_OF_SAME_TYPE 0x11 231dea3101eS #define SLI_CT_INVALID_HBA_ATTR_BLOCK_LEN 0x12 232dea3101eS #define SLI_CT_HBA_ATTR_NOT_PRESENT 0x13 233dea3101eS #define SLI_CT_PORT_INFO_NOT_REGISTERED 0x20 234dea3101eS #define SLI_CT_MULTIPLE_PORT_ATTR_OF_SAME_TYPE 0x21 235dea3101eS #define SLI_CT_INVALID_PORT_ATTR_BLOCK_LEN 0x22 236dea3101eS #define SLI_CT_VENDOR_UNIQUE 0xff 237dea3101eS 238dea3101eS /* 239dea3101eS * Name Server SLI_CT_UNABLE_TO_PERFORM_REQ Explanations 240dea3101eS */ 241dea3101eS 242dea3101eS #define SLI_CT_NO_PORT_ID 0x01 243dea3101eS #define SLI_CT_NO_PORT_NAME 0x02 244dea3101eS #define SLI_CT_NO_NODE_NAME 0x03 245dea3101eS #define SLI_CT_NO_CLASS_OF_SERVICE 0x04 246dea3101eS #define SLI_CT_NO_IP_ADDRESS 0x05 247dea3101eS #define SLI_CT_NO_IPA 0x06 248dea3101eS #define SLI_CT_NO_FC4_TYPES 0x07 249dea3101eS #define SLI_CT_NO_SYMBOLIC_PORT_NAME 0x08 250dea3101eS #define SLI_CT_NO_SYMBOLIC_NODE_NAME 0x09 251dea3101eS #define SLI_CT_NO_PORT_TYPE 0x0A 252dea3101eS #define SLI_CT_ACCESS_DENIED 0x10 253dea3101eS #define SLI_CT_INVALID_PORT_ID 0x11 254dea3101eS #define SLI_CT_DATABASE_EMPTY 0x12 255dea3101eS 256dea3101eS /* 257dea3101eS * Name Server Command Codes 258dea3101eS */ 259dea3101eS 260dea3101eS #define SLI_CTNS_GA_NXT 0x0100 261dea3101eS #define SLI_CTNS_GPN_ID 0x0112 262dea3101eS #define SLI_CTNS_GNN_ID 0x0113 263dea3101eS #define SLI_CTNS_GCS_ID 0x0114 264dea3101eS #define SLI_CTNS_GFT_ID 0x0117 265dea3101eS #define SLI_CTNS_GSPN_ID 0x0118 266dea3101eS #define SLI_CTNS_GPT_ID 0x011A 26792d7f7b0SJames Smart #define SLI_CTNS_GFF_ID 0x011F 268dea3101eS #define SLI_CTNS_GID_PN 0x0121 269dea3101eS #define SLI_CTNS_GID_NN 0x0131 270dea3101eS #define SLI_CTNS_GIP_NN 0x0135 271dea3101eS #define SLI_CTNS_GIPA_NN 0x0136 272dea3101eS #define SLI_CTNS_GSNN_NN 0x0139 273dea3101eS #define SLI_CTNS_GNN_IP 0x0153 274dea3101eS #define SLI_CTNS_GIPA_IP 0x0156 275dea3101eS #define SLI_CTNS_GID_FT 0x0171 276dea3101eS #define SLI_CTNS_GID_PT 0x01A1 277dea3101eS #define SLI_CTNS_RPN_ID 0x0212 278dea3101eS #define SLI_CTNS_RNN_ID 0x0213 279dea3101eS #define SLI_CTNS_RCS_ID 0x0214 280dea3101eS #define SLI_CTNS_RFT_ID 0x0217 281dea3101eS #define SLI_CTNS_RSPN_ID 0x0218 282dea3101eS #define SLI_CTNS_RPT_ID 0x021A 28392d7f7b0SJames Smart #define SLI_CTNS_RFF_ID 0x021F 284dea3101eS #define SLI_CTNS_RIP_NN 0x0235 285dea3101eS #define SLI_CTNS_RIPA_NN 0x0236 286dea3101eS #define SLI_CTNS_RSNN_NN 0x0239 287dea3101eS #define SLI_CTNS_DA_ID 0x0300 288dea3101eS 289dea3101eS /* 290dea3101eS * Port Types 291dea3101eS */ 292dea3101eS 293dea3101eS #define SLI_CTPT_N_PORT 0x01 294dea3101eS #define SLI_CTPT_NL_PORT 0x02 295dea3101eS #define SLI_CTPT_FNL_PORT 0x03 296dea3101eS #define SLI_CTPT_IP 0x04 297dea3101eS #define SLI_CTPT_FCP 0x08 298dea3101eS #define SLI_CTPT_NX_PORT 0x7F 299dea3101eS #define SLI_CTPT_F_PORT 0x81 300dea3101eS #define SLI_CTPT_FL_PORT 0x82 301dea3101eS #define SLI_CTPT_E_PORT 0x84 302dea3101eS 303dea3101eS #define SLI_CT_LAST_ENTRY 0x80000000 304dea3101eS 305dea3101eS /* Fibre Channel Service Parameter definitions */ 306dea3101eS 307dea3101eS #define FC_PH_4_0 6 /* FC-PH version 4.0 */ 308dea3101eS #define FC_PH_4_1 7 /* FC-PH version 4.1 */ 309dea3101eS #define FC_PH_4_2 8 /* FC-PH version 4.2 */ 310dea3101eS #define FC_PH_4_3 9 /* FC-PH version 4.3 */ 311dea3101eS 312dea3101eS #define FC_PH_LOW 8 /* Lowest supported FC-PH version */ 313dea3101eS #define FC_PH_HIGH 9 /* Highest supported FC-PH version */ 314dea3101eS #define FC_PH3 0x20 /* FC-PH-3 version */ 315dea3101eS 316dea3101eS #define FF_FRAME_SIZE 2048 317dea3101eS 318dea3101eS struct lpfc_name { 319f631b4beSAndrew Vasquez union { 320f631b4beSAndrew Vasquez struct { 321dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 322dea3101eS uint8_t nameType:4; /* FC Word 0, bit 28:31 */ 3231de933f3SJames.Smart@Emulex.Com uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 3241de933f3SJames.Smart@Emulex.Com 8:11 of IEEE ext */ 325dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3261de933f3SJames.Smart@Emulex.Com uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 3271de933f3SJames.Smart@Emulex.Com 8:11 of IEEE ext */ 328dea3101eS uint8_t nameType:4; /* FC Word 0, bit 28:31 */ 329dea3101eS #endif 330dea3101eS 331dea3101eS #define NAME_IEEE 0x1 /* IEEE name - nameType */ 332dea3101eS #define NAME_IEEE_EXT 0x2 /* IEEE extended name */ 333dea3101eS #define NAME_FC_TYPE 0x3 /* FC native name type */ 334dea3101eS #define NAME_IP_TYPE 0x4 /* IP address */ 335dea3101eS #define NAME_CCITT_TYPE 0xC 336dea3101eS #define NAME_CCITT_GR_TYPE 0xE 3371de933f3SJames.Smart@Emulex.Com uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE 3381de933f3SJames.Smart@Emulex.Com extended Lsb */ 339dea3101eS uint8_t IEEE[6]; /* FC IEEE address */ 34068ce1eb5SAndrew Morton } s; 341f631b4beSAndrew Vasquez uint8_t wwn[8]; 34268ce1eb5SAndrew Morton } u; 343f631b4beSAndrew Vasquez }; 344dea3101eS 345dea3101eS struct csp { 346dea3101eS uint8_t fcphHigh; /* FC Word 0, byte 0 */ 347dea3101eS uint8_t fcphLow; 348dea3101eS uint8_t bbCreditMsb; 349dea3101eS uint8_t bbCreditlsb; /* FC Word 0, byte 3 */ 350dea3101eS 35192494144SJames Smart /* 35292494144SJames Smart * Word 1 Bit 31 in common service parameter is overloaded. 35392494144SJames Smart * Word 1 Bit 31 in FLOGI request is multiple NPort request 35492494144SJames Smart * Word 1 Bit 31 in FLOGI response is clean address bit 35592494144SJames Smart */ 35692494144SJames Smart #define clean_address_bit request_multiple_Nport /* Word 1, bit 31 */ 357df9e1b59SJames Smart /* 358df9e1b59SJames Smart * Word 1 Bit 30 in common service parameter is overloaded. 359df9e1b59SJames Smart * Word 1 Bit 30 in FLOGI request is Virtual Fabrics 360df9e1b59SJames Smart * Word 1 Bit 30 in PLOGI request is random offset 361df9e1b59SJames Smart */ 362df9e1b59SJames Smart #define virtual_fabric_support randomOffset /* Word 1, bit 30 */ 363dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 36492d7f7b0SJames Smart uint16_t request_multiple_Nport:1; /* FC Word 1, bit 31 */ 36592d7f7b0SJames Smart uint16_t randomOffset:1; /* FC Word 1, bit 30 */ 36692d7f7b0SJames Smart uint16_t response_multiple_NPort:1; /* FC Word 1, bit 29 */ 367dea3101eS uint16_t fPort:1; /* FC Word 1, bit 28 */ 368dea3101eS uint16_t altBbCredit:1; /* FC Word 1, bit 27 */ 369dea3101eS uint16_t edtovResolution:1; /* FC Word 1, bit 26 */ 370dea3101eS uint16_t multicast:1; /* FC Word 1, bit 25 */ 371dea3101eS uint16_t broadcast:1; /* FC Word 1, bit 24 */ 372dea3101eS 373dea3101eS uint16_t huntgroup:1; /* FC Word 1, bit 23 */ 374dea3101eS uint16_t simplex:1; /* FC Word 1, bit 22 */ 375dea3101eS uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */ 376dea3101eS uint16_t dhd:1; /* FC Word 1, bit 18 */ 377dea3101eS uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */ 378dea3101eS uint16_t payloadlength:1; /* FC Word 1, bit 16 */ 379dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 380dea3101eS uint16_t broadcast:1; /* FC Word 1, bit 24 */ 381dea3101eS uint16_t multicast:1; /* FC Word 1, bit 25 */ 382dea3101eS uint16_t edtovResolution:1; /* FC Word 1, bit 26 */ 383dea3101eS uint16_t altBbCredit:1; /* FC Word 1, bit 27 */ 384dea3101eS uint16_t fPort:1; /* FC Word 1, bit 28 */ 38592d7f7b0SJames Smart uint16_t response_multiple_NPort:1; /* FC Word 1, bit 29 */ 386dea3101eS uint16_t randomOffset:1; /* FC Word 1, bit 30 */ 38792d7f7b0SJames Smart uint16_t request_multiple_Nport:1; /* FC Word 1, bit 31 */ 388dea3101eS 389dea3101eS uint16_t payloadlength:1; /* FC Word 1, bit 16 */ 390dea3101eS uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */ 391dea3101eS uint16_t dhd:1; /* FC Word 1, bit 18 */ 392dea3101eS uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */ 393dea3101eS uint16_t simplex:1; /* FC Word 1, bit 22 */ 394dea3101eS uint16_t huntgroup:1; /* FC Word 1, bit 23 */ 395dea3101eS #endif 396dea3101eS 397dea3101eS uint8_t bbRcvSizeMsb; /* Upper nibble is reserved */ 398dea3101eS uint8_t bbRcvSizeLsb; /* FC Word 1, byte 3 */ 399dea3101eS union { 400dea3101eS struct { 401dea3101eS uint8_t word2Reserved1; /* FC Word 2 byte 0 */ 402dea3101eS 403dea3101eS uint8_t totalConcurrSeq; /* FC Word 2 byte 1 */ 404dea3101eS uint8_t roByCategoryMsb; /* FC Word 2 byte 2 */ 405dea3101eS 406dea3101eS uint8_t roByCategoryLsb; /* FC Word 2 byte 3 */ 407dea3101eS } nPort; 408dea3101eS uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */ 409dea3101eS } w2; 410dea3101eS 411dea3101eS uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */ 412dea3101eS }; 413dea3101eS 414dea3101eS struct class_parms { 415dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 416dea3101eS uint8_t classValid:1; /* FC Word 0, bit 31 */ 417dea3101eS uint8_t intermix:1; /* FC Word 0, bit 30 */ 418dea3101eS uint8_t stackedXparent:1; /* FC Word 0, bit 29 */ 419dea3101eS uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */ 420dea3101eS uint8_t seqDelivery:1; /* FC Word 0, bit 27 */ 421dea3101eS uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */ 422dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 423dea3101eS uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */ 424dea3101eS uint8_t seqDelivery:1; /* FC Word 0, bit 27 */ 425dea3101eS uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */ 426dea3101eS uint8_t stackedXparent:1; /* FC Word 0, bit 29 */ 427dea3101eS uint8_t intermix:1; /* FC Word 0, bit 30 */ 428dea3101eS uint8_t classValid:1; /* FC Word 0, bit 31 */ 429dea3101eS 430dea3101eS #endif 431dea3101eS 432dea3101eS uint8_t word0Reserved2; /* FC Word 0, bit 16:23 */ 433dea3101eS 434dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 435dea3101eS uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */ 436dea3101eS uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */ 437dea3101eS uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */ 438dea3101eS uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */ 439dea3101eS uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */ 440dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 441dea3101eS uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */ 442dea3101eS uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */ 443dea3101eS uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */ 444dea3101eS uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */ 445dea3101eS uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */ 446dea3101eS #endif 447dea3101eS 448dea3101eS uint8_t word0Reserved4; /* FC Word 0, bit 0: 7 */ 449dea3101eS 450dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 451dea3101eS uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */ 452dea3101eS uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */ 453dea3101eS uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */ 454dea3101eS uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */ 455dea3101eS uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */ 456dea3101eS uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */ 457dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 458dea3101eS uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */ 459dea3101eS uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */ 460dea3101eS uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */ 461dea3101eS uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */ 462dea3101eS uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */ 463dea3101eS uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */ 464dea3101eS #endif 465dea3101eS 466dea3101eS uint8_t word1Reserved2; /* FC Word 1, bit 16:23 */ 467dea3101eS uint8_t rcvDataSizeMsb; /* FC Word 1, bit 8:15 */ 468dea3101eS uint8_t rcvDataSizeLsb; /* FC Word 1, bit 0: 7 */ 469dea3101eS 470dea3101eS uint8_t concurrentSeqMsb; /* FC Word 2, bit 24:31 */ 471dea3101eS uint8_t concurrentSeqLsb; /* FC Word 2, bit 16:23 */ 472dea3101eS uint8_t EeCreditSeqMsb; /* FC Word 2, bit 8:15 */ 473dea3101eS uint8_t EeCreditSeqLsb; /* FC Word 2, bit 0: 7 */ 474dea3101eS 475dea3101eS uint8_t openSeqPerXchgMsb; /* FC Word 3, bit 24:31 */ 476dea3101eS uint8_t openSeqPerXchgLsb; /* FC Word 3, bit 16:23 */ 477dea3101eS uint8_t word3Reserved1; /* Fc Word 3, bit 8:15 */ 478dea3101eS uint8_t word3Reserved2; /* Fc Word 3, bit 0: 7 */ 479dea3101eS }; 480dea3101eS 481dea3101eS struct serv_parm { /* Structure is in Big Endian format */ 482dea3101eS struct csp cmn; 483dea3101eS struct lpfc_name portName; 484dea3101eS struct lpfc_name nodeName; 485dea3101eS struct class_parms cls1; 486dea3101eS struct class_parms cls2; 487dea3101eS struct class_parms cls3; 488dea3101eS struct class_parms cls4; 489dea3101eS uint8_t vendorVersion[16]; 490dea3101eS }; 491dea3101eS 492dea3101eS /* 493da0436e9SJames Smart * Virtual Fabric Tagging Header 494da0436e9SJames Smart */ 495da0436e9SJames Smart struct fc_vft_header { 496da0436e9SJames Smart uint32_t word0; 497da0436e9SJames Smart #define fc_vft_hdr_r_ctl_SHIFT 24 498da0436e9SJames Smart #define fc_vft_hdr_r_ctl_MASK 0xFF 499da0436e9SJames Smart #define fc_vft_hdr_r_ctl_WORD word0 500da0436e9SJames Smart #define fc_vft_hdr_ver_SHIFT 22 501da0436e9SJames Smart #define fc_vft_hdr_ver_MASK 0x3 502da0436e9SJames Smart #define fc_vft_hdr_ver_WORD word0 503da0436e9SJames Smart #define fc_vft_hdr_type_SHIFT 18 504da0436e9SJames Smart #define fc_vft_hdr_type_MASK 0xF 505da0436e9SJames Smart #define fc_vft_hdr_type_WORD word0 506da0436e9SJames Smart #define fc_vft_hdr_e_SHIFT 16 507da0436e9SJames Smart #define fc_vft_hdr_e_MASK 0x1 508da0436e9SJames Smart #define fc_vft_hdr_e_WORD word0 509da0436e9SJames Smart #define fc_vft_hdr_priority_SHIFT 13 510da0436e9SJames Smart #define fc_vft_hdr_priority_MASK 0x7 511da0436e9SJames Smart #define fc_vft_hdr_priority_WORD word0 512da0436e9SJames Smart #define fc_vft_hdr_vf_id_SHIFT 1 513da0436e9SJames Smart #define fc_vft_hdr_vf_id_MASK 0xFFF 514da0436e9SJames Smart #define fc_vft_hdr_vf_id_WORD word0 515da0436e9SJames Smart uint32_t word1; 516da0436e9SJames Smart #define fc_vft_hdr_hopct_SHIFT 24 517da0436e9SJames Smart #define fc_vft_hdr_hopct_MASK 0xFF 518da0436e9SJames Smart #define fc_vft_hdr_hopct_WORD word1 519da0436e9SJames Smart }; 520da0436e9SJames Smart 521da0436e9SJames Smart /* 522dea3101eS * Extended Link Service LS_COMMAND codes (Payload Word 0) 523dea3101eS */ 524dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 525dea3101eS #define ELS_CMD_MASK 0xffff0000 526dea3101eS #define ELS_RSP_MASK 0xff000000 527dea3101eS #define ELS_CMD_LS_RJT 0x01000000 528dea3101eS #define ELS_CMD_ACC 0x02000000 529dea3101eS #define ELS_CMD_PLOGI 0x03000000 530dea3101eS #define ELS_CMD_FLOGI 0x04000000 531dea3101eS #define ELS_CMD_LOGO 0x05000000 532dea3101eS #define ELS_CMD_ABTX 0x06000000 533dea3101eS #define ELS_CMD_RCS 0x07000000 534dea3101eS #define ELS_CMD_RES 0x08000000 535dea3101eS #define ELS_CMD_RSS 0x09000000 536dea3101eS #define ELS_CMD_RSI 0x0A000000 537dea3101eS #define ELS_CMD_ESTS 0x0B000000 538dea3101eS #define ELS_CMD_ESTC 0x0C000000 539dea3101eS #define ELS_CMD_ADVC 0x0D000000 540dea3101eS #define ELS_CMD_RTV 0x0E000000 541dea3101eS #define ELS_CMD_RLS 0x0F000000 542dea3101eS #define ELS_CMD_ECHO 0x10000000 543dea3101eS #define ELS_CMD_TEST 0x11000000 544dea3101eS #define ELS_CMD_RRQ 0x12000000 545303f2f9cSJames Smart #define ELS_CMD_REC 0x13000000 54686478875SJames Smart #define ELS_CMD_RDP 0x18000000 547dea3101eS #define ELS_CMD_PRLI 0x20100014 548dea3101eS #define ELS_CMD_PRLO 0x21100014 54982d9a2a2SJames Smart #define ELS_CMD_PRLO_ACC 0x02100014 550dea3101eS #define ELS_CMD_PDISC 0x50000000 551dea3101eS #define ELS_CMD_FDISC 0x51000000 552dea3101eS #define ELS_CMD_ADISC 0x52000000 553dea3101eS #define ELS_CMD_FARP 0x54000000 554dea3101eS #define ELS_CMD_FARPR 0x55000000 5557bb3b137SJamie Wellnitz #define ELS_CMD_RPS 0x56000000 5567bb3b137SJamie Wellnitz #define ELS_CMD_RPL 0x57000000 557dea3101eS #define ELS_CMD_FAN 0x60000000 558dea3101eS #define ELS_CMD_RSCN 0x61040000 559dea3101eS #define ELS_CMD_SCR 0x62000000 560dea3101eS #define ELS_CMD_RNID 0x78000000 5617bb3b137SJamie Wellnitz #define ELS_CMD_LIRR 0x7A000000 5628b017a30SJames Smart #define ELS_CMD_LCB 0x81000000 563dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 564dea3101eS #define ELS_CMD_MASK 0xffff 565dea3101eS #define ELS_RSP_MASK 0xff 566dea3101eS #define ELS_CMD_LS_RJT 0x01 567dea3101eS #define ELS_CMD_ACC 0x02 568dea3101eS #define ELS_CMD_PLOGI 0x03 569dea3101eS #define ELS_CMD_FLOGI 0x04 570dea3101eS #define ELS_CMD_LOGO 0x05 571dea3101eS #define ELS_CMD_ABTX 0x06 572dea3101eS #define ELS_CMD_RCS 0x07 573dea3101eS #define ELS_CMD_RES 0x08 574dea3101eS #define ELS_CMD_RSS 0x09 575dea3101eS #define ELS_CMD_RSI 0x0A 576dea3101eS #define ELS_CMD_ESTS 0x0B 577dea3101eS #define ELS_CMD_ESTC 0x0C 578dea3101eS #define ELS_CMD_ADVC 0x0D 579dea3101eS #define ELS_CMD_RTV 0x0E 580dea3101eS #define ELS_CMD_RLS 0x0F 581dea3101eS #define ELS_CMD_ECHO 0x10 582dea3101eS #define ELS_CMD_TEST 0x11 583dea3101eS #define ELS_CMD_RRQ 0x12 584303f2f9cSJames Smart #define ELS_CMD_REC 0x13 58586478875SJames Smart #define ELS_CMD_RDP 0x18 586dea3101eS #define ELS_CMD_PRLI 0x14001020 587dea3101eS #define ELS_CMD_PRLO 0x14001021 58882d9a2a2SJames Smart #define ELS_CMD_PRLO_ACC 0x14001002 589dea3101eS #define ELS_CMD_PDISC 0x50 590dea3101eS #define ELS_CMD_FDISC 0x51 591dea3101eS #define ELS_CMD_ADISC 0x52 592dea3101eS #define ELS_CMD_FARP 0x54 593dea3101eS #define ELS_CMD_FARPR 0x55 5947bb3b137SJamie Wellnitz #define ELS_CMD_RPS 0x56 5957bb3b137SJamie Wellnitz #define ELS_CMD_RPL 0x57 596dea3101eS #define ELS_CMD_FAN 0x60 597dea3101eS #define ELS_CMD_RSCN 0x0461 598dea3101eS #define ELS_CMD_SCR 0x62 599dea3101eS #define ELS_CMD_RNID 0x78 6007bb3b137SJamie Wellnitz #define ELS_CMD_LIRR 0x7A 6018b017a30SJames Smart #define ELS_CMD_LCB 0x81 602dea3101eS #endif 603dea3101eS 604dea3101eS /* 605dea3101eS * LS_RJT Payload Definition 606dea3101eS */ 607dea3101eS 608dea3101eS struct ls_rjt { /* Structure is in Big Endian format */ 609dea3101eS union { 610dea3101eS uint32_t lsRjtError; 611dea3101eS struct { 612dea3101eS uint8_t lsRjtRsvd0; /* FC Word 0, bit 24:31 */ 613dea3101eS 614dea3101eS uint8_t lsRjtRsnCode; /* FC Word 0, bit 16:23 */ 615dea3101eS /* LS_RJT reason codes */ 616dea3101eS #define LSRJT_INVALID_CMD 0x01 617dea3101eS #define LSRJT_LOGICAL_ERR 0x03 618dea3101eS #define LSRJT_LOGICAL_BSY 0x05 619dea3101eS #define LSRJT_PROTOCOL_ERR 0x07 620dea3101eS #define LSRJT_UNABLE_TPC 0x09 /* Unable to perform command */ 621dea3101eS #define LSRJT_CMD_UNSUPPORTED 0x0B 622dea3101eS #define LSRJT_VENDOR_UNIQUE 0xFF /* See Byte 3 */ 623dea3101eS 624dea3101eS uint8_t lsRjtRsnCodeExp; /* FC Word 0, bit 8:15 */ 625dea3101eS /* LS_RJT reason explanation */ 626dea3101eS #define LSEXP_NOTHING_MORE 0x00 627dea3101eS #define LSEXP_SPARM_OPTIONS 0x01 628dea3101eS #define LSEXP_SPARM_ICTL 0x03 629dea3101eS #define LSEXP_SPARM_RCTL 0x05 630dea3101eS #define LSEXP_SPARM_RCV_SIZE 0x07 631dea3101eS #define LSEXP_SPARM_CONCUR_SEQ 0x09 632dea3101eS #define LSEXP_SPARM_CREDIT 0x0B 633dea3101eS #define LSEXP_INVALID_PNAME 0x0D 634dea3101eS #define LSEXP_INVALID_NNAME 0x0E 635dea3101eS #define LSEXP_INVALID_CSP 0x0F 636dea3101eS #define LSEXP_INVALID_ASSOC_HDR 0x11 637dea3101eS #define LSEXP_ASSOC_HDR_REQ 0x13 638dea3101eS #define LSEXP_INVALID_O_SID 0x15 639dea3101eS #define LSEXP_INVALID_OX_RX 0x17 640dea3101eS #define LSEXP_CMD_IN_PROGRESS 0x19 6417f5f3d0dSJames Smart #define LSEXP_PORT_LOGIN_REQ 0x1E 642dea3101eS #define LSEXP_INVALID_NPORT_ID 0x1F 643dea3101eS #define LSEXP_INVALID_SEQ_ID 0x21 644dea3101eS #define LSEXP_INVALID_XCHG 0x23 645dea3101eS #define LSEXP_INACTIVE_XCHG 0x25 646dea3101eS #define LSEXP_RQ_REQUIRED 0x27 647dea3101eS #define LSEXP_OUT_OF_RESOURCE 0x29 648dea3101eS #define LSEXP_CANT_GIVE_DATA 0x2A 649dea3101eS #define LSEXP_REQ_UNSUPPORTED 0x2C 650dea3101eS uint8_t vendorUnique; /* FC Word 0, bit 0: 7 */ 651dea3101eS } b; 652dea3101eS } un; 653dea3101eS }; 654dea3101eS 655dea3101eS /* 656dea3101eS * N_Port Login (FLOGO/PLOGO Request) Payload Definition 657dea3101eS */ 658dea3101eS 659dea3101eS typedef struct _LOGO { /* Structure is in Big Endian format */ 660dea3101eS union { 661dea3101eS uint32_t nPortId32; /* Access nPortId as a word */ 662dea3101eS struct { 663dea3101eS uint8_t word1Reserved1; /* FC Word 1, bit 31:24 */ 664dea3101eS uint8_t nPortIdByte0; /* N_port ID bit 16:23 */ 665dea3101eS uint8_t nPortIdByte1; /* N_port ID bit 8:15 */ 666dea3101eS uint8_t nPortIdByte2; /* N_port ID bit 0: 7 */ 667dea3101eS } b; 668dea3101eS } un; 669dea3101eS struct lpfc_name portName; /* N_port name field */ 670dea3101eS } LOGO; 671dea3101eS 672dea3101eS /* 673dea3101eS * FCP Login (PRLI Request / ACC) Payload Definition 674dea3101eS */ 675dea3101eS 676dea3101eS #define PRLX_PAGE_LEN 0x10 677dea3101eS #define TPRLO_PAGE_LEN 0x14 678dea3101eS 679dea3101eS typedef struct _PRLI { /* Structure is in Big Endian format */ 680dea3101eS uint8_t prliType; /* FC Parm Word 0, bit 24:31 */ 681dea3101eS 682dea3101eS #define PRLI_FCP_TYPE 0x08 683dea3101eS uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */ 684dea3101eS 685dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 686dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ 687dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ 688dea3101eS uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */ 689dea3101eS 690dea3101eS /* ACC = imagePairEstablished */ 691dea3101eS uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */ 692dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ 693dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 694dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ 695dea3101eS uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */ 696dea3101eS uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */ 697dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ 698dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ 699dea3101eS /* ACC = imagePairEstablished */ 700dea3101eS #endif 701dea3101eS 702dea3101eS #define PRLI_REQ_EXECUTED 0x1 /* acceptRspCode */ 703dea3101eS #define PRLI_NO_RESOURCES 0x2 704dea3101eS #define PRLI_INIT_INCOMPLETE 0x3 705dea3101eS #define PRLI_NO_SUCH_PA 0x4 706dea3101eS #define PRLI_PREDEF_CONFIG 0x5 707dea3101eS #define PRLI_PARTIAL_SUCCESS 0x6 708dea3101eS #define PRLI_INVALID_PAGE_CNT 0x7 709dea3101eS uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */ 710dea3101eS 711dea3101eS uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */ 712dea3101eS 713dea3101eS uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */ 714dea3101eS 715dea3101eS uint8_t word3Reserved1; /* FC Parm Word 3, bit 24:31 */ 716dea3101eS uint8_t word3Reserved2; /* FC Parm Word 3, bit 16:23 */ 717dea3101eS 718dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 719dea3101eS uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */ 720dea3101eS uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */ 721dea3101eS uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */ 722dea3101eS uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */ 723dea3101eS uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */ 724dea3101eS uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */ 725dea3101eS uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */ 726dea3101eS uint16_t Retry:1; /* FC Parm Word 3, bit 8 */ 727dea3101eS uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */ 728dea3101eS uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */ 729dea3101eS uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */ 730dea3101eS uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */ 731dea3101eS uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */ 732dea3101eS uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */ 733dea3101eS uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */ 734dea3101eS uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */ 735dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 736dea3101eS uint16_t Retry:1; /* FC Parm Word 3, bit 8 */ 737dea3101eS uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */ 738dea3101eS uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */ 739dea3101eS uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */ 740dea3101eS uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */ 741dea3101eS uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */ 742dea3101eS uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */ 743dea3101eS uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */ 744dea3101eS uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */ 745dea3101eS uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */ 746dea3101eS uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */ 747dea3101eS uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */ 748dea3101eS uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */ 749dea3101eS uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */ 750dea3101eS uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */ 751dea3101eS uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */ 752dea3101eS #endif 753dea3101eS } PRLI; 754dea3101eS 755dea3101eS /* 756dea3101eS * FCP Logout (PRLO Request / ACC) Payload Definition 757dea3101eS */ 758dea3101eS 759dea3101eS typedef struct _PRLO { /* Structure is in Big Endian format */ 760dea3101eS uint8_t prloType; /* FC Parm Word 0, bit 24:31 */ 761dea3101eS 762dea3101eS #define PRLO_FCP_TYPE 0x08 763dea3101eS uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */ 764dea3101eS 765dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 766dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ 767dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ 768dea3101eS uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */ 769dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ 770dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 771dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ 772dea3101eS uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */ 773dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ 774dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ 775dea3101eS #endif 776dea3101eS 777dea3101eS #define PRLO_REQ_EXECUTED 0x1 /* acceptRspCode */ 778dea3101eS #define PRLO_NO_SUCH_IMAGE 0x4 779dea3101eS #define PRLO_INVALID_PAGE_CNT 0x7 780dea3101eS 781dea3101eS uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */ 782dea3101eS 783dea3101eS uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */ 784dea3101eS 785dea3101eS uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */ 786dea3101eS 787dea3101eS uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */ 788dea3101eS } PRLO; 789dea3101eS 790dea3101eS typedef struct _ADISC { /* Structure is in Big Endian format */ 791dea3101eS uint32_t hardAL_PA; 792dea3101eS struct lpfc_name portName; 793dea3101eS struct lpfc_name nodeName; 794dea3101eS uint32_t DID; 795dea3101eS } ADISC; 796dea3101eS 797dea3101eS typedef struct _FARP { /* Structure is in Big Endian format */ 798dea3101eS uint32_t Mflags:8; 799dea3101eS uint32_t Odid:24; 800dea3101eS #define FARP_NO_ACTION 0 /* FARP information enclosed, no 801dea3101eS action */ 802dea3101eS #define FARP_MATCH_PORT 0x1 /* Match on Responder Port Name */ 803dea3101eS #define FARP_MATCH_NODE 0x2 /* Match on Responder Node Name */ 804dea3101eS #define FARP_MATCH_IP 0x4 /* Match on IP address, not supported */ 805dea3101eS #define FARP_MATCH_IPV4 0x5 /* Match on IPV4 address, not 806dea3101eS supported */ 807dea3101eS #define FARP_MATCH_IPV6 0x6 /* Match on IPV6 address, not 808dea3101eS supported */ 809dea3101eS uint32_t Rflags:8; 810dea3101eS uint32_t Rdid:24; 811dea3101eS #define FARP_REQUEST_PLOGI 0x1 /* Request for PLOGI */ 812dea3101eS #define FARP_REQUEST_FARPR 0x2 /* Request for FARP Response */ 813dea3101eS struct lpfc_name OportName; 814dea3101eS struct lpfc_name OnodeName; 815dea3101eS struct lpfc_name RportName; 816dea3101eS struct lpfc_name RnodeName; 817dea3101eS uint8_t Oipaddr[16]; 818dea3101eS uint8_t Ripaddr[16]; 819dea3101eS } FARP; 820dea3101eS 821dea3101eS typedef struct _FAN { /* Structure is in Big Endian format */ 822dea3101eS uint32_t Fdid; 823dea3101eS struct lpfc_name FportName; 824dea3101eS struct lpfc_name FnodeName; 825dea3101eS } FAN; 826dea3101eS 827dea3101eS typedef struct _SCR { /* Structure is in Big Endian format */ 828dea3101eS uint8_t resvd1; 829dea3101eS uint8_t resvd2; 830dea3101eS uint8_t resvd3; 831dea3101eS uint8_t Function; 832dea3101eS #define SCR_FUNC_FABRIC 0x01 833dea3101eS #define SCR_FUNC_NPORT 0x02 834dea3101eS #define SCR_FUNC_FULL 0x03 835dea3101eS #define SCR_CLEAR 0xff 836dea3101eS } SCR; 837dea3101eS 838dea3101eS typedef struct _RNID_TOP_DISC { 839dea3101eS struct lpfc_name portName; 840dea3101eS uint8_t resvd[8]; 841dea3101eS uint32_t unitType; 842dea3101eS #define RNID_HBA 0x7 843dea3101eS #define RNID_HOST 0xa 844dea3101eS #define RNID_DRIVER 0xd 845dea3101eS uint32_t physPort; 846dea3101eS uint32_t attachedNodes; 847dea3101eS uint16_t ipVersion; 848dea3101eS #define RNID_IPV4 0x1 849dea3101eS #define RNID_IPV6 0x2 850dea3101eS uint16_t UDPport; 851dea3101eS uint8_t ipAddr[16]; 852dea3101eS uint16_t resvd1; 853dea3101eS uint16_t flags; 854dea3101eS #define RNID_TD_SUPPORT 0x1 855dea3101eS #define RNID_LP_VALID 0x2 856dea3101eS } RNID_TOP_DISC; 857dea3101eS 858dea3101eS typedef struct _RNID { /* Structure is in Big Endian format */ 859dea3101eS uint8_t Format; 860dea3101eS #define RNID_TOPOLOGY_DISC 0xdf 861dea3101eS uint8_t CommonLen; 862dea3101eS uint8_t resvd1; 863dea3101eS uint8_t SpecificLen; 864dea3101eS struct lpfc_name portName; 865dea3101eS struct lpfc_name nodeName; 866dea3101eS union { 867dea3101eS RNID_TOP_DISC topologyDisc; /* topology disc (0xdf) */ 868dea3101eS } un; 869dea3101eS } RNID; 870dea3101eS 8717bb3b137SJamie Wellnitz typedef struct _RPS { /* Structure is in Big Endian format */ 8727bb3b137SJamie Wellnitz union { 8737bb3b137SJamie Wellnitz uint32_t portNum; 8747bb3b137SJamie Wellnitz struct lpfc_name portName; 8757bb3b137SJamie Wellnitz } un; 8767bb3b137SJamie Wellnitz } RPS; 8777bb3b137SJamie Wellnitz 8787bb3b137SJamie Wellnitz typedef struct _RPS_RSP { /* Structure is in Big Endian format */ 8797bb3b137SJamie Wellnitz uint16_t rsvd1; 8807bb3b137SJamie Wellnitz uint16_t portStatus; 8817bb3b137SJamie Wellnitz uint32_t linkFailureCnt; 8827bb3b137SJamie Wellnitz uint32_t lossSyncCnt; 8837bb3b137SJamie Wellnitz uint32_t lossSignalCnt; 8847bb3b137SJamie Wellnitz uint32_t primSeqErrCnt; 8857bb3b137SJamie Wellnitz uint32_t invalidXmitWord; 8867bb3b137SJamie Wellnitz uint32_t crcCnt; 8877bb3b137SJamie Wellnitz } RPS_RSP; 8887bb3b137SJamie Wellnitz 88912265f68SJames Smart struct RLS { /* Structure is in Big Endian format */ 89012265f68SJames Smart uint32_t rls; 89112265f68SJames Smart #define rls_rsvd_SHIFT 24 89212265f68SJames Smart #define rls_rsvd_MASK 0x000000ff 89312265f68SJames Smart #define rls_rsvd_WORD rls 89412265f68SJames Smart #define rls_did_SHIFT 0 89512265f68SJames Smart #define rls_did_MASK 0x00ffffff 89612265f68SJames Smart #define rls_did_WORD rls 89712265f68SJames Smart }; 89812265f68SJames Smart 89912265f68SJames Smart struct RLS_RSP { /* Structure is in Big Endian format */ 90012265f68SJames Smart uint32_t linkFailureCnt; 90112265f68SJames Smart uint32_t lossSyncCnt; 90212265f68SJames Smart uint32_t lossSignalCnt; 90312265f68SJames Smart uint32_t primSeqErrCnt; 90412265f68SJames Smart uint32_t invalidXmitWord; 90512265f68SJames Smart uint32_t crcCnt; 90612265f68SJames Smart }; 90712265f68SJames Smart 90819ca7609SJames Smart struct RRQ { /* Structure is in Big Endian format */ 90919ca7609SJames Smart uint32_t rrq; 91019ca7609SJames Smart #define rrq_rsvd_SHIFT 24 91119ca7609SJames Smart #define rrq_rsvd_MASK 0x000000ff 91219ca7609SJames Smart #define rrq_rsvd_WORD rrq 91319ca7609SJames Smart #define rrq_did_SHIFT 0 91419ca7609SJames Smart #define rrq_did_MASK 0x00ffffff 91519ca7609SJames Smart #define rrq_did_WORD rrq 91619ca7609SJames Smart uint32_t rrq_exchg; 91719ca7609SJames Smart #define rrq_oxid_SHIFT 16 91819ca7609SJames Smart #define rrq_oxid_MASK 0xffff 91919ca7609SJames Smart #define rrq_oxid_WORD rrq_exchg 92019ca7609SJames Smart #define rrq_rxid_SHIFT 0 92119ca7609SJames Smart #define rrq_rxid_MASK 0xffff 92219ca7609SJames Smart #define rrq_rxid_WORD rrq_exchg 92319ca7609SJames Smart }; 92419ca7609SJames Smart 925912e3acdSJames Smart #define LPFC_MAX_VFN_PER_PFN 255 /* Maximum VFs allowed per ARI */ 926912e3acdSJames Smart #define LPFC_DEF_VFN_PER_PFN 0 /* Default VFs due to platform limitation*/ 92719ca7609SJames Smart 92812265f68SJames Smart struct RTV_RSP { /* Structure is in Big Endian format */ 92912265f68SJames Smart uint32_t ratov; 93012265f68SJames Smart uint32_t edtov; 93112265f68SJames Smart uint32_t qtov; 93212265f68SJames Smart #define qtov_rsvd0_SHIFT 28 93312265f68SJames Smart #define qtov_rsvd0_MASK 0x0000000f 93412265f68SJames Smart #define qtov_rsvd0_WORD qtov /* reserved */ 93512265f68SJames Smart #define qtov_edtovres_SHIFT 27 93612265f68SJames Smart #define qtov_edtovres_MASK 0x00000001 93712265f68SJames Smart #define qtov_edtovres_WORD qtov /* E_D_TOV Resolution */ 93812265f68SJames Smart #define qtov__rsvd1_SHIFT 19 93912265f68SJames Smart #define qtov_rsvd1_MASK 0x0000003f 94012265f68SJames Smart #define qtov_rsvd1_WORD qtov /* reserved */ 94112265f68SJames Smart #define qtov_rttov_SHIFT 18 94212265f68SJames Smart #define qtov_rttov_MASK 0x00000001 94312265f68SJames Smart #define qtov_rttov_WORD qtov /* R_T_TOV value */ 94412265f68SJames Smart #define qtov_rsvd2_SHIFT 0 94512265f68SJames Smart #define qtov_rsvd2_MASK 0x0003ffff 94612265f68SJames Smart #define qtov_rsvd2_WORD qtov /* reserved */ 94712265f68SJames Smart }; 94812265f68SJames Smart 94912265f68SJames Smart 9507bb3b137SJamie Wellnitz typedef struct _RPL { /* Structure is in Big Endian format */ 9517bb3b137SJamie Wellnitz uint32_t maxsize; 9527bb3b137SJamie Wellnitz uint32_t index; 9537bb3b137SJamie Wellnitz } RPL; 9547bb3b137SJamie Wellnitz 9557bb3b137SJamie Wellnitz typedef struct _PORT_NUM_BLK { 9567bb3b137SJamie Wellnitz uint32_t portNum; 9577bb3b137SJamie Wellnitz uint32_t portID; 9587bb3b137SJamie Wellnitz struct lpfc_name portName; 9597bb3b137SJamie Wellnitz } PORT_NUM_BLK; 9607bb3b137SJamie Wellnitz 9617bb3b137SJamie Wellnitz typedef struct _RPL_RSP { /* Structure is in Big Endian format */ 9627bb3b137SJamie Wellnitz uint32_t listLen; 9637bb3b137SJamie Wellnitz uint32_t index; 9647bb3b137SJamie Wellnitz PORT_NUM_BLK port_num_blk; 9657bb3b137SJamie Wellnitz } RPL_RSP; 966dea3101eS 967dea3101eS /* This is used for RSCN command */ 968dea3101eS typedef struct _D_ID { /* Structure is in Big Endian format */ 969dea3101eS union { 970dea3101eS uint32_t word; 971dea3101eS struct { 972dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 973dea3101eS uint8_t resv; 974dea3101eS uint8_t domain; 975dea3101eS uint8_t area; 976dea3101eS uint8_t id; 977dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 978dea3101eS uint8_t id; 979dea3101eS uint8_t area; 980dea3101eS uint8_t domain; 981dea3101eS uint8_t resv; 982dea3101eS #endif 983dea3101eS } b; 984dea3101eS } un; 985dea3101eS } D_ID; 986dea3101eS 987eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_PORT 0x0 988eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_AREA 0x1 989eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_DOMAIN 0x2 990eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_FABRIC 0x3 991eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_MASK 0x3 992eaf15d5bSJames Smart 993dea3101eS /* 994dea3101eS * Structure to define all ELS Payload types 995dea3101eS */ 996dea3101eS 997dea3101eS typedef struct _ELS_PKT { /* Structure is in Big Endian format */ 998dea3101eS uint8_t elsCode; /* FC Word 0, bit 24:31 */ 999dea3101eS uint8_t elsByte1; 1000dea3101eS uint8_t elsByte2; 1001dea3101eS uint8_t elsByte3; 1002dea3101eS union { 1003dea3101eS struct ls_rjt lsRjt; /* Payload for LS_RJT ELS response */ 1004dea3101eS struct serv_parm logi; /* Payload for PLOGI/FLOGI/PDISC/ACC */ 1005dea3101eS LOGO logo; /* Payload for PLOGO/FLOGO/ACC */ 1006dea3101eS PRLI prli; /* Payload for PRLI/ACC */ 1007dea3101eS PRLO prlo; /* Payload for PRLO/ACC */ 1008dea3101eS ADISC adisc; /* Payload for ADISC/ACC */ 1009dea3101eS FARP farp; /* Payload for FARP/ACC */ 1010dea3101eS FAN fan; /* Payload for FAN */ 1011dea3101eS SCR scr; /* Payload for SCR/ACC */ 1012dea3101eS RNID rnid; /* Payload for RNID */ 1013dea3101eS uint8_t pad[128 - 4]; /* Pad out to payload of 128 bytes */ 1014dea3101eS } un; 1015dea3101eS } ELS_PKT; 1016dea3101eS 10178b017a30SJames Smart /* 10188b017a30SJames Smart * Link Cable Beacon (LCB) ELS Frame 10198b017a30SJames Smart */ 10208b017a30SJames Smart 10218b017a30SJames Smart struct fc_lcb_request_frame { 10228b017a30SJames Smart uint32_t lcb_command; /* ELS command opcode (0x81) */ 10238b017a30SJames Smart uint8_t lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */ 10248b017a30SJames Smart #define LPFC_LCB_ON 0x1 10258b017a30SJames Smart #define LPFC_LCB_OFF 0x2 10268b017a30SJames Smart uint8_t reserved[3]; 10278b017a30SJames Smart 10288b017a30SJames Smart uint8_t lcb_type; /* LCB Payload Word 2, bit 24:31 */ 10298b017a30SJames Smart #define LPFC_LCB_GREEN 0x1 10308b017a30SJames Smart #define LPFC_LCB_AMBER 0x2 10318b017a30SJames Smart uint8_t lcb_frequency; /* LCB Payload Word 2, bit 16:23 */ 10328b017a30SJames Smart uint16_t lcb_duration; /* LCB Payload Word 2, bit 15:0 */ 10338b017a30SJames Smart }; 10348b017a30SJames Smart 10358b017a30SJames Smart /* 10368b017a30SJames Smart * Link Cable Beacon (LCB) ELS Response Frame 10378b017a30SJames Smart */ 10388b017a30SJames Smart struct fc_lcb_res_frame { 10398b017a30SJames Smart uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */ 10408b017a30SJames Smart uint8_t lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */ 10418b017a30SJames Smart uint8_t reserved[3]; 10428b017a30SJames Smart uint8_t lcb_type; /* LCB Payload Word 2, bit 24:31 */ 10438b017a30SJames Smart uint8_t lcb_frequency; /* LCB Payload Word 2, bit 16:23 */ 10448b017a30SJames Smart uint16_t lcb_duration; /* LCB Payload Word 2, bit 15:0 */ 10458b017a30SJames Smart }; 10468b017a30SJames Smart 104786478875SJames Smart /* 104886478875SJames Smart * Read Diagnostic Parameters (RDP) ELS frame. 104986478875SJames Smart */ 105086478875SJames Smart #define SFF_PG0_IDENT_SFP 0x3 105186478875SJames Smart 105286478875SJames Smart #define SFP_FLAG_PT_OPTICAL 0x0 105386478875SJames Smart #define SFP_FLAG_PT_SWLASER 0x01 105486478875SJames Smart #define SFP_FLAG_PT_LWLASER_LC1310 0x02 105586478875SJames Smart #define SFP_FLAG_PT_LWLASER_LL1550 0x03 105686478875SJames Smart #define SFP_FLAG_PT_MASK 0x0F 105786478875SJames Smart #define SFP_FLAG_PT_SHIFT 0 105886478875SJames Smart 105986478875SJames Smart #define SFP_FLAG_IS_OPTICAL_PORT 0x01 106086478875SJames Smart #define SFP_FLAG_IS_OPTICAL_MASK 0x010 106186478875SJames Smart #define SFP_FLAG_IS_OPTICAL_SHIFT 4 106286478875SJames Smart 106386478875SJames Smart #define SFP_FLAG_IS_DESC_VALID 0x01 106486478875SJames Smart #define SFP_FLAG_IS_DESC_VALID_MASK 0x020 106586478875SJames Smart #define SFP_FLAG_IS_DESC_VALID_SHIFT 5 106686478875SJames Smart 106786478875SJames Smart #define SFP_FLAG_CT_UNKNOWN 0x0 106886478875SJames Smart #define SFP_FLAG_CT_SFP_PLUS 0x01 106986478875SJames Smart #define SFP_FLAG_CT_MASK 0x3C 107086478875SJames Smart #define SFP_FLAG_CT_SHIFT 6 107186478875SJames Smart 107286478875SJames Smart struct fc_rdp_port_name_info { 107386478875SJames Smart uint8_t wwnn[8]; 107486478875SJames Smart uint8_t wwpn[8]; 107586478875SJames Smart }; 107686478875SJames Smart 107786478875SJames Smart 107886478875SJames Smart /* 107986478875SJames Smart * Link Error Status Block Structure (FC-FS-3) for RDP 108086478875SJames Smart * This similar to RPS ELS 108186478875SJames Smart */ 108286478875SJames Smart struct fc_link_status { 108386478875SJames Smart uint32_t link_failure_cnt; 108486478875SJames Smart uint32_t loss_of_synch_cnt; 108586478875SJames Smart uint32_t loss_of_signal_cnt; 108686478875SJames Smart uint32_t primitive_seq_proto_err; 108786478875SJames Smart uint32_t invalid_trans_word; 108886478875SJames Smart uint32_t invalid_crc_cnt; 108986478875SJames Smart 109086478875SJames Smart }; 109186478875SJames Smart 109286478875SJames Smart #define RDP_PORT_NAMES_DESC_TAG 0x00010003 109386478875SJames Smart struct fc_rdp_port_name_desc { 109486478875SJames Smart uint32_t tag; /* 0001 0003h */ 109586478875SJames Smart uint32_t length; /* set to size of payload struct */ 109686478875SJames Smart struct fc_rdp_port_name_info port_names; 109786478875SJames Smart }; 109886478875SJames Smart 109986478875SJames Smart 11004258e98eSJames Smart struct fc_rdp_fec_info { 11014258e98eSJames Smart uint32_t CorrectedBlocks; 11024258e98eSJames Smart uint32_t UncorrectableBlocks; 11034258e98eSJames Smart }; 11044258e98eSJames Smart 11054258e98eSJames Smart #define RDP_FEC_DESC_TAG 0x00010005 11064258e98eSJames Smart struct fc_fec_rdp_desc { 11074258e98eSJames Smart uint32_t tag; 11084258e98eSJames Smart uint32_t length; 11094258e98eSJames Smart struct fc_rdp_fec_info info; 11104258e98eSJames Smart }; 11114258e98eSJames Smart 111286478875SJames Smart struct fc_rdp_link_error_status_payload_info { 111386478875SJames Smart struct fc_link_status link_status; /* 24 bytes */ 111486478875SJames Smart uint32_t port_type; /* bits 31-30 only */ 111586478875SJames Smart }; 111686478875SJames Smart 111786478875SJames Smart #define RDP_LINK_ERROR_STATUS_DESC_TAG 0x00010002 111886478875SJames Smart struct fc_rdp_link_error_status_desc { 111986478875SJames Smart uint32_t tag; /* 0001 0002h */ 112086478875SJames Smart uint32_t length; /* set to size of payload struct */ 112186478875SJames Smart struct fc_rdp_link_error_status_payload_info info; 112286478875SJames Smart }; 112386478875SJames Smart 112486478875SJames Smart #define VN_PT_PHY_UNKNOWN 0x00 112586478875SJames Smart #define VN_PT_PHY_PF_PORT 0x01 112686478875SJames Smart #define VN_PT_PHY_ETH_MAC 0x10 112786478875SJames Smart #define VN_PT_PHY_SHIFT 30 112886478875SJames Smart 112986478875SJames Smart #define RDP_PS_1GB 0x8000 113086478875SJames Smart #define RDP_PS_2GB 0x4000 113186478875SJames Smart #define RDP_PS_4GB 0x2000 113286478875SJames Smart #define RDP_PS_10GB 0x1000 113386478875SJames Smart #define RDP_PS_8GB 0x0800 113486478875SJames Smart #define RDP_PS_16GB 0x0400 113586478875SJames Smart #define RDP_PS_32GB 0x0200 113686478875SJames Smart 113756204984SJames Smart #define RDP_CAP_USER_CONFIGURED 0x0002 113886478875SJames Smart #define RDP_CAP_UNKNOWN 0x0001 113986478875SJames Smart #define RDP_PS_UNKNOWN 0x0002 114086478875SJames Smart #define RDP_PS_NOT_ESTABLISHED 0x0001 114186478875SJames Smart 114286478875SJames Smart struct fc_rdp_port_speed { 114386478875SJames Smart uint16_t capabilities; 114486478875SJames Smart uint16_t speed; 114586478875SJames Smart }; 114686478875SJames Smart 114786478875SJames Smart struct fc_rdp_port_speed_info { 114886478875SJames Smart struct fc_rdp_port_speed port_speed; 114986478875SJames Smart }; 115086478875SJames Smart 115186478875SJames Smart #define RDP_PORT_SPEED_DESC_TAG 0x00010001 115286478875SJames Smart struct fc_rdp_port_speed_desc { 115386478875SJames Smart uint32_t tag; /* 00010001h */ 115486478875SJames Smart uint32_t length; /* set to size of payload struct */ 115586478875SJames Smart struct fc_rdp_port_speed_info info; 115686478875SJames Smart }; 115786478875SJames Smart 115886478875SJames Smart #define RDP_NPORT_ID_SIZE 4 115986478875SJames Smart #define RDP_N_PORT_DESC_TAG 0x00000003 116086478875SJames Smart struct fc_rdp_nport_desc { 116186478875SJames Smart uint32_t tag; /* 0000 0003h, big endian */ 116286478875SJames Smart uint32_t length; /* size of RDP_N_PORT_ID struct */ 116386478875SJames Smart uint32_t nport_id : 12; 116486478875SJames Smart uint32_t reserved : 8; 116586478875SJames Smart }; 116686478875SJames Smart 116786478875SJames Smart 116886478875SJames Smart struct fc_rdp_link_service_info { 116986478875SJames Smart uint32_t els_req; /* Request payload word 0 value.*/ 117086478875SJames Smart }; 117186478875SJames Smart 117286478875SJames Smart #define RDP_LINK_SERVICE_DESC_TAG 0x00000001 117386478875SJames Smart struct fc_rdp_link_service_desc { 117486478875SJames Smart uint32_t tag; /* Descriptor tag 1 */ 117586478875SJames Smart uint32_t length; /* set to size of payload struct. */ 117686478875SJames Smart struct fc_rdp_link_service_info payload; 117786478875SJames Smart /* must be ELS req Word 0(0x18) */ 117886478875SJames Smart }; 117986478875SJames Smart 118086478875SJames Smart struct fc_rdp_sfp_info { 118186478875SJames Smart uint16_t temperature; 118286478875SJames Smart uint16_t vcc; 118386478875SJames Smart uint16_t tx_bias; 118486478875SJames Smart uint16_t tx_power; 118586478875SJames Smart uint16_t rx_power; 118686478875SJames Smart uint16_t flags; 118786478875SJames Smart }; 118886478875SJames Smart 118986478875SJames Smart #define RDP_SFP_DESC_TAG 0x00010000 119086478875SJames Smart struct fc_rdp_sfp_desc { 119186478875SJames Smart uint32_t tag; 119286478875SJames Smart uint32_t length; /* set to size of sfp_info struct */ 119386478875SJames Smart struct fc_rdp_sfp_info sfp_info; 119486478875SJames Smart }; 119586478875SJames Smart 119656204984SJames Smart /* Buffer Credit Descriptor */ 119756204984SJames Smart struct fc_rdp_bbc_info { 119856204984SJames Smart uint32_t port_bbc; /* FC_Port buffer-to-buffer credit */ 119956204984SJames Smart uint32_t attached_port_bbc; 120056204984SJames Smart uint32_t rtt; /* Round trip time */ 120156204984SJames Smart }; 120256204984SJames Smart #define RDP_BBC_DESC_TAG 0x00010006 120356204984SJames Smart struct fc_rdp_bbc_desc { 120456204984SJames Smart uint32_t tag; 120556204984SJames Smart uint32_t length; 120656204984SJames Smart struct fc_rdp_bbc_info bbc_info; 120756204984SJames Smart }; 120856204984SJames Smart 1209310429efSJames Smart /* Optical Element Type Transgression Flags */ 1210310429efSJames Smart #define RDP_OET_LOW_WARNING 0x1 1211310429efSJames Smart #define RDP_OET_HIGH_WARNING 0x2 1212310429efSJames Smart #define RDP_OET_LOW_ALARM 0x4 1213310429efSJames Smart #define RDP_OET_HIGH_ALARM 0x8 1214310429efSJames Smart 121556204984SJames Smart #define RDP_OED_TEMPERATURE 0x1 121656204984SJames Smart #define RDP_OED_VOLTAGE 0x2 121756204984SJames Smart #define RDP_OED_TXBIAS 0x3 121856204984SJames Smart #define RDP_OED_TXPOWER 0x4 121956204984SJames Smart #define RDP_OED_RXPOWER 0x5 122056204984SJames Smart 122156204984SJames Smart #define RDP_OED_TYPE_SHIFT 28 122256204984SJames Smart /* Optical Element Data descriptor */ 122356204984SJames Smart struct fc_rdp_oed_info { 122456204984SJames Smart uint16_t hi_alarm; 122556204984SJames Smart uint16_t lo_alarm; 122656204984SJames Smart uint16_t hi_warning; 122756204984SJames Smart uint16_t lo_warning; 122856204984SJames Smart uint32_t function_flags; 122956204984SJames Smart }; 123056204984SJames Smart #define RDP_OED_DESC_TAG 0x00010007 123156204984SJames Smart struct fc_rdp_oed_sfp_desc { 123256204984SJames Smart uint32_t tag; 123356204984SJames Smart uint32_t length; 123456204984SJames Smart struct fc_rdp_oed_info oed_info; 123556204984SJames Smart }; 123656204984SJames Smart 123756204984SJames Smart /* Optical Product Data descriptor */ 123856204984SJames Smart struct fc_rdp_opd_sfp_info { 123956204984SJames Smart uint8_t vendor_name[16]; 124056204984SJames Smart uint8_t model_number[16]; 124156204984SJames Smart uint8_t serial_number[16]; 124256204984SJames Smart uint8_t reserved[2]; 124356204984SJames Smart uint8_t revision[2]; 124456204984SJames Smart uint8_t date[8]; 124556204984SJames Smart }; 124656204984SJames Smart 124756204984SJames Smart #define RDP_OPD_DESC_TAG 0x00010008 124856204984SJames Smart struct fc_rdp_opd_sfp_desc { 124956204984SJames Smart uint32_t tag; 125056204984SJames Smart uint32_t length; 125156204984SJames Smart struct fc_rdp_opd_sfp_info opd_info; 125256204984SJames Smart }; 125356204984SJames Smart 125486478875SJames Smart struct fc_rdp_req_frame { 125586478875SJames Smart uint32_t rdp_command; /* ELS command opcode (0x18)*/ 125686478875SJames Smart uint32_t rdp_des_length; /* RDP Payload Word 1 */ 125786478875SJames Smart struct fc_rdp_nport_desc nport_id_desc; /* RDP Payload Word 2 - 4 */ 125886478875SJames Smart }; 125986478875SJames Smart 126086478875SJames Smart 126186478875SJames Smart struct fc_rdp_res_frame { 126286478875SJames Smart uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */ 126386478875SJames Smart uint32_t length; /* FC Word 1 */ 126486478875SJames Smart struct fc_rdp_link_service_desc link_service_desc; /* Word 2 -4 */ 126586478875SJames Smart struct fc_rdp_sfp_desc sfp_desc; /* Word 5 -9 */ 126686478875SJames Smart struct fc_rdp_port_speed_desc portspeed_desc; /* Word 10-12 */ 126786478875SJames Smart struct fc_rdp_link_error_status_desc link_error_desc; /* Word 13-21 */ 126886478875SJames Smart struct fc_rdp_port_name_desc diag_port_names_desc; /* Word 22-27 */ 126986478875SJames Smart struct fc_rdp_port_name_desc attached_port_names_desc;/* Word 28-33 */ 1270*6c92d1d0SJames Smart struct fc_fec_rdp_desc fec_desc; /* FC word 34-37*/ 1271*6c92d1d0SJames Smart struct fc_rdp_bbc_desc bbc_desc; /* FC Word 38-42*/ 1272*6c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_temp_desc; /* FC Word 43-47*/ 1273*6c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_voltage_desc; /* FC word 48-52*/ 1274*6c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_txbias_desc; /* FC word 53-57*/ 1275*6c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_txpower_desc; /* FC word 58-62*/ 1276*6c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_rxpower_desc; /* FC word 63-67*/ 1277*6c92d1d0SJames Smart struct fc_rdp_opd_sfp_desc opd_desc; /* FC word 68-84*/ 127886478875SJames Smart }; 127986478875SJames Smart 128086478875SJames Smart 128176b2c34aSJames Smart /******** FDMI ********/ 128276b2c34aSJames Smart 128376b2c34aSJames Smart /* lpfc_sli_ct_request defines the CT_IU preamble for FDMI commands */ 128476b2c34aSJames Smart #define SLI_CT_FDMI_Subtypes 0x10 /* Management Service Subtype */ 1285dea3101eS 1286dea3101eS /* 128776b2c34aSJames Smart * Registered Port List Format 1288dea3101eS */ 128976b2c34aSJames Smart struct lpfc_fdmi_reg_port_list { 129076b2c34aSJames Smart uint32_t EntryCnt; 129176b2c34aSJames Smart uint32_t pe; /* Variable-length array */ 1292dea3101eS }; 1293dea3101eS 1294dea3101eS 129576b2c34aSJames Smart /* Definitions for HBA / Port attribute entries */ 129676b2c34aSJames Smart 129776b2c34aSJames Smart struct lpfc_fdmi_attr_def { /* Defined in TLV format */ 129876b2c34aSJames Smart /* Structure is in Big Endian format */ 129976b2c34aSJames Smart uint32_t AttrType:16; 130076b2c34aSJames Smart uint32_t AttrLen:16; 130176b2c34aSJames Smart uint32_t AttrValue; /* Marks start of Value (ATTRIBUTE_ENTRY) */ 130276b2c34aSJames Smart }; 130376b2c34aSJames Smart 130476b2c34aSJames Smart 130576b2c34aSJames Smart /* Attribute Entry */ 130676b2c34aSJames Smart struct lpfc_fdmi_attr_entry { 1307dea3101eS union { 13084258e98eSJames Smart uint32_t AttrInt; 13094258e98eSJames Smart uint8_t AttrTypes[32]; 13104258e98eSJames Smart uint8_t AttrString[256]; 13114258e98eSJames Smart struct lpfc_name AttrWWN; 1312dea3101eS } un; 131376b2c34aSJames Smart }; 131476b2c34aSJames Smart 131576b2c34aSJames Smart #define LPFC_FDMI_MAX_AE_SIZE sizeof(struct lpfc_fdmi_attr_entry) 1316dea3101eS 1317dea3101eS /* 1318dea3101eS * HBA Attribute Block 1319dea3101eS */ 132076b2c34aSJames Smart struct lpfc_fdmi_attr_block { 1321dea3101eS uint32_t EntryCnt; /* Number of HBA attribute entries */ 132276b2c34aSJames Smart struct lpfc_fdmi_attr_entry Entry; /* Variable-length array */ 132376b2c34aSJames Smart }; 1324dea3101eS 1325dea3101eS /* 1326dea3101eS * Port Entry 1327dea3101eS */ 132876b2c34aSJames Smart struct lpfc_fdmi_port_entry { 1329dea3101eS struct lpfc_name PortName; 133076b2c34aSJames Smart }; 1331dea3101eS 1332dea3101eS /* 1333dea3101eS * HBA Identifier 1334dea3101eS */ 133576b2c34aSJames Smart struct lpfc_fdmi_hba_ident { 1336dea3101eS struct lpfc_name PortName; 133776b2c34aSJames Smart }; 1338dea3101eS 1339dea3101eS /* 1340dea3101eS * Register HBA(RHBA) 1341dea3101eS */ 134276b2c34aSJames Smart struct lpfc_fdmi_reg_hba { 134376b2c34aSJames Smart struct lpfc_fdmi_hba_ident hi; 134476b2c34aSJames Smart struct lpfc_fdmi_reg_port_list rpl; /* variable-length array */ 134576b2c34aSJames Smart /* struct lpfc_fdmi_attr_block ab; */ 134676b2c34aSJames Smart }; 1347dea3101eS 1348dea3101eS /* 1349dea3101eS * Register HBA Attributes (RHAT) 1350dea3101eS */ 135176b2c34aSJames Smart struct lpfc_fdmi_reg_hbaattr { 1352dea3101eS struct lpfc_name HBA_PortName; 135376b2c34aSJames Smart struct lpfc_fdmi_attr_block ab; 135476b2c34aSJames Smart }; 1355dea3101eS 1356dea3101eS /* 1357dea3101eS * Register Port Attributes (RPA) 1358dea3101eS */ 135976b2c34aSJames Smart struct lpfc_fdmi_reg_portattr { 1360dea3101eS struct lpfc_name PortName; 136176b2c34aSJames Smart struct lpfc_fdmi_attr_block ab; 136276b2c34aSJames Smart }; 1363dea3101eS 1364dea3101eS /* 136576b2c34aSJames Smart * HBA MAnagement Operations Command Codes 1366dea3101eS */ 136776b2c34aSJames Smart #define SLI_MGMT_GRHL 0x100 /* Get registered HBA list */ 136876b2c34aSJames Smart #define SLI_MGMT_GHAT 0x101 /* Get HBA attributes */ 136976b2c34aSJames Smart #define SLI_MGMT_GRPL 0x102 /* Get registered Port list */ 137076b2c34aSJames Smart #define SLI_MGMT_GPAT 0x110 /* Get Port attributes */ 137176b2c34aSJames Smart #define SLI_MGMT_GPAS 0x120 /* Get Port Statistics */ 137276b2c34aSJames Smart #define SLI_MGMT_RHBA 0x200 /* Register HBA */ 137376b2c34aSJames Smart #define SLI_MGMT_RHAT 0x201 /* Register HBA attributes */ 137476b2c34aSJames Smart #define SLI_MGMT_RPRT 0x210 /* Register Port */ 137576b2c34aSJames Smart #define SLI_MGMT_RPA 0x211 /* Register Port attributes */ 137676b2c34aSJames Smart #define SLI_MGMT_DHBA 0x300 /* De-register HBA */ 137776b2c34aSJames Smart #define SLI_MGMT_DHAT 0x301 /* De-register HBA attributes */ 137876b2c34aSJames Smart #define SLI_MGMT_DPRT 0x310 /* De-register Port */ 137976b2c34aSJames Smart #define SLI_MGMT_DPA 0x311 /* De-register Port attributes */ 1380dea3101eS 13814258e98eSJames Smart #define LPFC_FDMI_MAX_RETRY 3 /* Max retries for a FDMI command */ 13824258e98eSJames Smart 1383dea3101eS /* 138476b2c34aSJames Smart * HBA Attribute Types 1385dea3101eS */ 138676b2c34aSJames Smart #define RHBA_NODENAME 0x1 /* 8 byte WWNN */ 138776b2c34aSJames Smart #define RHBA_MANUFACTURER 0x2 /* 4 to 64 byte ASCII string */ 138876b2c34aSJames Smart #define RHBA_SERIAL_NUMBER 0x3 /* 4 to 64 byte ASCII string */ 138976b2c34aSJames Smart #define RHBA_MODEL 0x4 /* 4 to 256 byte ASCII string */ 139076b2c34aSJames Smart #define RHBA_MODEL_DESCRIPTION 0x5 /* 4 to 256 byte ASCII string */ 139176b2c34aSJames Smart #define RHBA_HARDWARE_VERSION 0x6 /* 4 to 256 byte ASCII string */ 139276b2c34aSJames Smart #define RHBA_DRIVER_VERSION 0x7 /* 4 to 256 byte ASCII string */ 139376b2c34aSJames Smart #define RHBA_OPTION_ROM_VERSION 0x8 /* 4 to 256 byte ASCII string */ 139476b2c34aSJames Smart #define RHBA_FIRMWARE_VERSION 0x9 /* 4 to 256 byte ASCII string */ 139576b2c34aSJames Smart #define RHBA_OS_NAME_VERSION 0xa /* 4 to 256 byte ASCII string */ 139676b2c34aSJames Smart #define RHBA_MAX_CT_PAYLOAD_LEN 0xb /* 32-bit unsigned int */ 139776b2c34aSJames Smart #define RHBA_SYM_NODENAME 0xc /* 4 to 256 byte ASCII string */ 13984258e98eSJames Smart #define RHBA_VENDOR_INFO 0xd /* 32-bit unsigned int */ 13994258e98eSJames Smart #define RHBA_NUM_PORTS 0xe /* 32-bit unsigned int */ 14004258e98eSJames Smart #define RHBA_FABRIC_WWNN 0xf /* 8 byte WWNN */ 14014258e98eSJames Smart #define RHBA_BIOS_VERSION 0x10 /* 4 to 256 byte ASCII string */ 14024258e98eSJames Smart #define RHBA_BIOS_STATE 0x11 /* 32-bit unsigned int */ 14034258e98eSJames Smart #define RHBA_VENDOR_ID 0xe0 /* 8 byte ASCII string */ 14044258e98eSJames Smart 14054258e98eSJames Smart /* Bit mask for all individual HBA attributes */ 14064258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_wwnn 0x00000001 14074258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_manufacturer 0x00000002 14084258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_sn 0x00000004 14094258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_model 0x00000008 14104258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_description 0x00000010 14114258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_hdw_ver 0x00000020 14124258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_drvr_ver 0x00000040 14134258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_rom_ver 0x00000080 14144258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_fmw_ver 0x00000100 14154258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_os_ver 0x00000200 14164258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_ct_len 0x00000400 14174258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_symbolic_name 0x00000800 14184258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_vendor_info 0x00001000 /* Not used */ 14194258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_num_ports 0x00002000 14204258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_fabric_wwnn 0x00004000 14214258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_bios_ver 0x00008000 14224258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_bios_state 0x00010000 /* Not used */ 14234258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_vendor_id 0x00020000 14244258e98eSJames Smart 14254258e98eSJames Smart /* Bit mask for FDMI-1 defined HBA attributes */ 14264258e98eSJames Smart #define LPFC_FDMI1_HBA_ATTR 0x000007ff 14274258e98eSJames Smart 14284258e98eSJames Smart /* Bit mask for FDMI-2 defined HBA attributes */ 14294258e98eSJames Smart /* Skip vendor_info and bios_state */ 14304258e98eSJames Smart #define LPFC_FDMI2_HBA_ATTR 0x0002efff 1431dea3101eS 1432dea3101eS /* 143376b2c34aSJames Smart * Port Attrubute Types 1434dea3101eS */ 143576b2c34aSJames Smart #define RPRT_SUPPORTED_FC4_TYPES 0x1 /* 32 byte binary array */ 143676b2c34aSJames Smart #define RPRT_SUPPORTED_SPEED 0x2 /* 32-bit unsigned int */ 143776b2c34aSJames Smart #define RPRT_PORT_SPEED 0x3 /* 32-bit unsigned int */ 143876b2c34aSJames Smart #define RPRT_MAX_FRAME_SIZE 0x4 /* 32-bit unsigned int */ 143976b2c34aSJames Smart #define RPRT_OS_DEVICE_NAME 0x5 /* 4 to 256 byte ASCII string */ 144076b2c34aSJames Smart #define RPRT_HOST_NAME 0x6 /* 4 to 256 byte ASCII string */ 144176b2c34aSJames Smart #define RPRT_NODENAME 0x7 /* 8 byte WWNN */ 14424258e98eSJames Smart #define RPRT_PORTNAME 0x8 /* 8 byte WWPN */ 144376b2c34aSJames Smart #define RPRT_SYM_PORTNAME 0x9 /* 4 to 256 byte ASCII string */ 144476b2c34aSJames Smart #define RPRT_PORT_TYPE 0xa /* 32-bit unsigned int */ 144576b2c34aSJames Smart #define RPRT_SUPPORTED_CLASS 0xb /* 32-bit unsigned int */ 14464258e98eSJames Smart #define RPRT_FABRICNAME 0xc /* 8 byte Fabric WWPN */ 144776b2c34aSJames Smart #define RPRT_ACTIVE_FC4_TYPES 0xd /* 32 byte binary array */ 144876b2c34aSJames Smart #define RPRT_PORT_STATE 0x101 /* 32-bit unsigned int */ 144976b2c34aSJames Smart #define RPRT_DISC_PORT 0x102 /* 32-bit unsigned int */ 145076b2c34aSJames Smart #define RPRT_PORT_ID 0x103 /* 32-bit unsigned int */ 14514258e98eSJames Smart #define RPRT_SMART_SERVICE 0xf100 /* 4 to 256 byte ASCII string */ 14524258e98eSJames Smart #define RPRT_SMART_GUID 0xf101 /* 8 byte WWNN + 8 byte WWPN */ 14534258e98eSJames Smart #define RPRT_SMART_VERSION 0xf102 /* 4 to 256 byte ASCII string */ 14544258e98eSJames Smart #define RPRT_SMART_MODEL 0xf103 /* 4 to 256 byte ASCII string */ 14554258e98eSJames Smart #define RPRT_SMART_PORT_INFO 0xf104 /* 32-bit unsigned int */ 14564258e98eSJames Smart #define RPRT_SMART_QOS 0xf105 /* 32-bit unsigned int */ 14574258e98eSJames Smart #define RPRT_SMART_SECURITY 0xf106 /* 32-bit unsigned int */ 14584258e98eSJames Smart 14594258e98eSJames Smart /* Bit mask for all individual PORT attributes */ 14604258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_fc4type 0x00000001 14614258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_support_speed 0x00000002 14624258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_speed 0x00000004 14634258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_max_frame 0x00000008 14644258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_os_devname 0x00000010 14654258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_host_name 0x00000020 14664258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_wwnn 0x00000040 14674258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_wwpn 0x00000080 14684258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_symbolic_name 0x00000100 14694258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_port_type 0x00000200 14704258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_class 0x00000400 14714258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_fabric_wwpn 0x00000800 14724258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_port_state 0x00001000 14734258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_active_fc4type 0x00002000 14744258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_num_disc 0x00004000 14754258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_nportid 0x00008000 14764258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_service 0x00010000 /* Vendor specific */ 14774258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_guid 0x00020000 /* Vendor specific */ 14784258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_version 0x00040000 /* Vendor specific */ 14794258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_model 0x00080000 /* Vendor specific */ 14804258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_port_info 0x00100000 /* Vendor specific */ 14814258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_qos 0x00200000 /* Vendor specific */ 14824258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_security 0x00400000 /* Vendor specific */ 14834258e98eSJames Smart 14844258e98eSJames Smart /* Bit mask for FDMI-1 defined PORT attributes */ 14854258e98eSJames Smart #define LPFC_FDMI1_PORT_ATTR 0x0000003f 14864258e98eSJames Smart 14874258e98eSJames Smart /* Bit mask for FDMI-2 defined PORT attributes */ 14884258e98eSJames Smart #define LPFC_FDMI2_PORT_ATTR 0x0000ffff 14894258e98eSJames Smart 14904258e98eSJames Smart /* Bit mask for Smart SAN defined PORT attributes */ 14914258e98eSJames Smart #define LPFC_FDMI2_SMART_ATTR 0x007fffff 14924258e98eSJames Smart 14934258e98eSJames Smart /* Defines for PORT port state attribute */ 14944258e98eSJames Smart #define LPFC_FDMI_PORTSTATE_UNKNOWN 1 14954258e98eSJames Smart #define LPFC_FDMI_PORTSTATE_ONLINE 2 14964258e98eSJames Smart 14974258e98eSJames Smart /* Defines for PORT port type attribute */ 14984258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_UNKNOWN 0 14994258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_NPORT 1 15004258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_NLPORT 2 1501dea3101eS 1502dea3101eS /* 1503dea3101eS * Begin HBA configuration parameters. 1504dea3101eS * The PCI configuration register BAR assignments are: 1505dea3101eS * BAR0, offset 0x10 - SLIM base memory address 1506dea3101eS * BAR1, offset 0x14 - SLIM base memory high address 1507dea3101eS * BAR2, offset 0x18 - REGISTER base memory address 1508dea3101eS * BAR3, offset 0x1c - REGISTER base memory high address 1509dea3101eS * BAR4, offset 0x20 - BIU I/O registers 1510dea3101eS * BAR5, offset 0x24 - REGISTER base io high address 1511dea3101eS */ 1512dea3101eS 1513dea3101eS /* Number of rings currently used and available. */ 15142a76a283SJames Smart #define MAX_SLI3_CONFIGURED_RINGS 3 15152a76a283SJames Smart #define MAX_SLI3_RINGS 4 1516dea3101eS 1517dea3101eS /* IOCB / Mailbox is owned by FireFly */ 1518dea3101eS #define OWN_CHIP 1 1519dea3101eS 1520dea3101eS /* IOCB / Mailbox is owned by Host */ 1521dea3101eS #define OWN_HOST 0 1522dea3101eS 1523dea3101eS /* Number of 4-byte words in an IOCB. */ 1524dea3101eS #define IOCB_WORD_SZ 8 1525dea3101eS 1526dea3101eS /* network headers for Dfctl field */ 1527dea3101eS #define FC_NET_HDR 0x20 1528dea3101eS 1529dea3101eS /* Start FireFly Register definitions */ 1530dea3101eS #define PCI_VENDOR_ID_EMULEX 0x10df 1531dea3101eS #define PCI_DEVICE_ID_FIREFLY 0x1ae5 153284774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_VF 0xe100 1533085c647cSJames Smart #define PCI_DEVICE_ID_BALIUS 0xe131 153484774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_PF 0xe180 1535085c647cSJames Smart #define PCI_DEVICE_ID_LANCER_FC 0xe200 1536c0c11512SJames Smart #define PCI_DEVICE_ID_LANCER_FC_VF 0xe208 1537085c647cSJames Smart #define PCI_DEVICE_ID_LANCER_FCOE 0xe260 1538c0c11512SJames Smart #define PCI_DEVICE_ID_LANCER_FCOE_VF 0xe268 1539d38dd52cSJames Smart #define PCI_DEVICE_ID_LANCER_G6_FC 0xe300 1540b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_SMB 0xf011 1541b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_MID 0xf015 1542dea3101eS #define PCI_DEVICE_ID_RFLY 0xf095 1543dea3101eS #define PCI_DEVICE_ID_PFLY 0xf098 1544e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LP101 0xf0a1 1545dea3101eS #define PCI_DEVICE_ID_TFLY 0xf0a5 1546e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_BSMB 0xf0d1 1547e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_BMID 0xf0d5 1548e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZSMB 0xf0e1 1549e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZMID 0xf0e5 1550e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE 0xf0f5 1551e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE_SCSP 0xf0f6 1552e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE_DCSP 0xf0f7 1553b87eab38SJames Smart #define PCI_DEVICE_ID_SAT 0xf100 1554b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_SCSP 0xf111 1555b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_DCSP 0xf112 1556085c647cSJames Smart #define PCI_DEVICE_ID_FALCON 0xf180 1557e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_SUPERFLY 0xf700 1558e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_DRAGONFLY 0xf800 1559dea3101eS #define PCI_DEVICE_ID_CENTAUR 0xf900 1560dea3101eS #define PCI_DEVICE_ID_PEGASUS 0xf980 1561dea3101eS #define PCI_DEVICE_ID_THOR 0xfa00 1562dea3101eS #define PCI_DEVICE_ID_VIPER 0xfb00 1563dea3101eS #define PCI_DEVICE_ID_LP10000S 0xfc00 1564e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LP11000S 0xfc10 1565e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LPE11000S 0xfc20 1566b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_S 0xfc40 156784774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_S 0xfc50 1568e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS 0xfd00 1569e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS_SCSP 0xfd11 1570e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS_DCSP 0xfd12 1571e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR 0xfe00 157284774a4dSJames Smart #define PCI_DEVICE_ID_HORNET 0xfe05 1573e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR_SCSP 0xfe11 1574e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12 1575da0436e9SJames Smart #define PCI_VENDOR_ID_SERVERENGINE 0x19a2 1576da0436e9SJames Smart #define PCI_DEVICE_ID_TIGERSHARK 0x0704 1577a747c9ceSJames Smart #define PCI_DEVICE_ID_TOMCAT 0x0714 1578f8cafd38SJames Smart #define PCI_DEVICE_ID_SKYHAWK 0x0724 1579f8cafd38SJames Smart #define PCI_DEVICE_ID_SKYHAWK_VF 0x072c 1580dea3101eS 1581dea3101eS #define JEDEC_ID_ADDRESS 0x0080001c 1582dea3101eS #define FIREFLY_JEDEC_ID 0x1ACC 1583dea3101eS #define SUPERFLY_JEDEC_ID 0x0020 1584dea3101eS #define DRAGONFLY_JEDEC_ID 0x0021 1585dea3101eS #define DRAGONFLY_V2_JEDEC_ID 0x0025 1586dea3101eS #define CENTAUR_2G_JEDEC_ID 0x0026 1587dea3101eS #define CENTAUR_1G_JEDEC_ID 0x0028 1588dea3101eS #define PEGASUS_ORION_JEDEC_ID 0x0036 1589dea3101eS #define PEGASUS_JEDEC_ID 0x0038 1590dea3101eS #define THOR_JEDEC_ID 0x0012 1591dea3101eS #define HELIOS_JEDEC_ID 0x0364 1592dea3101eS #define ZEPHYR_JEDEC_ID 0x0577 1593dea3101eS #define VIPER_JEDEC_ID 0x4838 1594b87eab38SJames Smart #define SATURN_JEDEC_ID 0x1004 159584774a4dSJames Smart #define HORNET_JDEC_ID 0x2057706D 1596dea3101eS 1597dea3101eS #define JEDEC_ID_MASK 0x0FFFF000 1598dea3101eS #define JEDEC_ID_SHIFT 12 1599dea3101eS #define FC_JEDEC_ID(id) ((id & JEDEC_ID_MASK) >> JEDEC_ID_SHIFT) 1600dea3101eS 1601dea3101eS typedef struct { /* FireFly BIU registers */ 1602dea3101eS uint32_t hostAtt; /* See definitions for Host Attention 1603dea3101eS register */ 1604dea3101eS uint32_t chipAtt; /* See definitions for Chip Attention 1605dea3101eS register */ 1606dea3101eS uint32_t hostStatus; /* See definitions for Host Status register */ 1607dea3101eS uint32_t hostControl; /* See definitions for Host Control register */ 1608dea3101eS uint32_t buiConfig; /* See definitions for BIU configuration 1609dea3101eS register */ 1610dea3101eS } FF_REGS; 1611dea3101eS 1612dea3101eS /* IO Register size in bytes */ 1613dea3101eS #define FF_REG_AREA_SIZE 256 1614dea3101eS 1615dea3101eS /* Host Attention Register */ 1616dea3101eS 1617dea3101eS #define HA_REG_OFFSET 0 /* Byte offset from register base address */ 1618dea3101eS 1619dea3101eS #define HA_R0RE_REQ 0x00000001 /* Bit 0 */ 1620dea3101eS #define HA_R0CE_RSP 0x00000002 /* Bit 1 */ 1621dea3101eS #define HA_R0ATT 0x00000008 /* Bit 3 */ 1622dea3101eS #define HA_R1RE_REQ 0x00000010 /* Bit 4 */ 1623dea3101eS #define HA_R1CE_RSP 0x00000020 /* Bit 5 */ 1624dea3101eS #define HA_R1ATT 0x00000080 /* Bit 7 */ 1625dea3101eS #define HA_R2RE_REQ 0x00000100 /* Bit 8 */ 1626dea3101eS #define HA_R2CE_RSP 0x00000200 /* Bit 9 */ 1627dea3101eS #define HA_R2ATT 0x00000800 /* Bit 11 */ 1628dea3101eS #define HA_R3RE_REQ 0x00001000 /* Bit 12 */ 1629dea3101eS #define HA_R3CE_RSP 0x00002000 /* Bit 13 */ 1630dea3101eS #define HA_R3ATT 0x00008000 /* Bit 15 */ 1631dea3101eS #define HA_LATT 0x20000000 /* Bit 29 */ 1632dea3101eS #define HA_MBATT 0x40000000 /* Bit 30 */ 1633dea3101eS #define HA_ERATT 0x80000000 /* Bit 31 */ 1634dea3101eS 1635dea3101eS #define HA_RXRE_REQ 0x00000001 /* Bit 0 */ 1636dea3101eS #define HA_RXCE_RSP 0x00000002 /* Bit 1 */ 1637dea3101eS #define HA_RXATT 0x00000008 /* Bit 3 */ 1638dea3101eS #define HA_RXMASK 0x0000000f 1639dea3101eS 16409399627fSJames Smart #define HA_R0_CLR_MSK (HA_R0RE_REQ | HA_R0CE_RSP | HA_R0ATT) 16419399627fSJames Smart #define HA_R1_CLR_MSK (HA_R1RE_REQ | HA_R1CE_RSP | HA_R1ATT) 16429399627fSJames Smart #define HA_R2_CLR_MSK (HA_R2RE_REQ | HA_R2CE_RSP | HA_R2ATT) 16439399627fSJames Smart #define HA_R3_CLR_MSK (HA_R3RE_REQ | HA_R3CE_RSP | HA_R3ATT) 16449399627fSJames Smart 16459399627fSJames Smart #define HA_R0_POS 3 16469399627fSJames Smart #define HA_R1_POS 7 16479399627fSJames Smart #define HA_R2_POS 11 16489399627fSJames Smart #define HA_R3_POS 15 16499399627fSJames Smart #define HA_LE_POS 29 16509399627fSJames Smart #define HA_MB_POS 30 16519399627fSJames Smart #define HA_ER_POS 31 1652dea3101eS /* Chip Attention Register */ 1653dea3101eS 1654dea3101eS #define CA_REG_OFFSET 4 /* Byte offset from register base address */ 1655dea3101eS 1656dea3101eS #define CA_R0CE_REQ 0x00000001 /* Bit 0 */ 1657dea3101eS #define CA_R0RE_RSP 0x00000002 /* Bit 1 */ 1658dea3101eS #define CA_R0ATT 0x00000008 /* Bit 3 */ 1659dea3101eS #define CA_R1CE_REQ 0x00000010 /* Bit 4 */ 1660dea3101eS #define CA_R1RE_RSP 0x00000020 /* Bit 5 */ 1661dea3101eS #define CA_R1ATT 0x00000080 /* Bit 7 */ 1662dea3101eS #define CA_R2CE_REQ 0x00000100 /* Bit 8 */ 1663dea3101eS #define CA_R2RE_RSP 0x00000200 /* Bit 9 */ 1664dea3101eS #define CA_R2ATT 0x00000800 /* Bit 11 */ 1665dea3101eS #define CA_R3CE_REQ 0x00001000 /* Bit 12 */ 1666dea3101eS #define CA_R3RE_RSP 0x00002000 /* Bit 13 */ 1667dea3101eS #define CA_R3ATT 0x00008000 /* Bit 15 */ 1668dea3101eS #define CA_MBATT 0x40000000 /* Bit 30 */ 1669dea3101eS 1670dea3101eS /* Host Status Register */ 1671dea3101eS 1672dea3101eS #define HS_REG_OFFSET 8 /* Byte offset from register base address */ 1673dea3101eS 1674dea3101eS #define HS_MBRDY 0x00400000 /* Bit 22 */ 1675dea3101eS #define HS_FFRDY 0x00800000 /* Bit 23 */ 1676dea3101eS #define HS_FFER8 0x01000000 /* Bit 24 */ 1677dea3101eS #define HS_FFER7 0x02000000 /* Bit 25 */ 1678dea3101eS #define HS_FFER6 0x04000000 /* Bit 26 */ 1679dea3101eS #define HS_FFER5 0x08000000 /* Bit 27 */ 1680dea3101eS #define HS_FFER4 0x10000000 /* Bit 28 */ 1681dea3101eS #define HS_FFER3 0x20000000 /* Bit 29 */ 1682dea3101eS #define HS_FFER2 0x40000000 /* Bit 30 */ 1683dea3101eS #define HS_FFER1 0x80000000 /* Bit 31 */ 168457127f15SJames Smart #define HS_CRIT_TEMP 0x00000100 /* Bit 8 */ 168557127f15SJames Smart #define HS_FFERM 0xFF000100 /* Mask for error bits 31:24 and 8 */ 16869940b97bSJames Smart #define UNPLUG_ERR 0x00000001 /* Indicate pci hot unplug */ 1687dea3101eS /* Host Control Register */ 1688dea3101eS 16899399627fSJames Smart #define HC_REG_OFFSET 12 /* Byte offset from register base address */ 1690dea3101eS 1691dea3101eS #define HC_MBINT_ENA 0x00000001 /* Bit 0 */ 1692dea3101eS #define HC_R0INT_ENA 0x00000002 /* Bit 1 */ 1693dea3101eS #define HC_R1INT_ENA 0x00000004 /* Bit 2 */ 1694dea3101eS #define HC_R2INT_ENA 0x00000008 /* Bit 3 */ 1695dea3101eS #define HC_R3INT_ENA 0x00000010 /* Bit 4 */ 1696dea3101eS #define HC_INITHBI 0x02000000 /* Bit 25 */ 1697dea3101eS #define HC_INITMB 0x04000000 /* Bit 26 */ 1698dea3101eS #define HC_INITFF 0x08000000 /* Bit 27 */ 1699dea3101eS #define HC_LAINT_ENA 0x20000000 /* Bit 29 */ 1700dea3101eS #define HC_ERINT_ENA 0x80000000 /* Bit 31 */ 1701dea3101eS 17029399627fSJames Smart /* Message Signaled Interrupt eXtension (MSI-X) message identifiers */ 17039399627fSJames Smart #define MSIX_DFLT_ID 0 17049399627fSJames Smart #define MSIX_RNG0_ID 0 17059399627fSJames Smart #define MSIX_RNG1_ID 1 17069399627fSJames Smart #define MSIX_RNG2_ID 2 17079399627fSJames Smart #define MSIX_RNG3_ID 3 17089399627fSJames Smart 17099399627fSJames Smart #define MSIX_LINK_ID 4 17109399627fSJames Smart #define MSIX_MBOX_ID 5 17119399627fSJames Smart 17129399627fSJames Smart #define MSIX_SPARE0_ID 6 17139399627fSJames Smart #define MSIX_SPARE1_ID 7 17149399627fSJames Smart 1715dea3101eS /* Mailbox Commands */ 1716dea3101eS #define MBX_SHUTDOWN 0x00 /* terminate testing */ 1717dea3101eS #define MBX_LOAD_SM 0x01 1718dea3101eS #define MBX_READ_NV 0x02 1719dea3101eS #define MBX_WRITE_NV 0x03 1720dea3101eS #define MBX_RUN_BIU_DIAG 0x04 1721dea3101eS #define MBX_INIT_LINK 0x05 1722dea3101eS #define MBX_DOWN_LINK 0x06 1723dea3101eS #define MBX_CONFIG_LINK 0x07 1724dea3101eS #define MBX_CONFIG_RING 0x09 1725dea3101eS #define MBX_RESET_RING 0x0A 1726dea3101eS #define MBX_READ_CONFIG 0x0B 1727dea3101eS #define MBX_READ_RCONFIG 0x0C 1728dea3101eS #define MBX_READ_SPARM 0x0D 1729dea3101eS #define MBX_READ_STATUS 0x0E 1730dea3101eS #define MBX_READ_RPI 0x0F 1731dea3101eS #define MBX_READ_XRI 0x10 1732dea3101eS #define MBX_READ_REV 0x11 1733dea3101eS #define MBX_READ_LNK_STAT 0x12 1734dea3101eS #define MBX_REG_LOGIN 0x13 1735dea3101eS #define MBX_UNREG_LOGIN 0x14 1736dea3101eS #define MBX_CLEAR_LA 0x16 1737dea3101eS #define MBX_DUMP_MEMORY 0x17 1738dea3101eS #define MBX_DUMP_CONTEXT 0x18 1739dea3101eS #define MBX_RUN_DIAGS 0x19 1740dea3101eS #define MBX_RESTART 0x1A 1741dea3101eS #define MBX_UPDATE_CFG 0x1B 1742dea3101eS #define MBX_DOWN_LOAD 0x1C 1743dea3101eS #define MBX_DEL_LD_ENTRY 0x1D 1744dea3101eS #define MBX_RUN_PROGRAM 0x1E 1745dea3101eS #define MBX_SET_MASK 0x20 174609372820SJames Smart #define MBX_SET_VARIABLE 0x21 1747dea3101eS #define MBX_UNREG_D_ID 0x23 174841415862SJamie Wellnitz #define MBX_KILL_BOARD 0x24 1749dea3101eS #define MBX_CONFIG_FARP 0x25 175041415862SJamie Wellnitz #define MBX_BEACON 0x2A 17519399627fSJames Smart #define MBX_CONFIG_MSI 0x30 1752858c9f6cSJames Smart #define MBX_HEARTBEAT 0x31 1753a8adb832SJames Smart #define MBX_WRITE_VPARMS 0x32 1754a8adb832SJames Smart #define MBX_ASYNCEVT_ENABLE 0x33 17554fede78fSJames Smart #define MBX_READ_EVENT_LOG_STATUS 0x37 17564fede78fSJames Smart #define MBX_READ_EVENT_LOG 0x38 17574fede78fSJames Smart #define MBX_WRITE_EVENT_LOG 0x39 1758dea3101eS 175984774a4dSJames Smart #define MBX_PORT_CAPABILITIES 0x3B 176084774a4dSJames Smart #define MBX_PORT_IOV_CONTROL 0x3C 176184774a4dSJames Smart 1762ed957684SJames Smart #define MBX_CONFIG_HBQ 0x7C 1763dea3101eS #define MBX_LOAD_AREA 0x81 1764dea3101eS #define MBX_RUN_BIU_DIAG64 0x84 1765dea3101eS #define MBX_CONFIG_PORT 0x88 1766dea3101eS #define MBX_READ_SPARM64 0x8D 1767dea3101eS #define MBX_READ_RPI64 0x8F 1768dea3101eS #define MBX_REG_LOGIN64 0x93 176976a95d75SJames Smart #define MBX_READ_TOPOLOGY 0x95 177092d7f7b0SJames Smart #define MBX_REG_VPI 0x96 177192d7f7b0SJames Smart #define MBX_UNREG_VPI 0x97 1772dea3101eS 177309372820SJames Smart #define MBX_WRITE_WWN 0x98 1774dea3101eS #define MBX_SET_DEBUG 0x99 1775dea3101eS #define MBX_LOAD_EXP_ROM 0x9C 1776da0436e9SJames Smart #define MBX_SLI4_CONFIG 0x9B 1777da0436e9SJames Smart #define MBX_SLI4_REQ_FTRS 0x9D 1778da0436e9SJames Smart #define MBX_MAX_CMDS 0x9E 1779da0436e9SJames Smart #define MBX_RESUME_RPI 0x9E 1780dea3101eS #define MBX_SLI2_CMD_MASK 0x80 1781da0436e9SJames Smart #define MBX_REG_VFI 0x9F 1782da0436e9SJames Smart #define MBX_REG_FCFI 0xA0 1783da0436e9SJames Smart #define MBX_UNREG_VFI 0xA1 1784da0436e9SJames Smart #define MBX_UNREG_FCFI 0xA2 1785da0436e9SJames Smart #define MBX_INIT_VFI 0xA3 1786da0436e9SJames Smart #define MBX_INIT_VPI 0xA4 1787940eb687SJames Smart #define MBX_ACCESS_VDATA 0xA5 1788dea3101eS 1789dcf2a4e0SJames Smart #define MBX_AUTH_PORT 0xF8 1790dcf2a4e0SJames Smart #define MBX_SECURITY_MGMT 0xF9 1791dcf2a4e0SJames Smart 1792dea3101eS /* IOCB Commands */ 1793dea3101eS 1794dea3101eS #define CMD_RCV_SEQUENCE_CX 0x01 1795dea3101eS #define CMD_XMIT_SEQUENCE_CR 0x02 1796dea3101eS #define CMD_XMIT_SEQUENCE_CX 0x03 1797dea3101eS #define CMD_XMIT_BCAST_CN 0x04 1798dea3101eS #define CMD_XMIT_BCAST_CX 0x05 1799dea3101eS #define CMD_QUE_RING_BUF_CN 0x06 1800dea3101eS #define CMD_QUE_XRI_BUF_CX 0x07 1801dea3101eS #define CMD_IOCB_CONTINUE_CN 0x08 1802dea3101eS #define CMD_RET_XRI_BUF_CX 0x09 1803dea3101eS #define CMD_ELS_REQUEST_CR 0x0A 1804dea3101eS #define CMD_ELS_REQUEST_CX 0x0B 1805dea3101eS #define CMD_RCV_ELS_REQ_CX 0x0D 1806dea3101eS #define CMD_ABORT_XRI_CN 0x0E 1807dea3101eS #define CMD_ABORT_XRI_CX 0x0F 1808dea3101eS #define CMD_CLOSE_XRI_CN 0x10 1809dea3101eS #define CMD_CLOSE_XRI_CX 0x11 1810dea3101eS #define CMD_CREATE_XRI_CR 0x12 1811dea3101eS #define CMD_CREATE_XRI_CX 0x13 1812dea3101eS #define CMD_GET_RPI_CN 0x14 1813dea3101eS #define CMD_XMIT_ELS_RSP_CX 0x15 1814dea3101eS #define CMD_GET_RPI_CR 0x16 1815dea3101eS #define CMD_XRI_ABORTED_CX 0x17 1816dea3101eS #define CMD_FCP_IWRITE_CR 0x18 1817dea3101eS #define CMD_FCP_IWRITE_CX 0x19 1818dea3101eS #define CMD_FCP_IREAD_CR 0x1A 1819dea3101eS #define CMD_FCP_IREAD_CX 0x1B 1820dea3101eS #define CMD_FCP_ICMND_CR 0x1C 1821dea3101eS #define CMD_FCP_ICMND_CX 0x1D 1822f5603511SJames Smart #define CMD_FCP_TSEND_CX 0x1F 1823f5603511SJames Smart #define CMD_FCP_TRECEIVE_CX 0x21 1824f5603511SJames Smart #define CMD_FCP_TRSP_CX 0x23 1825f5603511SJames Smart #define CMD_FCP_AUTO_TRSP_CX 0x29 1826dea3101eS 1827dea3101eS #define CMD_ADAPTER_MSG 0x20 1828dea3101eS #define CMD_ADAPTER_DUMP 0x22 1829dea3101eS 1830dea3101eS /* SLI_2 IOCB Command Set */ 1831dea3101eS 183257127f15SJames Smart #define CMD_ASYNC_STATUS 0x7C 1833dea3101eS #define CMD_RCV_SEQUENCE64_CX 0x81 1834dea3101eS #define CMD_XMIT_SEQUENCE64_CR 0x82 1835dea3101eS #define CMD_XMIT_SEQUENCE64_CX 0x83 1836dea3101eS #define CMD_XMIT_BCAST64_CN 0x84 1837dea3101eS #define CMD_XMIT_BCAST64_CX 0x85 1838dea3101eS #define CMD_QUE_RING_BUF64_CN 0x86 1839dea3101eS #define CMD_QUE_XRI_BUF64_CX 0x87 1840dea3101eS #define CMD_IOCB_CONTINUE64_CN 0x88 1841dea3101eS #define CMD_RET_XRI_BUF64_CX 0x89 1842dea3101eS #define CMD_ELS_REQUEST64_CR 0x8A 1843dea3101eS #define CMD_ELS_REQUEST64_CX 0x8B 1844dea3101eS #define CMD_ABORT_MXRI64_CN 0x8C 1845dea3101eS #define CMD_RCV_ELS_REQ64_CX 0x8D 1846dea3101eS #define CMD_XMIT_ELS_RSP64_CX 0x95 18476669f9bbSJames Smart #define CMD_XMIT_BLS_RSP64_CX 0x97 1848dea3101eS #define CMD_FCP_IWRITE64_CR 0x98 1849dea3101eS #define CMD_FCP_IWRITE64_CX 0x99 1850dea3101eS #define CMD_FCP_IREAD64_CR 0x9A 1851dea3101eS #define CMD_FCP_IREAD64_CX 0x9B 1852dea3101eS #define CMD_FCP_ICMND64_CR 0x9C 1853dea3101eS #define CMD_FCP_ICMND64_CX 0x9D 1854f5603511SJames Smart #define CMD_FCP_TSEND64_CX 0x9F 1855f5603511SJames Smart #define CMD_FCP_TRECEIVE64_CX 0xA1 1856f5603511SJames Smart #define CMD_FCP_TRSP64_CX 0xA3 1857dea3101eS 185876bb24efSJames Smart #define CMD_QUE_XRI64_CX 0xB3 1859ed957684SJames Smart #define CMD_IOCB_RCV_SEQ64_CX 0xB5 1860ed957684SJames Smart #define CMD_IOCB_RCV_ELS64_CX 0xB7 18613163f725SJames Smart #define CMD_IOCB_RET_XRI64_CX 0xB9 1862ed957684SJames Smart #define CMD_IOCB_RCV_CONT64_CX 0xBB 1863ed957684SJames Smart 1864dea3101eS #define CMD_GEN_REQUEST64_CR 0xC2 1865dea3101eS #define CMD_GEN_REQUEST64_CX 0xC3 1866dea3101eS 18673163f725SJames Smart /* Unhandled SLI-3 Commands */ 18683163f725SJames Smart #define CMD_IOCB_XMIT_MSEQ64_CR 0xB0 18693163f725SJames Smart #define CMD_IOCB_XMIT_MSEQ64_CX 0xB1 18703163f725SJames Smart #define CMD_IOCB_RCV_SEQ_LIST64_CX 0xC1 18713163f725SJames Smart #define CMD_IOCB_RCV_ELS_LIST64_CX 0xCD 18723163f725SJames Smart #define CMD_IOCB_CLOSE_EXTENDED_CN 0xB6 18733163f725SJames Smart #define CMD_IOCB_ABORT_EXTENDED_CN 0xBA 18743163f725SJames Smart #define CMD_IOCB_RET_HBQE64_CN 0xCA 18753163f725SJames Smart #define CMD_IOCB_FCP_IBIDIR64_CR 0xAC 18763163f725SJames Smart #define CMD_IOCB_FCP_IBIDIR64_CX 0xAD 18773163f725SJames Smart #define CMD_IOCB_FCP_ITASKMGT64_CX 0xAF 18783163f725SJames Smart #define CMD_IOCB_LOGENTRY_CN 0x94 18793163f725SJames Smart #define CMD_IOCB_LOGENTRY_ASYNC_CN 0x96 18803163f725SJames Smart 1881341af102SJames Smart /* Data Security SLI Commands */ 1882341af102SJames Smart #define DSSCMD_IWRITE64_CR 0xF8 1883341af102SJames Smart #define DSSCMD_IWRITE64_CX 0xF9 1884341af102SJames Smart #define DSSCMD_IREAD64_CR 0xFA 1885341af102SJames Smart #define DSSCMD_IREAD64_CX 0xFB 1886da0436e9SJames Smart 1887341af102SJames Smart #define CMD_MAX_IOCB_CMD 0xFB 1888dea3101eS #define CMD_IOCB_MASK 0xff 1889dea3101eS 1890dea3101eS #define MAX_MSG_DATA 28 /* max msg data in CMD_ADAPTER_MSG 1891dea3101eS iocb */ 1892dea3101eS #define LPFC_MAX_ADPTMSG 32 /* max msg data */ 1893dea3101eS /* 1894dea3101eS * Define Status 1895dea3101eS */ 1896dea3101eS #define MBX_SUCCESS 0 1897dea3101eS #define MBXERR_NUM_RINGS 1 1898dea3101eS #define MBXERR_NUM_IOCBS 2 1899dea3101eS #define MBXERR_IOCBS_EXCEEDED 3 1900dea3101eS #define MBXERR_BAD_RING_NUMBER 4 1901dea3101eS #define MBXERR_MASK_ENTRIES_RANGE 5 1902dea3101eS #define MBXERR_MASKS_EXCEEDED 6 1903dea3101eS #define MBXERR_BAD_PROFILE 7 1904dea3101eS #define MBXERR_BAD_DEF_CLASS 8 1905dea3101eS #define MBXERR_BAD_MAX_RESPONDER 9 1906dea3101eS #define MBXERR_BAD_MAX_ORIGINATOR 10 1907dea3101eS #define MBXERR_RPI_REGISTERED 11 1908dea3101eS #define MBXERR_RPI_FULL 12 1909dea3101eS #define MBXERR_NO_RESOURCES 13 1910dea3101eS #define MBXERR_BAD_RCV_LENGTH 14 1911dea3101eS #define MBXERR_DMA_ERROR 15 1912dea3101eS #define MBXERR_ERROR 16 1913da0436e9SJames Smart #define MBXERR_LINK_DOWN 0x33 1914dcf2a4e0SJames Smart #define MBXERR_SEC_NO_PERMISSION 0xF02 1915dea3101eS #define MBX_NOT_FINISHED 255 1916dea3101eS 1917dea3101eS #define MBX_BUSY 0xffffff /* Attempted cmd to busy Mailbox */ 1918dea3101eS #define MBX_TIMEOUT 0xfffffe /* time-out expired waiting for */ 1919dea3101eS 192057127f15SJames Smart #define TEMPERATURE_OFFSET 0xB0 /* Slim offset for critical temperature event */ 192157127f15SJames Smart 1922dea3101eS /* 192386478875SJames Smart * return code Fail 192486478875SJames Smart */ 192586478875SJames Smart #define FAILURE 1 192686478875SJames Smart 192786478875SJames Smart /* 1928dea3101eS * Begin Structure Definitions for Mailbox Commands 1929dea3101eS */ 1930dea3101eS 1931dea3101eS typedef struct { 1932dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 1933dea3101eS uint8_t tval; 1934dea3101eS uint8_t tmask; 1935dea3101eS uint8_t rval; 1936dea3101eS uint8_t rmask; 1937dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 1938dea3101eS uint8_t rmask; 1939dea3101eS uint8_t rval; 1940dea3101eS uint8_t tmask; 1941dea3101eS uint8_t tval; 1942dea3101eS #endif 1943dea3101eS } RR_REG; 1944dea3101eS 1945dea3101eS struct ulp_bde { 1946dea3101eS uint32_t bdeAddress; 1947dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 1948dea3101eS uint32_t bdeReserved:4; 1949dea3101eS uint32_t bdeAddrHigh:4; 1950dea3101eS uint32_t bdeSize:24; 1951dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 1952dea3101eS uint32_t bdeSize:24; 1953dea3101eS uint32_t bdeAddrHigh:4; 1954dea3101eS uint32_t bdeReserved:4; 1955dea3101eS #endif 1956dea3101eS }; 1957dea3101eS 1958dea3101eS typedef struct ULP_BDL { /* SLI-2 */ 1959dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 1960dea3101eS uint32_t bdeFlags:8; /* BDL Flags */ 1961dea3101eS uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */ 1962dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 1963dea3101eS uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */ 1964dea3101eS uint32_t bdeFlags:8; /* BDL Flags */ 1965dea3101eS #endif 1966dea3101eS 1967dea3101eS uint32_t addrLow; /* Address 0:31 */ 1968dea3101eS uint32_t addrHigh; /* Address 32:63 */ 1969dea3101eS uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */ 1970dea3101eS } ULP_BDL; 1971dea3101eS 197281301a9bSJames Smart /* 197381301a9bSJames Smart * BlockGuard Definitions 197481301a9bSJames Smart */ 197581301a9bSJames Smart 197681301a9bSJames Smart enum lpfc_protgrp_type { 197781301a9bSJames Smart LPFC_PG_TYPE_INVALID = 0, /* used to indicate errors */ 197881301a9bSJames Smart LPFC_PG_TYPE_NO_DIF, /* no DIF data pointed to by prot grp */ 197981301a9bSJames Smart LPFC_PG_TYPE_EMBD_DIF, /* DIF is embedded (inline) with data */ 198081301a9bSJames Smart LPFC_PG_TYPE_DIF_BUF /* DIF has its own scatter/gather list */ 198181301a9bSJames Smart }; 198281301a9bSJames Smart 198381301a9bSJames Smart /* PDE Descriptors */ 19846c8eea54SJames Smart #define LPFC_PDE5_DESCRIPTOR 0x85 19856c8eea54SJames Smart #define LPFC_PDE6_DESCRIPTOR 0x86 19866c8eea54SJames Smart #define LPFC_PDE7_DESCRIPTOR 0x87 198781301a9bSJames Smart 19886c8eea54SJames Smart /* BlockGuard Opcodes */ 19896c8eea54SJames Smart #define BG_OP_IN_NODIF_OUT_CRC 0x0 19906c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_NODIF 0x1 19916c8eea54SJames Smart #define BG_OP_IN_NODIF_OUT_CSUM 0x2 19926c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_NODIF 0x3 19936c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_CRC 0x4 19946c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_CSUM 0x5 19956c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_CSUM 0x6 19966c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_CRC 0x7 1997a6887e28SJames Smart #define BG_OP_RAW_MODE 0x8 19986c8eea54SJames Smart 19996c8eea54SJames Smart struct lpfc_pde5 { 20006c8eea54SJames Smart uint32_t word0; 20016c8eea54SJames Smart #define pde5_type_SHIFT 24 20026c8eea54SJames Smart #define pde5_type_MASK 0x000000ff 20036c8eea54SJames Smart #define pde5_type_WORD word0 20046c8eea54SJames Smart #define pde5_rsvd0_SHIFT 0 20056c8eea54SJames Smart #define pde5_rsvd0_MASK 0x00ffffff 20066c8eea54SJames Smart #define pde5_rsvd0_WORD word0 20076c8eea54SJames Smart uint32_t reftag; /* Reference Tag Value */ 20086c8eea54SJames Smart uint32_t reftagtr; /* Reference Tag Translation Value */ 200981301a9bSJames Smart }; 201081301a9bSJames Smart 20116c8eea54SJames Smart struct lpfc_pde6 { 20126c8eea54SJames Smart uint32_t word0; 20136c8eea54SJames Smart #define pde6_type_SHIFT 24 20146c8eea54SJames Smart #define pde6_type_MASK 0x000000ff 20156c8eea54SJames Smart #define pde6_type_WORD word0 20166c8eea54SJames Smart #define pde6_rsvd0_SHIFT 0 20176c8eea54SJames Smart #define pde6_rsvd0_MASK 0x00ffffff 20186c8eea54SJames Smart #define pde6_rsvd0_WORD word0 20196c8eea54SJames Smart uint32_t word1; 20206c8eea54SJames Smart #define pde6_rsvd1_SHIFT 26 20216c8eea54SJames Smart #define pde6_rsvd1_MASK 0x0000003f 20226c8eea54SJames Smart #define pde6_rsvd1_WORD word1 20236c8eea54SJames Smart #define pde6_na_SHIFT 25 20246c8eea54SJames Smart #define pde6_na_MASK 0x00000001 20256c8eea54SJames Smart #define pde6_na_WORD word1 20266c8eea54SJames Smart #define pde6_rsvd2_SHIFT 16 20276c8eea54SJames Smart #define pde6_rsvd2_MASK 0x000001FF 20286c8eea54SJames Smart #define pde6_rsvd2_WORD word1 20296c8eea54SJames Smart #define pde6_apptagtr_SHIFT 0 20306c8eea54SJames Smart #define pde6_apptagtr_MASK 0x0000ffff 20316c8eea54SJames Smart #define pde6_apptagtr_WORD word1 20326c8eea54SJames Smart uint32_t word2; 20336c8eea54SJames Smart #define pde6_optx_SHIFT 28 20346c8eea54SJames Smart #define pde6_optx_MASK 0x0000000f 20356c8eea54SJames Smart #define pde6_optx_WORD word2 20366c8eea54SJames Smart #define pde6_oprx_SHIFT 24 20376c8eea54SJames Smart #define pde6_oprx_MASK 0x0000000f 20386c8eea54SJames Smart #define pde6_oprx_WORD word2 20396c8eea54SJames Smart #define pde6_nr_SHIFT 23 20406c8eea54SJames Smart #define pde6_nr_MASK 0x00000001 20416c8eea54SJames Smart #define pde6_nr_WORD word2 20426c8eea54SJames Smart #define pde6_ce_SHIFT 22 20436c8eea54SJames Smart #define pde6_ce_MASK 0x00000001 20446c8eea54SJames Smart #define pde6_ce_WORD word2 20456c8eea54SJames Smart #define pde6_re_SHIFT 21 20466c8eea54SJames Smart #define pde6_re_MASK 0x00000001 20476c8eea54SJames Smart #define pde6_re_WORD word2 20486c8eea54SJames Smart #define pde6_ae_SHIFT 20 20496c8eea54SJames Smart #define pde6_ae_MASK 0x00000001 20506c8eea54SJames Smart #define pde6_ae_WORD word2 20516c8eea54SJames Smart #define pde6_ai_SHIFT 19 20526c8eea54SJames Smart #define pde6_ai_MASK 0x00000001 20536c8eea54SJames Smart #define pde6_ai_WORD word2 20546c8eea54SJames Smart #define pde6_bs_SHIFT 16 20556c8eea54SJames Smart #define pde6_bs_MASK 0x00000007 20566c8eea54SJames Smart #define pde6_bs_WORD word2 20576c8eea54SJames Smart #define pde6_apptagval_SHIFT 0 20586c8eea54SJames Smart #define pde6_apptagval_MASK 0x0000ffff 20596c8eea54SJames Smart #define pde6_apptagval_WORD word2 206081301a9bSJames Smart }; 206181301a9bSJames Smart 20627f86059aSJames Smart struct lpfc_pde7 { 20637f86059aSJames Smart uint32_t word0; 20647f86059aSJames Smart #define pde7_type_SHIFT 24 20657f86059aSJames Smart #define pde7_type_MASK 0x000000ff 20667f86059aSJames Smart #define pde7_type_WORD word0 20677f86059aSJames Smart #define pde7_rsvd0_SHIFT 0 20687f86059aSJames Smart #define pde7_rsvd0_MASK 0x00ffffff 20697f86059aSJames Smart #define pde7_rsvd0_WORD word0 20707f86059aSJames Smart uint32_t addrHigh; 20717f86059aSJames Smart uint32_t addrLow; 20727f86059aSJames Smart }; 207381301a9bSJames Smart 2074dea3101eS /* Structure for MB Command LOAD_SM and DOWN_LOAD */ 2075dea3101eS 2076dea3101eS typedef struct { 2077dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2078dea3101eS uint32_t rsvd2:25; 2079dea3101eS uint32_t acknowledgment:1; 2080dea3101eS uint32_t version:1; 2081dea3101eS uint32_t erase_or_prog:1; 2082dea3101eS uint32_t update_flash:1; 2083dea3101eS uint32_t update_ram:1; 2084dea3101eS uint32_t method:1; 2085dea3101eS uint32_t load_cmplt:1; 2086dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2087dea3101eS uint32_t load_cmplt:1; 2088dea3101eS uint32_t method:1; 2089dea3101eS uint32_t update_ram:1; 2090dea3101eS uint32_t update_flash:1; 2091dea3101eS uint32_t erase_or_prog:1; 2092dea3101eS uint32_t version:1; 2093dea3101eS uint32_t acknowledgment:1; 2094dea3101eS uint32_t rsvd2:25; 2095dea3101eS #endif 2096dea3101eS 2097dea3101eS uint32_t dl_to_adr_low; 2098dea3101eS uint32_t dl_to_adr_high; 2099dea3101eS uint32_t dl_len; 2100dea3101eS union { 2101dea3101eS uint32_t dl_from_mbx_offset; 2102dea3101eS struct ulp_bde dl_from_bde; 2103dea3101eS struct ulp_bde64 dl_from_bde64; 2104dea3101eS } un; 2105dea3101eS 2106dea3101eS } LOAD_SM_VAR; 2107dea3101eS 2108dea3101eS /* Structure for MB Command READ_NVPARM (02) */ 2109dea3101eS 2110dea3101eS typedef struct { 2111dea3101eS uint32_t rsvd1[3]; /* Read as all one's */ 2112dea3101eS uint32_t rsvd2; /* Read as all zero's */ 2113dea3101eS uint32_t portname[2]; /* N_PORT name */ 2114dea3101eS uint32_t nodename[2]; /* NODE name */ 2115dea3101eS 2116dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2117dea3101eS uint32_t pref_DID:24; 2118dea3101eS uint32_t hardAL_PA:8; 2119dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2120dea3101eS uint32_t hardAL_PA:8; 2121dea3101eS uint32_t pref_DID:24; 2122dea3101eS #endif 2123dea3101eS 2124dea3101eS uint32_t rsvd3[21]; /* Read as all one's */ 2125dea3101eS } READ_NV_VAR; 2126dea3101eS 2127dea3101eS /* Structure for MB Command WRITE_NVPARMS (03) */ 2128dea3101eS 2129dea3101eS typedef struct { 2130dea3101eS uint32_t rsvd1[3]; /* Must be all one's */ 2131dea3101eS uint32_t rsvd2; /* Must be all zero's */ 2132dea3101eS uint32_t portname[2]; /* N_PORT name */ 2133dea3101eS uint32_t nodename[2]; /* NODE name */ 2134dea3101eS 2135dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2136dea3101eS uint32_t pref_DID:24; 2137dea3101eS uint32_t hardAL_PA:8; 2138dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2139dea3101eS uint32_t hardAL_PA:8; 2140dea3101eS uint32_t pref_DID:24; 2141dea3101eS #endif 2142dea3101eS 2143dea3101eS uint32_t rsvd3[21]; /* Must be all one's */ 2144dea3101eS } WRITE_NV_VAR; 2145dea3101eS 2146dea3101eS /* Structure for MB Command RUN_BIU_DIAG (04) */ 2147dea3101eS /* Structure for MB Command RUN_BIU_DIAG64 (0x84) */ 2148dea3101eS 2149dea3101eS typedef struct { 2150dea3101eS uint32_t rsvd1; 2151dea3101eS union { 2152dea3101eS struct { 2153dea3101eS struct ulp_bde xmit_bde; 2154dea3101eS struct ulp_bde rcv_bde; 2155dea3101eS } s1; 2156dea3101eS struct { 2157dea3101eS struct ulp_bde64 xmit_bde64; 2158dea3101eS struct ulp_bde64 rcv_bde64; 2159dea3101eS } s2; 2160dea3101eS } un; 2161dea3101eS } BIU_DIAG_VAR; 2162dea3101eS 2163c7495937SJames Smart /* Structure for MB command READ_EVENT_LOG (0x38) */ 2164c7495937SJames Smart struct READ_EVENT_LOG_VAR { 2165c7495937SJames Smart uint32_t word1; 2166c7495937SJames Smart #define lpfc_event_log_SHIFT 29 2167c7495937SJames Smart #define lpfc_event_log_MASK 0x00000001 2168c7495937SJames Smart #define lpfc_event_log_WORD word1 2169c7495937SJames Smart #define USE_MAILBOX_RESPONSE 1 2170c7495937SJames Smart uint32_t offset; 2171c7495937SJames Smart struct ulp_bde64 rcv_bde64; 2172c7495937SJames Smart }; 2173c7495937SJames Smart 2174dea3101eS /* Structure for MB Command INIT_LINK (05) */ 2175dea3101eS 2176dea3101eS typedef struct { 2177dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2178dea3101eS uint32_t rsvd1:24; 2179dea3101eS uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */ 2180dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2181dea3101eS uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */ 2182dea3101eS uint32_t rsvd1:24; 2183dea3101eS #endif 2184dea3101eS 2185dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2186dea3101eS uint8_t fabric_AL_PA; /* If using a Fabric Assigned AL_PA */ 2187dea3101eS uint8_t rsvd2; 2188dea3101eS uint16_t link_flags; 2189dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2190dea3101eS uint16_t link_flags; 2191dea3101eS uint8_t rsvd2; 2192dea3101eS uint8_t fabric_AL_PA; /* If using a Fabric Assigned AL_PA */ 2193dea3101eS #endif 2194dea3101eS 2195dea3101eS #define FLAGS_TOPOLOGY_MODE_LOOP_PT 0x00 /* Attempt loop then pt-pt */ 21961b51197dSJames Smart #define FLAGS_LOCAL_LB 0x01 /* link_flags (=1) ENDEC loopback */ 2197dea3101eS #define FLAGS_TOPOLOGY_MODE_PT_PT 0x02 /* Attempt pt-pt only */ 2198dea3101eS #define FLAGS_TOPOLOGY_MODE_LOOP 0x04 /* Attempt loop only */ 2199dea3101eS #define FLAGS_TOPOLOGY_MODE_PT_LOOP 0x06 /* Attempt pt-pt then loop */ 2200ed957684SJames Smart #define FLAGS_UNREG_LOGIN_ALL 0x08 /* UNREG_LOGIN all on link down */ 2201dea3101eS #define FLAGS_LIRP_LILP 0x80 /* LIRP / LILP is disabled */ 2202dea3101eS 2203dea3101eS #define FLAGS_TOPOLOGY_FAILOVER 0x0400 /* Bit 10 */ 2204dea3101eS #define FLAGS_LINK_SPEED 0x0800 /* Bit 11 */ 22054b0b91d4SJames Smart #define FLAGS_IMED_ABORT 0x04000 /* Bit 14 */ 2206dea3101eS 2207dea3101eS uint32_t link_speed; 220876a95d75SJames Smart #define LINK_SPEED_AUTO 0x0 /* Auto selection */ 220976a95d75SJames Smart #define LINK_SPEED_1G 0x1 /* 1 Gigabaud */ 221076a95d75SJames Smart #define LINK_SPEED_2G 0x2 /* 2 Gigabaud */ 221176a95d75SJames Smart #define LINK_SPEED_4G 0x4 /* 4 Gigabaud */ 221276a95d75SJames Smart #define LINK_SPEED_8G 0x8 /* 8 Gigabaud */ 221376a95d75SJames Smart #define LINK_SPEED_10G 0x10 /* 10 Gigabaud */ 221476a95d75SJames Smart #define LINK_SPEED_16G 0x11 /* 16 Gigabaud */ 2215d38dd52cSJames Smart #define LINK_SPEED_32G 0x14 /* 32 Gigabaud */ 2216dea3101eS 2217dea3101eS } INIT_LINK_VAR; 2218dea3101eS 2219dea3101eS /* Structure for MB Command DOWN_LINK (06) */ 2220dea3101eS 2221dea3101eS typedef struct { 2222dea3101eS uint32_t rsvd1; 2223dea3101eS } DOWN_LINK_VAR; 2224dea3101eS 2225dea3101eS /* Structure for MB Command CONFIG_LINK (07) */ 2226dea3101eS 2227dea3101eS typedef struct { 2228dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2229dea3101eS uint32_t cr:1; 2230dea3101eS uint32_t ci:1; 2231dea3101eS uint32_t cr_delay:6; 2232dea3101eS uint32_t cr_count:8; 2233dea3101eS uint32_t rsvd1:8; 2234dea3101eS uint32_t MaxBBC:8; 2235dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2236dea3101eS uint32_t MaxBBC:8; 2237dea3101eS uint32_t rsvd1:8; 2238dea3101eS uint32_t cr_count:8; 2239dea3101eS uint32_t cr_delay:6; 2240dea3101eS uint32_t ci:1; 2241dea3101eS uint32_t cr:1; 2242dea3101eS #endif 2243dea3101eS 2244dea3101eS uint32_t myId; 2245dea3101eS uint32_t rsvd2; 2246dea3101eS uint32_t edtov; 2247dea3101eS uint32_t arbtov; 2248dea3101eS uint32_t ratov; 2249dea3101eS uint32_t rttov; 2250dea3101eS uint32_t altov; 2251dea3101eS uint32_t crtov; 2252dea3101eS uint32_t citov; 2253dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2254dea3101eS uint32_t rrq_enable:1; 2255dea3101eS uint32_t rrq_immed:1; 2256dea3101eS uint32_t rsvd4:29; 2257dea3101eS uint32_t ack0_enable:1; 2258dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2259dea3101eS uint32_t ack0_enable:1; 2260dea3101eS uint32_t rsvd4:29; 2261dea3101eS uint32_t rrq_immed:1; 2262dea3101eS uint32_t rrq_enable:1; 2263dea3101eS #endif 2264dea3101eS } CONFIG_LINK; 2265dea3101eS 2266dea3101eS /* Structure for MB Command PART_SLIM (08) 2267dea3101eS * will be removed since SLI1 is no longer supported! 2268dea3101eS */ 2269dea3101eS typedef struct { 2270dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2271dea3101eS uint16_t offCiocb; 2272dea3101eS uint16_t numCiocb; 2273dea3101eS uint16_t offRiocb; 2274dea3101eS uint16_t numRiocb; 2275dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2276dea3101eS uint16_t numCiocb; 2277dea3101eS uint16_t offCiocb; 2278dea3101eS uint16_t numRiocb; 2279dea3101eS uint16_t offRiocb; 2280dea3101eS #endif 2281dea3101eS } RING_DEF; 2282dea3101eS 2283dea3101eS typedef struct { 2284dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2285dea3101eS uint32_t unused1:24; 2286dea3101eS uint32_t numRing:8; 2287dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2288dea3101eS uint32_t numRing:8; 2289dea3101eS uint32_t unused1:24; 2290dea3101eS #endif 2291dea3101eS 2292dea3101eS RING_DEF ringdef[4]; 2293dea3101eS uint32_t hbainit; 2294dea3101eS } PART_SLIM_VAR; 2295dea3101eS 2296dea3101eS /* Structure for MB Command CONFIG_RING (09) */ 2297dea3101eS 2298dea3101eS typedef struct { 2299dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2300dea3101eS uint32_t unused2:6; 2301dea3101eS uint32_t recvSeq:1; 2302dea3101eS uint32_t recvNotify:1; 2303dea3101eS uint32_t numMask:8; 2304dea3101eS uint32_t profile:8; 2305dea3101eS uint32_t unused1:4; 2306dea3101eS uint32_t ring:4; 2307dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2308dea3101eS uint32_t ring:4; 2309dea3101eS uint32_t unused1:4; 2310dea3101eS uint32_t profile:8; 2311dea3101eS uint32_t numMask:8; 2312dea3101eS uint32_t recvNotify:1; 2313dea3101eS uint32_t recvSeq:1; 2314dea3101eS uint32_t unused2:6; 2315dea3101eS #endif 2316dea3101eS 2317dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2318dea3101eS uint16_t maxRespXchg; 2319dea3101eS uint16_t maxOrigXchg; 2320dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2321dea3101eS uint16_t maxOrigXchg; 2322dea3101eS uint16_t maxRespXchg; 2323dea3101eS #endif 2324dea3101eS 2325dea3101eS RR_REG rrRegs[6]; 2326dea3101eS } CONFIG_RING_VAR; 2327dea3101eS 2328dea3101eS /* Structure for MB Command RESET_RING (10) */ 2329dea3101eS 2330dea3101eS typedef struct { 2331dea3101eS uint32_t ring_no; 2332dea3101eS } RESET_RING_VAR; 2333dea3101eS 2334dea3101eS /* Structure for MB Command READ_CONFIG (11) */ 2335dea3101eS 2336dea3101eS typedef struct { 2337dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2338dea3101eS uint32_t cr:1; 2339dea3101eS uint32_t ci:1; 2340dea3101eS uint32_t cr_delay:6; 2341dea3101eS uint32_t cr_count:8; 2342dea3101eS uint32_t InitBBC:8; 2343dea3101eS uint32_t MaxBBC:8; 2344dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2345dea3101eS uint32_t MaxBBC:8; 2346dea3101eS uint32_t InitBBC:8; 2347dea3101eS uint32_t cr_count:8; 2348dea3101eS uint32_t cr_delay:6; 2349dea3101eS uint32_t ci:1; 2350dea3101eS uint32_t cr:1; 2351dea3101eS #endif 2352dea3101eS 2353dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2354dea3101eS uint32_t topology:8; 2355dea3101eS uint32_t myDid:24; 2356dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2357dea3101eS uint32_t myDid:24; 2358dea3101eS uint32_t topology:8; 2359dea3101eS #endif 2360dea3101eS 2361dea3101eS /* Defines for topology (defined previously) */ 2362dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2363dea3101eS uint32_t AR:1; 2364dea3101eS uint32_t IR:1; 2365dea3101eS uint32_t rsvd1:29; 2366dea3101eS uint32_t ack0:1; 2367dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2368dea3101eS uint32_t ack0:1; 2369dea3101eS uint32_t rsvd1:29; 2370dea3101eS uint32_t IR:1; 2371dea3101eS uint32_t AR:1; 2372dea3101eS #endif 2373dea3101eS 2374dea3101eS uint32_t edtov; 2375dea3101eS uint32_t arbtov; 2376dea3101eS uint32_t ratov; 2377dea3101eS uint32_t rttov; 2378dea3101eS uint32_t altov; 2379dea3101eS uint32_t lmt; 238074b72a59SJamie Wellnitz #define LMT_RESERVED 0x000 /* Not used */ 238174b72a59SJamie Wellnitz #define LMT_1Gb 0x004 238274b72a59SJamie Wellnitz #define LMT_2Gb 0x008 238374b72a59SJamie Wellnitz #define LMT_4Gb 0x040 238474b72a59SJamie Wellnitz #define LMT_8Gb 0x080 238574b72a59SJamie Wellnitz #define LMT_10Gb 0x100 238676a95d75SJames Smart #define LMT_16Gb 0x200 2387d38dd52cSJames Smart #define LMT_32Gb 0x400 2388dea3101eS uint32_t rsvd2; 2389dea3101eS uint32_t rsvd3; 2390dea3101eS uint32_t max_xri; 2391dea3101eS uint32_t max_iocb; 2392dea3101eS uint32_t max_rpi; 2393dea3101eS uint32_t avail_xri; 2394dea3101eS uint32_t avail_iocb; 2395dea3101eS uint32_t avail_rpi; 2396858c9f6cSJames Smart uint32_t max_vpi; 2397858c9f6cSJames Smart uint32_t rsvd4; 2398858c9f6cSJames Smart uint32_t rsvd5; 2399858c9f6cSJames Smart uint32_t avail_vpi; 2400dea3101eS } READ_CONFIG_VAR; 2401dea3101eS 2402dea3101eS /* Structure for MB Command READ_RCONFIG (12) */ 2403dea3101eS 2404dea3101eS typedef struct { 2405dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2406dea3101eS uint32_t rsvd2:7; 2407dea3101eS uint32_t recvNotify:1; 2408dea3101eS uint32_t numMask:8; 2409dea3101eS uint32_t profile:8; 2410dea3101eS uint32_t rsvd1:4; 2411dea3101eS uint32_t ring:4; 2412dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2413dea3101eS uint32_t ring:4; 2414dea3101eS uint32_t rsvd1:4; 2415dea3101eS uint32_t profile:8; 2416dea3101eS uint32_t numMask:8; 2417dea3101eS uint32_t recvNotify:1; 2418dea3101eS uint32_t rsvd2:7; 2419dea3101eS #endif 2420dea3101eS 2421dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2422dea3101eS uint16_t maxResp; 2423dea3101eS uint16_t maxOrig; 2424dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2425dea3101eS uint16_t maxOrig; 2426dea3101eS uint16_t maxResp; 2427dea3101eS #endif 2428dea3101eS 2429dea3101eS RR_REG rrRegs[6]; 2430dea3101eS 2431dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2432dea3101eS uint16_t cmdRingOffset; 2433dea3101eS uint16_t cmdEntryCnt; 2434dea3101eS uint16_t rspRingOffset; 2435dea3101eS uint16_t rspEntryCnt; 2436dea3101eS uint16_t nextCmdOffset; 2437dea3101eS uint16_t rsvd3; 2438dea3101eS uint16_t nextRspOffset; 2439dea3101eS uint16_t rsvd4; 2440dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2441dea3101eS uint16_t cmdEntryCnt; 2442dea3101eS uint16_t cmdRingOffset; 2443dea3101eS uint16_t rspEntryCnt; 2444dea3101eS uint16_t rspRingOffset; 2445dea3101eS uint16_t rsvd3; 2446dea3101eS uint16_t nextCmdOffset; 2447dea3101eS uint16_t rsvd4; 2448dea3101eS uint16_t nextRspOffset; 2449dea3101eS #endif 2450dea3101eS } READ_RCONF_VAR; 2451dea3101eS 2452dea3101eS /* Structure for MB Command READ_SPARM (13) */ 2453dea3101eS /* Structure for MB Command READ_SPARM64 (0x8D) */ 2454dea3101eS 2455dea3101eS typedef struct { 2456dea3101eS uint32_t rsvd1; 2457dea3101eS uint32_t rsvd2; 2458dea3101eS union { 2459dea3101eS struct ulp_bde sp; /* This BDE points to struct serv_parm 2460dea3101eS structure */ 2461dea3101eS struct ulp_bde64 sp64; 2462dea3101eS } un; 2463ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 2464ed957684SJames Smart uint16_t rsvd3; 2465ed957684SJames Smart uint16_t vpi; 2466ed957684SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 2467ed957684SJames Smart uint16_t vpi; 2468ed957684SJames Smart uint16_t rsvd3; 2469ed957684SJames Smart #endif 2470dea3101eS } READ_SPARM_VAR; 2471dea3101eS 2472dea3101eS /* Structure for MB Command READ_STATUS (14) */ 2473dea3101eS 2474dea3101eS typedef struct { 2475dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2476dea3101eS uint32_t rsvd1:31; 2477dea3101eS uint32_t clrCounters:1; 2478dea3101eS uint16_t activeXriCnt; 2479dea3101eS uint16_t activeRpiCnt; 2480dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2481dea3101eS uint32_t clrCounters:1; 2482dea3101eS uint32_t rsvd1:31; 2483dea3101eS uint16_t activeRpiCnt; 2484dea3101eS uint16_t activeXriCnt; 2485dea3101eS #endif 2486dea3101eS 2487dea3101eS uint32_t xmitByteCnt; 2488dea3101eS uint32_t rcvByteCnt; 2489dea3101eS uint32_t xmitFrameCnt; 2490dea3101eS uint32_t rcvFrameCnt; 2491dea3101eS uint32_t xmitSeqCnt; 2492dea3101eS uint32_t rcvSeqCnt; 2493dea3101eS uint32_t totalOrigExchanges; 2494dea3101eS uint32_t totalRespExchanges; 2495dea3101eS uint32_t rcvPbsyCnt; 2496dea3101eS uint32_t rcvFbsyCnt; 2497dea3101eS } READ_STATUS_VAR; 2498dea3101eS 2499dea3101eS /* Structure for MB Command READ_RPI (15) */ 2500dea3101eS /* Structure for MB Command READ_RPI64 (0x8F) */ 2501dea3101eS 2502dea3101eS typedef struct { 2503dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2504dea3101eS uint16_t nextRpi; 2505dea3101eS uint16_t reqRpi; 2506dea3101eS uint32_t rsvd2:8; 2507dea3101eS uint32_t DID:24; 2508dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2509dea3101eS uint16_t reqRpi; 2510dea3101eS uint16_t nextRpi; 2511dea3101eS uint32_t DID:24; 2512dea3101eS uint32_t rsvd2:8; 2513dea3101eS #endif 2514dea3101eS 2515dea3101eS union { 2516dea3101eS struct ulp_bde sp; 2517dea3101eS struct ulp_bde64 sp64; 2518dea3101eS } un; 2519dea3101eS 2520dea3101eS } READ_RPI_VAR; 2521dea3101eS 2522dea3101eS /* Structure for MB Command READ_XRI (16) */ 2523dea3101eS 2524dea3101eS typedef struct { 2525dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2526dea3101eS uint16_t nextXri; 2527dea3101eS uint16_t reqXri; 2528dea3101eS uint16_t rsvd1; 2529dea3101eS uint16_t rpi; 2530dea3101eS uint32_t rsvd2:8; 2531dea3101eS uint32_t DID:24; 2532dea3101eS uint32_t rsvd3:8; 2533dea3101eS uint32_t SID:24; 2534dea3101eS uint32_t rsvd4; 2535dea3101eS uint8_t seqId; 2536dea3101eS uint8_t rsvd5; 2537dea3101eS uint16_t seqCount; 2538dea3101eS uint16_t oxId; 2539dea3101eS uint16_t rxId; 2540dea3101eS uint32_t rsvd6:30; 2541dea3101eS uint32_t si:1; 2542dea3101eS uint32_t exchOrig:1; 2543dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2544dea3101eS uint16_t reqXri; 2545dea3101eS uint16_t nextXri; 2546dea3101eS uint16_t rpi; 2547dea3101eS uint16_t rsvd1; 2548dea3101eS uint32_t DID:24; 2549dea3101eS uint32_t rsvd2:8; 2550dea3101eS uint32_t SID:24; 2551dea3101eS uint32_t rsvd3:8; 2552dea3101eS uint32_t rsvd4; 2553dea3101eS uint16_t seqCount; 2554dea3101eS uint8_t rsvd5; 2555dea3101eS uint8_t seqId; 2556dea3101eS uint16_t rxId; 2557dea3101eS uint16_t oxId; 2558dea3101eS uint32_t exchOrig:1; 2559dea3101eS uint32_t si:1; 2560dea3101eS uint32_t rsvd6:30; 2561dea3101eS #endif 2562dea3101eS } READ_XRI_VAR; 2563dea3101eS 2564dea3101eS /* Structure for MB Command READ_REV (17) */ 2565dea3101eS 2566dea3101eS typedef struct { 2567dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2568dea3101eS uint32_t cv:1; 2569dea3101eS uint32_t rr:1; 2570ed957684SJames Smart uint32_t rsvd2:2; 2571ed957684SJames Smart uint32_t v3req:1; 2572ed957684SJames Smart uint32_t v3rsp:1; 2573ed957684SJames Smart uint32_t rsvd1:25; 2574dea3101eS uint32_t rv:1; 2575dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2576dea3101eS uint32_t rv:1; 2577ed957684SJames Smart uint32_t rsvd1:25; 2578ed957684SJames Smart uint32_t v3rsp:1; 2579ed957684SJames Smart uint32_t v3req:1; 2580ed957684SJames Smart uint32_t rsvd2:2; 2581dea3101eS uint32_t rr:1; 2582dea3101eS uint32_t cv:1; 2583dea3101eS #endif 2584dea3101eS 2585dea3101eS uint32_t biuRev; 2586dea3101eS uint32_t smRev; 2587dea3101eS union { 2588dea3101eS uint32_t smFwRev; 2589dea3101eS struct { 2590dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2591dea3101eS uint8_t ProgType; 2592dea3101eS uint8_t ProgId; 2593dea3101eS uint16_t ProgVer:4; 2594dea3101eS uint16_t ProgRev:4; 2595dea3101eS uint16_t ProgFixLvl:2; 2596dea3101eS uint16_t ProgDistType:2; 2597dea3101eS uint16_t DistCnt:4; 2598dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2599dea3101eS uint16_t DistCnt:4; 2600dea3101eS uint16_t ProgDistType:2; 2601dea3101eS uint16_t ProgFixLvl:2; 2602dea3101eS uint16_t ProgRev:4; 2603dea3101eS uint16_t ProgVer:4; 2604dea3101eS uint8_t ProgId; 2605dea3101eS uint8_t ProgType; 2606dea3101eS #endif 2607dea3101eS 2608dea3101eS } b; 2609dea3101eS } un; 2610dea3101eS uint32_t endecRev; 2611dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2612dea3101eS uint8_t feaLevelHigh; 2613dea3101eS uint8_t feaLevelLow; 2614dea3101eS uint8_t fcphHigh; 2615dea3101eS uint8_t fcphLow; 2616dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2617dea3101eS uint8_t fcphLow; 2618dea3101eS uint8_t fcphHigh; 2619dea3101eS uint8_t feaLevelLow; 2620dea3101eS uint8_t feaLevelHigh; 2621dea3101eS #endif 2622dea3101eS 2623dea3101eS uint32_t postKernRev; 2624dea3101eS uint32_t opFwRev; 2625dea3101eS uint8_t opFwName[16]; 2626dea3101eS uint32_t sli1FwRev; 2627dea3101eS uint8_t sli1FwName[16]; 2628dea3101eS uint32_t sli2FwRev; 2629dea3101eS uint8_t sli2FwName[16]; 2630ed957684SJames Smart uint32_t sli3Feat; 2631ed957684SJames Smart uint32_t RandomData[6]; 2632dea3101eS } READ_REV_VAR; 2633dea3101eS 2634dea3101eS /* Structure for MB Command READ_LINK_STAT (18) */ 2635dea3101eS 2636dea3101eS typedef struct { 26374258e98eSJames Smart uint32_t word0; 26384258e98eSJames Smart 26394258e98eSJames Smart #define lpfc_read_link_stat_rec_SHIFT 0 26404258e98eSJames Smart #define lpfc_read_link_stat_rec_MASK 0x1 26414258e98eSJames Smart #define lpfc_read_link_stat_rec_WORD word0 26424258e98eSJames Smart 26434258e98eSJames Smart #define lpfc_read_link_stat_gec_SHIFT 1 26444258e98eSJames Smart #define lpfc_read_link_stat_gec_MASK 0x1 26454258e98eSJames Smart #define lpfc_read_link_stat_gec_WORD word0 26464258e98eSJames Smart 26474258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_SHIFT 2 26484258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_MASK 0x3FFFFF 26494258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_WORD word0 26504258e98eSJames Smart 26514258e98eSJames Smart #define lpfc_read_link_stat_rsvd_SHIFT 24 26524258e98eSJames Smart #define lpfc_read_link_stat_rsvd_MASK 0x1F 26534258e98eSJames Smart #define lpfc_read_link_stat_rsvd_WORD word0 26544258e98eSJames Smart 26554258e98eSJames Smart #define lpfc_read_link_stat_gec2_SHIFT 29 26564258e98eSJames Smart #define lpfc_read_link_stat_gec2_MASK 0x1 26574258e98eSJames Smart #define lpfc_read_link_stat_gec2_WORD word0 26584258e98eSJames Smart 26594258e98eSJames Smart #define lpfc_read_link_stat_clrc_SHIFT 30 26604258e98eSJames Smart #define lpfc_read_link_stat_clrc_MASK 0x1 26614258e98eSJames Smart #define lpfc_read_link_stat_clrc_WORD word0 26624258e98eSJames Smart 26634258e98eSJames Smart #define lpfc_read_link_stat_clof_SHIFT 31 26644258e98eSJames Smart #define lpfc_read_link_stat_clof_MASK 0x1 26654258e98eSJames Smart #define lpfc_read_link_stat_clof_WORD word0 26664258e98eSJames Smart 2667dea3101eS uint32_t linkFailureCnt; 2668dea3101eS uint32_t lossSyncCnt; 2669dea3101eS uint32_t lossSignalCnt; 2670dea3101eS uint32_t primSeqErrCnt; 2671dea3101eS uint32_t invalidXmitWord; 2672dea3101eS uint32_t crcCnt; 2673dea3101eS uint32_t primSeqTimeout; 2674dea3101eS uint32_t elasticOverrun; 2675dea3101eS uint32_t arbTimeout; 26764258e98eSJames Smart uint32_t advRecBufCredit; 26774258e98eSJames Smart uint32_t curRecBufCredit; 26784258e98eSJames Smart uint32_t advTransBufCredit; 26794258e98eSJames Smart uint32_t curTransBufCredit; 26804258e98eSJames Smart uint32_t recEofCount; 26814258e98eSJames Smart uint32_t recEofdtiCount; 26824258e98eSJames Smart uint32_t recEofniCount; 26834258e98eSJames Smart uint32_t recSofcount; 26844258e98eSJames Smart uint32_t rsvd1; 26854258e98eSJames Smart uint32_t rsvd2; 26864258e98eSJames Smart uint32_t recDrpXriCount; 26874258e98eSJames Smart uint32_t fecCorrBlkCount; 26884258e98eSJames Smart uint32_t fecUncorrBlkCount; 2689dea3101eS } READ_LNK_VAR; 2690dea3101eS 2691dea3101eS /* Structure for MB Command REG_LOGIN (19) */ 2692dea3101eS /* Structure for MB Command REG_LOGIN64 (0x93) */ 2693dea3101eS 2694dea3101eS typedef struct { 2695dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2696dea3101eS uint16_t rsvd1; 2697dea3101eS uint16_t rpi; 2698dea3101eS uint32_t rsvd2:8; 2699dea3101eS uint32_t did:24; 2700dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2701dea3101eS uint16_t rpi; 2702dea3101eS uint16_t rsvd1; 2703dea3101eS uint32_t did:24; 2704dea3101eS uint32_t rsvd2:8; 2705dea3101eS #endif 2706dea3101eS 2707dea3101eS union { 2708dea3101eS struct ulp_bde sp; 2709dea3101eS struct ulp_bde64 sp64; 2710dea3101eS } un; 2711dea3101eS 2712ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 2713ed957684SJames Smart uint16_t rsvd6; 2714ed957684SJames Smart uint16_t vpi; 2715ed957684SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 2716ed957684SJames Smart uint16_t vpi; 2717ed957684SJames Smart uint16_t rsvd6; 2718ed957684SJames Smart #endif 2719ed957684SJames Smart 2720dea3101eS } REG_LOGIN_VAR; 2721dea3101eS 2722dea3101eS /* Word 30 contents for REG_LOGIN */ 2723dea3101eS typedef union { 2724dea3101eS struct { 2725dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2726dea3101eS uint16_t rsvd1:12; 2727dea3101eS uint16_t wd30_class:4; 2728dea3101eS uint16_t xri; 2729dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2730dea3101eS uint16_t xri; 2731dea3101eS uint16_t wd30_class:4; 2732dea3101eS uint16_t rsvd1:12; 2733dea3101eS #endif 2734dea3101eS } f; 2735dea3101eS uint32_t word; 2736dea3101eS } REG_WD30; 2737dea3101eS 2738dea3101eS /* Structure for MB Command UNREG_LOGIN (20) */ 2739dea3101eS 2740dea3101eS typedef struct { 2741dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2742dea3101eS uint16_t rsvd1; 2743dea3101eS uint16_t rpi; 2744ed957684SJames Smart uint32_t rsvd2; 2745ed957684SJames Smart uint32_t rsvd3; 2746ed957684SJames Smart uint32_t rsvd4; 2747ed957684SJames Smart uint32_t rsvd5; 2748ed957684SJames Smart uint16_t rsvd6; 2749ed957684SJames Smart uint16_t vpi; 2750dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2751dea3101eS uint16_t rpi; 2752dea3101eS uint16_t rsvd1; 2753ed957684SJames Smart uint32_t rsvd2; 2754ed957684SJames Smart uint32_t rsvd3; 2755ed957684SJames Smart uint32_t rsvd4; 2756ed957684SJames Smart uint32_t rsvd5; 2757ed957684SJames Smart uint16_t vpi; 2758ed957684SJames Smart uint16_t rsvd6; 2759dea3101eS #endif 2760dea3101eS } UNREG_LOGIN_VAR; 2761dea3101eS 276292d7f7b0SJames Smart /* Structure for MB Command REG_VPI (0x96) */ 276392d7f7b0SJames Smart typedef struct { 276492d7f7b0SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 276592d7f7b0SJames Smart uint32_t rsvd1; 276638b92ef8SJames Smart uint32_t rsvd2:7; 276738b92ef8SJames Smart uint32_t upd:1; 276892d7f7b0SJames Smart uint32_t sid:24; 2769c868595dSJames Smart uint32_t wwn[2]; 277092d7f7b0SJames Smart uint32_t rsvd5; 2771da0436e9SJames Smart uint16_t vfi; 277292d7f7b0SJames Smart uint16_t vpi; 277392d7f7b0SJames Smart #else /* __LITTLE_ENDIAN */ 277492d7f7b0SJames Smart uint32_t rsvd1; 277592d7f7b0SJames Smart uint32_t sid:24; 277638b92ef8SJames Smart uint32_t upd:1; 277738b92ef8SJames Smart uint32_t rsvd2:7; 2778c868595dSJames Smart uint32_t wwn[2]; 277992d7f7b0SJames Smart uint32_t rsvd5; 278092d7f7b0SJames Smart uint16_t vpi; 2781da0436e9SJames Smart uint16_t vfi; 278292d7f7b0SJames Smart #endif 278392d7f7b0SJames Smart } REG_VPI_VAR; 278492d7f7b0SJames Smart 278592d7f7b0SJames Smart /* Structure for MB Command UNREG_VPI (0x97) */ 278692d7f7b0SJames Smart typedef struct { 278792d7f7b0SJames Smart uint32_t rsvd1; 27886669f9bbSJames Smart #ifdef __BIG_ENDIAN_BITFIELD 27896669f9bbSJames Smart uint16_t rsvd2; 27906669f9bbSJames Smart uint16_t sli4_vpi; 27916669f9bbSJames Smart #else /* __LITTLE_ENDIAN */ 27926669f9bbSJames Smart uint16_t sli4_vpi; 27936669f9bbSJames Smart uint16_t rsvd2; 27946669f9bbSJames Smart #endif 279592d7f7b0SJames Smart uint32_t rsvd3; 279692d7f7b0SJames Smart uint32_t rsvd4; 279792d7f7b0SJames Smart uint32_t rsvd5; 279892d7f7b0SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 279992d7f7b0SJames Smart uint16_t rsvd6; 280092d7f7b0SJames Smart uint16_t vpi; 280192d7f7b0SJames Smart #else /* __LITTLE_ENDIAN */ 280292d7f7b0SJames Smart uint16_t vpi; 280392d7f7b0SJames Smart uint16_t rsvd6; 280492d7f7b0SJames Smart #endif 280592d7f7b0SJames Smart } UNREG_VPI_VAR; 280692d7f7b0SJames Smart 2807dea3101eS /* Structure for MB Command UNREG_D_ID (0x23) */ 2808dea3101eS 2809dea3101eS typedef struct { 2810dea3101eS uint32_t did; 2811ed957684SJames Smart uint32_t rsvd2; 2812ed957684SJames Smart uint32_t rsvd3; 2813ed957684SJames Smart uint32_t rsvd4; 2814ed957684SJames Smart uint32_t rsvd5; 2815ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 2816ed957684SJames Smart uint16_t rsvd6; 2817ed957684SJames Smart uint16_t vpi; 2818ed957684SJames Smart #else 2819ed957684SJames Smart uint16_t vpi; 2820ed957684SJames Smart uint16_t rsvd6; 2821ed957684SJames Smart #endif 2822dea3101eS } UNREG_D_ID_VAR; 2823dea3101eS 282476a95d75SJames Smart /* Structure for MB Command READ_TOPOLOGY (0x95) */ 282576a95d75SJames Smart struct lpfc_mbx_read_top { 2826dea3101eS uint32_t eventTag; /* Event tag */ 282776a95d75SJames Smart uint32_t word2; 282876a95d75SJames Smart #define lpfc_mbx_read_top_fa_SHIFT 12 282976a95d75SJames Smart #define lpfc_mbx_read_top_fa_MASK 0x00000001 283076a95d75SJames Smart #define lpfc_mbx_read_top_fa_WORD word2 283176a95d75SJames Smart #define lpfc_mbx_read_top_mm_SHIFT 11 283276a95d75SJames Smart #define lpfc_mbx_read_top_mm_MASK 0x00000001 283376a95d75SJames Smart #define lpfc_mbx_read_top_mm_WORD word2 283476a95d75SJames Smart #define lpfc_mbx_read_top_pb_SHIFT 9 283576a95d75SJames Smart #define lpfc_mbx_read_top_pb_MASK 0X00000001 283676a95d75SJames Smart #define lpfc_mbx_read_top_pb_WORD word2 283776a95d75SJames Smart #define lpfc_mbx_read_top_il_SHIFT 8 283876a95d75SJames Smart #define lpfc_mbx_read_top_il_MASK 0x00000001 283976a95d75SJames Smart #define lpfc_mbx_read_top_il_WORD word2 284076a95d75SJames Smart #define lpfc_mbx_read_top_att_type_SHIFT 0 284176a95d75SJames Smart #define lpfc_mbx_read_top_att_type_MASK 0x000000FF 284276a95d75SJames Smart #define lpfc_mbx_read_top_att_type_WORD word2 284376a95d75SJames Smart #define LPFC_ATT_RESERVED 0x00 /* Reserved - attType */ 284476a95d75SJames Smart #define LPFC_ATT_LINK_UP 0x01 /* Link is up */ 284576a95d75SJames Smart #define LPFC_ATT_LINK_DOWN 0x02 /* Link is down */ 284676a95d75SJames Smart uint32_t word3; 284776a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_SHIFT 24 284876a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_MASK 0x000000FF 284976a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_WORD word3 285076a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_SHIFT 16 285176a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_MASK 0x000000FF 285276a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_WORD word3 285376a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_SHIFT 8 285476a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_MASK 0x000000FF 285576a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_WORD word3 285676a95d75SJames Smart #define lpfc_mbx_read_top_topology_SHIFT 0 285776a95d75SJames Smart #define lpfc_mbx_read_top_topology_MASK 0x000000FF 285876a95d75SJames Smart #define lpfc_mbx_read_top_topology_WORD word3 285976a95d75SJames Smart #define LPFC_TOPOLOGY_PT_PT 0x01 /* Topology is pt-pt / pt-fabric */ 286076a95d75SJames Smart #define LPFC_TOPOLOGY_LOOP 0x02 /* Topology is FC-AL */ 286176a95d75SJames Smart #define LPFC_TOPOLOGY_MM 0x05 /* maint mode zephtr to menlo */ 2862dea3101eS /* store the LILP AL_PA position map into */ 2863dea3101eS struct ulp_bde64 lilpBde64; 286476a95d75SJames Smart #define LPFC_ALPA_MAP_SIZE 128 286576a95d75SJames Smart uint32_t word7; 286676a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_SHIFT 31 286776a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_MASK 0x00000001 286876a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_WORD word7 286976a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_SHIFT 30 287076a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_MASK 0x00000001 287176a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_WORD word7 287276a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_SHIFT 8 287376a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_MASK 0x000000FF 287476a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_WORD word7 287576a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_SHIFT 4 287676a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_MASK 0x0000000F 287776a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_WORD word7 287876a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_SHIFT 2 287976a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_MASK 0x00000003 288076a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_WORD word7 288176a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_SHIFT 0 288276a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_MASK 0x00000003 288376a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_WORD word7 288476a95d75SJames Smart uint32_t word8; 288576a95d75SJames Smart #define lpfc_mbx_read_top_lu_SHIFT 31 288676a95d75SJames Smart #define lpfc_mbx_read_top_lu_MASK 0x00000001 288776a95d75SJames Smart #define lpfc_mbx_read_top_lu_WORD word8 288876a95d75SJames Smart #define lpfc_mbx_read_top_tf_SHIFT 30 288976a95d75SJames Smart #define lpfc_mbx_read_top_tf_MASK 0x00000001 289076a95d75SJames Smart #define lpfc_mbx_read_top_tf_WORD word8 289176a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_SHIFT 8 289276a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_MASK 0x000000FF 289376a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_WORD word8 289476a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_SHIFT 4 289576a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_MASK 0x0000000F 289676a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_WORD word8 289776a95d75SJames Smart #define lpfc_mbx_read_top_tx_SHIFT 2 289876a95d75SJames Smart #define lpfc_mbx_read_top_tx_MASK 0x00000003 289976a95d75SJames Smart #define lpfc_mbx_read_top_tx_WORD word8 290076a95d75SJames Smart #define lpfc_mbx_read_top_rx_SHIFT 0 290176a95d75SJames Smart #define lpfc_mbx_read_top_rx_MASK 0x00000003 290276a95d75SJames Smart #define lpfc_mbx_read_top_rx_WORD word8 290376a95d75SJames Smart #define LPFC_LINK_SPEED_UNKNOWN 0x0 290476a95d75SJames Smart #define LPFC_LINK_SPEED_1GHZ 0x04 290576a95d75SJames Smart #define LPFC_LINK_SPEED_2GHZ 0x08 290676a95d75SJames Smart #define LPFC_LINK_SPEED_4GHZ 0x10 290776a95d75SJames Smart #define LPFC_LINK_SPEED_8GHZ 0x20 290876a95d75SJames Smart #define LPFC_LINK_SPEED_10GHZ 0x40 290976a95d75SJames Smart #define LPFC_LINK_SPEED_16GHZ 0x80 2910d38dd52cSJames Smart #define LPFC_LINK_SPEED_32GHZ 0x90 291176a95d75SJames Smart }; 2912dea3101eS 2913dea3101eS /* Structure for MB Command CLEAR_LA (22) */ 2914dea3101eS 2915dea3101eS typedef struct { 2916dea3101eS uint32_t eventTag; /* Event tag */ 2917dea3101eS uint32_t rsvd1; 2918dea3101eS } CLEAR_LA_VAR; 2919dea3101eS 2920dea3101eS /* Structure for MB Command DUMP */ 2921dea3101eS 2922dea3101eS typedef struct { 2923dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2924dea3101eS uint32_t rsvd:25; 2925dea3101eS uint32_t ra:1; 2926dea3101eS uint32_t co:1; 2927dea3101eS uint32_t cv:1; 2928dea3101eS uint32_t type:4; 2929dea3101eS uint32_t entry_index:16; 2930dea3101eS uint32_t region_id:16; 2931dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2932dea3101eS uint32_t type:4; 2933dea3101eS uint32_t cv:1; 2934dea3101eS uint32_t co:1; 2935dea3101eS uint32_t ra:1; 2936dea3101eS uint32_t rsvd:25; 2937dea3101eS uint32_t region_id:16; 2938dea3101eS uint32_t entry_index:16; 2939dea3101eS #endif 2940dea3101eS 2941da0436e9SJames Smart uint32_t sli4_length; 2942dea3101eS uint32_t word_cnt; 2943dea3101eS uint32_t resp_offset; 2944dea3101eS } DUMP_VAR; 2945dea3101eS 2946dea3101eS #define DMP_MEM_REG 0x1 2947dea3101eS #define DMP_NV_PARAMS 0x2 29483ef6d24cSJames Smart #define DMP_LMSD 0x3 /* Link Module Serial Data */ 29493ef6d24cSJames Smart #define DMP_WELL_KNOWN 0x4 2950dea3101eS 2951dea3101eS #define DMP_REGION_VPD 0xe 2952dea3101eS #define DMP_VPD_SIZE 0x400 /* maximum amount of VPD */ 2953dea3101eS #define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */ 2954dea3101eS #define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */ 2955dea3101eS 2956da0436e9SJames Smart #define DMP_REGION_VPORT 0x16 /* VPort info region */ 2957da0436e9SJames Smart #define DMP_VPORT_REGION_SIZE 0x200 2958da0436e9SJames Smart #define DMP_MBOX_OFFSET_WORD 0x5 2959da0436e9SJames Smart 2960a0c87cbdSJames Smart #define DMP_REGION_23 0x17 /* fcoe param and port state region */ 2961a0c87cbdSJames Smart #define DMP_RGN23_SIZE 0x400 2962da0436e9SJames Smart 296397207482SJames Smart #define WAKE_UP_PARMS_REGION_ID 4 296497207482SJames Smart #define WAKE_UP_PARMS_WORD_SIZE 15 296597207482SJames Smart 2966da0436e9SJames Smart struct vport_rec { 2967da0436e9SJames Smart uint8_t wwpn[8]; 2968da0436e9SJames Smart uint8_t wwnn[8]; 2969da0436e9SJames Smart }; 2970da0436e9SJames Smart 2971da0436e9SJames Smart #define VPORT_INFO_SIG 0x32324752 2972da0436e9SJames Smart #define VPORT_INFO_REV_MASK 0xff 2973da0436e9SJames Smart #define VPORT_INFO_REV 0x1 2974da0436e9SJames Smart #define MAX_STATIC_VPORT_COUNT 16 2975da0436e9SJames Smart struct static_vport_info { 2976da0436e9SJames Smart uint32_t signature; 2977da0436e9SJames Smart uint32_t rev; 2978da0436e9SJames Smart struct vport_rec vport_list[MAX_STATIC_VPORT_COUNT]; 2979da0436e9SJames Smart uint32_t resvd[66]; 2980da0436e9SJames Smart }; 2981da0436e9SJames Smart 298297207482SJames Smart /* Option rom version structure */ 298397207482SJames Smart struct prog_id { 298497207482SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 298597207482SJames Smart uint8_t type; 298697207482SJames Smart uint8_t id; 298797207482SJames Smart uint32_t ver:4; /* Major Version */ 298897207482SJames Smart uint32_t rev:4; /* Revision */ 298997207482SJames Smart uint32_t lev:2; /* Level */ 299097207482SJames Smart uint32_t dist:2; /* Dist Type */ 299197207482SJames Smart uint32_t num:4; /* number after dist type */ 299297207482SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 299397207482SJames Smart uint32_t num:4; /* number after dist type */ 299497207482SJames Smart uint32_t dist:2; /* Dist Type */ 299597207482SJames Smart uint32_t lev:2; /* Level */ 299697207482SJames Smart uint32_t rev:4; /* Revision */ 299797207482SJames Smart uint32_t ver:4; /* Major Version */ 299897207482SJames Smart uint8_t id; 299997207482SJames Smart uint8_t type; 300097207482SJames Smart #endif 300197207482SJames Smart }; 300297207482SJames Smart 3003d7c255b2SJames Smart /* Structure for MB Command UPDATE_CFG (0x1B) */ 3004d7c255b2SJames Smart 3005d7c255b2SJames Smart struct update_cfg_var { 3006d7c255b2SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3007d7c255b2SJames Smart uint32_t rsvd2:16; 3008d7c255b2SJames Smart uint32_t type:8; 3009d7c255b2SJames Smart uint32_t rsvd:1; 3010d7c255b2SJames Smart uint32_t ra:1; 3011d7c255b2SJames Smart uint32_t co:1; 3012d7c255b2SJames Smart uint32_t cv:1; 3013d7c255b2SJames Smart uint32_t req:4; 3014d7c255b2SJames Smart uint32_t entry_length:16; 3015d7c255b2SJames Smart uint32_t region_id:16; 3016d7c255b2SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 3017d7c255b2SJames Smart uint32_t req:4; 3018d7c255b2SJames Smart uint32_t cv:1; 3019d7c255b2SJames Smart uint32_t co:1; 3020d7c255b2SJames Smart uint32_t ra:1; 3021d7c255b2SJames Smart uint32_t rsvd:1; 3022d7c255b2SJames Smart uint32_t type:8; 3023d7c255b2SJames Smart uint32_t rsvd2:16; 3024d7c255b2SJames Smart uint32_t region_id:16; 3025d7c255b2SJames Smart uint32_t entry_length:16; 3026d7c255b2SJames Smart #endif 3027d7c255b2SJames Smart 3028d7c255b2SJames Smart uint32_t resp_info; 3029d7c255b2SJames Smart uint32_t byte_cnt; 3030d7c255b2SJames Smart uint32_t data_offset; 3031d7c255b2SJames Smart }; 3032d7c255b2SJames Smart 3033ed957684SJames Smart struct hbq_mask { 3034ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3035ed957684SJames Smart uint8_t tmatch; 3036ed957684SJames Smart uint8_t tmask; 3037ed957684SJames Smart uint8_t rctlmatch; 3038ed957684SJames Smart uint8_t rctlmask; 3039ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3040ed957684SJames Smart uint8_t rctlmask; 3041ed957684SJames Smart uint8_t rctlmatch; 3042ed957684SJames Smart uint8_t tmask; 3043ed957684SJames Smart uint8_t tmatch; 3044ed957684SJames Smart #endif 3045ed957684SJames Smart }; 3046ed957684SJames Smart 3047ed957684SJames Smart 3048ed957684SJames Smart /* Structure for MB Command CONFIG_HBQ (7c) */ 3049ed957684SJames Smart 3050ed957684SJames Smart struct config_hbq_var { 3051ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3052ed957684SJames Smart uint32_t rsvd1 :7; 3053ed957684SJames Smart uint32_t recvNotify :1; /* Receive Notification */ 3054ed957684SJames Smart uint32_t numMask :8; /* # Mask Entries */ 3055ed957684SJames Smart uint32_t profile :8; /* Selection Profile */ 3056ed957684SJames Smart uint32_t rsvd2 :8; 3057ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3058ed957684SJames Smart uint32_t rsvd2 :8; 3059ed957684SJames Smart uint32_t profile :8; /* Selection Profile */ 3060ed957684SJames Smart uint32_t numMask :8; /* # Mask Entries */ 3061ed957684SJames Smart uint32_t recvNotify :1; /* Receive Notification */ 3062ed957684SJames Smart uint32_t rsvd1 :7; 3063ed957684SJames Smart #endif 3064ed957684SJames Smart 3065ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3066ed957684SJames Smart uint32_t hbqId :16; 3067ed957684SJames Smart uint32_t rsvd3 :12; 3068ed957684SJames Smart uint32_t ringMask :4; 3069ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3070ed957684SJames Smart uint32_t ringMask :4; 3071ed957684SJames Smart uint32_t rsvd3 :12; 3072ed957684SJames Smart uint32_t hbqId :16; 3073ed957684SJames Smart #endif 3074ed957684SJames Smart 3075ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3076ed957684SJames Smart uint32_t entry_count :16; 3077ed957684SJames Smart uint32_t rsvd4 :8; 3078ed957684SJames Smart uint32_t headerLen :8; 3079ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3080ed957684SJames Smart uint32_t headerLen :8; 3081ed957684SJames Smart uint32_t rsvd4 :8; 3082ed957684SJames Smart uint32_t entry_count :16; 3083ed957684SJames Smart #endif 3084ed957684SJames Smart 3085ed957684SJames Smart uint32_t hbqaddrLow; 3086ed957684SJames Smart uint32_t hbqaddrHigh; 3087ed957684SJames Smart 3088ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3089ed957684SJames Smart uint32_t rsvd5 :31; 3090ed957684SJames Smart uint32_t logEntry :1; 3091ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3092ed957684SJames Smart uint32_t logEntry :1; 3093ed957684SJames Smart uint32_t rsvd5 :31; 3094ed957684SJames Smart #endif 3095ed957684SJames Smart 3096ed957684SJames Smart uint32_t rsvd6; /* w7 */ 3097ed957684SJames Smart uint32_t rsvd7; /* w8 */ 3098ed957684SJames Smart uint32_t rsvd8; /* w9 */ 3099ed957684SJames Smart 3100ed957684SJames Smart struct hbq_mask hbqMasks[6]; 3101ed957684SJames Smart 3102ed957684SJames Smart 3103ed957684SJames Smart union { 3104ed957684SJames Smart uint32_t allprofiles[12]; 3105ed957684SJames Smart 3106ed957684SJames Smart struct { 3107ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3108ed957684SJames Smart uint32_t seqlenoff :16; 3109ed957684SJames Smart uint32_t maxlen :16; 3110ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3111ed957684SJames Smart uint32_t maxlen :16; 3112ed957684SJames Smart uint32_t seqlenoff :16; 3113ed957684SJames Smart #endif 3114ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3115ed957684SJames Smart uint32_t rsvd1 :28; 3116ed957684SJames Smart uint32_t seqlenbcnt :4; 3117ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3118ed957684SJames Smart uint32_t seqlenbcnt :4; 3119ed957684SJames Smart uint32_t rsvd1 :28; 3120ed957684SJames Smart #endif 3121ed957684SJames Smart uint32_t rsvd[10]; 3122ed957684SJames Smart } profile2; 3123ed957684SJames Smart 3124ed957684SJames Smart struct { 3125ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3126ed957684SJames Smart uint32_t seqlenoff :16; 3127ed957684SJames Smart uint32_t maxlen :16; 3128ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3129ed957684SJames Smart uint32_t maxlen :16; 3130ed957684SJames Smart uint32_t seqlenoff :16; 3131ed957684SJames Smart #endif 3132ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3133ed957684SJames Smart uint32_t cmdcodeoff :28; 3134ed957684SJames Smart uint32_t rsvd1 :12; 3135ed957684SJames Smart uint32_t seqlenbcnt :4; 3136ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3137ed957684SJames Smart uint32_t seqlenbcnt :4; 3138ed957684SJames Smart uint32_t rsvd1 :12; 3139ed957684SJames Smart uint32_t cmdcodeoff :28; 3140ed957684SJames Smart #endif 3141ed957684SJames Smart uint32_t cmdmatch[8]; 3142ed957684SJames Smart 3143ed957684SJames Smart uint32_t rsvd[2]; 3144ed957684SJames Smart } profile3; 3145ed957684SJames Smart 3146ed957684SJames Smart struct { 3147ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3148ed957684SJames Smart uint32_t seqlenoff :16; 3149ed957684SJames Smart uint32_t maxlen :16; 3150ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3151ed957684SJames Smart uint32_t maxlen :16; 3152ed957684SJames Smart uint32_t seqlenoff :16; 3153ed957684SJames Smart #endif 3154ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3155ed957684SJames Smart uint32_t cmdcodeoff :28; 3156ed957684SJames Smart uint32_t rsvd1 :12; 3157ed957684SJames Smart uint32_t seqlenbcnt :4; 3158ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3159ed957684SJames Smart uint32_t seqlenbcnt :4; 3160ed957684SJames Smart uint32_t rsvd1 :12; 3161ed957684SJames Smart uint32_t cmdcodeoff :28; 3162ed957684SJames Smart #endif 3163ed957684SJames Smart uint32_t cmdmatch[8]; 3164ed957684SJames Smart 3165ed957684SJames Smart uint32_t rsvd[2]; 3166ed957684SJames Smart } profile5; 3167ed957684SJames Smart 3168ed957684SJames Smart } profiles; 3169ed957684SJames Smart 3170ed957684SJames Smart }; 3171ed957684SJames Smart 3172ed957684SJames Smart 3173dea3101eS 31742e0fef85SJames Smart /* Structure for MB Command CONFIG_PORT (0x88) */ 3175dea3101eS typedef struct { 3176ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3177ed957684SJames Smart uint32_t cBE : 1; 3178ed957684SJames Smart uint32_t cET : 1; 3179ed957684SJames Smart uint32_t cHpcb : 1; 3180ed957684SJames Smart uint32_t cMA : 1; 3181ed957684SJames Smart uint32_t sli_mode : 4; 3182ed957684SJames Smart uint32_t pcbLen : 24; /* bit 23:0 of memory based port 3183ed957684SJames Smart * config block */ 3184ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3185ed957684SJames Smart uint32_t pcbLen : 24; /* bit 23:0 of memory based port 3186ed957684SJames Smart * config block */ 3187ed957684SJames Smart uint32_t sli_mode : 4; 3188ed957684SJames Smart uint32_t cMA : 1; 3189ed957684SJames Smart uint32_t cHpcb : 1; 3190ed957684SJames Smart uint32_t cET : 1; 3191ed957684SJames Smart uint32_t cBE : 1; 3192ed957684SJames Smart #endif 3193ed957684SJames Smart 3194dea3101eS uint32_t pcbLow; /* bit 31:0 of memory based port config block */ 3195dea3101eS uint32_t pcbHigh; /* bit 63:32 of memory based port config block */ 319697207482SJames Smart uint32_t hbainit[5]; 319797207482SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 319897207482SJames Smart uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */ 319997207482SJames Smart uint32_t rsvd : 31; /* least significant 31 bits of word 9 */ 320097207482SJames Smart #else /* __LITTLE_ENDIAN */ 320197207482SJames Smart uint32_t rsvd : 31; /* least significant 31 bits of word 9 */ 320297207482SJames Smart uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */ 320397207482SJames Smart #endif 3204ed957684SJames Smart 3205ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3206da0436e9SJames Smart uint32_t rsvd1 : 19; /* Reserved */ 3207da0436e9SJames Smart uint32_t cdss : 1; /* Configure Data Security SLI */ 3208cb69f7deSJames Smart uint32_t casabt : 1; /* Configure async abts status notice */ 3209cb69f7deSJames Smart uint32_t rsvd2 : 2; /* Reserved */ 321081301a9bSJames Smart uint32_t cbg : 1; /* Configure BlockGuard */ 3211ed957684SJames Smart uint32_t cmv : 1; /* Configure Max VPIs */ 3212ed957684SJames Smart uint32_t ccrp : 1; /* Config Command Ring Polling */ 3213ed957684SJames Smart uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 3214ed957684SJames Smart uint32_t chbs : 1; /* Cofigure Host Backing store */ 3215ed957684SJames Smart uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 3216ed957684SJames Smart uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 3217ed957684SJames Smart uint32_t cmx : 1; /* Configure Max XRIs */ 3218ed957684SJames Smart uint32_t cmr : 1; /* Configure Max RPIs */ 3219ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3220ed957684SJames Smart uint32_t cmr : 1; /* Configure Max RPIs */ 3221ed957684SJames Smart uint32_t cmx : 1; /* Configure Max XRIs */ 3222ed957684SJames Smart uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 3223ed957684SJames Smart uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 3224ed957684SJames Smart uint32_t chbs : 1; /* Cofigure Host Backing store */ 3225ed957684SJames Smart uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 3226ed957684SJames Smart uint32_t ccrp : 1; /* Config Command Ring Polling */ 3227ed957684SJames Smart uint32_t cmv : 1; /* Configure Max VPIs */ 322881301a9bSJames Smart uint32_t cbg : 1; /* Configure BlockGuard */ 3229cb69f7deSJames Smart uint32_t rsvd2 : 2; /* Reserved */ 3230cb69f7deSJames Smart uint32_t casabt : 1; /* Configure async abts status notice */ 3231da0436e9SJames Smart uint32_t cdss : 1; /* Configure Data Security SLI */ 3232da0436e9SJames Smart uint32_t rsvd1 : 19; /* Reserved */ 3233ed957684SJames Smart #endif 3234ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3235da0436e9SJames Smart uint32_t rsvd3 : 19; /* Reserved */ 3236da0436e9SJames Smart uint32_t gdss : 1; /* Configure Data Security SLI */ 3237cb69f7deSJames Smart uint32_t gasabt : 1; /* Grant async abts status notice */ 3238cb69f7deSJames Smart uint32_t rsvd4 : 2; /* Reserved */ 323981301a9bSJames Smart uint32_t gbg : 1; /* Grant BlockGuard */ 3240ed957684SJames Smart uint32_t gmv : 1; /* Grant Max VPIs */ 3241ed957684SJames Smart uint32_t gcrp : 1; /* Grant Command Ring Polling */ 3242ed957684SJames Smart uint32_t gsah : 1; /* Grant Synchronous Abort Handling */ 3243ed957684SJames Smart uint32_t ghbs : 1; /* Grant Host Backing Store */ 3244ed957684SJames Smart uint32_t ginb : 1; /* Grant Interrupt Notification Block */ 3245ed957684SJames Smart uint32_t gerbm : 1; /* Grant ERBM Request */ 3246ed957684SJames Smart uint32_t gmx : 1; /* Grant Max XRIs */ 3247ed957684SJames Smart uint32_t gmr : 1; /* Grant Max RPIs */ 3248ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3249ed957684SJames Smart uint32_t gmr : 1; /* Grant Max RPIs */ 3250ed957684SJames Smart uint32_t gmx : 1; /* Grant Max XRIs */ 3251ed957684SJames Smart uint32_t gerbm : 1; /* Grant ERBM Request */ 3252ed957684SJames Smart uint32_t ginb : 1; /* Grant Interrupt Notification Block */ 3253ed957684SJames Smart uint32_t ghbs : 1; /* Grant Host Backing Store */ 3254ed957684SJames Smart uint32_t gsah : 1; /* Grant Synchronous Abort Handling */ 3255ed957684SJames Smart uint32_t gcrp : 1; /* Grant Command Ring Polling */ 3256ed957684SJames Smart uint32_t gmv : 1; /* Grant Max VPIs */ 325781301a9bSJames Smart uint32_t gbg : 1; /* Grant BlockGuard */ 3258cb69f7deSJames Smart uint32_t rsvd4 : 2; /* Reserved */ 3259cb69f7deSJames Smart uint32_t gasabt : 1; /* Grant async abts status notice */ 3260da0436e9SJames Smart uint32_t gdss : 1; /* Configure Data Security SLI */ 3261da0436e9SJames Smart uint32_t rsvd3 : 19; /* Reserved */ 3262ed957684SJames Smart #endif 3263ed957684SJames Smart 3264ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3265ed957684SJames Smart uint32_t max_rpi : 16; /* Max RPIs Port should configure */ 3266ed957684SJames Smart uint32_t max_xri : 16; /* Max XRIs Port should configure */ 3267ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3268ed957684SJames Smart uint32_t max_xri : 16; /* Max XRIs Port should configure */ 3269ed957684SJames Smart uint32_t max_rpi : 16; /* Max RPIs Port should configure */ 3270ed957684SJames Smart #endif 3271ed957684SJames Smart 3272ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3273ed957684SJames Smart uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */ 3274da0436e9SJames Smart uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */ 3275ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3276da0436e9SJames Smart uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */ 3277ed957684SJames Smart uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */ 3278ed957684SJames Smart #endif 3279ed957684SJames Smart 3280da0436e9SJames Smart uint32_t rsvd6; /* Reserved */ 3281ed957684SJames Smart 3282ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3283bc73905aSJames Smart uint32_t fips_rev : 3; /* FIPS Spec Revision */ 3284bc73905aSJames Smart uint32_t fips_level : 4; /* FIPS Level */ 3285bc73905aSJames Smart uint32_t sec_err : 9; /* security crypto error */ 3286ed957684SJames Smart uint32_t max_vpi : 16; /* Max number of virt N-Ports */ 3287ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3288ed957684SJames Smart uint32_t max_vpi : 16; /* Max number of virt N-Ports */ 3289bc73905aSJames Smart uint32_t sec_err : 9; /* security crypto error */ 3290bc73905aSJames Smart uint32_t fips_level : 4; /* FIPS Level */ 3291bc73905aSJames Smart uint32_t fips_rev : 3; /* FIPS Spec Revision */ 3292ed957684SJames Smart #endif 3293ed957684SJames Smart 3294dea3101eS } CONFIG_PORT_VAR; 3295dea3101eS 32969399627fSJames Smart /* Structure for MB Command CONFIG_MSI (0x30) */ 32979399627fSJames Smart struct config_msi_var { 32989399627fSJames Smart #ifdef __BIG_ENDIAN_BITFIELD 32999399627fSJames Smart uint32_t dfltMsgNum:8; /* Default message number */ 33009399627fSJames Smart uint32_t rsvd1:11; /* Reserved */ 33019399627fSJames Smart uint32_t NID:5; /* Number of secondary attention IDs */ 33029399627fSJames Smart uint32_t rsvd2:5; /* Reserved */ 33039399627fSJames Smart uint32_t dfltPresent:1; /* Default message number present */ 33049399627fSJames Smart uint32_t addFlag:1; /* Add association flag */ 33059399627fSJames Smart uint32_t reportFlag:1; /* Report association flag */ 33069399627fSJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 33079399627fSJames Smart uint32_t reportFlag:1; /* Report association flag */ 33089399627fSJames Smart uint32_t addFlag:1; /* Add association flag */ 33099399627fSJames Smart uint32_t dfltPresent:1; /* Default message number present */ 33109399627fSJames Smart uint32_t rsvd2:5; /* Reserved */ 33119399627fSJames Smart uint32_t NID:5; /* Number of secondary attention IDs */ 33129399627fSJames Smart uint32_t rsvd1:11; /* Reserved */ 33139399627fSJames Smart uint32_t dfltMsgNum:8; /* Default message number */ 33149399627fSJames Smart #endif 33159399627fSJames Smart uint32_t attentionConditions[2]; 33169399627fSJames Smart uint8_t attentionId[16]; 33179399627fSJames Smart uint8_t messageNumberByHA[64]; 33189399627fSJames Smart uint8_t messageNumberByID[16]; 33199399627fSJames Smart uint32_t autoClearHA[2]; 33209399627fSJames Smart #ifdef __BIG_ENDIAN_BITFIELD 33219399627fSJames Smart uint32_t rsvd3:16; 33229399627fSJames Smart uint32_t autoClearID:16; 33239399627fSJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 33249399627fSJames Smart uint32_t autoClearID:16; 33259399627fSJames Smart uint32_t rsvd3:16; 33269399627fSJames Smart #endif 33279399627fSJames Smart uint32_t rsvd4; 33289399627fSJames Smart }; 33299399627fSJames Smart 3330dea3101eS /* SLI-2 Port Control Block */ 3331dea3101eS 3332dea3101eS /* SLIM POINTER */ 3333dea3101eS #define SLIMOFF 0x30 /* WORD */ 3334dea3101eS 3335dea3101eS typedef struct _SLI2_RDSC { 3336dea3101eS uint32_t cmdEntries; 3337dea3101eS uint32_t cmdAddrLow; 3338dea3101eS uint32_t cmdAddrHigh; 3339dea3101eS 3340dea3101eS uint32_t rspEntries; 3341dea3101eS uint32_t rspAddrLow; 3342dea3101eS uint32_t rspAddrHigh; 3343dea3101eS } SLI2_RDSC; 3344dea3101eS 3345dea3101eS typedef struct _PCB { 3346dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3347dea3101eS uint32_t type:8; 3348497888cfSPhil Carmody #define TYPE_NATIVE_SLI2 0x01 3349dea3101eS uint32_t feature:8; 3350497888cfSPhil Carmody #define FEATURE_INITIAL_SLI2 0x01 3351dea3101eS uint32_t rsvd:12; 3352dea3101eS uint32_t maxRing:4; 3353dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3354dea3101eS uint32_t maxRing:4; 3355dea3101eS uint32_t rsvd:12; 3356dea3101eS uint32_t feature:8; 3357497888cfSPhil Carmody #define FEATURE_INITIAL_SLI2 0x01 3358dea3101eS uint32_t type:8; 3359497888cfSPhil Carmody #define TYPE_NATIVE_SLI2 0x01 3360dea3101eS #endif 3361dea3101eS 3362dea3101eS uint32_t mailBoxSize; 3363dea3101eS uint32_t mbAddrLow; 3364dea3101eS uint32_t mbAddrHigh; 3365dea3101eS 3366dea3101eS uint32_t hgpAddrLow; 3367dea3101eS uint32_t hgpAddrHigh; 3368dea3101eS 3369dea3101eS uint32_t pgpAddrLow; 3370dea3101eS uint32_t pgpAddrHigh; 33712a76a283SJames Smart SLI2_RDSC rdsc[MAX_SLI3_RINGS]; 3372dea3101eS } PCB_t; 3373dea3101eS 3374dea3101eS /* NEW_FEATURE */ 3375dea3101eS typedef struct { 3376dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3377dea3101eS uint32_t rsvd0:27; 3378dea3101eS uint32_t discardFarp:1; 3379dea3101eS uint32_t IPEnable:1; 3380dea3101eS uint32_t nodeName:1; 3381dea3101eS uint32_t portName:1; 3382dea3101eS uint32_t filterEnable:1; 3383dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3384dea3101eS uint32_t filterEnable:1; 3385dea3101eS uint32_t portName:1; 3386dea3101eS uint32_t nodeName:1; 3387dea3101eS uint32_t IPEnable:1; 3388dea3101eS uint32_t discardFarp:1; 3389dea3101eS uint32_t rsvd:27; 3390dea3101eS #endif 3391dea3101eS 3392dea3101eS uint8_t portname[8]; /* Used to be struct lpfc_name */ 3393dea3101eS uint8_t nodename[8]; 3394dea3101eS uint32_t rsvd1; 3395dea3101eS uint32_t rsvd2; 3396dea3101eS uint32_t rsvd3; 3397dea3101eS uint32_t IPAddress; 3398dea3101eS } CONFIG_FARP_VAR; 3399dea3101eS 340057127f15SJames Smart /* Structure for MB Command MBX_ASYNCEVT_ENABLE (0x33) */ 340157127f15SJames Smart 340257127f15SJames Smart typedef struct { 340357127f15SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 340457127f15SJames Smart uint32_t rsvd:30; 340557127f15SJames Smart uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/ 340657127f15SJames Smart #else /* __LITTLE_ENDIAN */ 340757127f15SJames Smart uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/ 340857127f15SJames Smart uint32_t rsvd:30; 340957127f15SJames Smart #endif 341057127f15SJames Smart } ASYNCEVT_ENABLE_VAR; 341157127f15SJames Smart 3412dea3101eS /* Union of all Mailbox Command types */ 3413dea3101eS #define MAILBOX_CMD_WSIZE 32 3414dea3101eS #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t)) 34157a470277SJames Smart /* ext_wsize times 4 bytes should not be greater than max xmit size */ 34167a470277SJames Smart #define MAILBOX_EXT_WSIZE 512 34177a470277SJames Smart #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t)) 34187a470277SJames Smart #define MAILBOX_HBA_EXT_OFFSET 0x100 34197a470277SJames Smart /* max mbox xmit size is a page size for sysfs IO operations */ 3420c0c11512SJames Smart #define MAILBOX_SYSFS_MAX 4096 3421dea3101eS 3422dea3101eS typedef union { 3423ed957684SJames Smart uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/ 3424ed957684SJames Smart * feature/max ring number 3425ed957684SJames Smart */ 3426dea3101eS LOAD_SM_VAR varLdSM; /* cmd = 1 (LOAD_SM) */ 3427dea3101eS READ_NV_VAR varRDnvp; /* cmd = 2 (READ_NVPARMS) */ 3428dea3101eS WRITE_NV_VAR varWTnvp; /* cmd = 3 (WRITE_NVPARMS) */ 3429dea3101eS BIU_DIAG_VAR varBIUdiag; /* cmd = 4 (RUN_BIU_DIAG) */ 3430dea3101eS INIT_LINK_VAR varInitLnk; /* cmd = 5 (INIT_LINK) */ 3431dea3101eS DOWN_LINK_VAR varDwnLnk; /* cmd = 6 (DOWN_LINK) */ 3432dea3101eS CONFIG_LINK varCfgLnk; /* cmd = 7 (CONFIG_LINK) */ 3433dea3101eS PART_SLIM_VAR varSlim; /* cmd = 8 (PART_SLIM) */ 3434dea3101eS CONFIG_RING_VAR varCfgRing; /* cmd = 9 (CONFIG_RING) */ 3435dea3101eS RESET_RING_VAR varRstRing; /* cmd = 10 (RESET_RING) */ 3436dea3101eS READ_CONFIG_VAR varRdConfig; /* cmd = 11 (READ_CONFIG) */ 3437dea3101eS READ_RCONF_VAR varRdRConfig; /* cmd = 12 (READ_RCONFIG) */ 3438dea3101eS READ_SPARM_VAR varRdSparm; /* cmd = 13 (READ_SPARM(64)) */ 3439dea3101eS READ_STATUS_VAR varRdStatus; /* cmd = 14 (READ_STATUS) */ 3440dea3101eS READ_RPI_VAR varRdRPI; /* cmd = 15 (READ_RPI(64)) */ 3441dea3101eS READ_XRI_VAR varRdXRI; /* cmd = 16 (READ_XRI) */ 3442dea3101eS READ_REV_VAR varRdRev; /* cmd = 17 (READ_REV) */ 3443dea3101eS READ_LNK_VAR varRdLnk; /* cmd = 18 (READ_LNK_STAT) */ 3444dea3101eS REG_LOGIN_VAR varRegLogin; /* cmd = 19 (REG_LOGIN(64)) */ 3445dea3101eS UNREG_LOGIN_VAR varUnregLogin; /* cmd = 20 (UNREG_LOGIN) */ 3446dea3101eS CLEAR_LA_VAR varClearLA; /* cmd = 22 (CLEAR_LA) */ 3447dea3101eS DUMP_VAR varDmp; /* Warm Start DUMP mbx cmd */ 3448dea3101eS UNREG_D_ID_VAR varUnregDID; /* cmd = 0x23 (UNREG_D_ID) */ 3449ed957684SJames Smart CONFIG_FARP_VAR varCfgFarp; /* cmd = 0x25 (CONFIG_FARP) 3450ed957684SJames Smart * NEW_FEATURE 3451ed957684SJames Smart */ 3452ed957684SJames Smart struct config_hbq_var varCfgHbq;/* cmd = 0x7c (CONFIG_HBQ) */ 3453d7c255b2SJames Smart struct update_cfg_var varUpdateCfg; /* cmd = 0x1B (UPDATE_CFG)*/ 3454dea3101eS CONFIG_PORT_VAR varCfgPort; /* cmd = 0x88 (CONFIG_PORT) */ 345576a95d75SJames Smart struct lpfc_mbx_read_top varReadTop; /* cmd = 0x95 (READ_TOPOLOGY) */ 345692d7f7b0SJames Smart REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */ 345792d7f7b0SJames Smart UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */ 345857127f15SJames Smart ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */ 3459c7495937SJames Smart struct READ_EVENT_LOG_VAR varRdEventLog; /* cmd = 0x38 3460c7495937SJames Smart * (READ_EVENT_LOG) 3461c7495937SJames Smart */ 34629399627fSJames Smart struct config_msi_var varCfgMSI;/* cmd = x30 (CONFIG_MSI) */ 3463dea3101eS } MAILVARIANTS; 3464dea3101eS 3465dea3101eS /* 3466dea3101eS * SLI-2 specific structures 3467dea3101eS */ 3468dea3101eS 34694cc2da1dSJames.Smart@Emulex.Com struct lpfc_hgp { 34704cc2da1dSJames.Smart@Emulex.Com __le32 cmdPutInx; 34714cc2da1dSJames.Smart@Emulex.Com __le32 rspGetInx; 34724cc2da1dSJames.Smart@Emulex.Com }; 3473dea3101eS 34744cc2da1dSJames.Smart@Emulex.Com struct lpfc_pgp { 34754cc2da1dSJames.Smart@Emulex.Com __le32 cmdGetInx; 34764cc2da1dSJames.Smart@Emulex.Com __le32 rspPutInx; 34774cc2da1dSJames.Smart@Emulex.Com }; 3478dea3101eS 3479ed957684SJames Smart struct sli2_desc { 3480dea3101eS uint32_t unused1[16]; 34812a76a283SJames Smart struct lpfc_hgp host[MAX_SLI3_RINGS]; 34822a76a283SJames Smart struct lpfc_pgp port[MAX_SLI3_RINGS]; 3483ed957684SJames Smart }; 3484ed957684SJames Smart 3485ed957684SJames Smart struct sli3_desc { 34862a76a283SJames Smart struct lpfc_hgp host[MAX_SLI3_RINGS]; 3487ed957684SJames Smart uint32_t reserved[8]; 3488ed957684SJames Smart uint32_t hbq_put[16]; 3489ed957684SJames Smart }; 3490ed957684SJames Smart 3491ed957684SJames Smart struct sli3_pgp { 34922a76a283SJames Smart struct lpfc_pgp port[MAX_SLI3_RINGS]; 3493ed957684SJames Smart uint32_t hbq_get[16]; 3494ed957684SJames Smart }; 3495dea3101eS 349634b02dcdSJames Smart union sli_var { 3497ed957684SJames Smart struct sli2_desc s2; 3498ed957684SJames Smart struct sli3_desc s3; 3499ed957684SJames Smart struct sli3_pgp s3_pgp; 350034b02dcdSJames Smart }; 3501dea3101eS 3502dea3101eS typedef struct { 3503dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3504dea3101eS uint16_t mbxStatus; 3505dea3101eS uint8_t mbxCommand; 3506dea3101eS uint8_t mbxReserved:6; 3507dea3101eS uint8_t mbxHc:1; 3508dea3101eS uint8_t mbxOwner:1; /* Low order bit first word */ 3509dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3510dea3101eS uint8_t mbxOwner:1; /* Low order bit first word */ 3511dea3101eS uint8_t mbxHc:1; 3512dea3101eS uint8_t mbxReserved:6; 3513dea3101eS uint8_t mbxCommand; 3514dea3101eS uint16_t mbxStatus; 3515dea3101eS #endif 3516dea3101eS 3517dea3101eS MAILVARIANTS un; 351834b02dcdSJames Smart union sli_var us; 3519dea3101eS } MAILBOX_t; 3520dea3101eS 3521dea3101eS /* 3522dea3101eS * Begin Structure Definitions for IOCB Commands 3523dea3101eS */ 3524dea3101eS 3525dea3101eS typedef struct { 3526dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3527dea3101eS uint8_t statAction; 3528dea3101eS uint8_t statRsn; 3529dea3101eS uint8_t statBaExp; 3530dea3101eS uint8_t statLocalError; 3531dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3532dea3101eS uint8_t statLocalError; 3533dea3101eS uint8_t statBaExp; 3534dea3101eS uint8_t statRsn; 3535dea3101eS uint8_t statAction; 3536dea3101eS #endif 3537dea3101eS /* statRsn P/F_RJT reason codes */ 3538dea3101eS #define RJT_BAD_D_ID 0x01 /* Invalid D_ID field */ 3539dea3101eS #define RJT_BAD_S_ID 0x02 /* Invalid S_ID field */ 3540dea3101eS #define RJT_UNAVAIL_TEMP 0x03 /* N_Port unavailable temp. */ 3541dea3101eS #define RJT_UNAVAIL_PERM 0x04 /* N_Port unavailable perm. */ 3542dea3101eS #define RJT_UNSUP_CLASS 0x05 /* Class not supported */ 3543dea3101eS #define RJT_DELIM_ERR 0x06 /* Delimiter usage error */ 3544dea3101eS #define RJT_UNSUP_TYPE 0x07 /* Type not supported */ 3545dea3101eS #define RJT_BAD_CONTROL 0x08 /* Invalid link conrtol */ 3546dea3101eS #define RJT_BAD_RCTL 0x09 /* R_CTL invalid */ 3547dea3101eS #define RJT_BAD_FCTL 0x0A /* F_CTL invalid */ 3548dea3101eS #define RJT_BAD_OXID 0x0B /* OX_ID invalid */ 3549dea3101eS #define RJT_BAD_RXID 0x0C /* RX_ID invalid */ 3550dea3101eS #define RJT_BAD_SEQID 0x0D /* SEQ_ID invalid */ 3551dea3101eS #define RJT_BAD_DFCTL 0x0E /* DF_CTL invalid */ 3552dea3101eS #define RJT_BAD_SEQCNT 0x0F /* SEQ_CNT invalid */ 3553dea3101eS #define RJT_BAD_PARM 0x10 /* Param. field invalid */ 3554dea3101eS #define RJT_XCHG_ERR 0x11 /* Exchange error */ 3555dea3101eS #define RJT_PROT_ERR 0x12 /* Protocol error */ 3556dea3101eS #define RJT_BAD_LENGTH 0x13 /* Invalid Length */ 3557dea3101eS #define RJT_UNEXPECTED_ACK 0x14 /* Unexpected ACK */ 3558dea3101eS #define RJT_LOGIN_REQUIRED 0x16 /* Login required */ 3559dea3101eS #define RJT_TOO_MANY_SEQ 0x17 /* Excessive sequences */ 3560dea3101eS #define RJT_XCHG_NOT_STRT 0x18 /* Exchange not started */ 3561dea3101eS #define RJT_UNSUP_SEC_HDR 0x19 /* Security hdr not supported */ 3562dea3101eS #define RJT_UNAVAIL_PATH 0x1A /* Fabric Path not available */ 3563dea3101eS #define RJT_VENDOR_UNIQUE 0xFF /* Vendor unique error */ 3564dea3101eS 3565dea3101eS #define IOERR_SUCCESS 0x00 /* statLocalError */ 3566dea3101eS #define IOERR_MISSING_CONTINUE 0x01 3567dea3101eS #define IOERR_SEQUENCE_TIMEOUT 0x02 3568dea3101eS #define IOERR_INTERNAL_ERROR 0x03 3569dea3101eS #define IOERR_INVALID_RPI 0x04 3570dea3101eS #define IOERR_NO_XRI 0x05 3571dea3101eS #define IOERR_ILLEGAL_COMMAND 0x06 3572dea3101eS #define IOERR_XCHG_DROPPED 0x07 3573dea3101eS #define IOERR_ILLEGAL_FIELD 0x08 3574dea3101eS #define IOERR_BAD_CONTINUE 0x09 3575dea3101eS #define IOERR_TOO_MANY_BUFFERS 0x0A 3576dea3101eS #define IOERR_RCV_BUFFER_WAITING 0x0B 3577dea3101eS #define IOERR_NO_CONNECTION 0x0C 3578dea3101eS #define IOERR_TX_DMA_FAILED 0x0D 3579dea3101eS #define IOERR_RX_DMA_FAILED 0x0E 3580dea3101eS #define IOERR_ILLEGAL_FRAME 0x0F 3581dea3101eS #define IOERR_EXTRA_DATA 0x10 3582dea3101eS #define IOERR_NO_RESOURCES 0x11 3583dea3101eS #define IOERR_RESERVED 0x12 3584dea3101eS #define IOERR_ILLEGAL_LENGTH 0x13 3585dea3101eS #define IOERR_UNSUPPORTED_FEATURE 0x14 3586dea3101eS #define IOERR_ABORT_IN_PROGRESS 0x15 3587dea3101eS #define IOERR_ABORT_REQUESTED 0x16 3588dea3101eS #define IOERR_RECEIVE_BUFFER_TIMEOUT 0x17 3589dea3101eS #define IOERR_LOOP_OPEN_FAILURE 0x18 3590dea3101eS #define IOERR_RING_RESET 0x19 3591dea3101eS #define IOERR_LINK_DOWN 0x1A 3592dea3101eS #define IOERR_CORRUPTED_DATA 0x1B 3593dea3101eS #define IOERR_CORRUPTED_RPI 0x1C 3594dea3101eS #define IOERR_OUT_OF_ORDER_DATA 0x1D 3595dea3101eS #define IOERR_OUT_OF_ORDER_ACK 0x1E 3596dea3101eS #define IOERR_DUP_FRAME 0x1F 3597dea3101eS #define IOERR_LINK_CONTROL_FRAME 0x20 /* ACK_N received */ 3598dea3101eS #define IOERR_BAD_HOST_ADDRESS 0x21 3599dea3101eS #define IOERR_RCV_HDRBUF_WAITING 0x22 3600dea3101eS #define IOERR_MISSING_HDR_BUFFER 0x23 3601dea3101eS #define IOERR_MSEQ_CHAIN_CORRUPTED 0x24 3602dea3101eS #define IOERR_ABORTMULT_REQUESTED 0x25 3603dea3101eS #define IOERR_BUFFER_SHORTAGE 0x28 3604dea3101eS #define IOERR_DEFAULT 0x29 3605dea3101eS #define IOERR_CNT 0x2A 3606b92938b4SJames Smart #define IOERR_SLER_FAILURE 0x46 3607b92938b4SJames Smart #define IOERR_SLER_CMD_RCV_FAILURE 0x47 3608b92938b4SJames Smart #define IOERR_SLER_REC_RJT_ERR 0x48 3609b92938b4SJames Smart #define IOERR_SLER_REC_SRR_RETRY_ERR 0x49 3610b92938b4SJames Smart #define IOERR_SLER_SRR_RJT_ERR 0x4A 3611b92938b4SJames Smart #define IOERR_SLER_RRQ_RJT_ERR 0x4C 3612b92938b4SJames Smart #define IOERR_SLER_RRQ_RETRY_ERR 0x4D 3613b92938b4SJames Smart #define IOERR_SLER_ABTS_ERR 0x4E 3614ab56dc2eSJames Smart #define IOERR_ELXSEC_KEY_UNWRAP_ERROR 0xF0 3615ab56dc2eSJames Smart #define IOERR_ELXSEC_KEY_UNWRAP_COMPARE_ERROR 0xF1 3616ab56dc2eSJames Smart #define IOERR_ELXSEC_CRYPTO_ERROR 0xF2 3617ab56dc2eSJames Smart #define IOERR_ELXSEC_CRYPTO_COMPARE_ERROR 0xF3 3618dea3101eS #define IOERR_DRVR_MASK 0x100 3619dea3101eS #define IOERR_SLI_DOWN 0x101 /* ulpStatus - Driver defined */ 3620dea3101eS #define IOERR_SLI_BRESET 0x102 3621dea3101eS #define IOERR_SLI_ABORTED 0x103 3622e3d2b802SJames Smart #define IOERR_PARAM_MASK 0x1ff 3623dea3101eS } PARM_ERR; 3624dea3101eS 3625dea3101eS typedef union { 3626dea3101eS struct { 3627dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3628dea3101eS uint8_t Rctl; /* R_CTL field */ 3629dea3101eS uint8_t Type; /* TYPE field */ 3630dea3101eS uint8_t Dfctl; /* DF_CTL field */ 3631dea3101eS uint8_t Fctl; /* Bits 0-7 of IOCB word 5 */ 3632dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3633dea3101eS uint8_t Fctl; /* Bits 0-7 of IOCB word 5 */ 3634dea3101eS uint8_t Dfctl; /* DF_CTL field */ 3635dea3101eS uint8_t Type; /* TYPE field */ 3636dea3101eS uint8_t Rctl; /* R_CTL field */ 3637dea3101eS #endif 3638dea3101eS 3639dea3101eS #define BC 0x02 /* Broadcast Received - Fctl */ 3640dea3101eS #define SI 0x04 /* Sequence Initiative */ 3641dea3101eS #define LA 0x08 /* Ignore Link Attention state */ 3642dea3101eS #define LS 0x80 /* Last Sequence */ 3643dea3101eS } hcsw; 3644dea3101eS uint32_t reserved; 3645dea3101eS } WORD5; 3646dea3101eS 3647dea3101eS /* IOCB Command template for a generic response */ 3648dea3101eS typedef struct { 3649dea3101eS uint32_t reserved[4]; 3650dea3101eS PARM_ERR perr; 3651dea3101eS } GENERIC_RSP; 3652dea3101eS 3653dea3101eS /* IOCB Command template for XMIT / XMIT_BCAST / RCV_SEQUENCE / XMIT_ELS */ 3654dea3101eS typedef struct { 3655dea3101eS struct ulp_bde xrsqbde[2]; 3656dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */ 3657dea3101eS WORD5 w5; /* Header control/status word */ 3658dea3101eS } XR_SEQ_FIELDS; 3659dea3101eS 3660dea3101eS /* IOCB Command template for ELS_REQUEST */ 3661dea3101eS typedef struct { 3662dea3101eS struct ulp_bde elsReq; 3663dea3101eS struct ulp_bde elsRsp; 3664dea3101eS 3665dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3666dea3101eS uint32_t word4Rsvd:7; 3667dea3101eS uint32_t fl:1; 3668dea3101eS uint32_t myID:24; 3669dea3101eS uint32_t word5Rsvd:8; 3670dea3101eS uint32_t remoteID:24; 3671dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3672dea3101eS uint32_t myID:24; 3673dea3101eS uint32_t fl:1; 3674dea3101eS uint32_t word4Rsvd:7; 3675dea3101eS uint32_t remoteID:24; 3676dea3101eS uint32_t word5Rsvd:8; 3677dea3101eS #endif 3678dea3101eS } ELS_REQUEST; 3679dea3101eS 3680dea3101eS /* IOCB Command template for RCV_ELS_REQ */ 3681dea3101eS typedef struct { 3682dea3101eS struct ulp_bde elsReq[2]; 3683dea3101eS uint32_t parmRo; 3684dea3101eS 3685dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3686dea3101eS uint32_t word5Rsvd:8; 3687dea3101eS uint32_t remoteID:24; 3688dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3689dea3101eS uint32_t remoteID:24; 3690dea3101eS uint32_t word5Rsvd:8; 3691dea3101eS #endif 3692dea3101eS } RCV_ELS_REQ; 3693dea3101eS 3694dea3101eS /* IOCB Command template for ABORT / CLOSE_XRI */ 3695dea3101eS typedef struct { 3696dea3101eS uint32_t rsvd[3]; 3697dea3101eS uint32_t abortType; 3698dea3101eS #define ABORT_TYPE_ABTX 0x00000000 3699dea3101eS #define ABORT_TYPE_ABTS 0x00000001 3700dea3101eS uint32_t parm; 3701dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3702dea3101eS uint16_t abortContextTag; /* ulpContext from command to abort/close */ 3703dea3101eS uint16_t abortIoTag; /* ulpIoTag from command to abort/close */ 3704dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3705dea3101eS uint16_t abortIoTag; /* ulpIoTag from command to abort/close */ 3706dea3101eS uint16_t abortContextTag; /* ulpContext from command to abort/close */ 3707dea3101eS #endif 3708dea3101eS } AC_XRI; 3709dea3101eS 3710dea3101eS /* IOCB Command template for ABORT_MXRI64 */ 3711dea3101eS typedef struct { 3712dea3101eS uint32_t rsvd[3]; 3713dea3101eS uint32_t abortType; 3714dea3101eS uint32_t parm; 3715dea3101eS uint32_t iotag32; 3716dea3101eS } A_MXRI64; 3717dea3101eS 3718dea3101eS /* IOCB Command template for GET_RPI */ 3719dea3101eS typedef struct { 3720dea3101eS uint32_t rsvd[4]; 3721dea3101eS uint32_t parmRo; 3722dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3723dea3101eS uint32_t word5Rsvd:8; 3724dea3101eS uint32_t remoteID:24; 3725dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3726dea3101eS uint32_t remoteID:24; 3727dea3101eS uint32_t word5Rsvd:8; 3728dea3101eS #endif 3729dea3101eS } GET_RPI; 3730dea3101eS 3731dea3101eS /* IOCB Command template for all FCP Initiator commands */ 3732dea3101eS typedef struct { 3733dea3101eS struct ulp_bde fcpi_cmnd; /* FCP_CMND payload descriptor */ 3734dea3101eS struct ulp_bde fcpi_rsp; /* Rcv buffer */ 3735dea3101eS uint32_t fcpi_parm; 3736dea3101eS uint32_t fcpi_XRdy; /* transfer ready for IWRITE */ 3737dea3101eS } FCPI_FIELDS; 3738dea3101eS 3739dea3101eS /* IOCB Command template for all FCP Target commands */ 3740dea3101eS typedef struct { 3741dea3101eS struct ulp_bde fcpt_Buffer[2]; /* FCP_CMND payload descriptor */ 3742dea3101eS uint32_t fcpt_Offset; 3743dea3101eS uint32_t fcpt_Length; /* transfer ready for IWRITE */ 3744dea3101eS } FCPT_FIELDS; 3745dea3101eS 3746dea3101eS /* SLI-2 IOCB structure definitions */ 3747dea3101eS 3748dea3101eS /* IOCB Command template for 64 bit XMIT / XMIT_BCAST / XMIT_ELS */ 3749dea3101eS typedef struct { 3750dea3101eS ULP_BDL bdl; 3751dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */ 3752dea3101eS WORD5 w5; /* Header control/status word */ 3753dea3101eS } XMT_SEQ_FIELDS64; 3754dea3101eS 3755939723a4SJames Smart /* This word is remote ports D_ID for XMIT_ELS_RSP64 */ 3756939723a4SJames Smart #define xmit_els_remoteID xrsqRo 3757939723a4SJames Smart 3758dea3101eS /* IOCB Command template for 64 bit RCV_SEQUENCE64 */ 3759dea3101eS typedef struct { 3760dea3101eS struct ulp_bde64 rcvBde; 3761dea3101eS uint32_t rsvd1; 3762dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */ 3763dea3101eS WORD5 w5; /* Header control/status word */ 3764dea3101eS } RCV_SEQ_FIELDS64; 3765dea3101eS 3766dea3101eS /* IOCB Command template for ELS_REQUEST64 */ 3767dea3101eS typedef struct { 3768dea3101eS ULP_BDL bdl; 3769dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3770dea3101eS uint32_t word4Rsvd:7; 3771dea3101eS uint32_t fl:1; 3772dea3101eS uint32_t myID:24; 3773dea3101eS uint32_t word5Rsvd:8; 3774dea3101eS uint32_t remoteID:24; 3775dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3776dea3101eS uint32_t myID:24; 3777dea3101eS uint32_t fl:1; 3778dea3101eS uint32_t word4Rsvd:7; 3779dea3101eS uint32_t remoteID:24; 3780dea3101eS uint32_t word5Rsvd:8; 3781dea3101eS #endif 3782dea3101eS } ELS_REQUEST64; 3783dea3101eS 3784dea3101eS /* IOCB Command template for GEN_REQUEST64 */ 3785dea3101eS typedef struct { 3786dea3101eS ULP_BDL bdl; 3787dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */ 3788dea3101eS WORD5 w5; /* Header control/status word */ 3789dea3101eS } GEN_REQUEST64; 3790dea3101eS 3791dea3101eS /* IOCB Command template for RCV_ELS_REQ64 */ 3792dea3101eS typedef struct { 3793dea3101eS struct ulp_bde64 elsReq; 3794dea3101eS uint32_t rcvd1; 3795dea3101eS uint32_t parmRo; 3796dea3101eS 3797dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3798dea3101eS uint32_t word5Rsvd:8; 3799dea3101eS uint32_t remoteID:24; 3800dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3801dea3101eS uint32_t remoteID:24; 3802dea3101eS uint32_t word5Rsvd:8; 3803dea3101eS #endif 3804dea3101eS } RCV_ELS_REQ64; 3805dea3101eS 38069c2face6SJames Smart /* IOCB Command template for RCV_SEQ64 */ 38079c2face6SJames Smart struct rcv_seq64 { 38089c2face6SJames Smart struct ulp_bde64 elsReq; 38099c2face6SJames Smart uint32_t hbq_1; 38109c2face6SJames Smart uint32_t parmRo; 38119c2face6SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 38129c2face6SJames Smart uint32_t rctl:8; 38139c2face6SJames Smart uint32_t type:8; 38149c2face6SJames Smart uint32_t dfctl:8; 38159c2face6SJames Smart uint32_t ls:1; 38169c2face6SJames Smart uint32_t fs:1; 38179c2face6SJames Smart uint32_t rsvd2:3; 38189c2face6SJames Smart uint32_t si:1; 38199c2face6SJames Smart uint32_t bc:1; 38209c2face6SJames Smart uint32_t rsvd3:1; 38219c2face6SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 38229c2face6SJames Smart uint32_t rsvd3:1; 38239c2face6SJames Smart uint32_t bc:1; 38249c2face6SJames Smart uint32_t si:1; 38259c2face6SJames Smart uint32_t rsvd2:3; 38269c2face6SJames Smart uint32_t fs:1; 38279c2face6SJames Smart uint32_t ls:1; 38289c2face6SJames Smart uint32_t dfctl:8; 38299c2face6SJames Smart uint32_t type:8; 38309c2face6SJames Smart uint32_t rctl:8; 38319c2face6SJames Smart #endif 38329c2face6SJames Smart }; 38339c2face6SJames Smart 3834dea3101eS /* IOCB Command template for all 64 bit FCP Initiator commands */ 3835dea3101eS typedef struct { 3836dea3101eS ULP_BDL bdl; 3837dea3101eS uint32_t fcpi_parm; 3838dea3101eS uint32_t fcpi_XRdy; /* transfer ready for IWRITE */ 3839dea3101eS } FCPI_FIELDS64; 3840dea3101eS 3841dea3101eS /* IOCB Command template for all 64 bit FCP Target commands */ 3842dea3101eS typedef struct { 3843dea3101eS ULP_BDL bdl; 3844dea3101eS uint32_t fcpt_Offset; 3845dea3101eS uint32_t fcpt_Length; /* transfer ready for IWRITE */ 3846dea3101eS } FCPT_FIELDS64; 3847dea3101eS 384857127f15SJames Smart /* IOCB Command template for Async Status iocb commands */ 384957127f15SJames Smart typedef struct { 385057127f15SJames Smart uint32_t rsvd[4]; 385157127f15SJames Smart uint32_t param; 385257127f15SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 385357127f15SJames Smart uint16_t evt_code; /* High order bits word 5 */ 385457127f15SJames Smart uint16_t sub_ctxt_tag; /* Low order bits word 5 */ 385557127f15SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 385657127f15SJames Smart uint16_t sub_ctxt_tag; /* High order bits word 5 */ 385757127f15SJames Smart uint16_t evt_code; /* Low order bits word 5 */ 385857127f15SJames Smart #endif 385957127f15SJames Smart } ASYNCSTAT_FIELDS; 386057127f15SJames Smart #define ASYNC_TEMP_WARN 0x100 386157127f15SJames Smart #define ASYNC_TEMP_SAFE 0x101 3862cb69f7deSJames Smart #define ASYNC_STATUS_CN 0x102 386357127f15SJames Smart 3864ed957684SJames Smart /* IOCB Command template for CMD_IOCB_RCV_ELS64_CX (0xB7) 3865ed957684SJames Smart or CMD_IOCB_RCV_SEQ64_CX (0xB5) */ 3866ed957684SJames Smart 3867ed957684SJames Smart struct rcv_sli3 { 3868ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 38697851fe2cSJames Smart uint16_t ox_id; 38707851fe2cSJames Smart uint16_t seq_cnt; 38717851fe2cSJames Smart 3872ed957684SJames Smart uint16_t vpi; 3873ed957684SJames Smart uint16_t word9Rsvd; 3874ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 38757851fe2cSJames Smart uint16_t seq_cnt; 38767851fe2cSJames Smart uint16_t ox_id; 38777851fe2cSJames Smart 3878ed957684SJames Smart uint16_t word9Rsvd; 3879ed957684SJames Smart uint16_t vpi; 3880ed957684SJames Smart #endif 3881ed957684SJames Smart uint32_t word10Rsvd; 3882ed957684SJames Smart uint32_t acc_len; /* accumulated length */ 3883ed957684SJames Smart struct ulp_bde64 bde2; 3884ed957684SJames Smart }; 3885ed957684SJames Smart 388676bb24efSJames Smart /* Structure used for a single HBQ entry */ 388776bb24efSJames Smart struct lpfc_hbq_entry { 388876bb24efSJames Smart struct ulp_bde64 bde; 388976bb24efSJames Smart uint32_t buffer_tag; 389076bb24efSJames Smart }; 389192d7f7b0SJames Smart 389276bb24efSJames Smart /* IOCB Command template for QUE_XRI64_CX (0xB3) command */ 389376bb24efSJames Smart typedef struct { 389476bb24efSJames Smart struct lpfc_hbq_entry buff; 389576bb24efSJames Smart uint32_t rsvd; 389676bb24efSJames Smart uint32_t rsvd1; 389776bb24efSJames Smart } QUE_XRI64_CX_FIELDS; 389876bb24efSJames Smart 389976bb24efSJames Smart struct que_xri64cx_ext_fields { 390076bb24efSJames Smart uint32_t iotag64_low; 390176bb24efSJames Smart uint32_t iotag64_high; 390276bb24efSJames Smart uint32_t ebde_count; 390376bb24efSJames Smart uint32_t rsvd; 390476bb24efSJames Smart struct lpfc_hbq_entry buff[5]; 390576bb24efSJames Smart }; 390692d7f7b0SJames Smart 390781301a9bSJames Smart struct sli3_bg_fields { 390881301a9bSJames Smart uint32_t filler[6]; /* word 8-13 in IOCB */ 390981301a9bSJames Smart uint32_t bghm; /* word 14 - BlockGuard High Water Mark */ 391081301a9bSJames Smart /* Bitfields for bgstat (BlockGuard Status - word 15 of IOCB) */ 391181301a9bSJames Smart #define BGS_BIDIR_BG_PROF_MASK 0xff000000 391281301a9bSJames Smart #define BGS_BIDIR_BG_PROF_SHIFT 24 391381301a9bSJames Smart #define BGS_BIDIR_ERR_COND_FLAGS_MASK 0x003f0000 391481301a9bSJames Smart #define BGS_BIDIR_ERR_COND_SHIFT 16 391581301a9bSJames Smart #define BGS_BG_PROFILE_MASK 0x0000ff00 391681301a9bSJames Smart #define BGS_BG_PROFILE_SHIFT 8 391781301a9bSJames Smart #define BGS_INVALID_PROF_MASK 0x00000020 391881301a9bSJames Smart #define BGS_INVALID_PROF_SHIFT 5 391981301a9bSJames Smart #define BGS_UNINIT_DIF_BLOCK_MASK 0x00000010 392081301a9bSJames Smart #define BGS_UNINIT_DIF_BLOCK_SHIFT 4 392181301a9bSJames Smart #define BGS_HI_WATER_MARK_PRESENT_MASK 0x00000008 392281301a9bSJames Smart #define BGS_HI_WATER_MARK_PRESENT_SHIFT 3 392381301a9bSJames Smart #define BGS_REFTAG_ERR_MASK 0x00000004 392481301a9bSJames Smart #define BGS_REFTAG_ERR_SHIFT 2 392581301a9bSJames Smart #define BGS_APPTAG_ERR_MASK 0x00000002 392681301a9bSJames Smart #define BGS_APPTAG_ERR_SHIFT 1 392781301a9bSJames Smart #define BGS_GUARD_ERR_MASK 0x00000001 392881301a9bSJames Smart #define BGS_GUARD_ERR_SHIFT 0 392981301a9bSJames Smart uint32_t bgstat; /* word 15 - BlockGuard Status */ 393081301a9bSJames Smart }; 393181301a9bSJames Smart 393281301a9bSJames Smart static inline uint32_t 393381301a9bSJames Smart lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat) 393481301a9bSJames Smart { 3935bc73905aSJames Smart return (bgstat & BGS_BIDIR_BG_PROF_MASK) >> 393681301a9bSJames Smart BGS_BIDIR_BG_PROF_SHIFT; 393781301a9bSJames Smart } 393881301a9bSJames Smart 393981301a9bSJames Smart static inline uint32_t 394081301a9bSJames Smart lpfc_bgs_get_bidir_err_cond(uint32_t bgstat) 394181301a9bSJames Smart { 3942bc73905aSJames Smart return (bgstat & BGS_BIDIR_ERR_COND_FLAGS_MASK) >> 394381301a9bSJames Smart BGS_BIDIR_ERR_COND_SHIFT; 394481301a9bSJames Smart } 394581301a9bSJames Smart 394681301a9bSJames Smart static inline uint32_t 394781301a9bSJames Smart lpfc_bgs_get_bg_prof(uint32_t bgstat) 394881301a9bSJames Smart { 3949bc73905aSJames Smart return (bgstat & BGS_BG_PROFILE_MASK) >> 395081301a9bSJames Smart BGS_BG_PROFILE_SHIFT; 395181301a9bSJames Smart } 395281301a9bSJames Smart 395381301a9bSJames Smart static inline uint32_t 395481301a9bSJames Smart lpfc_bgs_get_invalid_prof(uint32_t bgstat) 395581301a9bSJames Smart { 3956bc73905aSJames Smart return (bgstat & BGS_INVALID_PROF_MASK) >> 395781301a9bSJames Smart BGS_INVALID_PROF_SHIFT; 395881301a9bSJames Smart } 395981301a9bSJames Smart 396081301a9bSJames Smart static inline uint32_t 396181301a9bSJames Smart lpfc_bgs_get_uninit_dif_block(uint32_t bgstat) 396281301a9bSJames Smart { 3963bc73905aSJames Smart return (bgstat & BGS_UNINIT_DIF_BLOCK_MASK) >> 396481301a9bSJames Smart BGS_UNINIT_DIF_BLOCK_SHIFT; 396581301a9bSJames Smart } 396681301a9bSJames Smart 396781301a9bSJames Smart static inline uint32_t 396881301a9bSJames Smart lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat) 396981301a9bSJames Smart { 3970bc73905aSJames Smart return (bgstat & BGS_HI_WATER_MARK_PRESENT_MASK) >> 397181301a9bSJames Smart BGS_HI_WATER_MARK_PRESENT_SHIFT; 397281301a9bSJames Smart } 397381301a9bSJames Smart 397481301a9bSJames Smart static inline uint32_t 397581301a9bSJames Smart lpfc_bgs_get_reftag_err(uint32_t bgstat) 397681301a9bSJames Smart { 3977bc73905aSJames Smart return (bgstat & BGS_REFTAG_ERR_MASK) >> 397881301a9bSJames Smart BGS_REFTAG_ERR_SHIFT; 397981301a9bSJames Smart } 398081301a9bSJames Smart 398181301a9bSJames Smart static inline uint32_t 398281301a9bSJames Smart lpfc_bgs_get_apptag_err(uint32_t bgstat) 398381301a9bSJames Smart { 3984bc73905aSJames Smart return (bgstat & BGS_APPTAG_ERR_MASK) >> 398581301a9bSJames Smart BGS_APPTAG_ERR_SHIFT; 398681301a9bSJames Smart } 398781301a9bSJames Smart 398881301a9bSJames Smart static inline uint32_t 398981301a9bSJames Smart lpfc_bgs_get_guard_err(uint32_t bgstat) 399081301a9bSJames Smart { 3991bc73905aSJames Smart return (bgstat & BGS_GUARD_ERR_MASK) >> 399281301a9bSJames Smart BGS_GUARD_ERR_SHIFT; 399381301a9bSJames Smart } 399481301a9bSJames Smart 399534b02dcdSJames Smart #define LPFC_EXT_DATA_BDE_COUNT 3 399634b02dcdSJames Smart struct fcp_irw_ext { 399734b02dcdSJames Smart uint32_t io_tag64_low; 399834b02dcdSJames Smart uint32_t io_tag64_high; 399934b02dcdSJames Smart #ifdef __BIG_ENDIAN_BITFIELD 400034b02dcdSJames Smart uint8_t reserved1; 400134b02dcdSJames Smart uint8_t reserved2; 400234b02dcdSJames Smart uint8_t reserved3; 400334b02dcdSJames Smart uint8_t ebde_count; 400434b02dcdSJames Smart #else /* __LITTLE_ENDIAN */ 400534b02dcdSJames Smart uint8_t ebde_count; 400634b02dcdSJames Smart uint8_t reserved3; 400734b02dcdSJames Smart uint8_t reserved2; 400834b02dcdSJames Smart uint8_t reserved1; 400934b02dcdSJames Smart #endif 401034b02dcdSJames Smart uint32_t reserved4; 401134b02dcdSJames Smart struct ulp_bde64 rbde; /* response bde */ 401234b02dcdSJames Smart struct ulp_bde64 dbde[LPFC_EXT_DATA_BDE_COUNT]; /* data BDE or BPL */ 401334b02dcdSJames Smart uint8_t icd[32]; /* immediate command data (32 bytes) */ 401434b02dcdSJames Smart }; 401534b02dcdSJames Smart 4016dea3101eS typedef struct _IOCB { /* IOCB structure */ 4017dea3101eS union { 4018dea3101eS GENERIC_RSP grsp; /* Generic response */ 4019dea3101eS XR_SEQ_FIELDS xrseq; /* XMIT / BCAST / RCV_SEQUENCE cmd */ 4020dea3101eS struct ulp_bde cont[3]; /* up to 3 continuation bdes */ 4021dea3101eS RCV_ELS_REQ rcvels; /* RCV_ELS_REQ template */ 4022dea3101eS AC_XRI acxri; /* ABORT / CLOSE_XRI template */ 4023dea3101eS A_MXRI64 amxri; /* abort multiple xri command overlay */ 4024dea3101eS GET_RPI getrpi; /* GET_RPI template */ 4025dea3101eS FCPI_FIELDS fcpi; /* FCP Initiator template */ 4026dea3101eS FCPT_FIELDS fcpt; /* FCP target template */ 4027dea3101eS 4028dea3101eS /* SLI-2 structures */ 4029dea3101eS 4030dea3101eS struct ulp_bde64 cont64[2]; /* up to 2 64 bit continuation 4031ed957684SJames Smart * bde_64s */ 4032dea3101eS ELS_REQUEST64 elsreq64; /* ELS_REQUEST template */ 4033dea3101eS GEN_REQUEST64 genreq64; /* GEN_REQUEST template */ 4034dea3101eS RCV_ELS_REQ64 rcvels64; /* RCV_ELS_REQ template */ 4035dea3101eS XMT_SEQ_FIELDS64 xseq64; /* XMIT / BCAST cmd */ 4036dea3101eS FCPI_FIELDS64 fcpi64; /* FCP 64 bit Initiator template */ 4037dea3101eS FCPT_FIELDS64 fcpt64; /* FCP 64 bit target template */ 403857127f15SJames Smart ASYNCSTAT_FIELDS asyncstat; /* async_status iocb */ 403976bb24efSJames Smart QUE_XRI64_CX_FIELDS quexri64cx; /* que_xri64_cx fields */ 40409c2face6SJames Smart struct rcv_seq64 rcvseq64; /* RCV_SEQ64 and RCV_CONT64 */ 4041546fc854SJames Smart struct sli4_bls_rsp bls_rsp; /* UNSOL ABTS BLS_RSP params */ 4042dea3101eS uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */ 4043dea3101eS } un; 4044dea3101eS union { 4045dea3101eS struct { 4046dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 4047dea3101eS uint16_t ulpContext; /* High order bits word 6 */ 4048dea3101eS uint16_t ulpIoTag; /* Low order bits word 6 */ 4049dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 4050dea3101eS uint16_t ulpIoTag; /* Low order bits word 6 */ 4051dea3101eS uint16_t ulpContext; /* High order bits word 6 */ 4052dea3101eS #endif 4053dea3101eS } t1; 4054dea3101eS struct { 4055dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 4056dea3101eS uint16_t ulpContext; /* High order bits word 6 */ 4057dea3101eS uint16_t ulpIoTag1:2; /* Low order bits word 6 */ 4058dea3101eS uint16_t ulpIoTag0:14; /* Low order bits word 6 */ 4059dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 4060dea3101eS uint16_t ulpIoTag0:14; /* Low order bits word 6 */ 4061dea3101eS uint16_t ulpIoTag1:2; /* Low order bits word 6 */ 4062dea3101eS uint16_t ulpContext; /* High order bits word 6 */ 4063dea3101eS #endif 4064dea3101eS } t2; 4065dea3101eS } un1; 4066dea3101eS #define ulpContext un1.t1.ulpContext 4067dea3101eS #define ulpIoTag un1.t1.ulpIoTag 4068dea3101eS #define ulpIoTag0 un1.t2.ulpIoTag0 4069dea3101eS 4070dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 4071dea3101eS uint32_t ulpTimeout:8; 4072dea3101eS uint32_t ulpXS:1; 4073dea3101eS uint32_t ulpFCP2Rcvy:1; 4074dea3101eS uint32_t ulpPU:2; 4075dea3101eS uint32_t ulpIr:1; 4076dea3101eS uint32_t ulpClass:3; 4077dea3101eS uint32_t ulpCommand:8; 4078dea3101eS uint32_t ulpStatus:4; 4079dea3101eS uint32_t ulpBdeCount:2; 4080dea3101eS uint32_t ulpLe:1; 4081dea3101eS uint32_t ulpOwner:1; /* Low order bit word 7 */ 4082dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 4083dea3101eS uint32_t ulpOwner:1; /* Low order bit word 7 */ 4084dea3101eS uint32_t ulpLe:1; 4085dea3101eS uint32_t ulpBdeCount:2; 4086dea3101eS uint32_t ulpStatus:4; 4087dea3101eS uint32_t ulpCommand:8; 4088dea3101eS uint32_t ulpClass:3; 4089dea3101eS uint32_t ulpIr:1; 4090dea3101eS uint32_t ulpPU:2; 4091dea3101eS uint32_t ulpFCP2Rcvy:1; 4092dea3101eS uint32_t ulpXS:1; 4093dea3101eS uint32_t ulpTimeout:8; 4094dea3101eS #endif 409592d7f7b0SJames Smart 4096ed957684SJames Smart union { 4097ed957684SJames Smart struct rcv_sli3 rcvsli3; /* words 8 - 15 */ 409876bb24efSJames Smart 409976bb24efSJames Smart /* words 8-31 used for que_xri_cx iocb */ 410076bb24efSJames Smart struct que_xri64cx_ext_fields que_xri64cx_ext_words; 410134b02dcdSJames Smart struct fcp_irw_ext fcp_ext; 4102ed957684SJames Smart uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */ 410381301a9bSJames Smart 410481301a9bSJames Smart /* words 8-15 for BlockGuard */ 410581301a9bSJames Smart struct sli3_bg_fields sli3_bg; 4106ed957684SJames Smart } unsli3; 4107dea3101eS 4108ed957684SJames Smart #define ulpCt_h ulpXS 4109ed957684SJames Smart #define ulpCt_l ulpFCP2Rcvy 4110ed957684SJames Smart 4111ed957684SJames Smart #define IOCB_FCP 1 /* IOCB is used for FCP ELS cmds-ulpRsvByte */ 4112ed957684SJames Smart #define IOCB_IP 2 /* IOCB is used for IP ELS cmds */ 4113dea3101eS #define PARM_UNUSED 0 /* PU field (Word 4) not used */ 4114dea3101eS #define PARM_REL_OFF 1 /* PU field (Word 4) = R. O. */ 4115dea3101eS #define PARM_READ_CHECK 2 /* PU field (Word 4) = Data Transfer Length */ 411692d7f7b0SJames Smart #define PARM_NPIV_DID 3 4117dea3101eS #define CLASS1 0 /* Class 1 */ 4118dea3101eS #define CLASS2 1 /* Class 2 */ 4119dea3101eS #define CLASS3 2 /* Class 3 */ 4120dea3101eS #define CLASS_FCP_INTERMIX 7 /* FCP Data->Cls 1, all else->Cls 2 */ 4121dea3101eS 4122dea3101eS #define IOSTAT_SUCCESS 0x0 /* ulpStatus - HBA defined */ 4123dea3101eS #define IOSTAT_FCP_RSP_ERROR 0x1 4124dea3101eS #define IOSTAT_REMOTE_STOP 0x2 4125dea3101eS #define IOSTAT_LOCAL_REJECT 0x3 4126dea3101eS #define IOSTAT_NPORT_RJT 0x4 4127dea3101eS #define IOSTAT_FABRIC_RJT 0x5 4128dea3101eS #define IOSTAT_NPORT_BSY 0x6 4129dea3101eS #define IOSTAT_FABRIC_BSY 0x7 4130dea3101eS #define IOSTAT_INTERMED_RSP 0x8 4131dea3101eS #define IOSTAT_LS_RJT 0x9 4132dea3101eS #define IOSTAT_BA_RJT 0xA 4133dea3101eS #define IOSTAT_RSVD1 0xB 4134dea3101eS #define IOSTAT_RSVD2 0xC 4135dea3101eS #define IOSTAT_RSVD3 0xD 4136dea3101eS #define IOSTAT_RSVD4 0xE 413792d7f7b0SJames Smart #define IOSTAT_NEED_BUFFER 0xF 4138dea3101eS #define IOSTAT_DRIVER_REJECT 0x10 /* ulpStatus - Driver defined */ 4139dea3101eS #define IOSTAT_DEFAULT 0xF /* Same as rsvd5 for now */ 4140dea3101eS #define IOSTAT_CNT 0x11 4141dea3101eS 4142dea3101eS } IOCB_t; 4143dea3101eS 4144dea3101eS 4145dea3101eS #define SLI1_SLIM_SIZE (4 * 1024) 4146dea3101eS 4147dea3101eS /* Up to 498 IOCBs will fit into 16k 4148dea3101eS * 256 (MAILBOX_t) + 140 (PCB_t) + ( 32 (IOCB_t) * 498 ) = < 16384 4149dea3101eS */ 4150ed957684SJames Smart #define SLI2_SLIM_SIZE (64 * 1024) 4151dea3101eS 4152dea3101eS /* Maximum IOCBs that will fit in SLI2 slim */ 4153dea3101eS #define MAX_SLI2_IOCB 498 4154ed957684SJames Smart #define MAX_SLIM_IOCB_SIZE (SLI2_SLIM_SIZE - \ 41557a470277SJames Smart (sizeof(MAILBOX_t) + sizeof(PCB_t) + \ 41567a470277SJames Smart sizeof(uint32_t) * MAILBOX_EXT_WSIZE)) 4157ed957684SJames Smart 4158ed957684SJames Smart /* HBQ entries are 4 words each = 4k */ 4159ed957684SJames Smart #define LPFC_TOTAL_HBQ_SIZE (sizeof(struct lpfc_hbq_entry) * \ 4160ed957684SJames Smart lpfc_sli_hbq_count()) 4161dea3101eS 4162dea3101eS struct lpfc_sli2_slim { 4163dea3101eS MAILBOX_t mbx; 41647a470277SJames Smart uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE]; 4165dea3101eS PCB_t pcb; 4166ed957684SJames Smart IOCB_t IOCBs[MAX_SLIM_IOCB_SIZE]; 4167dea3101eS }; 4168dea3101eS 41692e0fef85SJames Smart /* 41702e0fef85SJames Smart * This function checks PCI device to allow special handling for LC HBAs. 41712e0fef85SJames Smart * 41722e0fef85SJames Smart * Parameters: 41732e0fef85SJames Smart * device : struct pci_dev 's device field 41742e0fef85SJames Smart * 41752e0fef85SJames Smart * return 1 => TRUE 41762e0fef85SJames Smart * 0 => FALSE 41772e0fef85SJames Smart */ 4178dea3101eS static inline int 4179dea3101eS lpfc_is_LC_HBA(unsigned short device) 4180dea3101eS { 4181dea3101eS if ((device == PCI_DEVICE_ID_TFLY) || 4182dea3101eS (device == PCI_DEVICE_ID_PFLY) || 4183dea3101eS (device == PCI_DEVICE_ID_LP101) || 4184dea3101eS (device == PCI_DEVICE_ID_BMID) || 4185dea3101eS (device == PCI_DEVICE_ID_BSMB) || 4186dea3101eS (device == PCI_DEVICE_ID_ZMID) || 4187dea3101eS (device == PCI_DEVICE_ID_ZSMB) || 418809372820SJames Smart (device == PCI_DEVICE_ID_SAT_MID) || 418909372820SJames Smart (device == PCI_DEVICE_ID_SAT_SMB) || 4190dea3101eS (device == PCI_DEVICE_ID_RFLY)) 4191dea3101eS return 1; 4192dea3101eS else 4193dea3101eS return 0; 4194dea3101eS } 4195858c9f6cSJames Smart 4196858c9f6cSJames Smart /* 4197858c9f6cSJames Smart * Determine if an IOCB failed because of a link event or firmware reset. 4198858c9f6cSJames Smart */ 4199858c9f6cSJames Smart 4200858c9f6cSJames Smart static inline int 4201858c9f6cSJames Smart lpfc_error_lost_link(IOCB_t *iocbp) 4202858c9f6cSJames Smart { 4203858c9f6cSJames Smart return (iocbp->ulpStatus == IOSTAT_LOCAL_REJECT && 4204858c9f6cSJames Smart (iocbp->un.ulpWord[4] == IOERR_SLI_ABORTED || 4205858c9f6cSJames Smart iocbp->un.ulpWord[4] == IOERR_LINK_DOWN || 4206858c9f6cSJames Smart iocbp->un.ulpWord[4] == IOERR_SLI_DOWN)); 4207858c9f6cSJames Smart } 420884774a4dSJames Smart 420984774a4dSJames Smart #define MENLO_TRANSPORT_TYPE 0xfe 421084774a4dSJames Smart #define MENLO_CONTEXT 0 421184774a4dSJames Smart #define MENLO_PU 3 421284774a4dSJames Smart #define MENLO_TIMEOUT 30 421384774a4dSJames Smart #define SETVAR_MLOMNT 0x103107 421484774a4dSJames Smart #define SETVAR_MLORST 0x103007 4215da0436e9SJames Smart 4216da0436e9SJames Smart #define BPL_ALIGN_SZ 8 /* 8 byte alignment for bpl and mbufs */ 4217