1dea3101eS /*******************************************************************
2dea3101eS * This file is part of the Emulex Linux Device Driver for *
3c44ce173SJames.Smart@Emulex.Com * Fibre Channel Host Bus Adapters. *
422871fe3SJustin Tee * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term *
54ae2ebdeSJames Smart * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
650611577SJames Smart * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7c44ce173SJames.Smart@Emulex.Com * EMULEX and SLI are trademarks of Emulex. *
8d080abe0SJames Smart * www.broadcom.com *
9dea3101eS * *
10dea3101eS * This program is free software; you can redistribute it and/or *
11c44ce173SJames.Smart@Emulex.Com * modify it under the terms of version 2 of the GNU General *
12c44ce173SJames.Smart@Emulex.Com * Public License as published by the Free Software Foundation. *
13c44ce173SJames.Smart@Emulex.Com * This program is distributed in the hope that it will be useful. *
14c44ce173SJames.Smart@Emulex.Com * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
15c44ce173SJames.Smart@Emulex.Com * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
16c44ce173SJames.Smart@Emulex.Com * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
17c44ce173SJames.Smart@Emulex.Com * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18c44ce173SJames.Smart@Emulex.Com * TO BE LEGALLY INVALID. See the GNU General Public License for *
19c44ce173SJames.Smart@Emulex.Com * more details, a copy of which can be found in the file COPYING *
20c44ce173SJames.Smart@Emulex.Com * included with this package. *
21dea3101eS *******************************************************************/
22dea3101eS
23dea3101eS #define FDMI_DID 0xfffffaU
24dea3101eS #define NameServer_DID 0xfffffcU
25df3fe766SJames Smart #define Fabric_Cntl_DID 0xfffffdU
26dea3101eS #define Fabric_DID 0xfffffeU
27dea3101eS #define Bcast_DID 0xffffffU
28dea3101eS #define Mask_DID 0xffffffU
29dea3101eS #define CT_DID_MASK 0xffff00U
30dea3101eS #define Fabric_DID_MASK 0xfff000U
31dea3101eS #define WELL_KNOWN_DID_MASK 0xfffff0U
32dea3101eS
33dea3101eS #define PT2PT_LocalID 1
34dea3101eS #define PT2PT_RemoteID 2
35dea3101eS
36dea3101eS #define FF_DEF_EDTOV 2000 /* Default E_D_TOV (2000ms) */
37dea3101eS #define FF_DEF_ALTOV 15 /* Default AL_TIME (15ms) */
3821bf0b97SJames Smart #define FF_DEF_RATOV 10 /* Default RA_TOV (10s) */
39dea3101eS #define FF_DEF_ARBTOV 1900 /* Default ARB_TOV (1900ms) */
40dea3101eS
41dea3101eS #define LPFC_BUF_RING0 64 /* Number of buffers to post to RING
42dea3101eS 0 */
43dea3101eS
44dea3101eS #define FCELSSIZE 1024 /* maximum ELS transfer size */
45dea3101eS
46dea3101eS #define LPFC_FCP_RING 0 /* ring 0 for FCP initiator commands */
47a4bc3379SJames Smart #define LPFC_EXTRA_RING 1 /* ring 1 for other protocols */
48dea3101eS #define LPFC_ELS_RING 2 /* ring 2 for ELS commands */
49dea3101eS
50dea3101eS #define SLI2_IOCB_CMD_R0_ENTRIES 172 /* SLI-2 FCP command ring entries */
51dea3101eS #define SLI2_IOCB_RSP_R0_ENTRIES 134 /* SLI-2 FCP response ring entries */
52a4bc3379SJames Smart #define SLI2_IOCB_CMD_R1_ENTRIES 4 /* SLI-2 extra command ring entries */
53a4bc3379SJames Smart #define SLI2_IOCB_RSP_R1_ENTRIES 4 /* SLI-2 extra response ring entries */
54dea3101eS #define SLI2_IOCB_CMD_R1XTRA_ENTRIES 36 /* SLI-2 extra FCP cmd ring entries */
55dea3101eS #define SLI2_IOCB_RSP_R1XTRA_ENTRIES 52 /* SLI-2 extra FCP rsp ring entries */
56dea3101eS #define SLI2_IOCB_CMD_R2_ENTRIES 20 /* SLI-2 ELS command ring entries */
57dea3101eS #define SLI2_IOCB_RSP_R2_ENTRIES 20 /* SLI-2 ELS response ring entries */
58dea3101eS #define SLI2_IOCB_CMD_R3_ENTRIES 0
59dea3101eS #define SLI2_IOCB_RSP_R3_ENTRIES 0
60dea3101eS #define SLI2_IOCB_CMD_R3XTRA_ENTRIES 24
61dea3101eS #define SLI2_IOCB_RSP_R3XTRA_ENTRIES 32
62dea3101eS
63ed957684SJames Smart #define SLI2_IOCB_CMD_SIZE 32
64ed957684SJames Smart #define SLI2_IOCB_RSP_SIZE 32
65ed957684SJames Smart #define SLI3_IOCB_CMD_SIZE 128
66ed957684SJames Smart #define SLI3_IOCB_RSP_SIZE 64
67ed957684SJames Smart
686d368e53SJames Smart #define LPFC_UNREG_ALL_RPIS_VPORT 0xffff
696d368e53SJames Smart #define LPFC_UNREG_ALL_DFLT_RPIS 0xffffffff
7092d7f7b0SJames Smart
71ddcc50f0SJames Smart /* vendor ID used in SCSI netlink calls */
72ddcc50f0SJames Smart #define LPFC_NL_VENDOR_ID (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX)
73ddcc50f0SJames Smart
746b5151fdSJames Smart #define FW_REV_STR_SIZE 32
75dea3101eS /* Common Transport structures and definitions */
76dea3101eS
77dea3101eS union CtRevisionId {
78dea3101eS /* Structure is in Big Endian format */
79dea3101eS struct {
80dea3101eS uint32_t Revision:8;
81dea3101eS uint32_t InId:24;
82dea3101eS } bits;
83dea3101eS uint32_t word;
84dea3101eS };
85dea3101eS
86dea3101eS union CtCommandResponse {
87dea3101eS /* Structure is in Big Endian format */
88dea3101eS struct {
896e8a669eSJustin Tee __be16 CmdRsp;
906e8a669eSJustin Tee __be16 Size;
91dea3101eS } bits;
92dea3101eS uint32_t word;
93dea3101eS };
94dea3101eS
95a0f2d3efSJames Smart /* FC4 Feature bits for RFF_ID */
9692d7f7b0SJames Smart #define FC4_FEATURE_TARGET 0x1
97a0f2d3efSJames Smart #define FC4_FEATURE_INIT 0x2
98a0f2d3efSJames Smart #define FC4_FEATURE_NVME_DISC 0x4
9992d7f7b0SJames Smart
1006c983d32SJames Smart enum rft_word0 {
1016c983d32SJames Smart RFT_FCP_REG = (0x1 << 8),
1026c983d32SJames Smart };
1036c983d32SJames Smart
1046c983d32SJames Smart enum rft_word1 {
1056c983d32SJames Smart RFT_NVME_REG = (0x1 << 8),
1066c983d32SJames Smart };
1076c983d32SJames Smart
1086c983d32SJames Smart enum rft_word3 {
1096c983d32SJames Smart RFT_APP_SERV_REG = (0x1 << 0),
1106c983d32SJames Smart };
1116c983d32SJames Smart
112dea3101eS struct lpfc_sli_ct_request {
113dea3101eS /* Structure is in Big Endian format */
114dea3101eS union CtRevisionId RevisionId;
115dea3101eS uint8_t FsType;
116dea3101eS uint8_t FsSubType;
117dea3101eS uint8_t Options;
118dea3101eS uint8_t Rsrvd1;
119dea3101eS union CtCommandResponse CommandResponse;
120dea3101eS uint8_t Rsrvd2;
121dea3101eS uint8_t ReasonCode;
122dea3101eS uint8_t Explanation;
123dea3101eS uint8_t VendorUnique;
12476b2c34aSJames Smart #define LPFC_CT_PREAMBLE 20 /* Size of CTReq + 4 up to here */
125dea3101eS
126dea3101eS union {
1276e8a669eSJustin Tee __be32 PortID;
128dea3101eS struct gid {
129dea3101eS uint8_t PortType; /* for GID_PT requests */
1307ea92eb4SJames Smart #define GID_PT_N_PORT 1
131dea3101eS uint8_t DomainScope;
132dea3101eS uint8_t AreaScope;
133dea3101eS uint8_t Fc4Type; /* for GID_FT requests */
134dea3101eS } gid;
135a0f2d3efSJames Smart struct gid_ff {
136a0f2d3efSJames Smart uint8_t Flags;
137a0f2d3efSJames Smart uint8_t DomainScope;
138a0f2d3efSJames Smart uint8_t AreaScope;
139a0f2d3efSJames Smart uint8_t rsvd1;
140a0f2d3efSJames Smart uint8_t rsvd2;
141a0f2d3efSJames Smart uint8_t rsvd3;
142a0f2d3efSJames Smart uint8_t Fc4FBits;
143a0f2d3efSJames Smart uint8_t Fc4Type;
144a0f2d3efSJames Smart } gid_ff;
145dea3101eS struct rft {
1466c983d32SJames Smart __be32 port_id; /* For RFT_ID requests */
147dea3101eS
1486c983d32SJames Smart __be32 fcp_reg; /* rsvd 31:9, fcp_reg 8, rsvd 7:0 */
1496c983d32SJames Smart __be32 nvme_reg; /* rsvd 31:9, nvme_reg 8, rsvd 7:0 */
1506c983d32SJames Smart __be32 word2;
1516c983d32SJames Smart __be32 app_serv_reg; /* rsvd 31:1, app_serv_reg 0 */
1526c983d32SJames Smart __be32 word[4];
153dea3101eS } rft;
154dea3101eS struct rnn {
155dea3101eS uint32_t PortId; /* For RNN_ID requests */
156dea3101eS uint8_t wwnn[8];
157dea3101eS } rnn;
158dea3101eS struct rsnn { /* For RSNN_ID requests */
159dea3101eS uint8_t wwnn[8];
160dea3101eS uint8_t len;
161dea3101eS uint8_t symbname[255];
162dea3101eS } rsnn;
1637ee5d43eSJames Smart struct da_id { /* For DA_ID requests */
1647ee5d43eSJames Smart uint32_t port_id;
1657ee5d43eSJames Smart } da_id;
16692d7f7b0SJames Smart struct rspn { /* For RSPN_ID requests */
16792d7f7b0SJames Smart uint32_t PortId;
16892d7f7b0SJames Smart uint8_t len;
16992d7f7b0SJames Smart uint8_t symbname[255];
17092d7f7b0SJames Smart } rspn;
17192d7f7b0SJames Smart struct gff {
17292d7f7b0SJames Smart uint32_t PortId;
17392d7f7b0SJames Smart } gff;
17492d7f7b0SJames Smart struct gff_acc {
17592d7f7b0SJames Smart uint8_t fbits[128];
17692d7f7b0SJames Smart } gff_acc;
177a0f2d3efSJames Smart struct gft {
178a0f2d3efSJames Smart uint32_t PortId;
179a0f2d3efSJames Smart } gft;
180a0f2d3efSJames Smart struct gft_acc {
181a0f2d3efSJames Smart uint32_t fc4_types[8];
182a0f2d3efSJames Smart } gft_acc;
18351ef4c26SJames Smart #define FCP_TYPE_FEATURE_OFFSET 7
18492d7f7b0SJames Smart struct rff {
18592d7f7b0SJames Smart uint32_t PortId;
18692d7f7b0SJames Smart uint8_t reserved[2];
18792d7f7b0SJames Smart uint8_t fbits;
18892d7f7b0SJames Smart uint8_t type_code; /* type=8 for FCP */
18992d7f7b0SJames Smart } rff;
190dea3101eS } un;
191dea3101eS };
192dea3101eS
19376b2c34aSJames Smart #define LPFC_MAX_CT_SIZE (60 * 4096)
19476b2c34aSJames Smart
195dea3101eS #define SLI_CT_REVISION 1
19692d7f7b0SJames Smart #define GID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
19792d7f7b0SJames Smart sizeof(struct gid))
198a0f2d3efSJames Smart #define GIDFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
199a0f2d3efSJames Smart sizeof(struct gid_ff))
20092d7f7b0SJames Smart #define GFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
20192d7f7b0SJames Smart sizeof(struct gff))
202a0f2d3efSJames Smart #define GFT_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
203a0f2d3efSJames Smart sizeof(struct gft))
20492d7f7b0SJames Smart #define RFT_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
20592d7f7b0SJames Smart sizeof(struct rft))
20692d7f7b0SJames Smart #define RFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
20792d7f7b0SJames Smart sizeof(struct rff))
20892d7f7b0SJames Smart #define RNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
20992d7f7b0SJames Smart sizeof(struct rnn))
21092d7f7b0SJames Smart #define RSNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
21192d7f7b0SJames Smart sizeof(struct rsnn))
2127ee5d43eSJames Smart #define DA_ID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
2137ee5d43eSJames Smart sizeof(struct da_id))
21492d7f7b0SJames Smart #define RSPN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
21592d7f7b0SJames Smart sizeof(struct rspn))
216dea3101eS
217dea3101eS /*
218dea3101eS * FsType Definitions
219dea3101eS */
220dea3101eS
221dea3101eS #define SLI_CT_MANAGEMENT_SERVICE 0xFA
222dea3101eS #define SLI_CT_TIME_SERVICE 0xFB
223dea3101eS #define SLI_CT_DIRECTORY_SERVICE 0xFC
224dea3101eS #define SLI_CT_FABRIC_CONTROLLER_SERVICE 0xFD
225dea3101eS
226dea3101eS /*
227dea3101eS * Directory Service Subtypes
228dea3101eS */
229dea3101eS
230dea3101eS #define SLI_CT_DIRECTORY_NAME_SERVER 0x02
231dea3101eS
232dea3101eS /*
233dea3101eS * Response Codes
234dea3101eS */
235dea3101eS
236dea3101eS #define SLI_CT_RESPONSE_FS_RJT 0x8001
237dea3101eS #define SLI_CT_RESPONSE_FS_ACC 0x8002
238dea3101eS
239dea3101eS /*
240dea3101eS * Reason Codes
241dea3101eS */
242dea3101eS
243dea3101eS #define SLI_CT_NO_ADDITIONAL_EXPL 0x0
244dea3101eS #define SLI_CT_INVALID_COMMAND 0x01
245dea3101eS #define SLI_CT_INVALID_VERSION 0x02
246dea3101eS #define SLI_CT_LOGICAL_ERROR 0x03
247dea3101eS #define SLI_CT_INVALID_IU_SIZE 0x04
248dea3101eS #define SLI_CT_LOGICAL_BUSY 0x05
249dea3101eS #define SLI_CT_PROTOCOL_ERROR 0x07
250dea3101eS #define SLI_CT_UNABLE_TO_PERFORM_REQ 0x09
251dea3101eS #define SLI_CT_REQ_NOT_SUPPORTED 0x0b
252dea3101eS #define SLI_CT_HBA_INFO_NOT_REGISTERED 0x10
253dea3101eS #define SLI_CT_MULTIPLE_HBA_ATTR_OF_SAME_TYPE 0x11
254dea3101eS #define SLI_CT_INVALID_HBA_ATTR_BLOCK_LEN 0x12
255dea3101eS #define SLI_CT_HBA_ATTR_NOT_PRESENT 0x13
256dea3101eS #define SLI_CT_PORT_INFO_NOT_REGISTERED 0x20
257dea3101eS #define SLI_CT_MULTIPLE_PORT_ATTR_OF_SAME_TYPE 0x21
258dea3101eS #define SLI_CT_INVALID_PORT_ATTR_BLOCK_LEN 0x22
259dea3101eS #define SLI_CT_VENDOR_UNIQUE 0xff
260dea3101eS
261dea3101eS /*
262dea3101eS * Name Server SLI_CT_UNABLE_TO_PERFORM_REQ Explanations
263dea3101eS */
264dea3101eS
265dea3101eS #define SLI_CT_NO_PORT_ID 0x01
266dea3101eS #define SLI_CT_NO_PORT_NAME 0x02
267dea3101eS #define SLI_CT_NO_NODE_NAME 0x03
268dea3101eS #define SLI_CT_NO_CLASS_OF_SERVICE 0x04
269dea3101eS #define SLI_CT_NO_IP_ADDRESS 0x05
270dea3101eS #define SLI_CT_NO_IPA 0x06
271dea3101eS #define SLI_CT_NO_FC4_TYPES 0x07
272dea3101eS #define SLI_CT_NO_SYMBOLIC_PORT_NAME 0x08
273dea3101eS #define SLI_CT_NO_SYMBOLIC_NODE_NAME 0x09
274dea3101eS #define SLI_CT_NO_PORT_TYPE 0x0A
275dea3101eS #define SLI_CT_ACCESS_DENIED 0x10
276dea3101eS #define SLI_CT_INVALID_PORT_ID 0x11
277dea3101eS #define SLI_CT_DATABASE_EMPTY 0x12
27802169e84SGaurav Srivastava #define SLI_CT_APP_ID_NOT_AVAILABLE 0x40
279dea3101eS
280dea3101eS /*
281dea3101eS * Name Server Command Codes
282dea3101eS */
283dea3101eS
284dea3101eS #define SLI_CTNS_GA_NXT 0x0100
285dea3101eS #define SLI_CTNS_GPN_ID 0x0112
286dea3101eS #define SLI_CTNS_GNN_ID 0x0113
287dea3101eS #define SLI_CTNS_GCS_ID 0x0114
288dea3101eS #define SLI_CTNS_GFT_ID 0x0117
289dea3101eS #define SLI_CTNS_GSPN_ID 0x0118
290dea3101eS #define SLI_CTNS_GPT_ID 0x011A
29192d7f7b0SJames Smart #define SLI_CTNS_GFF_ID 0x011F
292dea3101eS #define SLI_CTNS_GID_PN 0x0121
293dea3101eS #define SLI_CTNS_GID_NN 0x0131
294dea3101eS #define SLI_CTNS_GIP_NN 0x0135
295dea3101eS #define SLI_CTNS_GIPA_NN 0x0136
296dea3101eS #define SLI_CTNS_GSNN_NN 0x0139
297dea3101eS #define SLI_CTNS_GNN_IP 0x0153
298dea3101eS #define SLI_CTNS_GIPA_IP 0x0156
299dea3101eS #define SLI_CTNS_GID_FT 0x0171
300a0f2d3efSJames Smart #define SLI_CTNS_GID_FF 0x01F1
301dea3101eS #define SLI_CTNS_GID_PT 0x01A1
302dea3101eS #define SLI_CTNS_RPN_ID 0x0212
303dea3101eS #define SLI_CTNS_RNN_ID 0x0213
304dea3101eS #define SLI_CTNS_RCS_ID 0x0214
305dea3101eS #define SLI_CTNS_RFT_ID 0x0217
306dea3101eS #define SLI_CTNS_RSPN_ID 0x0218
307dea3101eS #define SLI_CTNS_RPT_ID 0x021A
30892d7f7b0SJames Smart #define SLI_CTNS_RFF_ID 0x021F
309dea3101eS #define SLI_CTNS_RIP_NN 0x0235
310dea3101eS #define SLI_CTNS_RIPA_NN 0x0236
311dea3101eS #define SLI_CTNS_RSNN_NN 0x0239
312dea3101eS #define SLI_CTNS_DA_ID 0x0300
313dea3101eS
314dea3101eS /*
315dea3101eS * Port Types
316dea3101eS */
317dea3101eS
318dea3101eS #define SLI_CTPT_N_PORT 0x01
319dea3101eS #define SLI_CTPT_NL_PORT 0x02
320dea3101eS #define SLI_CTPT_FNL_PORT 0x03
321dea3101eS #define SLI_CTPT_IP 0x04
322dea3101eS #define SLI_CTPT_FCP 0x08
323a0f2d3efSJames Smart #define SLI_CTPT_NVME 0x28
324dea3101eS #define SLI_CTPT_NX_PORT 0x7F
325dea3101eS #define SLI_CTPT_F_PORT 0x81
326dea3101eS #define SLI_CTPT_FL_PORT 0x82
327dea3101eS #define SLI_CTPT_E_PORT 0x84
328dea3101eS
329dea3101eS #define SLI_CT_LAST_ENTRY 0x80000000
330dea3101eS
331dea3101eS /* Fibre Channel Service Parameter definitions */
332dea3101eS
333dea3101eS #define FC_PH_4_0 6 /* FC-PH version 4.0 */
334dea3101eS #define FC_PH_4_1 7 /* FC-PH version 4.1 */
335dea3101eS #define FC_PH_4_2 8 /* FC-PH version 4.2 */
336dea3101eS #define FC_PH_4_3 9 /* FC-PH version 4.3 */
337dea3101eS
338dea3101eS #define FC_PH_LOW 8 /* Lowest supported FC-PH version */
339dea3101eS #define FC_PH_HIGH 9 /* Highest supported FC-PH version */
340dea3101eS #define FC_PH3 0x20 /* FC-PH-3 version */
341dea3101eS
342dea3101eS #define FF_FRAME_SIZE 2048
343dea3101eS
344dea3101eS struct lpfc_name {
345f631b4beSAndrew Vasquez union {
346f631b4beSAndrew Vasquez struct {
347dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
348dea3101eS uint8_t nameType:4; /* FC Word 0, bit 28:31 */
3491de933f3SJames.Smart@Emulex.Com uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit
3501de933f3SJames.Smart@Emulex.Com 8:11 of IEEE ext */
351dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3521de933f3SJames.Smart@Emulex.Com uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit
3531de933f3SJames.Smart@Emulex.Com 8:11 of IEEE ext */
354dea3101eS uint8_t nameType:4; /* FC Word 0, bit 28:31 */
355dea3101eS #endif
356dea3101eS
357dea3101eS #define NAME_IEEE 0x1 /* IEEE name - nameType */
358dea3101eS #define NAME_IEEE_EXT 0x2 /* IEEE extended name */
359dea3101eS #define NAME_FC_TYPE 0x3 /* FC native name type */
360dea3101eS #define NAME_IP_TYPE 0x4 /* IP address */
361dea3101eS #define NAME_CCITT_TYPE 0xC
362dea3101eS #define NAME_CCITT_GR_TYPE 0xE
3631de933f3SJames.Smart@Emulex.Com uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE
3641de933f3SJames.Smart@Emulex.Com extended Lsb */
365dea3101eS uint8_t IEEE[6]; /* FC IEEE address */
36668ce1eb5SAndrew Morton } s;
367f631b4beSAndrew Vasquez uint8_t wwn[8];
36800c2cae6SArnd Bergmann uint64_t name __packed __aligned(4);
36968ce1eb5SAndrew Morton } u;
370f631b4beSAndrew Vasquez };
371dea3101eS
372dea3101eS struct csp {
373dea3101eS uint8_t fcphHigh; /* FC Word 0, byte 0 */
374dea3101eS uint8_t fcphLow;
375dea3101eS uint8_t bbCreditMsb;
3763aaaa314SJames Smart uint8_t bbCreditLsb; /* FC Word 0, byte 3 */
377dea3101eS
37892494144SJames Smart /*
37992494144SJames Smart * Word 1 Bit 31 in common service parameter is overloaded.
38092494144SJames Smart * Word 1 Bit 31 in FLOGI request is multiple NPort request
38192494144SJames Smart * Word 1 Bit 31 in FLOGI response is clean address bit
38292494144SJames Smart */
38392494144SJames Smart #define clean_address_bit request_multiple_Nport /* Word 1, bit 31 */
384df9e1b59SJames Smart /*
385df9e1b59SJames Smart * Word 1 Bit 30 in common service parameter is overloaded.
386df9e1b59SJames Smart * Word 1 Bit 30 in FLOGI request is Virtual Fabrics
387df9e1b59SJames Smart * Word 1 Bit 30 in PLOGI request is random offset
388df9e1b59SJames Smart */
389df9e1b59SJames Smart #define virtual_fabric_support randomOffset /* Word 1, bit 30 */
390e0165f20SJames Smart /*
391e0165f20SJames Smart * Word 1 Bit 29 in common service parameter is overloaded.
392e0165f20SJames Smart * Word 1 Bit 29 in FLOGI response is multiple NPort assignment
393e0165f20SJames Smart * Word 1 Bit 29 in FLOGI/PLOGI request is Valid Vendor Version Level
394e0165f20SJames Smart */
395e0165f20SJames Smart #define valid_vendor_ver_level response_multiple_NPort /* Word 1, bit 29 */
396dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
39792d7f7b0SJames Smart uint16_t request_multiple_Nport:1; /* FC Word 1, bit 31 */
39892d7f7b0SJames Smart uint16_t randomOffset:1; /* FC Word 1, bit 30 */
39992d7f7b0SJames Smart uint16_t response_multiple_NPort:1; /* FC Word 1, bit 29 */
400dea3101eS uint16_t fPort:1; /* FC Word 1, bit 28 */
401dea3101eS uint16_t altBbCredit:1; /* FC Word 1, bit 27 */
402dea3101eS uint16_t edtovResolution:1; /* FC Word 1, bit 26 */
403dea3101eS uint16_t multicast:1; /* FC Word 1, bit 25 */
40402169e84SGaurav Srivastava uint16_t app_hdr_support:1; /* FC Word 1, bit 24 */
405dea3101eS
40602169e84SGaurav Srivastava uint16_t priority_tagging:1; /* FC Word 1, bit 23 */
407dea3101eS uint16_t simplex:1; /* FC Word 1, bit 22 */
408dea3101eS uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */
409dea3101eS uint16_t dhd:1; /* FC Word 1, bit 18 */
410dea3101eS uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */
411dea3101eS uint16_t payloadlength:1; /* FC Word 1, bit 16 */
412dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
41302169e84SGaurav Srivastava uint16_t app_hdr_support:1; /* FC Word 1, bit 24 */
414dea3101eS uint16_t multicast:1; /* FC Word 1, bit 25 */
415dea3101eS uint16_t edtovResolution:1; /* FC Word 1, bit 26 */
416dea3101eS uint16_t altBbCredit:1; /* FC Word 1, bit 27 */
417dea3101eS uint16_t fPort:1; /* FC Word 1, bit 28 */
41892d7f7b0SJames Smart uint16_t response_multiple_NPort:1; /* FC Word 1, bit 29 */
419dea3101eS uint16_t randomOffset:1; /* FC Word 1, bit 30 */
42092d7f7b0SJames Smart uint16_t request_multiple_Nport:1; /* FC Word 1, bit 31 */
421dea3101eS
422dea3101eS uint16_t payloadlength:1; /* FC Word 1, bit 16 */
423dea3101eS uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */
424dea3101eS uint16_t dhd:1; /* FC Word 1, bit 18 */
425dea3101eS uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */
426dea3101eS uint16_t simplex:1; /* FC Word 1, bit 22 */
42702169e84SGaurav Srivastava uint16_t priority_tagging:1; /* FC Word 1, bit 23 */
428dea3101eS #endif
429dea3101eS
430dea3101eS uint8_t bbRcvSizeMsb; /* Upper nibble is reserved */
431dea3101eS uint8_t bbRcvSizeLsb; /* FC Word 1, byte 3 */
432dea3101eS union {
433dea3101eS struct {
434dea3101eS uint8_t word2Reserved1; /* FC Word 2 byte 0 */
435dea3101eS
436dea3101eS uint8_t totalConcurrSeq; /* FC Word 2 byte 1 */
437dea3101eS uint8_t roByCategoryMsb; /* FC Word 2 byte 2 */
438dea3101eS
439dea3101eS uint8_t roByCategoryLsb; /* FC Word 2 byte 3 */
440dea3101eS } nPort;
441dea3101eS uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */
442dea3101eS } w2;
443dea3101eS
444dea3101eS uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */
445dea3101eS };
446dea3101eS
447dea3101eS struct class_parms {
448dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
449dea3101eS uint8_t classValid:1; /* FC Word 0, bit 31 */
450dea3101eS uint8_t intermix:1; /* FC Word 0, bit 30 */
451dea3101eS uint8_t stackedXparent:1; /* FC Word 0, bit 29 */
452dea3101eS uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */
453dea3101eS uint8_t seqDelivery:1; /* FC Word 0, bit 27 */
454dea3101eS uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */
455dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
456dea3101eS uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */
457dea3101eS uint8_t seqDelivery:1; /* FC Word 0, bit 27 */
458dea3101eS uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */
459dea3101eS uint8_t stackedXparent:1; /* FC Word 0, bit 29 */
460dea3101eS uint8_t intermix:1; /* FC Word 0, bit 30 */
461dea3101eS uint8_t classValid:1; /* FC Word 0, bit 31 */
462dea3101eS
463dea3101eS #endif
464dea3101eS
465dea3101eS uint8_t word0Reserved2; /* FC Word 0, bit 16:23 */
466dea3101eS
467dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
468dea3101eS uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */
469dea3101eS uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */
470dea3101eS uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */
471dea3101eS uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */
472dea3101eS uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */
473dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
474dea3101eS uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */
475dea3101eS uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */
476dea3101eS uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */
477dea3101eS uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */
478dea3101eS uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */
479dea3101eS #endif
480dea3101eS
481dea3101eS uint8_t word0Reserved4; /* FC Word 0, bit 0: 7 */
482dea3101eS
483dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
484dea3101eS uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */
485dea3101eS uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */
486dea3101eS uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */
487dea3101eS uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */
488dea3101eS uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */
489dea3101eS uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */
490dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
491dea3101eS uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */
492dea3101eS uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */
493dea3101eS uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */
494dea3101eS uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */
495dea3101eS uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */
496dea3101eS uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */
497dea3101eS #endif
498dea3101eS
499dea3101eS uint8_t word1Reserved2; /* FC Word 1, bit 16:23 */
500dea3101eS uint8_t rcvDataSizeMsb; /* FC Word 1, bit 8:15 */
501dea3101eS uint8_t rcvDataSizeLsb; /* FC Word 1, bit 0: 7 */
502dea3101eS
503dea3101eS uint8_t concurrentSeqMsb; /* FC Word 2, bit 24:31 */
504dea3101eS uint8_t concurrentSeqLsb; /* FC Word 2, bit 16:23 */
505dea3101eS uint8_t EeCreditSeqMsb; /* FC Word 2, bit 8:15 */
506dea3101eS uint8_t EeCreditSeqLsb; /* FC Word 2, bit 0: 7 */
507dea3101eS
508dea3101eS uint8_t openSeqPerXchgMsb; /* FC Word 3, bit 24:31 */
509dea3101eS uint8_t openSeqPerXchgLsb; /* FC Word 3, bit 16:23 */
510dea3101eS uint8_t word3Reserved1; /* Fc Word 3, bit 8:15 */
511dea3101eS uint8_t word3Reserved2; /* Fc Word 3, bit 0: 7 */
512dea3101eS };
513dea3101eS
514dea3101eS struct serv_parm { /* Structure is in Big Endian format */
515dea3101eS struct csp cmn;
516dea3101eS struct lpfc_name portName;
517dea3101eS struct lpfc_name nodeName;
518dea3101eS struct class_parms cls1;
519dea3101eS struct class_parms cls2;
520dea3101eS struct class_parms cls3;
521dea3101eS struct class_parms cls4;
5228c258641SJames Smart union {
523dea3101eS uint8_t vendorVersion[16];
5248c258641SJames Smart struct {
5258c258641SJames Smart uint32_t vid;
5268c258641SJames Smart #define LPFC_VV_EMLX_ID 0x454d4c58 /* EMLX */
5278c258641SJames Smart uint32_t flags;
5288c258641SJames Smart #define LPFC_VV_SUPPRESS_RSP 1
5298c258641SJames Smart } vv;
5308c258641SJames Smart } un;
531dea3101eS };
532dea3101eS
533dea3101eS /*
534da0436e9SJames Smart * Virtual Fabric Tagging Header
535da0436e9SJames Smart */
536da0436e9SJames Smart struct fc_vft_header {
537da0436e9SJames Smart uint32_t word0;
538da0436e9SJames Smart #define fc_vft_hdr_r_ctl_SHIFT 24
539da0436e9SJames Smart #define fc_vft_hdr_r_ctl_MASK 0xFF
540da0436e9SJames Smart #define fc_vft_hdr_r_ctl_WORD word0
541da0436e9SJames Smart #define fc_vft_hdr_ver_SHIFT 22
542da0436e9SJames Smart #define fc_vft_hdr_ver_MASK 0x3
543da0436e9SJames Smart #define fc_vft_hdr_ver_WORD word0
544da0436e9SJames Smart #define fc_vft_hdr_type_SHIFT 18
545da0436e9SJames Smart #define fc_vft_hdr_type_MASK 0xF
546da0436e9SJames Smart #define fc_vft_hdr_type_WORD word0
547da0436e9SJames Smart #define fc_vft_hdr_e_SHIFT 16
548da0436e9SJames Smart #define fc_vft_hdr_e_MASK 0x1
549da0436e9SJames Smart #define fc_vft_hdr_e_WORD word0
550da0436e9SJames Smart #define fc_vft_hdr_priority_SHIFT 13
551da0436e9SJames Smart #define fc_vft_hdr_priority_MASK 0x7
552da0436e9SJames Smart #define fc_vft_hdr_priority_WORD word0
553da0436e9SJames Smart #define fc_vft_hdr_vf_id_SHIFT 1
554da0436e9SJames Smart #define fc_vft_hdr_vf_id_MASK 0xFFF
555da0436e9SJames Smart #define fc_vft_hdr_vf_id_WORD word0
556da0436e9SJames Smart uint32_t word1;
557da0436e9SJames Smart #define fc_vft_hdr_hopct_SHIFT 24
558da0436e9SJames Smart #define fc_vft_hdr_hopct_MASK 0xFF
559da0436e9SJames Smart #define fc_vft_hdr_hopct_WORD word1
560da0436e9SJames Smart };
561da0436e9SJames Smart
5621a61e548SJames Smart #include <uapi/scsi/fc/fc_els.h>
5631a61e548SJames Smart
564da0436e9SJames Smart /*
565dea3101eS * Extended Link Service LS_COMMAND codes (Payload Word 0)
566dea3101eS */
567dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
568dea3101eS #define ELS_CMD_MASK 0xffff0000
569dea3101eS #define ELS_RSP_MASK 0xff000000
570dea3101eS #define ELS_CMD_LS_RJT 0x01000000
571dea3101eS #define ELS_CMD_ACC 0x02000000
572dea3101eS #define ELS_CMD_PLOGI 0x03000000
573dea3101eS #define ELS_CMD_FLOGI 0x04000000
574dea3101eS #define ELS_CMD_LOGO 0x05000000
575dea3101eS #define ELS_CMD_ABTX 0x06000000
576dea3101eS #define ELS_CMD_RCS 0x07000000
577dea3101eS #define ELS_CMD_RES 0x08000000
578dea3101eS #define ELS_CMD_RSS 0x09000000
579dea3101eS #define ELS_CMD_RSI 0x0A000000
580dea3101eS #define ELS_CMD_ESTS 0x0B000000
581dea3101eS #define ELS_CMD_ESTC 0x0C000000
582dea3101eS #define ELS_CMD_ADVC 0x0D000000
583dea3101eS #define ELS_CMD_RTV 0x0E000000
584dea3101eS #define ELS_CMD_RLS 0x0F000000
585dea3101eS #define ELS_CMD_ECHO 0x10000000
586dea3101eS #define ELS_CMD_TEST 0x11000000
587dea3101eS #define ELS_CMD_RRQ 0x12000000
588303f2f9cSJames Smart #define ELS_CMD_REC 0x13000000
58986478875SJames Smart #define ELS_CMD_RDP 0x18000000
590df3fe766SJames Smart #define ELS_CMD_RDF 0x19000000
591dea3101eS #define ELS_CMD_PRLI 0x20100014
592a0f2d3efSJames Smart #define ELS_CMD_NVMEPRLI 0x20140018
593dea3101eS #define ELS_CMD_PRLO 0x21100014
59482d9a2a2SJames Smart #define ELS_CMD_PRLO_ACC 0x02100014
595dea3101eS #define ELS_CMD_PDISC 0x50000000
596dea3101eS #define ELS_CMD_FDISC 0x51000000
597dea3101eS #define ELS_CMD_ADISC 0x52000000
598dea3101eS #define ELS_CMD_FARP 0x54000000
599dea3101eS #define ELS_CMD_FARPR 0x55000000
6007bb3b137SJamie Wellnitz #define ELS_CMD_RPL 0x57000000
601dea3101eS #define ELS_CMD_FAN 0x60000000
602dea3101eS #define ELS_CMD_RSCN 0x61040000
603f60cb93bSJames Smart #define ELS_CMD_RSCN_XMT 0x61040008
604dea3101eS #define ELS_CMD_SCR 0x62000000
605dea3101eS #define ELS_CMD_RNID 0x78000000
6067bb3b137SJamie Wellnitz #define ELS_CMD_LIRR 0x7A000000
6078b017a30SJames Smart #define ELS_CMD_LCB 0x81000000
6081a61e548SJames Smart #define ELS_CMD_FPIN 0x16000000
6099064aeb2SJames Smart #define ELS_CMD_EDC 0x17000000
61002169e84SGaurav Srivastava #define ELS_CMD_QFPA 0xB0000000
61102169e84SGaurav Srivastava #define ELS_CMD_UVEM 0xB1000000
612dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
613dea3101eS #define ELS_CMD_MASK 0xffff
614dea3101eS #define ELS_RSP_MASK 0xff
615dea3101eS #define ELS_CMD_LS_RJT 0x01
616dea3101eS #define ELS_CMD_ACC 0x02
617dea3101eS #define ELS_CMD_PLOGI 0x03
618dea3101eS #define ELS_CMD_FLOGI 0x04
619dea3101eS #define ELS_CMD_LOGO 0x05
620dea3101eS #define ELS_CMD_ABTX 0x06
621dea3101eS #define ELS_CMD_RCS 0x07
622dea3101eS #define ELS_CMD_RES 0x08
623dea3101eS #define ELS_CMD_RSS 0x09
624dea3101eS #define ELS_CMD_RSI 0x0A
625dea3101eS #define ELS_CMD_ESTS 0x0B
626dea3101eS #define ELS_CMD_ESTC 0x0C
627dea3101eS #define ELS_CMD_ADVC 0x0D
628dea3101eS #define ELS_CMD_RTV 0x0E
629dea3101eS #define ELS_CMD_RLS 0x0F
630dea3101eS #define ELS_CMD_ECHO 0x10
631dea3101eS #define ELS_CMD_TEST 0x11
632dea3101eS #define ELS_CMD_RRQ 0x12
633303f2f9cSJames Smart #define ELS_CMD_REC 0x13
63486478875SJames Smart #define ELS_CMD_RDP 0x18
635df3fe766SJames Smart #define ELS_CMD_RDF 0x19
636dea3101eS #define ELS_CMD_PRLI 0x14001020
637a0f2d3efSJames Smart #define ELS_CMD_NVMEPRLI 0x18001420
638dea3101eS #define ELS_CMD_PRLO 0x14001021
63982d9a2a2SJames Smart #define ELS_CMD_PRLO_ACC 0x14001002
640dea3101eS #define ELS_CMD_PDISC 0x50
641dea3101eS #define ELS_CMD_FDISC 0x51
642dea3101eS #define ELS_CMD_ADISC 0x52
643dea3101eS #define ELS_CMD_FARP 0x54
644dea3101eS #define ELS_CMD_FARPR 0x55
6457bb3b137SJamie Wellnitz #define ELS_CMD_RPL 0x57
646dea3101eS #define ELS_CMD_FAN 0x60
647dea3101eS #define ELS_CMD_RSCN 0x0461
648f60cb93bSJames Smart #define ELS_CMD_RSCN_XMT 0x08000461
649dea3101eS #define ELS_CMD_SCR 0x62
650dea3101eS #define ELS_CMD_RNID 0x78
6517bb3b137SJamie Wellnitz #define ELS_CMD_LIRR 0x7A
6528b017a30SJames Smart #define ELS_CMD_LCB 0x81
6531a61e548SJames Smart #define ELS_CMD_FPIN ELS_FPIN
6549064aeb2SJames Smart #define ELS_CMD_EDC ELS_EDC
65502169e84SGaurav Srivastava #define ELS_CMD_QFPA 0xB0
65602169e84SGaurav Srivastava #define ELS_CMD_UVEM 0xB1
657dea3101eS #endif
658dea3101eS
659dea3101eS /*
660dea3101eS * LS_RJT Payload Definition
661dea3101eS */
662dea3101eS
663dea3101eS struct ls_rjt { /* Structure is in Big Endian format */
664dea3101eS union {
6656831ce12SJames Smart __be32 ls_rjt_error_be;
666dea3101eS uint32_t lsRjtError;
667dea3101eS struct {
668dea3101eS uint8_t lsRjtRsvd0; /* FC Word 0, bit 24:31 */
669dea3101eS
670dea3101eS uint8_t lsRjtRsnCode; /* FC Word 0, bit 16:23 */
671dea3101eS /* LS_RJT reason codes */
672dea3101eS #define LSRJT_INVALID_CMD 0x01
673dea3101eS #define LSRJT_LOGICAL_ERR 0x03
674dea3101eS #define LSRJT_LOGICAL_BSY 0x05
675dea3101eS #define LSRJT_PROTOCOL_ERR 0x07
676dea3101eS #define LSRJT_UNABLE_TPC 0x09 /* Unable to perform command */
677dea3101eS #define LSRJT_CMD_UNSUPPORTED 0x0B
678dea3101eS #define LSRJT_VENDOR_UNIQUE 0xFF /* See Byte 3 */
679dea3101eS
680dea3101eS uint8_t lsRjtRsnCodeExp; /* FC Word 0, bit 8:15 */
681dea3101eS /* LS_RJT reason explanation */
682dea3101eS #define LSEXP_NOTHING_MORE 0x00
683dea3101eS #define LSEXP_SPARM_OPTIONS 0x01
684dea3101eS #define LSEXP_SPARM_ICTL 0x03
685dea3101eS #define LSEXP_SPARM_RCTL 0x05
686dea3101eS #define LSEXP_SPARM_RCV_SIZE 0x07
687dea3101eS #define LSEXP_SPARM_CONCUR_SEQ 0x09
688dea3101eS #define LSEXP_SPARM_CREDIT 0x0B
689dea3101eS #define LSEXP_INVALID_PNAME 0x0D
690dea3101eS #define LSEXP_INVALID_NNAME 0x0E
691dea3101eS #define LSEXP_INVALID_CSP 0x0F
692dea3101eS #define LSEXP_INVALID_ASSOC_HDR 0x11
693dea3101eS #define LSEXP_ASSOC_HDR_REQ 0x13
694dea3101eS #define LSEXP_INVALID_O_SID 0x15
695dea3101eS #define LSEXP_INVALID_OX_RX 0x17
696dea3101eS #define LSEXP_CMD_IN_PROGRESS 0x19
6977f5f3d0dSJames Smart #define LSEXP_PORT_LOGIN_REQ 0x1E
698dea3101eS #define LSEXP_INVALID_NPORT_ID 0x1F
699dea3101eS #define LSEXP_INVALID_SEQ_ID 0x21
700dea3101eS #define LSEXP_INVALID_XCHG 0x23
701dea3101eS #define LSEXP_INACTIVE_XCHG 0x25
702dea3101eS #define LSEXP_RQ_REQUIRED 0x27
703dea3101eS #define LSEXP_OUT_OF_RESOURCE 0x29
704dea3101eS #define LSEXP_CANT_GIVE_DATA 0x2A
705dea3101eS #define LSEXP_REQ_UNSUPPORTED 0x2C
70684536351SJames Smart #define LSEXP_NO_RSRC_ASSIGN 0x52
707dea3101eS uint8_t vendorUnique; /* FC Word 0, bit 0: 7 */
708dea3101eS } b;
709dea3101eS } un;
710dea3101eS };
711dea3101eS
712dea3101eS /*
713dea3101eS * N_Port Login (FLOGO/PLOGO Request) Payload Definition
714dea3101eS */
715dea3101eS
716dea3101eS typedef struct _LOGO { /* Structure is in Big Endian format */
717dea3101eS union {
718dea3101eS uint32_t nPortId32; /* Access nPortId as a word */
719dea3101eS struct {
720dea3101eS uint8_t word1Reserved1; /* FC Word 1, bit 31:24 */
721dea3101eS uint8_t nPortIdByte0; /* N_port ID bit 16:23 */
722dea3101eS uint8_t nPortIdByte1; /* N_port ID bit 8:15 */
723dea3101eS uint8_t nPortIdByte2; /* N_port ID bit 0: 7 */
724dea3101eS } b;
725dea3101eS } un;
726dea3101eS struct lpfc_name portName; /* N_port name field */
727dea3101eS } LOGO;
728dea3101eS
729dea3101eS /*
730dea3101eS * FCP Login (PRLI Request / ACC) Payload Definition
731dea3101eS */
732dea3101eS
733dea3101eS #define PRLX_PAGE_LEN 0x10
734dea3101eS #define TPRLO_PAGE_LEN 0x14
735dea3101eS
736dea3101eS typedef struct _PRLI { /* Structure is in Big Endian format */
737dea3101eS uint8_t prliType; /* FC Parm Word 0, bit 24:31 */
738dea3101eS
739dea3101eS #define PRLI_FCP_TYPE 0x08
740a0f2d3efSJames Smart #define PRLI_NVME_TYPE 0x28
741dea3101eS uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */
742dea3101eS
743dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
744dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */
745dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */
746dea3101eS uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */
747dea3101eS
748dea3101eS /* ACC = imagePairEstablished */
749dea3101eS uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */
750dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */
751dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
752dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */
753dea3101eS uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */
754dea3101eS uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */
755dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */
756dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */
757dea3101eS /* ACC = imagePairEstablished */
758dea3101eS #endif
759dea3101eS
760dea3101eS #define PRLI_REQ_EXECUTED 0x1 /* acceptRspCode */
761dea3101eS #define PRLI_NO_RESOURCES 0x2
762dea3101eS #define PRLI_INIT_INCOMPLETE 0x3
763dea3101eS #define PRLI_NO_SUCH_PA 0x4
764dea3101eS #define PRLI_PREDEF_CONFIG 0x5
765dea3101eS #define PRLI_PARTIAL_SUCCESS 0x6
766dea3101eS #define PRLI_INVALID_PAGE_CNT 0x7
767*04c32001SJustin Tee #define PRLI_INV_SRV_PARM 0x8
768*04c32001SJustin Tee
769dea3101eS uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */
770dea3101eS
771dea3101eS uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
772dea3101eS
773dea3101eS uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
774dea3101eS
775dea3101eS uint8_t word3Reserved1; /* FC Parm Word 3, bit 24:31 */
776dea3101eS uint8_t word3Reserved2; /* FC Parm Word 3, bit 16:23 */
777dea3101eS
778dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
779dea3101eS uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */
780dea3101eS uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */
781dea3101eS uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */
782dea3101eS uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */
783dea3101eS uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */
784dea3101eS uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */
785dea3101eS uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */
786dea3101eS uint16_t Retry:1; /* FC Parm Word 3, bit 8 */
787dea3101eS uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */
788dea3101eS uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */
789dea3101eS uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */
790dea3101eS uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */
791dea3101eS uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */
792dea3101eS uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */
793dea3101eS uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */
794dea3101eS uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */
795dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
796dea3101eS uint16_t Retry:1; /* FC Parm Word 3, bit 8 */
797dea3101eS uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */
798dea3101eS uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */
799dea3101eS uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */
800dea3101eS uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */
801dea3101eS uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */
802dea3101eS uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */
803dea3101eS uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */
804dea3101eS uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */
805dea3101eS uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */
806dea3101eS uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */
807dea3101eS uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */
808dea3101eS uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */
809dea3101eS uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */
810dea3101eS uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */
811dea3101eS uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */
812dea3101eS #endif
813dea3101eS } PRLI;
814dea3101eS
815dea3101eS /*
816dea3101eS * FCP Logout (PRLO Request / ACC) Payload Definition
817dea3101eS */
818dea3101eS
819dea3101eS typedef struct _PRLO { /* Structure is in Big Endian format */
820dea3101eS uint8_t prloType; /* FC Parm Word 0, bit 24:31 */
821dea3101eS
822dea3101eS #define PRLO_FCP_TYPE 0x08
823dea3101eS uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */
824dea3101eS
825dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
826dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */
827dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */
828dea3101eS uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */
829dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */
830dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
831dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */
832dea3101eS uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */
833dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */
834dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */
835dea3101eS #endif
836dea3101eS
837dea3101eS #define PRLO_REQ_EXECUTED 0x1 /* acceptRspCode */
838dea3101eS #define PRLO_NO_SUCH_IMAGE 0x4
839dea3101eS #define PRLO_INVALID_PAGE_CNT 0x7
840dea3101eS
841dea3101eS uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */
842dea3101eS
843dea3101eS uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
844dea3101eS
845dea3101eS uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
846dea3101eS
847dea3101eS uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */
848dea3101eS } PRLO;
849dea3101eS
850dea3101eS typedef struct _ADISC { /* Structure is in Big Endian format */
851dea3101eS uint32_t hardAL_PA;
852dea3101eS struct lpfc_name portName;
853dea3101eS struct lpfc_name nodeName;
854dea3101eS uint32_t DID;
85500c2cae6SArnd Bergmann } ADISC;
856dea3101eS
857dea3101eS typedef struct _FARP { /* Structure is in Big Endian format */
858dea3101eS uint32_t Mflags:8;
859dea3101eS uint32_t Odid:24;
860dea3101eS #define FARP_NO_ACTION 0 /* FARP information enclosed, no
861dea3101eS action */
862dea3101eS #define FARP_MATCH_PORT 0x1 /* Match on Responder Port Name */
863dea3101eS #define FARP_MATCH_NODE 0x2 /* Match on Responder Node Name */
864dea3101eS #define FARP_MATCH_IP 0x4 /* Match on IP address, not supported */
865dea3101eS #define FARP_MATCH_IPV4 0x5 /* Match on IPV4 address, not
866dea3101eS supported */
867dea3101eS #define FARP_MATCH_IPV6 0x6 /* Match on IPV6 address, not
868dea3101eS supported */
869dea3101eS uint32_t Rflags:8;
870dea3101eS uint32_t Rdid:24;
871dea3101eS #define FARP_REQUEST_PLOGI 0x1 /* Request for PLOGI */
872dea3101eS #define FARP_REQUEST_FARPR 0x2 /* Request for FARP Response */
873dea3101eS struct lpfc_name OportName;
874dea3101eS struct lpfc_name OnodeName;
875dea3101eS struct lpfc_name RportName;
876dea3101eS struct lpfc_name RnodeName;
877dea3101eS uint8_t Oipaddr[16];
878dea3101eS uint8_t Ripaddr[16];
879dea3101eS } FARP;
880dea3101eS
881dea3101eS typedef struct _FAN { /* Structure is in Big Endian format */
882dea3101eS uint32_t Fdid;
883dea3101eS struct lpfc_name FportName;
884dea3101eS struct lpfc_name FnodeName;
88500c2cae6SArnd Bergmann } FAN;
886dea3101eS
887dea3101eS typedef struct _SCR { /* Structure is in Big Endian format */
888dea3101eS uint8_t resvd1;
889dea3101eS uint8_t resvd2;
890dea3101eS uint8_t resvd3;
891dea3101eS uint8_t Function;
892dea3101eS #define SCR_FUNC_FABRIC 0x01
893dea3101eS #define SCR_FUNC_NPORT 0x02
894dea3101eS #define SCR_FUNC_FULL 0x03
895dea3101eS #define SCR_CLEAR 0xff
896dea3101eS } SCR;
897dea3101eS
898dea3101eS typedef struct _RNID_TOP_DISC {
899dea3101eS struct lpfc_name portName;
900dea3101eS uint8_t resvd[8];
901dea3101eS uint32_t unitType;
902dea3101eS #define RNID_HBA 0x7
903dea3101eS #define RNID_HOST 0xa
904dea3101eS #define RNID_DRIVER 0xd
905dea3101eS uint32_t physPort;
906dea3101eS uint32_t attachedNodes;
907dea3101eS uint16_t ipVersion;
908dea3101eS #define RNID_IPV4 0x1
909dea3101eS #define RNID_IPV6 0x2
910dea3101eS uint16_t UDPport;
911dea3101eS uint8_t ipAddr[16];
912dea3101eS uint16_t resvd1;
913dea3101eS uint16_t flags;
914dea3101eS #define RNID_TD_SUPPORT 0x1
915dea3101eS #define RNID_LP_VALID 0x2
916dea3101eS } RNID_TOP_DISC;
917dea3101eS
918dea3101eS typedef struct _RNID { /* Structure is in Big Endian format */
919dea3101eS uint8_t Format;
920dea3101eS #define RNID_TOPOLOGY_DISC 0xdf
921dea3101eS uint8_t CommonLen;
922dea3101eS uint8_t resvd1;
923dea3101eS uint8_t SpecificLen;
924dea3101eS struct lpfc_name portName;
925dea3101eS struct lpfc_name nodeName;
926dea3101eS union {
927dea3101eS RNID_TOP_DISC topologyDisc; /* topology disc (0xdf) */
928dea3101eS } un;
92900c2cae6SArnd Bergmann } RNID;
930dea3101eS
93112265f68SJames Smart struct RLS { /* Structure is in Big Endian format */
93212265f68SJames Smart uint32_t rls;
93312265f68SJames Smart #define rls_rsvd_SHIFT 24
93412265f68SJames Smart #define rls_rsvd_MASK 0x000000ff
93512265f68SJames Smart #define rls_rsvd_WORD rls
93612265f68SJames Smart #define rls_did_SHIFT 0
93712265f68SJames Smart #define rls_did_MASK 0x00ffffff
93812265f68SJames Smart #define rls_did_WORD rls
93912265f68SJames Smart };
94012265f68SJames Smart
94112265f68SJames Smart struct RLS_RSP { /* Structure is in Big Endian format */
94212265f68SJames Smart uint32_t linkFailureCnt;
94312265f68SJames Smart uint32_t lossSyncCnt;
94412265f68SJames Smart uint32_t lossSignalCnt;
94512265f68SJames Smart uint32_t primSeqErrCnt;
94612265f68SJames Smart uint32_t invalidXmitWord;
94712265f68SJames Smart uint32_t crcCnt;
94812265f68SJames Smart };
94912265f68SJames Smart
95019ca7609SJames Smart struct RRQ { /* Structure is in Big Endian format */
95119ca7609SJames Smart uint32_t rrq;
95219ca7609SJames Smart #define rrq_rsvd_SHIFT 24
95319ca7609SJames Smart #define rrq_rsvd_MASK 0x000000ff
95419ca7609SJames Smart #define rrq_rsvd_WORD rrq
95519ca7609SJames Smart #define rrq_did_SHIFT 0
95619ca7609SJames Smart #define rrq_did_MASK 0x00ffffff
95719ca7609SJames Smart #define rrq_did_WORD rrq
95819ca7609SJames Smart uint32_t rrq_exchg;
95919ca7609SJames Smart #define rrq_oxid_SHIFT 16
96019ca7609SJames Smart #define rrq_oxid_MASK 0xffff
96119ca7609SJames Smart #define rrq_oxid_WORD rrq_exchg
96219ca7609SJames Smart #define rrq_rxid_SHIFT 0
96319ca7609SJames Smart #define rrq_rxid_MASK 0xffff
96419ca7609SJames Smart #define rrq_rxid_WORD rrq_exchg
96519ca7609SJames Smart };
96619ca7609SJames Smart
967912e3acdSJames Smart #define LPFC_MAX_VFN_PER_PFN 255 /* Maximum VFs allowed per ARI */
968912e3acdSJames Smart #define LPFC_DEF_VFN_PER_PFN 0 /* Default VFs due to platform limitation*/
96919ca7609SJames Smart
97012265f68SJames Smart struct RTV_RSP { /* Structure is in Big Endian format */
97112265f68SJames Smart uint32_t ratov;
97212265f68SJames Smart uint32_t edtov;
97312265f68SJames Smart uint32_t qtov;
97412265f68SJames Smart #define qtov_rsvd0_SHIFT 28
97512265f68SJames Smart #define qtov_rsvd0_MASK 0x0000000f
97612265f68SJames Smart #define qtov_rsvd0_WORD qtov /* reserved */
97712265f68SJames Smart #define qtov_edtovres_SHIFT 27
97812265f68SJames Smart #define qtov_edtovres_MASK 0x00000001
97912265f68SJames Smart #define qtov_edtovres_WORD qtov /* E_D_TOV Resolution */
98012265f68SJames Smart #define qtov__rsvd1_SHIFT 19
98112265f68SJames Smart #define qtov_rsvd1_MASK 0x0000003f
98212265f68SJames Smart #define qtov_rsvd1_WORD qtov /* reserved */
98312265f68SJames Smart #define qtov_rttov_SHIFT 18
98412265f68SJames Smart #define qtov_rttov_MASK 0x00000001
98512265f68SJames Smart #define qtov_rttov_WORD qtov /* R_T_TOV value */
98612265f68SJames Smart #define qtov_rsvd2_SHIFT 0
98712265f68SJames Smart #define qtov_rsvd2_MASK 0x0003ffff
98812265f68SJames Smart #define qtov_rsvd2_WORD qtov /* reserved */
98912265f68SJames Smart };
99012265f68SJames Smart
99112265f68SJames Smart
9927bb3b137SJamie Wellnitz typedef struct _RPL { /* Structure is in Big Endian format */
9937bb3b137SJamie Wellnitz uint32_t maxsize;
9947bb3b137SJamie Wellnitz uint32_t index;
9957bb3b137SJamie Wellnitz } RPL;
9967bb3b137SJamie Wellnitz
9977bb3b137SJamie Wellnitz typedef struct _PORT_NUM_BLK {
9987bb3b137SJamie Wellnitz uint32_t portNum;
9997bb3b137SJamie Wellnitz uint32_t portID;
10007bb3b137SJamie Wellnitz struct lpfc_name portName;
10017bb3b137SJamie Wellnitz } PORT_NUM_BLK;
10027bb3b137SJamie Wellnitz
10037bb3b137SJamie Wellnitz typedef struct _RPL_RSP { /* Structure is in Big Endian format */
10047bb3b137SJamie Wellnitz uint32_t listLen;
10057bb3b137SJamie Wellnitz uint32_t index;
10067bb3b137SJamie Wellnitz PORT_NUM_BLK port_num_blk;
10077bb3b137SJamie Wellnitz } RPL_RSP;
1008dea3101eS
1009dea3101eS /* This is used for RSCN command */
1010dea3101eS typedef struct _D_ID { /* Structure is in Big Endian format */
1011dea3101eS union {
1012dea3101eS uint32_t word;
1013dea3101eS struct {
1014dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
1015dea3101eS uint8_t resv;
1016dea3101eS uint8_t domain;
1017dea3101eS uint8_t area;
1018dea3101eS uint8_t id;
1019dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
1020dea3101eS uint8_t id;
1021dea3101eS uint8_t area;
1022dea3101eS uint8_t domain;
1023dea3101eS uint8_t resv;
1024dea3101eS #endif
1025dea3101eS } b;
1026dea3101eS } un;
1027dea3101eS } D_ID;
1028dea3101eS
1029eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_PORT 0x0
1030eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_AREA 0x1
1031eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_DOMAIN 0x2
1032eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_FABRIC 0x3
1033eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_MASK 0x3
1034eaf15d5bSJames Smart
1035dea3101eS /*
1036dea3101eS * Structure to define all ELS Payload types
1037dea3101eS */
1038dea3101eS
1039dea3101eS typedef struct _ELS_PKT { /* Structure is in Big Endian format */
1040dea3101eS uint8_t elsCode; /* FC Word 0, bit 24:31 */
1041dea3101eS uint8_t elsByte1;
1042dea3101eS uint8_t elsByte2;
1043dea3101eS uint8_t elsByte3;
1044dea3101eS union {
1045dea3101eS struct ls_rjt lsRjt; /* Payload for LS_RJT ELS response */
1046dea3101eS struct serv_parm logi; /* Payload for PLOGI/FLOGI/PDISC/ACC */
1047dea3101eS LOGO logo; /* Payload for PLOGO/FLOGO/ACC */
1048dea3101eS PRLI prli; /* Payload for PRLI/ACC */
1049dea3101eS PRLO prlo; /* Payload for PRLO/ACC */
1050dea3101eS ADISC adisc; /* Payload for ADISC/ACC */
1051dea3101eS FARP farp; /* Payload for FARP/ACC */
1052dea3101eS FAN fan; /* Payload for FAN */
1053dea3101eS SCR scr; /* Payload for SCR/ACC */
1054dea3101eS RNID rnid; /* Payload for RNID */
1055dea3101eS uint8_t pad[128 - 4]; /* Pad out to payload of 128 bytes */
1056dea3101eS } un;
1057dea3101eS } ELS_PKT;
1058dea3101eS
10598b017a30SJames Smart /*
10608b017a30SJames Smart * Link Cable Beacon (LCB) ELS Frame
10618b017a30SJames Smart */
10628b017a30SJames Smart
10638b017a30SJames Smart struct fc_lcb_request_frame {
10648b017a30SJames Smart uint32_t lcb_command; /* ELS command opcode (0x81) */
10658b017a30SJames Smart uint8_t lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */
10668b017a30SJames Smart #define LPFC_LCB_ON 0x1
10678b017a30SJames Smart #define LPFC_LCB_OFF 0x2
106866e9e6bfSJames Smart uint8_t reserved[2];
106966e9e6bfSJames Smart uint8_t capability; /* LCB Payload Word 1, bit 0:7 */
10708b017a30SJames Smart uint8_t lcb_type; /* LCB Payload Word 2, bit 24:31 */
10718b017a30SJames Smart #define LPFC_LCB_GREEN 0x1
10728b017a30SJames Smart #define LPFC_LCB_AMBER 0x2
10738b017a30SJames Smart uint8_t lcb_frequency; /* LCB Payload Word 2, bit 16:23 */
107466e9e6bfSJames Smart #define LCB_CAPABILITY_DURATION 1
107566e9e6bfSJames Smart #define BEACON_VERSION_V1 1
107666e9e6bfSJames Smart #define BEACON_VERSION_V0 0
10778b017a30SJames Smart uint16_t lcb_duration; /* LCB Payload Word 2, bit 15:0 */
10788b017a30SJames Smart };
10798b017a30SJames Smart
10808b017a30SJames Smart /*
10818b017a30SJames Smart * Link Cable Beacon (LCB) ELS Response Frame
10828b017a30SJames Smart */
10838b017a30SJames Smart struct fc_lcb_res_frame {
10848b017a30SJames Smart uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */
10858b017a30SJames Smart uint8_t lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */
108666e9e6bfSJames Smart uint8_t reserved[2];
108766e9e6bfSJames Smart uint8_t capability; /* LCB Payload Word 1, bit 0:7 */
10888b017a30SJames Smart uint8_t lcb_type; /* LCB Payload Word 2, bit 24:31 */
10898b017a30SJames Smart uint8_t lcb_frequency; /* LCB Payload Word 2, bit 16:23 */
10908b017a30SJames Smart uint16_t lcb_duration; /* LCB Payload Word 2, bit 15:0 */
10918b017a30SJames Smart };
10928b017a30SJames Smart
109386478875SJames Smart /*
109486478875SJames Smart * Read Diagnostic Parameters (RDP) ELS frame.
109586478875SJames Smart */
109686478875SJames Smart #define SFF_PG0_IDENT_SFP 0x3
109786478875SJames Smart
109886478875SJames Smart #define SFP_FLAG_PT_OPTICAL 0x0
109986478875SJames Smart #define SFP_FLAG_PT_SWLASER 0x01
110086478875SJames Smart #define SFP_FLAG_PT_LWLASER_LC1310 0x02
110186478875SJames Smart #define SFP_FLAG_PT_LWLASER_LL1550 0x03
110286478875SJames Smart #define SFP_FLAG_PT_MASK 0x0F
110386478875SJames Smart #define SFP_FLAG_PT_SHIFT 0
110486478875SJames Smart
110586478875SJames Smart #define SFP_FLAG_IS_OPTICAL_PORT 0x01
110686478875SJames Smart #define SFP_FLAG_IS_OPTICAL_MASK 0x010
110786478875SJames Smart #define SFP_FLAG_IS_OPTICAL_SHIFT 4
110886478875SJames Smart
110986478875SJames Smart #define SFP_FLAG_IS_DESC_VALID 0x01
111086478875SJames Smart #define SFP_FLAG_IS_DESC_VALID_MASK 0x020
111186478875SJames Smart #define SFP_FLAG_IS_DESC_VALID_SHIFT 5
111286478875SJames Smart
111386478875SJames Smart #define SFP_FLAG_CT_UNKNOWN 0x0
111486478875SJames Smart #define SFP_FLAG_CT_SFP_PLUS 0x01
111586478875SJames Smart #define SFP_FLAG_CT_MASK 0x3C
111686478875SJames Smart #define SFP_FLAG_CT_SHIFT 6
111786478875SJames Smart
111886478875SJames Smart struct fc_rdp_port_name_info {
111986478875SJames Smart uint8_t wwnn[8];
112086478875SJames Smart uint8_t wwpn[8];
112186478875SJames Smart };
112286478875SJames Smart
112386478875SJames Smart
112486478875SJames Smart /*
112586478875SJames Smart * Link Error Status Block Structure (FC-FS-3) for RDP
112686478875SJames Smart * This similar to RPS ELS
112786478875SJames Smart */
112886478875SJames Smart struct fc_link_status {
112986478875SJames Smart uint32_t link_failure_cnt;
113086478875SJames Smart uint32_t loss_of_synch_cnt;
113186478875SJames Smart uint32_t loss_of_signal_cnt;
113286478875SJames Smart uint32_t primitive_seq_proto_err;
113386478875SJames Smart uint32_t invalid_trans_word;
113486478875SJames Smart uint32_t invalid_crc_cnt;
113586478875SJames Smart
113686478875SJames Smart };
113786478875SJames Smart
113886478875SJames Smart #define RDP_PORT_NAMES_DESC_TAG 0x00010003
113986478875SJames Smart struct fc_rdp_port_name_desc {
114086478875SJames Smart uint32_t tag; /* 0001 0003h */
114186478875SJames Smart uint32_t length; /* set to size of payload struct */
114286478875SJames Smart struct fc_rdp_port_name_info port_names;
114386478875SJames Smart };
114486478875SJames Smart
114586478875SJames Smart
11464258e98eSJames Smart struct fc_rdp_fec_info {
11474258e98eSJames Smart uint32_t CorrectedBlocks;
11484258e98eSJames Smart uint32_t UncorrectableBlocks;
11494258e98eSJames Smart };
11504258e98eSJames Smart
11514258e98eSJames Smart #define RDP_FEC_DESC_TAG 0x00010005
11524258e98eSJames Smart struct fc_fec_rdp_desc {
11534258e98eSJames Smart uint32_t tag;
11544258e98eSJames Smart uint32_t length;
11554258e98eSJames Smart struct fc_rdp_fec_info info;
11564258e98eSJames Smart };
11574258e98eSJames Smart
115886478875SJames Smart struct fc_rdp_link_error_status_payload_info {
115986478875SJames Smart struct fc_link_status link_status; /* 24 bytes */
116086478875SJames Smart uint32_t port_type; /* bits 31-30 only */
116186478875SJames Smart };
116286478875SJames Smart
116386478875SJames Smart #define RDP_LINK_ERROR_STATUS_DESC_TAG 0x00010002
116486478875SJames Smart struct fc_rdp_link_error_status_desc {
116586478875SJames Smart uint32_t tag; /* 0001 0002h */
116686478875SJames Smart uint32_t length; /* set to size of payload struct */
116786478875SJames Smart struct fc_rdp_link_error_status_payload_info info;
116886478875SJames Smart };
116986478875SJames Smart
117086478875SJames Smart #define VN_PT_PHY_UNKNOWN 0x00
117186478875SJames Smart #define VN_PT_PHY_PF_PORT 0x01
117286478875SJames Smart #define VN_PT_PHY_ETH_MAC 0x10
117386478875SJames Smart #define VN_PT_PHY_SHIFT 30
117486478875SJames Smart
117586478875SJames Smart #define RDP_PS_1GB 0x8000
117686478875SJames Smart #define RDP_PS_2GB 0x4000
117786478875SJames Smart #define RDP_PS_4GB 0x2000
117886478875SJames Smart #define RDP_PS_10GB 0x1000
117986478875SJames Smart #define RDP_PS_8GB 0x0800
118086478875SJames Smart #define RDP_PS_16GB 0x0400
118186478875SJames Smart #define RDP_PS_32GB 0x0200
1182fbd8a6baSJames Smart #define RDP_PS_64GB 0x0100
1183fbd8a6baSJames Smart #define RDP_PS_128GB 0x0080
1184fbd8a6baSJames Smart #define RDP_PS_256GB 0x0040
118586478875SJames Smart
118656204984SJames Smart #define RDP_CAP_USER_CONFIGURED 0x0002
118786478875SJames Smart #define RDP_CAP_UNKNOWN 0x0001
118886478875SJames Smart #define RDP_PS_UNKNOWN 0x0002
118986478875SJames Smart #define RDP_PS_NOT_ESTABLISHED 0x0001
119086478875SJames Smart
119186478875SJames Smart struct fc_rdp_port_speed {
119286478875SJames Smart uint16_t capabilities;
119386478875SJames Smart uint16_t speed;
119486478875SJames Smart };
119586478875SJames Smart
119686478875SJames Smart struct fc_rdp_port_speed_info {
119786478875SJames Smart struct fc_rdp_port_speed port_speed;
119886478875SJames Smart };
119986478875SJames Smart
120086478875SJames Smart #define RDP_PORT_SPEED_DESC_TAG 0x00010001
120186478875SJames Smart struct fc_rdp_port_speed_desc {
120286478875SJames Smart uint32_t tag; /* 00010001h */
120386478875SJames Smart uint32_t length; /* set to size of payload struct */
120486478875SJames Smart struct fc_rdp_port_speed_info info;
120586478875SJames Smart };
120686478875SJames Smart
120786478875SJames Smart #define RDP_NPORT_ID_SIZE 4
120886478875SJames Smart #define RDP_N_PORT_DESC_TAG 0x00000003
120986478875SJames Smart struct fc_rdp_nport_desc {
121086478875SJames Smart uint32_t tag; /* 0000 0003h, big endian */
121186478875SJames Smart uint32_t length; /* size of RDP_N_PORT_ID struct */
121286478875SJames Smart uint32_t nport_id : 12;
121386478875SJames Smart uint32_t reserved : 8;
121486478875SJames Smart };
121586478875SJames Smart
121686478875SJames Smart
121786478875SJames Smart struct fc_rdp_link_service_info {
121886478875SJames Smart uint32_t els_req; /* Request payload word 0 value.*/
121986478875SJames Smart };
122086478875SJames Smart
122186478875SJames Smart #define RDP_LINK_SERVICE_DESC_TAG 0x00000001
122286478875SJames Smart struct fc_rdp_link_service_desc {
122386478875SJames Smart uint32_t tag; /* Descriptor tag 1 */
122486478875SJames Smart uint32_t length; /* set to size of payload struct. */
122586478875SJames Smart struct fc_rdp_link_service_info payload;
122686478875SJames Smart /* must be ELS req Word 0(0x18) */
122786478875SJames Smart };
122886478875SJames Smart
122986478875SJames Smart struct fc_rdp_sfp_info {
123086478875SJames Smart uint16_t temperature;
123186478875SJames Smart uint16_t vcc;
123286478875SJames Smart uint16_t tx_bias;
123386478875SJames Smart uint16_t tx_power;
123486478875SJames Smart uint16_t rx_power;
123586478875SJames Smart uint16_t flags;
123686478875SJames Smart };
123786478875SJames Smart
123886478875SJames Smart #define RDP_SFP_DESC_TAG 0x00010000
123986478875SJames Smart struct fc_rdp_sfp_desc {
124086478875SJames Smart uint32_t tag;
124186478875SJames Smart uint32_t length; /* set to size of sfp_info struct */
124286478875SJames Smart struct fc_rdp_sfp_info sfp_info;
124386478875SJames Smart };
124486478875SJames Smart
124556204984SJames Smart /* Buffer Credit Descriptor */
124656204984SJames Smart struct fc_rdp_bbc_info {
124756204984SJames Smart uint32_t port_bbc; /* FC_Port buffer-to-buffer credit */
124856204984SJames Smart uint32_t attached_port_bbc;
124956204984SJames Smart uint32_t rtt; /* Round trip time */
125056204984SJames Smart };
125156204984SJames Smart #define RDP_BBC_DESC_TAG 0x00010006
125256204984SJames Smart struct fc_rdp_bbc_desc {
125356204984SJames Smart uint32_t tag;
125456204984SJames Smart uint32_t length;
125556204984SJames Smart struct fc_rdp_bbc_info bbc_info;
125656204984SJames Smart };
125756204984SJames Smart
1258310429efSJames Smart /* Optical Element Type Transgression Flags */
1259310429efSJames Smart #define RDP_OET_LOW_WARNING 0x1
1260310429efSJames Smart #define RDP_OET_HIGH_WARNING 0x2
1261310429efSJames Smart #define RDP_OET_LOW_ALARM 0x4
1262310429efSJames Smart #define RDP_OET_HIGH_ALARM 0x8
1263310429efSJames Smart
126456204984SJames Smart #define RDP_OED_TEMPERATURE 0x1
126556204984SJames Smart #define RDP_OED_VOLTAGE 0x2
126656204984SJames Smart #define RDP_OED_TXBIAS 0x3
126756204984SJames Smart #define RDP_OED_TXPOWER 0x4
126856204984SJames Smart #define RDP_OED_RXPOWER 0x5
126956204984SJames Smart
127056204984SJames Smart #define RDP_OED_TYPE_SHIFT 28
127156204984SJames Smart /* Optical Element Data descriptor */
127256204984SJames Smart struct fc_rdp_oed_info {
127356204984SJames Smart uint16_t hi_alarm;
127456204984SJames Smart uint16_t lo_alarm;
127556204984SJames Smart uint16_t hi_warning;
127656204984SJames Smart uint16_t lo_warning;
127756204984SJames Smart uint32_t function_flags;
127856204984SJames Smart };
127956204984SJames Smart #define RDP_OED_DESC_TAG 0x00010007
128056204984SJames Smart struct fc_rdp_oed_sfp_desc {
128156204984SJames Smart uint32_t tag;
128256204984SJames Smart uint32_t length;
128356204984SJames Smart struct fc_rdp_oed_info oed_info;
128456204984SJames Smart };
128556204984SJames Smart
128656204984SJames Smart /* Optical Product Data descriptor */
128756204984SJames Smart struct fc_rdp_opd_sfp_info {
128856204984SJames Smart uint8_t vendor_name[16];
128956204984SJames Smart uint8_t model_number[16];
129056204984SJames Smart uint8_t serial_number[16];
1291a0f2d3efSJames Smart uint8_t revision[4];
129256204984SJames Smart uint8_t date[8];
129356204984SJames Smart };
129456204984SJames Smart
129556204984SJames Smart #define RDP_OPD_DESC_TAG 0x00010008
129656204984SJames Smart struct fc_rdp_opd_sfp_desc {
129756204984SJames Smart uint32_t tag;
129856204984SJames Smart uint32_t length;
129956204984SJames Smart struct fc_rdp_opd_sfp_info opd_info;
130056204984SJames Smart };
130156204984SJames Smart
130286478875SJames Smart struct fc_rdp_req_frame {
130386478875SJames Smart uint32_t rdp_command; /* ELS command opcode (0x18)*/
130486478875SJames Smart uint32_t rdp_des_length; /* RDP Payload Word 1 */
130586478875SJames Smart struct fc_rdp_nport_desc nport_id_desc; /* RDP Payload Word 2 - 4 */
130686478875SJames Smart };
130786478875SJames Smart
130886478875SJames Smart
130986478875SJames Smart struct fc_rdp_res_frame {
131086478875SJames Smart uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */
131186478875SJames Smart uint32_t length; /* FC Word 1 */
131286478875SJames Smart struct fc_rdp_link_service_desc link_service_desc; /* Word 2 -4 */
131386478875SJames Smart struct fc_rdp_sfp_desc sfp_desc; /* Word 5 -9 */
131486478875SJames Smart struct fc_rdp_port_speed_desc portspeed_desc; /* Word 10 -12 */
131586478875SJames Smart struct fc_rdp_link_error_status_desc link_error_desc; /* Word 13 -21 */
131686478875SJames Smart struct fc_rdp_port_name_desc diag_port_names_desc; /* Word 22 -27 */
131786478875SJames Smart struct fc_rdp_port_name_desc attached_port_names_desc;/* Word 28 -33 */
13186c92d1d0SJames Smart struct fc_fec_rdp_desc fec_desc; /* FC word 34-37*/
13196c92d1d0SJames Smart struct fc_rdp_bbc_desc bbc_desc; /* FC Word 38-42*/
13206c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_temp_desc; /* FC Word 43-47*/
13216c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_voltage_desc; /* FC word 48-52*/
13226c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_txbias_desc; /* FC word 53-57*/
13236c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_txpower_desc; /* FC word 58-62*/
13246c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_rxpower_desc; /* FC word 63-67*/
13256c92d1d0SJames Smart struct fc_rdp_opd_sfp_desc opd_desc; /* FC word 68-84*/
132686478875SJames Smart };
132786478875SJames Smart
132886478875SJames Smart
132902169e84SGaurav Srivastava /* UVEM */
133002169e84SGaurav Srivastava
133102169e84SGaurav Srivastava #define LPFC_UVEM_SIZE 60
133202169e84SGaurav Srivastava #define LPFC_UVEM_VEM_ID_DESC_SIZE 16
133302169e84SGaurav Srivastava #define LPFC_UVEM_VE_MAP_DESC_SIZE 20
133402169e84SGaurav Srivastava
133502169e84SGaurav Srivastava #define VEM_ID_DESC_TAG 0x0001000A
133602169e84SGaurav Srivastava struct lpfc_vem_id_desc {
133702169e84SGaurav Srivastava uint32_t tag;
133802169e84SGaurav Srivastava uint32_t length;
133902169e84SGaurav Srivastava uint8_t vem_id[16];
134002169e84SGaurav Srivastava };
134102169e84SGaurav Srivastava
134202169e84SGaurav Srivastava #define LPFC_QFPA_SIZE 4
134302169e84SGaurav Srivastava
134402169e84SGaurav Srivastava #define INSTANTIATED_VE_DESC_TAG 0x0001000B
134502169e84SGaurav Srivastava struct instantiated_ve_desc {
134602169e84SGaurav Srivastava uint32_t tag;
134702169e84SGaurav Srivastava uint32_t length;
134802169e84SGaurav Srivastava uint8_t global_vem_id[16];
134902169e84SGaurav Srivastava uint32_t word6;
135002169e84SGaurav Srivastava #define lpfc_instantiated_local_id_SHIFT 0
135102169e84SGaurav Srivastava #define lpfc_instantiated_local_id_MASK 0x000000ff
135202169e84SGaurav Srivastava #define lpfc_instantiated_local_id_WORD word6
135302169e84SGaurav Srivastava #define lpfc_instantiated_nport_id_SHIFT 8
135402169e84SGaurav Srivastava #define lpfc_instantiated_nport_id_MASK 0x00ffffff
135502169e84SGaurav Srivastava #define lpfc_instantiated_nport_id_WORD word6
135602169e84SGaurav Srivastava };
135702169e84SGaurav Srivastava
135802169e84SGaurav Srivastava #define DEINSTANTIATED_VE_DESC_TAG 0x0001000C
135902169e84SGaurav Srivastava struct deinstantiated_ve_desc {
136002169e84SGaurav Srivastava uint32_t tag;
136102169e84SGaurav Srivastava uint32_t length;
136202169e84SGaurav Srivastava uint8_t global_vem_id[16];
136302169e84SGaurav Srivastava uint32_t word6;
136402169e84SGaurav Srivastava #define lpfc_deinstantiated_nport_id_SHIFT 0
136502169e84SGaurav Srivastava #define lpfc_deinstantiated_nport_id_MASK 0x000000ff
136602169e84SGaurav Srivastava #define lpfc_deinstantiated_nport_id_WORD word6
136702169e84SGaurav Srivastava #define lpfc_deinstantiated_local_id_SHIFT 24
136802169e84SGaurav Srivastava #define lpfc_deinstantiated_local_id_MASK 0x00ffffff
136902169e84SGaurav Srivastava #define lpfc_deinstantiated_local_id_WORD word6
137002169e84SGaurav Srivastava };
137102169e84SGaurav Srivastava
137202169e84SGaurav Srivastava /* Query Fabric Priority Allocation Response */
137302169e84SGaurav Srivastava #define LPFC_PRIORITY_RANGE_DESC_SIZE 12
137402169e84SGaurav Srivastava
137502169e84SGaurav Srivastava struct priority_range_desc {
137602169e84SGaurav Srivastava uint32_t tag;
137702169e84SGaurav Srivastava uint32_t length;
137802169e84SGaurav Srivastava uint8_t lo_range;
137902169e84SGaurav Srivastava uint8_t hi_range;
138002169e84SGaurav Srivastava uint8_t qos_priority;
138102169e84SGaurav Srivastava uint8_t local_ve_id;
138202169e84SGaurav Srivastava };
138302169e84SGaurav Srivastava
138402169e84SGaurav Srivastava struct fc_qfpa_res {
138502169e84SGaurav Srivastava uint32_t reply_sequence; /* LS_ACC or LS_RJT */
138602169e84SGaurav Srivastava uint32_t length; /* FC Word 1 */
138702169e84SGaurav Srivastava struct priority_range_desc desc[1];
138802169e84SGaurav Srivastava };
138902169e84SGaurav Srivastava
139002169e84SGaurav Srivastava /* Application Server command code */
139102169e84SGaurav Srivastava /* VMID */
139202169e84SGaurav Srivastava
139302169e84SGaurav Srivastava #define SLI_CT_APP_SEV_Subtypes 0x20 /* Application Server subtype */
139402169e84SGaurav Srivastava
139502169e84SGaurav Srivastava #define SLI_CTAS_GAPPIA_ENT 0x0100 /* Get Application Identifier */
139602169e84SGaurav Srivastava #define SLI_CTAS_GALLAPPIA 0x0101 /* Get All Application Identifier */
139702169e84SGaurav Srivastava #define SLI_CTAS_GALLAPPIA_ID 0x0102 /* Get All Application Identifier */
139802169e84SGaurav Srivastava /* for Nport */
139902169e84SGaurav Srivastava #define SLI_CTAS_GAPPIA_IDAPP 0x0103 /* Get Application Identifier */
140002169e84SGaurav Srivastava /* for Nport */
140102169e84SGaurav Srivastava #define SLI_CTAS_RAPP_IDENT 0x0200 /* Register Application Identifier */
140202169e84SGaurav Srivastava #define SLI_CTAS_DAPP_IDENT 0x0300 /* Deregister Application */
140302169e84SGaurav Srivastava /* Identifier */
140402169e84SGaurav Srivastava #define SLI_CTAS_DALLAPP_ID 0x0301 /* Deregister All Application */
140502169e84SGaurav Srivastava /* Identifier */
140602169e84SGaurav Srivastava
140702169e84SGaurav Srivastava struct entity_id_object {
140802169e84SGaurav Srivastava uint8_t entity_id_len;
140902169e84SGaurav Srivastava uint8_t entity_id[255]; /* VM UUID */
141002169e84SGaurav Srivastava };
141102169e84SGaurav Srivastava
141202169e84SGaurav Srivastava struct app_id_object {
14136e8a669eSJustin Tee __be32 port_id;
14146e8a669eSJustin Tee __be32 app_id;
141502169e84SGaurav Srivastava struct entity_id_object obj;
141602169e84SGaurav Srivastava };
141702169e84SGaurav Srivastava
141802169e84SGaurav Srivastava struct lpfc_vmid_rapp_ident_list {
14196e8a669eSJustin Tee __be32 no_of_objects;
1420e90644b0SGustavo A. R. Silva struct entity_id_object obj[];
142102169e84SGaurav Srivastava };
142202169e84SGaurav Srivastava
142302169e84SGaurav Srivastava struct lpfc_vmid_dapp_ident_list {
14246e8a669eSJustin Tee __be32 no_of_objects;
1425e90644b0SGustavo A. R. Silva struct entity_id_object obj[];
142602169e84SGaurav Srivastava };
142702169e84SGaurav Srivastava
142802169e84SGaurav Srivastava #define GALLAPPIA_ID_LAST 0x80
142902169e84SGaurav Srivastava struct lpfc_vmid_gallapp_ident_list {
143002169e84SGaurav Srivastava uint8_t control;
143102169e84SGaurav Srivastava uint8_t reserved[3];
143202169e84SGaurav Srivastava struct app_id_object app_id;
143302169e84SGaurav Srivastava };
143402169e84SGaurav Srivastava
143502169e84SGaurav Srivastava #define RAPP_IDENT_OFFSET (offsetof(struct lpfc_sli_ct_request, un) + 4)
143602169e84SGaurav Srivastava #define DAPP_IDENT_OFFSET (offsetof(struct lpfc_sli_ct_request, un) + 4)
143702169e84SGaurav Srivastava #define GALLAPPIA_ID_SIZE (offsetof(struct lpfc_sli_ct_request, un) + 4)
143802169e84SGaurav Srivastava #define DALLAPP_ID_SIZE (offsetof(struct lpfc_sli_ct_request, un) + 4)
143902169e84SGaurav Srivastava
144076b2c34aSJames Smart /******** FDMI ********/
144176b2c34aSJames Smart
144276b2c34aSJames Smart /* lpfc_sli_ct_request defines the CT_IU preamble for FDMI commands */
144376b2c34aSJames Smart #define SLI_CT_FDMI_Subtypes 0x10 /* Management Service Subtype */
1444dea3101eS
144576b2c34aSJames Smart /* Definitions for HBA / Port attribute entries */
144676b2c34aSJames Smart
1447045c58c8SJames Smart /* Attribute Entry Structures */
1448045c58c8SJames Smart
1449045c58c8SJames Smart struct lpfc_fdmi_attr_u32 {
1450045c58c8SJames Smart __be16 type;
1451045c58c8SJames Smart __be16 len;
1452045c58c8SJames Smart __be32 value_u32;
145376b2c34aSJames Smart };
145476b2c34aSJames Smart
1455045c58c8SJames Smart struct lpfc_fdmi_attr_wwn {
1456045c58c8SJames Smart __be16 type;
1457045c58c8SJames Smart __be16 len;
1458045c58c8SJames Smart
1459045c58c8SJames Smart /* Keep as u8[8] instead of __be64 to avoid accidental zero padding
1460045c58c8SJames Smart * by compiler
1461045c58c8SJames Smart */
1462045c58c8SJames Smart u8 name[8];
1463045c58c8SJames Smart };
1464045c58c8SJames Smart
1465045c58c8SJames Smart struct lpfc_fdmi_attr_fullwwn {
1466045c58c8SJames Smart __be16 type;
1467045c58c8SJames Smart __be16 len;
1468045c58c8SJames Smart
1469045c58c8SJames Smart /* Keep as u8[8] instead of __be64 to avoid accidental zero padding
1470045c58c8SJames Smart * by compiler
1471045c58c8SJames Smart */
1472045c58c8SJames Smart u8 nname[8];
1473045c58c8SJames Smart u8 pname[8];
1474045c58c8SJames Smart };
1475045c58c8SJames Smart
1476045c58c8SJames Smart struct lpfc_fdmi_attr_fc4types {
1477045c58c8SJames Smart __be16 type;
1478045c58c8SJames Smart __be16 len;
1479045c58c8SJames Smart u8 value_types[32];
1480045c58c8SJames Smart };
1481045c58c8SJames Smart
1482045c58c8SJames Smart struct lpfc_fdmi_attr_string {
1483045c58c8SJames Smart __be16 type;
1484045c58c8SJames Smart __be16 len;
1485045c58c8SJames Smart char value_string[256];
1486045c58c8SJames Smart };
1487045c58c8SJames Smart
1488045c58c8SJames Smart /* Maximum FDMI attribute length is Type+Len (4 bytes) + 256 byte string */
1489045c58c8SJames Smart #define FDMI_MAX_ATTRLEN sizeof(struct lpfc_fdmi_attr_string)
1490dea3101eS
1491dea3101eS /*
1492dea3101eS * HBA Attribute Block
1493dea3101eS */
149476b2c34aSJames Smart struct lpfc_fdmi_attr_block {
1495dea3101eS uint32_t EntryCnt; /* Number of HBA attribute entries */
1496045c58c8SJames Smart /* Variable Length Attribute Entry TLV's follow */
149776b2c34aSJames Smart };
1498dea3101eS
1499dea3101eS /*
1500dea3101eS * Port Entry
1501dea3101eS */
150276b2c34aSJames Smart struct lpfc_fdmi_port_entry {
1503dea3101eS struct lpfc_name PortName;
150476b2c34aSJames Smart };
1505dea3101eS
1506dea3101eS /*
1507dea3101eS * HBA Identifier
1508dea3101eS */
150976b2c34aSJames Smart struct lpfc_fdmi_hba_ident {
1510dea3101eS struct lpfc_name PortName;
151176b2c34aSJames Smart };
1512dea3101eS
1513dea3101eS /*
15144cb9e1ddSJames Smart * Registered Port List Format
15154cb9e1ddSJames Smart */
15164cb9e1ddSJames Smart struct lpfc_fdmi_reg_port_list {
15176e8a669eSJustin Tee __be32 EntryCnt;
15184cb9e1ddSJames Smart struct lpfc_fdmi_port_entry pe;
151900c2cae6SArnd Bergmann };
15204cb9e1ddSJames Smart
15214cb9e1ddSJames Smart /*
1522dea3101eS * Register HBA(RHBA)
1523dea3101eS */
152476b2c34aSJames Smart struct lpfc_fdmi_reg_hba {
152576b2c34aSJames Smart struct lpfc_fdmi_hba_ident hi;
15264cb9e1ddSJames Smart struct lpfc_fdmi_reg_port_list rpl;
152776b2c34aSJames Smart };
1528dea3101eS
1529b67b5944SJames Smart /******** MI MIB ********/
1530b67b5944SJames Smart #define SLI_CT_MIB_Subtypes 0x11
1531b67b5944SJames Smart
1532dea3101eS /*
1533dea3101eS * Register HBA Attributes (RHAT)
1534dea3101eS */
153576b2c34aSJames Smart struct lpfc_fdmi_reg_hbaattr {
1536dea3101eS struct lpfc_name HBA_PortName;
153776b2c34aSJames Smart struct lpfc_fdmi_attr_block ab;
153876b2c34aSJames Smart };
1539dea3101eS
1540dea3101eS /*
1541dea3101eS * Register Port Attributes (RPA)
1542dea3101eS */
154376b2c34aSJames Smart struct lpfc_fdmi_reg_portattr {
1544dea3101eS struct lpfc_name PortName;
154576b2c34aSJames Smart struct lpfc_fdmi_attr_block ab;
154676b2c34aSJames Smart };
1547dea3101eS
1548dea3101eS /*
154976b2c34aSJames Smart * HBA MAnagement Operations Command Codes
1550dea3101eS */
155176b2c34aSJames Smart #define SLI_MGMT_GRHL 0x100 /* Get registered HBA list */
155276b2c34aSJames Smart #define SLI_MGMT_GHAT 0x101 /* Get HBA attributes */
155376b2c34aSJames Smart #define SLI_MGMT_GRPL 0x102 /* Get registered Port list */
155476b2c34aSJames Smart #define SLI_MGMT_GPAT 0x110 /* Get Port attributes */
155576b2c34aSJames Smart #define SLI_MGMT_GPAS 0x120 /* Get Port Statistics */
155676b2c34aSJames Smart #define SLI_MGMT_RHBA 0x200 /* Register HBA */
155776b2c34aSJames Smart #define SLI_MGMT_RHAT 0x201 /* Register HBA attributes */
155876b2c34aSJames Smart #define SLI_MGMT_RPRT 0x210 /* Register Port */
155976b2c34aSJames Smart #define SLI_MGMT_RPA 0x211 /* Register Port attributes */
156076b2c34aSJames Smart #define SLI_MGMT_DHBA 0x300 /* De-register HBA */
156176b2c34aSJames Smart #define SLI_MGMT_DHAT 0x301 /* De-register HBA attributes */
156276b2c34aSJames Smart #define SLI_MGMT_DPRT 0x310 /* De-register Port */
156376b2c34aSJames Smart #define SLI_MGMT_DPA 0x311 /* De-register Port attributes */
1564dea3101eS
15654258e98eSJames Smart #define LPFC_FDMI_MAX_RETRY 3 /* Max retries for a FDMI command */
15664258e98eSJames Smart
1567dea3101eS /*
156876b2c34aSJames Smart * HBA Attribute Types
1569dea3101eS */
157076b2c34aSJames Smart #define RHBA_NODENAME 0x1 /* 8 byte WWNN */
157176b2c34aSJames Smart #define RHBA_MANUFACTURER 0x2 /* 4 to 64 byte ASCII string */
157276b2c34aSJames Smart #define RHBA_SERIAL_NUMBER 0x3 /* 4 to 64 byte ASCII string */
157376b2c34aSJames Smart #define RHBA_MODEL 0x4 /* 4 to 256 byte ASCII string */
157476b2c34aSJames Smart #define RHBA_MODEL_DESCRIPTION 0x5 /* 4 to 256 byte ASCII string */
157576b2c34aSJames Smart #define RHBA_HARDWARE_VERSION 0x6 /* 4 to 256 byte ASCII string */
157676b2c34aSJames Smart #define RHBA_DRIVER_VERSION 0x7 /* 4 to 256 byte ASCII string */
157776b2c34aSJames Smart #define RHBA_OPTION_ROM_VERSION 0x8 /* 4 to 256 byte ASCII string */
157876b2c34aSJames Smart #define RHBA_FIRMWARE_VERSION 0x9 /* 4 to 256 byte ASCII string */
157976b2c34aSJames Smart #define RHBA_OS_NAME_VERSION 0xa /* 4 to 256 byte ASCII string */
158076b2c34aSJames Smart #define RHBA_MAX_CT_PAYLOAD_LEN 0xb /* 32-bit unsigned int */
158176b2c34aSJames Smart #define RHBA_SYM_NODENAME 0xc /* 4 to 256 byte ASCII string */
15824258e98eSJames Smart #define RHBA_VENDOR_INFO 0xd /* 32-bit unsigned int */
15834258e98eSJames Smart #define RHBA_NUM_PORTS 0xe /* 32-bit unsigned int */
15844258e98eSJames Smart #define RHBA_FABRIC_WWNN 0xf /* 8 byte WWNN */
15854258e98eSJames Smart #define RHBA_BIOS_VERSION 0x10 /* 4 to 256 byte ASCII string */
15864258e98eSJames Smart #define RHBA_BIOS_STATE 0x11 /* 32-bit unsigned int */
15874258e98eSJames Smart #define RHBA_VENDOR_ID 0xe0 /* 8 byte ASCII string */
15884258e98eSJames Smart
15894258e98eSJames Smart /* Bit mask for all individual HBA attributes */
15904258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_wwnn 0x00000001
15914258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_manufacturer 0x00000002
15924258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_sn 0x00000004
15934258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_model 0x00000008
15944258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_description 0x00000010
15954258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_hdw_ver 0x00000020
15964258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_drvr_ver 0x00000040
15974258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_rom_ver 0x00000080
15984258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_fmw_ver 0x00000100
15994258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_os_ver 0x00000200
16004258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_ct_len 0x00000400
16014258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_symbolic_name 0x00000800
16024258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_vendor_info 0x00001000 /* Not used */
16034258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_num_ports 0x00002000
16044258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_fabric_wwnn 0x00004000
16054258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_bios_ver 0x00008000
16064258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_bios_state 0x00010000 /* Not used */
16074258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_vendor_id 0x00020000
16084258e98eSJames Smart
16094258e98eSJames Smart /* Bit mask for FDMI-1 defined HBA attributes */
16104258e98eSJames Smart #define LPFC_FDMI1_HBA_ATTR 0x000007ff
16114258e98eSJames Smart
16124258e98eSJames Smart /* Bit mask for FDMI-2 defined HBA attributes */
16134258e98eSJames Smart /* Skip vendor_info and bios_state */
16144258e98eSJames Smart #define LPFC_FDMI2_HBA_ATTR 0x0002efff
1615dea3101eS
1616dea3101eS /*
16178aaa7bcfSJames Smart * Port Attribute Types
1618dea3101eS */
161976b2c34aSJames Smart #define RPRT_SUPPORTED_FC4_TYPES 0x1 /* 32 byte binary array */
162076b2c34aSJames Smart #define RPRT_SUPPORTED_SPEED 0x2 /* 32-bit unsigned int */
162176b2c34aSJames Smart #define RPRT_PORT_SPEED 0x3 /* 32-bit unsigned int */
162276b2c34aSJames Smart #define RPRT_MAX_FRAME_SIZE 0x4 /* 32-bit unsigned int */
162376b2c34aSJames Smart #define RPRT_OS_DEVICE_NAME 0x5 /* 4 to 256 byte ASCII string */
162476b2c34aSJames Smart #define RPRT_HOST_NAME 0x6 /* 4 to 256 byte ASCII string */
162576b2c34aSJames Smart #define RPRT_NODENAME 0x7 /* 8 byte WWNN */
16264258e98eSJames Smart #define RPRT_PORTNAME 0x8 /* 8 byte WWPN */
162776b2c34aSJames Smart #define RPRT_SYM_PORTNAME 0x9 /* 4 to 256 byte ASCII string */
162876b2c34aSJames Smart #define RPRT_PORT_TYPE 0xa /* 32-bit unsigned int */
162976b2c34aSJames Smart #define RPRT_SUPPORTED_CLASS 0xb /* 32-bit unsigned int */
16304258e98eSJames Smart #define RPRT_FABRICNAME 0xc /* 8 byte Fabric WWPN */
163176b2c34aSJames Smart #define RPRT_ACTIVE_FC4_TYPES 0xd /* 32 byte binary array */
163276b2c34aSJames Smart #define RPRT_PORT_STATE 0x101 /* 32-bit unsigned int */
163376b2c34aSJames Smart #define RPRT_DISC_PORT 0x102 /* 32-bit unsigned int */
163476b2c34aSJames Smart #define RPRT_PORT_ID 0x103 /* 32-bit unsigned int */
16358aaa7bcfSJames Smart #define RPRT_VENDOR_MI 0xf047 /* vendor ascii string */
16364258e98eSJames Smart #define RPRT_SMART_SERVICE 0xf100 /* 4 to 256 byte ASCII string */
16374258e98eSJames Smart #define RPRT_SMART_GUID 0xf101 /* 8 byte WWNN + 8 byte WWPN */
16384258e98eSJames Smart #define RPRT_SMART_VERSION 0xf102 /* 4 to 256 byte ASCII string */
16394258e98eSJames Smart #define RPRT_SMART_MODEL 0xf103 /* 4 to 256 byte ASCII string */
16404258e98eSJames Smart #define RPRT_SMART_PORT_INFO 0xf104 /* 32-bit unsigned int */
16414258e98eSJames Smart #define RPRT_SMART_QOS 0xf105 /* 32-bit unsigned int */
16424258e98eSJames Smart #define RPRT_SMART_SECURITY 0xf106 /* 32-bit unsigned int */
16434258e98eSJames Smart
16444258e98eSJames Smart /* Bit mask for all individual PORT attributes */
16454258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_fc4type 0x00000001
16464258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_support_speed 0x00000002
16474258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_speed 0x00000004
16484258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_max_frame 0x00000008
16494258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_os_devname 0x00000010
16504258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_host_name 0x00000020
16514258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_wwnn 0x00000040
16524258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_wwpn 0x00000080
16534258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_symbolic_name 0x00000100
16544258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_port_type 0x00000200
16554258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_class 0x00000400
16564258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_fabric_wwpn 0x00000800
16574258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_port_state 0x00001000
16584258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_active_fc4type 0x00002000
16594258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_num_disc 0x00004000
16604258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_nportid 0x00008000
16614258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_service 0x00010000 /* Vendor specific */
16624258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_guid 0x00020000 /* Vendor specific */
16634258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_version 0x00040000 /* Vendor specific */
16644258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_model 0x00080000 /* Vendor specific */
16654258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_port_info 0x00100000 /* Vendor specific */
16664258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_qos 0x00200000 /* Vendor specific */
16674258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_security 0x00400000 /* Vendor specific */
16688aaa7bcfSJames Smart #define LPFC_FDMI_VENDOR_ATTR_mi 0x00800000 /* Vendor specific */
16694258e98eSJames Smart
16704258e98eSJames Smart /* Bit mask for FDMI-1 defined PORT attributes */
16714258e98eSJames Smart #define LPFC_FDMI1_PORT_ATTR 0x0000003f
16724258e98eSJames Smart
16734258e98eSJames Smart /* Bit mask for FDMI-2 defined PORT attributes */
16744258e98eSJames Smart #define LPFC_FDMI2_PORT_ATTR 0x0000ffff
16754258e98eSJames Smart
16764258e98eSJames Smart /* Bit mask for Smart SAN defined PORT attributes */
16774258e98eSJames Smart #define LPFC_FDMI2_SMART_ATTR 0x007fffff
16784258e98eSJames Smart
16794258e98eSJames Smart /* Defines for PORT port state attribute */
16804258e98eSJames Smart #define LPFC_FDMI_PORTSTATE_UNKNOWN 1
16814258e98eSJames Smart #define LPFC_FDMI_PORTSTATE_ONLINE 2
16824258e98eSJames Smart
16834258e98eSJames Smart /* Defines for PORT port type attribute */
16844258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_UNKNOWN 0
16854258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_NPORT 1
16864258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_NLPORT 2
1687dea3101eS
1688dea3101eS /*
1689dea3101eS * Begin HBA configuration parameters.
1690dea3101eS * The PCI configuration register BAR assignments are:
1691dea3101eS * BAR0, offset 0x10 - SLIM base memory address
1692dea3101eS * BAR1, offset 0x14 - SLIM base memory high address
1693dea3101eS * BAR2, offset 0x18 - REGISTER base memory address
1694dea3101eS * BAR3, offset 0x1c - REGISTER base memory high address
1695dea3101eS * BAR4, offset 0x20 - BIU I/O registers
1696dea3101eS * BAR5, offset 0x24 - REGISTER base io high address
1697dea3101eS */
1698dea3101eS
1699dea3101eS /* Number of rings currently used and available. */
17002a76a283SJames Smart #define MAX_SLI3_CONFIGURED_RINGS 3
17012a76a283SJames Smart #define MAX_SLI3_RINGS 4
1702dea3101eS
1703dea3101eS /* IOCB / Mailbox is owned by FireFly */
1704dea3101eS #define OWN_CHIP 1
1705dea3101eS
1706dea3101eS /* IOCB / Mailbox is owned by Host */
1707dea3101eS #define OWN_HOST 0
1708dea3101eS
1709dea3101eS /* Number of 4-byte words in an IOCB. */
1710dea3101eS #define IOCB_WORD_SZ 8
1711dea3101eS
1712dea3101eS /* network headers for Dfctl field */
1713dea3101eS #define FC_NET_HDR 0x20
1714dea3101eS
1715dea3101eS /* Start FireFly Register definitions */
1716dea3101eS #define PCI_VENDOR_ID_EMULEX 0x10df
1717dea3101eS #define PCI_DEVICE_ID_FIREFLY 0x1ae5
171884774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_VF 0xe100
1719085c647cSJames Smart #define PCI_DEVICE_ID_BALIUS 0xe131
172084774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_PF 0xe180
1721085c647cSJames Smart #define PCI_DEVICE_ID_LANCER_FC 0xe200
1722c0c11512SJames Smart #define PCI_DEVICE_ID_LANCER_FC_VF 0xe208
1723085c647cSJames Smart #define PCI_DEVICE_ID_LANCER_FCOE 0xe260
1724c0c11512SJames Smart #define PCI_DEVICE_ID_LANCER_FCOE_VF 0xe268
1725d38dd52cSJames Smart #define PCI_DEVICE_ID_LANCER_G6_FC 0xe300
1726c238b9b6SJames Smart #define PCI_DEVICE_ID_LANCER_G7_FC 0xf400
1727f449a3d7SJames Smart #define PCI_DEVICE_ID_LANCER_G7P_FC 0xf500
1728b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_SMB 0xf011
1729b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_MID 0xf015
1730dea3101eS #define PCI_DEVICE_ID_RFLY 0xf095
1731dea3101eS #define PCI_DEVICE_ID_PFLY 0xf098
1732e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LP101 0xf0a1
1733dea3101eS #define PCI_DEVICE_ID_TFLY 0xf0a5
1734e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_BSMB 0xf0d1
1735e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_BMID 0xf0d5
1736e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZSMB 0xf0e1
1737e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZMID 0xf0e5
1738e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE 0xf0f5
1739e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE_SCSP 0xf0f6
1740e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE_DCSP 0xf0f7
1741b87eab38SJames Smart #define PCI_DEVICE_ID_SAT 0xf100
1742b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_SCSP 0xf111
1743b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_DCSP 0xf112
1744085c647cSJames Smart #define PCI_DEVICE_ID_FALCON 0xf180
1745e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_SUPERFLY 0xf700
1746e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_DRAGONFLY 0xf800
1747dea3101eS #define PCI_DEVICE_ID_CENTAUR 0xf900
1748dea3101eS #define PCI_DEVICE_ID_PEGASUS 0xf980
1749dea3101eS #define PCI_DEVICE_ID_THOR 0xfa00
1750dea3101eS #define PCI_DEVICE_ID_VIPER 0xfb00
1751dea3101eS #define PCI_DEVICE_ID_LP10000S 0xfc00
1752e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LP11000S 0xfc10
1753e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LPE11000S 0xfc20
1754b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_S 0xfc40
175584774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_S 0xfc50
1756e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS 0xfd00
1757e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS_SCSP 0xfd11
1758e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS_DCSP 0xfd12
1759e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR 0xfe00
1760e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR_SCSP 0xfe11
1761e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12
1762da0436e9SJames Smart #define PCI_VENDOR_ID_SERVERENGINE 0x19a2
1763da0436e9SJames Smart #define PCI_DEVICE_ID_TIGERSHARK 0x0704
1764a747c9ceSJames Smart #define PCI_DEVICE_ID_TOMCAT 0x0714
1765f8cafd38SJames Smart #define PCI_DEVICE_ID_SKYHAWK 0x0724
1766f8cafd38SJames Smart #define PCI_DEVICE_ID_SKYHAWK_VF 0x072c
1767a5b168efSBradley Grove #define PCI_VENDOR_ID_ATTO 0x117c
1768a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_16XE 0x0064
1769a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_161E 0x0063
1770a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_162E 0x0064
1771a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_164E 0x0065
1772a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_16XP 0x0094
1773a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_161P 0x00a0
1774a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_162P 0x0094
1775a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_164P 0x00a1
1776a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_32XE 0x0094
1777a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_321E 0x00a2
1778a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_322E 0x00a3
1779a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_324E 0x00ac
1780a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_32XP 0x00bb
1781a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_321P 0x00bc
1782a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_322P 0x00bd
1783a5b168efSBradley Grove #define PCI_DEVICE_ID_CLRY_324P 0x00be
1784a5b168efSBradley Grove #define PCI_DEVICE_ID_TLFC_2 0x0064
1785a5b168efSBradley Grove #define PCI_DEVICE_ID_TLFC_2XX2 0x4064
1786a5b168efSBradley Grove #define PCI_DEVICE_ID_TLFC_3 0x0094
1787a5b168efSBradley Grove #define PCI_DEVICE_ID_TLFC_3162 0x40a6
1788a5b168efSBradley Grove #define PCI_DEVICE_ID_TLFC_3322 0x40a7
1789dea3101eS
1790dea3101eS #define JEDEC_ID_ADDRESS 0x0080001c
1791dea3101eS #define FIREFLY_JEDEC_ID 0x1ACC
1792dea3101eS #define SUPERFLY_JEDEC_ID 0x0020
1793dea3101eS #define DRAGONFLY_JEDEC_ID 0x0021
1794dea3101eS #define DRAGONFLY_V2_JEDEC_ID 0x0025
1795dea3101eS #define CENTAUR_2G_JEDEC_ID 0x0026
1796dea3101eS #define CENTAUR_1G_JEDEC_ID 0x0028
1797dea3101eS #define PEGASUS_ORION_JEDEC_ID 0x0036
1798dea3101eS #define PEGASUS_JEDEC_ID 0x0038
1799dea3101eS #define THOR_JEDEC_ID 0x0012
1800dea3101eS #define HELIOS_JEDEC_ID 0x0364
1801dea3101eS #define ZEPHYR_JEDEC_ID 0x0577
1802dea3101eS #define VIPER_JEDEC_ID 0x4838
1803b87eab38SJames Smart #define SATURN_JEDEC_ID 0x1004
1804dea3101eS
1805dea3101eS #define JEDEC_ID_MASK 0x0FFFF000
1806dea3101eS #define JEDEC_ID_SHIFT 12
1807dea3101eS #define FC_JEDEC_ID(id) ((id & JEDEC_ID_MASK) >> JEDEC_ID_SHIFT)
1808dea3101eS
1809dea3101eS typedef struct { /* FireFly BIU registers */
1810dea3101eS uint32_t hostAtt; /* See definitions for Host Attention
1811dea3101eS register */
1812dea3101eS uint32_t chipAtt; /* See definitions for Chip Attention
1813dea3101eS register */
1814dea3101eS uint32_t hostStatus; /* See definitions for Host Status register */
1815dea3101eS uint32_t hostControl; /* See definitions for Host Control register */
1816dea3101eS uint32_t buiConfig; /* See definitions for BIU configuration
1817dea3101eS register */
1818dea3101eS } FF_REGS;
1819dea3101eS
1820dea3101eS /* IO Register size in bytes */
1821dea3101eS #define FF_REG_AREA_SIZE 256
1822dea3101eS
1823dea3101eS /* Host Attention Register */
1824dea3101eS
1825dea3101eS #define HA_REG_OFFSET 0 /* Byte offset from register base address */
1826dea3101eS
1827dea3101eS #define HA_R0RE_REQ 0x00000001 /* Bit 0 */
1828dea3101eS #define HA_R0CE_RSP 0x00000002 /* Bit 1 */
1829dea3101eS #define HA_R0ATT 0x00000008 /* Bit 3 */
1830dea3101eS #define HA_R1RE_REQ 0x00000010 /* Bit 4 */
1831dea3101eS #define HA_R1CE_RSP 0x00000020 /* Bit 5 */
1832dea3101eS #define HA_R1ATT 0x00000080 /* Bit 7 */
1833dea3101eS #define HA_R2RE_REQ 0x00000100 /* Bit 8 */
1834dea3101eS #define HA_R2CE_RSP 0x00000200 /* Bit 9 */
1835dea3101eS #define HA_R2ATT 0x00000800 /* Bit 11 */
1836dea3101eS #define HA_R3RE_REQ 0x00001000 /* Bit 12 */
1837dea3101eS #define HA_R3CE_RSP 0x00002000 /* Bit 13 */
1838dea3101eS #define HA_R3ATT 0x00008000 /* Bit 15 */
1839dea3101eS #define HA_LATT 0x20000000 /* Bit 29 */
1840dea3101eS #define HA_MBATT 0x40000000 /* Bit 30 */
1841dea3101eS #define HA_ERATT 0x80000000 /* Bit 31 */
1842dea3101eS
1843dea3101eS #define HA_RXRE_REQ 0x00000001 /* Bit 0 */
1844dea3101eS #define HA_RXCE_RSP 0x00000002 /* Bit 1 */
1845dea3101eS #define HA_RXATT 0x00000008 /* Bit 3 */
1846dea3101eS #define HA_RXMASK 0x0000000f
1847dea3101eS
18489399627fSJames Smart #define HA_R0_CLR_MSK (HA_R0RE_REQ | HA_R0CE_RSP | HA_R0ATT)
18499399627fSJames Smart #define HA_R1_CLR_MSK (HA_R1RE_REQ | HA_R1CE_RSP | HA_R1ATT)
18509399627fSJames Smart #define HA_R2_CLR_MSK (HA_R2RE_REQ | HA_R2CE_RSP | HA_R2ATT)
18519399627fSJames Smart #define HA_R3_CLR_MSK (HA_R3RE_REQ | HA_R3CE_RSP | HA_R3ATT)
18529399627fSJames Smart
18539399627fSJames Smart #define HA_R0_POS 3
18549399627fSJames Smart #define HA_R1_POS 7
18559399627fSJames Smart #define HA_R2_POS 11
18569399627fSJames Smart #define HA_R3_POS 15
18579399627fSJames Smart #define HA_LE_POS 29
18589399627fSJames Smart #define HA_MB_POS 30
18599399627fSJames Smart #define HA_ER_POS 31
1860dea3101eS /* Chip Attention Register */
1861dea3101eS
1862dea3101eS #define CA_REG_OFFSET 4 /* Byte offset from register base address */
1863dea3101eS
1864dea3101eS #define CA_R0CE_REQ 0x00000001 /* Bit 0 */
1865dea3101eS #define CA_R0RE_RSP 0x00000002 /* Bit 1 */
1866dea3101eS #define CA_R0ATT 0x00000008 /* Bit 3 */
1867dea3101eS #define CA_R1CE_REQ 0x00000010 /* Bit 4 */
1868dea3101eS #define CA_R1RE_RSP 0x00000020 /* Bit 5 */
1869dea3101eS #define CA_R1ATT 0x00000080 /* Bit 7 */
1870dea3101eS #define CA_R2CE_REQ 0x00000100 /* Bit 8 */
1871dea3101eS #define CA_R2RE_RSP 0x00000200 /* Bit 9 */
1872dea3101eS #define CA_R2ATT 0x00000800 /* Bit 11 */
1873dea3101eS #define CA_R3CE_REQ 0x00001000 /* Bit 12 */
1874dea3101eS #define CA_R3RE_RSP 0x00002000 /* Bit 13 */
1875dea3101eS #define CA_R3ATT 0x00008000 /* Bit 15 */
1876dea3101eS #define CA_MBATT 0x40000000 /* Bit 30 */
1877dea3101eS
1878dea3101eS /* Host Status Register */
1879dea3101eS
1880dea3101eS #define HS_REG_OFFSET 8 /* Byte offset from register base address */
1881dea3101eS
1882dea3101eS #define HS_MBRDY 0x00400000 /* Bit 22 */
1883dea3101eS #define HS_FFRDY 0x00800000 /* Bit 23 */
1884dea3101eS #define HS_FFER8 0x01000000 /* Bit 24 */
1885dea3101eS #define HS_FFER7 0x02000000 /* Bit 25 */
1886dea3101eS #define HS_FFER6 0x04000000 /* Bit 26 */
1887dea3101eS #define HS_FFER5 0x08000000 /* Bit 27 */
1888dea3101eS #define HS_FFER4 0x10000000 /* Bit 28 */
1889dea3101eS #define HS_FFER3 0x20000000 /* Bit 29 */
1890dea3101eS #define HS_FFER2 0x40000000 /* Bit 30 */
1891dea3101eS #define HS_FFER1 0x80000000 /* Bit 31 */
189257127f15SJames Smart #define HS_CRIT_TEMP 0x00000100 /* Bit 8 */
189357127f15SJames Smart #define HS_FFERM 0xFF000100 /* Mask for error bits 31:24 and 8 */
18949940b97bSJames Smart #define UNPLUG_ERR 0x00000001 /* Indicate pci hot unplug */
1895dea3101eS /* Host Control Register */
1896dea3101eS
18979399627fSJames Smart #define HC_REG_OFFSET 12 /* Byte offset from register base address */
1898dea3101eS
1899dea3101eS #define HC_MBINT_ENA 0x00000001 /* Bit 0 */
1900dea3101eS #define HC_R0INT_ENA 0x00000002 /* Bit 1 */
1901dea3101eS #define HC_R1INT_ENA 0x00000004 /* Bit 2 */
1902dea3101eS #define HC_R2INT_ENA 0x00000008 /* Bit 3 */
1903dea3101eS #define HC_R3INT_ENA 0x00000010 /* Bit 4 */
1904dea3101eS #define HC_INITHBI 0x02000000 /* Bit 25 */
1905dea3101eS #define HC_INITMB 0x04000000 /* Bit 26 */
1906dea3101eS #define HC_INITFF 0x08000000 /* Bit 27 */
1907dea3101eS #define HC_LAINT_ENA 0x20000000 /* Bit 29 */
1908dea3101eS #define HC_ERINT_ENA 0x80000000 /* Bit 31 */
1909dea3101eS
19109399627fSJames Smart /* Message Signaled Interrupt eXtension (MSI-X) message identifiers */
19119399627fSJames Smart #define MSIX_DFLT_ID 0
19129399627fSJames Smart #define MSIX_RNG0_ID 0
19139399627fSJames Smart #define MSIX_RNG1_ID 1
19149399627fSJames Smart #define MSIX_RNG2_ID 2
19159399627fSJames Smart #define MSIX_RNG3_ID 3
19169399627fSJames Smart
19179399627fSJames Smart #define MSIX_LINK_ID 4
19189399627fSJames Smart #define MSIX_MBOX_ID 5
19199399627fSJames Smart
19209399627fSJames Smart #define MSIX_SPARE0_ID 6
19219399627fSJames Smart #define MSIX_SPARE1_ID 7
19229399627fSJames Smart
1923dea3101eS /* Mailbox Commands */
1924dea3101eS #define MBX_SHUTDOWN 0x00 /* terminate testing */
1925dea3101eS #define MBX_LOAD_SM 0x01
1926dea3101eS #define MBX_READ_NV 0x02
1927dea3101eS #define MBX_WRITE_NV 0x03
1928dea3101eS #define MBX_RUN_BIU_DIAG 0x04
1929dea3101eS #define MBX_INIT_LINK 0x05
1930dea3101eS #define MBX_DOWN_LINK 0x06
1931dea3101eS #define MBX_CONFIG_LINK 0x07
1932dea3101eS #define MBX_CONFIG_RING 0x09
1933dea3101eS #define MBX_RESET_RING 0x0A
1934dea3101eS #define MBX_READ_CONFIG 0x0B
1935dea3101eS #define MBX_READ_RCONFIG 0x0C
1936dea3101eS #define MBX_READ_SPARM 0x0D
1937dea3101eS #define MBX_READ_STATUS 0x0E
1938dea3101eS #define MBX_READ_RPI 0x0F
1939dea3101eS #define MBX_READ_XRI 0x10
1940dea3101eS #define MBX_READ_REV 0x11
1941dea3101eS #define MBX_READ_LNK_STAT 0x12
1942dea3101eS #define MBX_REG_LOGIN 0x13
1943dea3101eS #define MBX_UNREG_LOGIN 0x14
1944dea3101eS #define MBX_CLEAR_LA 0x16
1945dea3101eS #define MBX_DUMP_MEMORY 0x17
1946dea3101eS #define MBX_DUMP_CONTEXT 0x18
1947dea3101eS #define MBX_RUN_DIAGS 0x19
1948dea3101eS #define MBX_RESTART 0x1A
1949dea3101eS #define MBX_UPDATE_CFG 0x1B
1950dea3101eS #define MBX_DOWN_LOAD 0x1C
1951dea3101eS #define MBX_DEL_LD_ENTRY 0x1D
1952dea3101eS #define MBX_RUN_PROGRAM 0x1E
1953dea3101eS #define MBX_SET_MASK 0x20
195409372820SJames Smart #define MBX_SET_VARIABLE 0x21
1955dea3101eS #define MBX_UNREG_D_ID 0x23
195641415862SJamie Wellnitz #define MBX_KILL_BOARD 0x24
1957dea3101eS #define MBX_CONFIG_FARP 0x25
195841415862SJamie Wellnitz #define MBX_BEACON 0x2A
19599399627fSJames Smart #define MBX_CONFIG_MSI 0x30
1960858c9f6cSJames Smart #define MBX_HEARTBEAT 0x31
1961a8adb832SJames Smart #define MBX_WRITE_VPARMS 0x32
1962a8adb832SJames Smart #define MBX_ASYNCEVT_ENABLE 0x33
19634fede78fSJames Smart #define MBX_READ_EVENT_LOG_STATUS 0x37
19644fede78fSJames Smart #define MBX_READ_EVENT_LOG 0x38
19654fede78fSJames Smart #define MBX_WRITE_EVENT_LOG 0x39
1966dea3101eS
196784774a4dSJames Smart #define MBX_PORT_CAPABILITIES 0x3B
196884774a4dSJames Smart #define MBX_PORT_IOV_CONTROL 0x3C
196984774a4dSJames Smart
1970ed957684SJames Smart #define MBX_CONFIG_HBQ 0x7C
1971dea3101eS #define MBX_LOAD_AREA 0x81
1972dea3101eS #define MBX_RUN_BIU_DIAG64 0x84
1973dea3101eS #define MBX_CONFIG_PORT 0x88
1974dea3101eS #define MBX_READ_SPARM64 0x8D
1975dea3101eS #define MBX_READ_RPI64 0x8F
1976dea3101eS #define MBX_REG_LOGIN64 0x93
197776a95d75SJames Smart #define MBX_READ_TOPOLOGY 0x95
197892d7f7b0SJames Smart #define MBX_REG_VPI 0x96
197992d7f7b0SJames Smart #define MBX_UNREG_VPI 0x97
1980dea3101eS
198109372820SJames Smart #define MBX_WRITE_WWN 0x98
1982dea3101eS #define MBX_SET_DEBUG 0x99
1983dea3101eS #define MBX_LOAD_EXP_ROM 0x9C
1984da0436e9SJames Smart #define MBX_SLI4_CONFIG 0x9B
1985da0436e9SJames Smart #define MBX_SLI4_REQ_FTRS 0x9D
1986da0436e9SJames Smart #define MBX_MAX_CMDS 0x9E
1987da0436e9SJames Smart #define MBX_RESUME_RPI 0x9E
1988dea3101eS #define MBX_SLI2_CMD_MASK 0x80
1989da0436e9SJames Smart #define MBX_REG_VFI 0x9F
1990da0436e9SJames Smart #define MBX_REG_FCFI 0xA0
1991da0436e9SJames Smart #define MBX_UNREG_VFI 0xA1
1992da0436e9SJames Smart #define MBX_UNREG_FCFI 0xA2
1993da0436e9SJames Smart #define MBX_INIT_VFI 0xA3
1994da0436e9SJames Smart #define MBX_INIT_VPI 0xA4
1995940eb687SJames Smart #define MBX_ACCESS_VDATA 0xA5
1996895427bdSJames Smart #define MBX_REG_FCFI_MRQ 0xAF
1997dea3101eS
1998dcf2a4e0SJames Smart #define MBX_AUTH_PORT 0xF8
1999dcf2a4e0SJames Smart #define MBX_SECURITY_MGMT 0xF9
2000dcf2a4e0SJames Smart
2001dea3101eS /* IOCB Commands */
2002dea3101eS
2003dea3101eS #define CMD_RCV_SEQUENCE_CX 0x01
2004dea3101eS #define CMD_XMIT_SEQUENCE_CR 0x02
2005dea3101eS #define CMD_XMIT_SEQUENCE_CX 0x03
2006dea3101eS #define CMD_XMIT_BCAST_CN 0x04
2007dea3101eS #define CMD_XMIT_BCAST_CX 0x05
2008dea3101eS #define CMD_QUE_RING_BUF_CN 0x06
2009dea3101eS #define CMD_QUE_XRI_BUF_CX 0x07
2010dea3101eS #define CMD_IOCB_CONTINUE_CN 0x08
2011dea3101eS #define CMD_RET_XRI_BUF_CX 0x09
2012dea3101eS #define CMD_ELS_REQUEST_CR 0x0A
2013dea3101eS #define CMD_ELS_REQUEST_CX 0x0B
2014dea3101eS #define CMD_RCV_ELS_REQ_CX 0x0D
2015dea3101eS #define CMD_ABORT_XRI_CN 0x0E
2016dea3101eS #define CMD_ABORT_XRI_CX 0x0F
2017dea3101eS #define CMD_CLOSE_XRI_CN 0x10
2018dea3101eS #define CMD_CLOSE_XRI_CX 0x11
2019dea3101eS #define CMD_CREATE_XRI_CR 0x12
2020dea3101eS #define CMD_CREATE_XRI_CX 0x13
2021dea3101eS #define CMD_GET_RPI_CN 0x14
2022dea3101eS #define CMD_XMIT_ELS_RSP_CX 0x15
2023dea3101eS #define CMD_GET_RPI_CR 0x16
2024dea3101eS #define CMD_XRI_ABORTED_CX 0x17
2025dea3101eS #define CMD_FCP_IWRITE_CR 0x18
2026dea3101eS #define CMD_FCP_IWRITE_CX 0x19
2027dea3101eS #define CMD_FCP_IREAD_CR 0x1A
2028dea3101eS #define CMD_FCP_IREAD_CX 0x1B
2029dea3101eS #define CMD_FCP_ICMND_CR 0x1C
2030dea3101eS #define CMD_FCP_ICMND_CX 0x1D
2031f5603511SJames Smart #define CMD_FCP_TSEND_CX 0x1F
2032f5603511SJames Smart #define CMD_FCP_TRECEIVE_CX 0x21
2033f5603511SJames Smart #define CMD_FCP_TRSP_CX 0x23
2034f5603511SJames Smart #define CMD_FCP_AUTO_TRSP_CX 0x29
2035dea3101eS
2036dea3101eS #define CMD_ADAPTER_MSG 0x20
2037dea3101eS #define CMD_ADAPTER_DUMP 0x22
2038dea3101eS
2039dea3101eS /* SLI_2 IOCB Command Set */
2040dea3101eS
204157127f15SJames Smart #define CMD_ASYNC_STATUS 0x7C
2042dea3101eS #define CMD_RCV_SEQUENCE64_CX 0x81
2043dea3101eS #define CMD_XMIT_SEQUENCE64_CR 0x82
2044dea3101eS #define CMD_XMIT_SEQUENCE64_CX 0x83
2045dea3101eS #define CMD_XMIT_BCAST64_CN 0x84
2046dea3101eS #define CMD_XMIT_BCAST64_CX 0x85
2047dea3101eS #define CMD_QUE_RING_BUF64_CN 0x86
2048dea3101eS #define CMD_QUE_XRI_BUF64_CX 0x87
2049dea3101eS #define CMD_IOCB_CONTINUE64_CN 0x88
2050dea3101eS #define CMD_RET_XRI_BUF64_CX 0x89
2051dea3101eS #define CMD_ELS_REQUEST64_CR 0x8A
2052dea3101eS #define CMD_ELS_REQUEST64_CX 0x8B
2053dea3101eS #define CMD_ABORT_MXRI64_CN 0x8C
2054dea3101eS #define CMD_RCV_ELS_REQ64_CX 0x8D
2055dea3101eS #define CMD_XMIT_ELS_RSP64_CX 0x95
20566669f9bbSJames Smart #define CMD_XMIT_BLS_RSP64_CX 0x97
2057dea3101eS #define CMD_FCP_IWRITE64_CR 0x98
2058dea3101eS #define CMD_FCP_IWRITE64_CX 0x99
2059dea3101eS #define CMD_FCP_IREAD64_CR 0x9A
2060dea3101eS #define CMD_FCP_IREAD64_CX 0x9B
2061dea3101eS #define CMD_FCP_ICMND64_CR 0x9C
2062dea3101eS #define CMD_FCP_ICMND64_CX 0x9D
2063f5603511SJames Smart #define CMD_FCP_TSEND64_CX 0x9F
2064f5603511SJames Smart #define CMD_FCP_TRECEIVE64_CX 0xA1
2065f5603511SJames Smart #define CMD_FCP_TRSP64_CX 0xA3
2066dea3101eS
206776bb24efSJames Smart #define CMD_QUE_XRI64_CX 0xB3
2068ed957684SJames Smart #define CMD_IOCB_RCV_SEQ64_CX 0xB5
2069ed957684SJames Smart #define CMD_IOCB_RCV_ELS64_CX 0xB7
20703163f725SJames Smart #define CMD_IOCB_RET_XRI64_CX 0xB9
2071ed957684SJames Smart #define CMD_IOCB_RCV_CONT64_CX 0xBB
2072ed957684SJames Smart
2073dea3101eS #define CMD_GEN_REQUEST64_CR 0xC2
2074dea3101eS #define CMD_GEN_REQUEST64_CX 0xC3
2075dea3101eS
20763163f725SJames Smart /* Unhandled SLI-3 Commands */
20773163f725SJames Smart #define CMD_IOCB_XMIT_MSEQ64_CR 0xB0
20783163f725SJames Smart #define CMD_IOCB_XMIT_MSEQ64_CX 0xB1
20793163f725SJames Smart #define CMD_IOCB_RCV_SEQ_LIST64_CX 0xC1
20803163f725SJames Smart #define CMD_IOCB_RCV_ELS_LIST64_CX 0xCD
20813163f725SJames Smart #define CMD_IOCB_CLOSE_EXTENDED_CN 0xB6
20823163f725SJames Smart #define CMD_IOCB_ABORT_EXTENDED_CN 0xBA
20833163f725SJames Smart #define CMD_IOCB_RET_HBQE64_CN 0xCA
20843163f725SJames Smart #define CMD_IOCB_FCP_IBIDIR64_CR 0xAC
20853163f725SJames Smart #define CMD_IOCB_FCP_IBIDIR64_CX 0xAD
20863163f725SJames Smart #define CMD_IOCB_FCP_ITASKMGT64_CX 0xAF
20873163f725SJames Smart #define CMD_IOCB_LOGENTRY_CN 0x94
20883163f725SJames Smart #define CMD_IOCB_LOGENTRY_ASYNC_CN 0x96
20893163f725SJames Smart
2090341af102SJames Smart /* Data Security SLI Commands */
2091341af102SJames Smart #define DSSCMD_IWRITE64_CR 0xF8
2092341af102SJames Smart #define DSSCMD_IWRITE64_CX 0xF9
2093341af102SJames Smart #define DSSCMD_IREAD64_CR 0xFA
2094341af102SJames Smart #define DSSCMD_IREAD64_CX 0xFB
2095da0436e9SJames Smart
2096341af102SJames Smart #define CMD_MAX_IOCB_CMD 0xFB
2097dea3101eS #define CMD_IOCB_MASK 0xff
2098dea3101eS
2099dea3101eS #define MAX_MSG_DATA 28 /* max msg data in CMD_ADAPTER_MSG
2100dea3101eS iocb */
2101dea3101eS #define LPFC_MAX_ADPTMSG 32 /* max msg data */
2102dea3101eS /*
2103dea3101eS * Define Status
2104dea3101eS */
2105dea3101eS #define MBX_SUCCESS 0
2106dea3101eS #define MBXERR_NUM_RINGS 1
2107dea3101eS #define MBXERR_NUM_IOCBS 2
2108dea3101eS #define MBXERR_IOCBS_EXCEEDED 3
2109dea3101eS #define MBXERR_BAD_RING_NUMBER 4
2110dea3101eS #define MBXERR_MASK_ENTRIES_RANGE 5
2111dea3101eS #define MBXERR_MASKS_EXCEEDED 6
2112dea3101eS #define MBXERR_BAD_PROFILE 7
2113dea3101eS #define MBXERR_BAD_DEF_CLASS 8
2114dea3101eS #define MBXERR_BAD_MAX_RESPONDER 9
2115dea3101eS #define MBXERR_BAD_MAX_ORIGINATOR 10
2116dea3101eS #define MBXERR_RPI_REGISTERED 11
2117dea3101eS #define MBXERR_RPI_FULL 12
2118dea3101eS #define MBXERR_NO_RESOURCES 13
2119dea3101eS #define MBXERR_BAD_RCV_LENGTH 14
2120dea3101eS #define MBXERR_DMA_ERROR 15
2121dea3101eS #define MBXERR_ERROR 16
2122da0436e9SJames Smart #define MBXERR_LINK_DOWN 0x33
2123dcf2a4e0SJames Smart #define MBXERR_SEC_NO_PERMISSION 0xF02
2124dea3101eS #define MBX_NOT_FINISHED 255
2125dea3101eS
2126dea3101eS #define MBX_BUSY 0xffffff /* Attempted cmd to busy Mailbox */
2127dea3101eS #define MBX_TIMEOUT 0xfffffe /* time-out expired waiting for */
2128dea3101eS
212957127f15SJames Smart #define TEMPERATURE_OFFSET 0xB0 /* Slim offset for critical temperature event */
213057127f15SJames Smart
2131dea3101eS /*
213286478875SJames Smart * return code Fail
213386478875SJames Smart */
213486478875SJames Smart #define FAILURE 1
213586478875SJames Smart
213686478875SJames Smart /*
2137dea3101eS * Begin Structure Definitions for Mailbox Commands
2138dea3101eS */
2139dea3101eS
2140dea3101eS typedef struct {
2141dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2142dea3101eS uint8_t tval;
2143dea3101eS uint8_t tmask;
2144dea3101eS uint8_t rval;
2145dea3101eS uint8_t rmask;
2146dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2147dea3101eS uint8_t rmask;
2148dea3101eS uint8_t rval;
2149dea3101eS uint8_t tmask;
2150dea3101eS uint8_t tval;
2151dea3101eS #endif
2152dea3101eS } RR_REG;
2153dea3101eS
2154dea3101eS struct ulp_bde {
2155dea3101eS uint32_t bdeAddress;
2156dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2157dea3101eS uint32_t bdeReserved:4;
2158dea3101eS uint32_t bdeAddrHigh:4;
2159dea3101eS uint32_t bdeSize:24;
2160dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2161dea3101eS uint32_t bdeSize:24;
2162dea3101eS uint32_t bdeAddrHigh:4;
2163dea3101eS uint32_t bdeReserved:4;
2164dea3101eS #endif
2165dea3101eS };
2166dea3101eS
2167dea3101eS typedef struct ULP_BDL { /* SLI-2 */
2168dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2169dea3101eS uint32_t bdeFlags:8; /* BDL Flags */
2170dea3101eS uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2171dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2172dea3101eS uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2173dea3101eS uint32_t bdeFlags:8; /* BDL Flags */
2174dea3101eS #endif
2175dea3101eS
2176dea3101eS uint32_t addrLow; /* Address 0:31 */
2177dea3101eS uint32_t addrHigh; /* Address 32:63 */
2178dea3101eS uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */
2179dea3101eS } ULP_BDL;
2180dea3101eS
218181301a9bSJames Smart /*
218281301a9bSJames Smart * BlockGuard Definitions
218381301a9bSJames Smart */
218481301a9bSJames Smart
218581301a9bSJames Smart enum lpfc_protgrp_type {
218681301a9bSJames Smart LPFC_PG_TYPE_INVALID = 0, /* used to indicate errors */
218781301a9bSJames Smart LPFC_PG_TYPE_NO_DIF, /* no DIF data pointed to by prot grp */
218881301a9bSJames Smart LPFC_PG_TYPE_EMBD_DIF, /* DIF is embedded (inline) with data */
218981301a9bSJames Smart LPFC_PG_TYPE_DIF_BUF /* DIF has its own scatter/gather list */
219081301a9bSJames Smart };
219181301a9bSJames Smart
219281301a9bSJames Smart /* PDE Descriptors */
21936c8eea54SJames Smart #define LPFC_PDE5_DESCRIPTOR 0x85
21946c8eea54SJames Smart #define LPFC_PDE6_DESCRIPTOR 0x86
21956c8eea54SJames Smart #define LPFC_PDE7_DESCRIPTOR 0x87
219681301a9bSJames Smart
21976c8eea54SJames Smart /* BlockGuard Opcodes */
21986c8eea54SJames Smart #define BG_OP_IN_NODIF_OUT_CRC 0x0
21996c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_NODIF 0x1
22006c8eea54SJames Smart #define BG_OP_IN_NODIF_OUT_CSUM 0x2
22016c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_NODIF 0x3
22026c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_CRC 0x4
22036c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_CSUM 0x5
22046c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_CSUM 0x6
22056c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_CRC 0x7
2206a6887e28SJames Smart #define BG_OP_RAW_MODE 0x8
22076c8eea54SJames Smart
22086c8eea54SJames Smart struct lpfc_pde5 {
22096c8eea54SJames Smart uint32_t word0;
22106c8eea54SJames Smart #define pde5_type_SHIFT 24
22116c8eea54SJames Smart #define pde5_type_MASK 0x000000ff
22126c8eea54SJames Smart #define pde5_type_WORD word0
22136c8eea54SJames Smart #define pde5_rsvd0_SHIFT 0
22146c8eea54SJames Smart #define pde5_rsvd0_MASK 0x00ffffff
22156c8eea54SJames Smart #define pde5_rsvd0_WORD word0
22166c8eea54SJames Smart uint32_t reftag; /* Reference Tag Value */
22176c8eea54SJames Smart uint32_t reftagtr; /* Reference Tag Translation Value */
221881301a9bSJames Smart };
221981301a9bSJames Smart
22206c8eea54SJames Smart struct lpfc_pde6 {
22216c8eea54SJames Smart uint32_t word0;
22226c8eea54SJames Smart #define pde6_type_SHIFT 24
22236c8eea54SJames Smart #define pde6_type_MASK 0x000000ff
22246c8eea54SJames Smart #define pde6_type_WORD word0
22256c8eea54SJames Smart #define pde6_rsvd0_SHIFT 0
22266c8eea54SJames Smart #define pde6_rsvd0_MASK 0x00ffffff
22276c8eea54SJames Smart #define pde6_rsvd0_WORD word0
22286c8eea54SJames Smart uint32_t word1;
22296c8eea54SJames Smart #define pde6_rsvd1_SHIFT 26
22306c8eea54SJames Smart #define pde6_rsvd1_MASK 0x0000003f
22316c8eea54SJames Smart #define pde6_rsvd1_WORD word1
22326c8eea54SJames Smart #define pde6_na_SHIFT 25
22336c8eea54SJames Smart #define pde6_na_MASK 0x00000001
22346c8eea54SJames Smart #define pde6_na_WORD word1
22356c8eea54SJames Smart #define pde6_rsvd2_SHIFT 16
22366c8eea54SJames Smart #define pde6_rsvd2_MASK 0x000001FF
22376c8eea54SJames Smart #define pde6_rsvd2_WORD word1
22386c8eea54SJames Smart #define pde6_apptagtr_SHIFT 0
22396c8eea54SJames Smart #define pde6_apptagtr_MASK 0x0000ffff
22406c8eea54SJames Smart #define pde6_apptagtr_WORD word1
22416c8eea54SJames Smart uint32_t word2;
22426c8eea54SJames Smart #define pde6_optx_SHIFT 28
22436c8eea54SJames Smart #define pde6_optx_MASK 0x0000000f
22446c8eea54SJames Smart #define pde6_optx_WORD word2
22456c8eea54SJames Smart #define pde6_oprx_SHIFT 24
22466c8eea54SJames Smart #define pde6_oprx_MASK 0x0000000f
22476c8eea54SJames Smart #define pde6_oprx_WORD word2
22486c8eea54SJames Smart #define pde6_nr_SHIFT 23
22496c8eea54SJames Smart #define pde6_nr_MASK 0x00000001
22506c8eea54SJames Smart #define pde6_nr_WORD word2
22516c8eea54SJames Smart #define pde6_ce_SHIFT 22
22526c8eea54SJames Smart #define pde6_ce_MASK 0x00000001
22536c8eea54SJames Smart #define pde6_ce_WORD word2
22546c8eea54SJames Smart #define pde6_re_SHIFT 21
22556c8eea54SJames Smart #define pde6_re_MASK 0x00000001
22566c8eea54SJames Smart #define pde6_re_WORD word2
22576c8eea54SJames Smart #define pde6_ae_SHIFT 20
22586c8eea54SJames Smart #define pde6_ae_MASK 0x00000001
22596c8eea54SJames Smart #define pde6_ae_WORD word2
22606c8eea54SJames Smart #define pde6_ai_SHIFT 19
22616c8eea54SJames Smart #define pde6_ai_MASK 0x00000001
22626c8eea54SJames Smart #define pde6_ai_WORD word2
22636c8eea54SJames Smart #define pde6_bs_SHIFT 16
22646c8eea54SJames Smart #define pde6_bs_MASK 0x00000007
22656c8eea54SJames Smart #define pde6_bs_WORD word2
22666c8eea54SJames Smart #define pde6_apptagval_SHIFT 0
22676c8eea54SJames Smart #define pde6_apptagval_MASK 0x0000ffff
22686c8eea54SJames Smart #define pde6_apptagval_WORD word2
226981301a9bSJames Smart };
227081301a9bSJames Smart
22717f86059aSJames Smart struct lpfc_pde7 {
22727f86059aSJames Smart uint32_t word0;
22737f86059aSJames Smart #define pde7_type_SHIFT 24
22747f86059aSJames Smart #define pde7_type_MASK 0x000000ff
22757f86059aSJames Smart #define pde7_type_WORD word0
22767f86059aSJames Smart #define pde7_rsvd0_SHIFT 0
22777f86059aSJames Smart #define pde7_rsvd0_MASK 0x00ffffff
22787f86059aSJames Smart #define pde7_rsvd0_WORD word0
22797f86059aSJames Smart uint32_t addrHigh;
22807f86059aSJames Smart uint32_t addrLow;
22817f86059aSJames Smart };
228281301a9bSJames Smart
2283dea3101eS /* Structure for MB Command LOAD_SM and DOWN_LOAD */
2284dea3101eS
2285dea3101eS typedef struct {
2286dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2287dea3101eS uint32_t rsvd2:25;
2288dea3101eS uint32_t acknowledgment:1;
2289dea3101eS uint32_t version:1;
2290dea3101eS uint32_t erase_or_prog:1;
2291dea3101eS uint32_t update_flash:1;
2292dea3101eS uint32_t update_ram:1;
2293dea3101eS uint32_t method:1;
2294dea3101eS uint32_t load_cmplt:1;
2295dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2296dea3101eS uint32_t load_cmplt:1;
2297dea3101eS uint32_t method:1;
2298dea3101eS uint32_t update_ram:1;
2299dea3101eS uint32_t update_flash:1;
2300dea3101eS uint32_t erase_or_prog:1;
2301dea3101eS uint32_t version:1;
2302dea3101eS uint32_t acknowledgment:1;
2303dea3101eS uint32_t rsvd2:25;
2304dea3101eS #endif
2305dea3101eS
2306dea3101eS uint32_t dl_to_adr_low;
2307dea3101eS uint32_t dl_to_adr_high;
2308dea3101eS uint32_t dl_len;
2309dea3101eS union {
2310dea3101eS uint32_t dl_from_mbx_offset;
2311dea3101eS struct ulp_bde dl_from_bde;
2312dea3101eS struct ulp_bde64 dl_from_bde64;
2313dea3101eS } un;
2314dea3101eS
2315dea3101eS } LOAD_SM_VAR;
2316dea3101eS
2317dea3101eS /* Structure for MB Command READ_NVPARM (02) */
2318dea3101eS
2319dea3101eS typedef struct {
2320dea3101eS uint32_t rsvd1[3]; /* Read as all one's */
2321dea3101eS uint32_t rsvd2; /* Read as all zero's */
2322dea3101eS uint32_t portname[2]; /* N_PORT name */
2323dea3101eS uint32_t nodename[2]; /* NODE name */
2324dea3101eS
2325dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2326dea3101eS uint32_t pref_DID:24;
2327dea3101eS uint32_t hardAL_PA:8;
2328dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2329dea3101eS uint32_t hardAL_PA:8;
2330dea3101eS uint32_t pref_DID:24;
2331dea3101eS #endif
2332dea3101eS
2333dea3101eS uint32_t rsvd3[21]; /* Read as all one's */
2334dea3101eS } READ_NV_VAR;
2335dea3101eS
2336dea3101eS /* Structure for MB Command WRITE_NVPARMS (03) */
2337dea3101eS
2338dea3101eS typedef struct {
2339dea3101eS uint32_t rsvd1[3]; /* Must be all one's */
2340dea3101eS uint32_t rsvd2; /* Must be all zero's */
2341dea3101eS uint32_t portname[2]; /* N_PORT name */
2342dea3101eS uint32_t nodename[2]; /* NODE name */
2343dea3101eS
2344dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2345dea3101eS uint32_t pref_DID:24;
2346dea3101eS uint32_t hardAL_PA:8;
2347dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2348dea3101eS uint32_t hardAL_PA:8;
2349dea3101eS uint32_t pref_DID:24;
2350dea3101eS #endif
2351dea3101eS
2352dea3101eS uint32_t rsvd3[21]; /* Must be all one's */
2353dea3101eS } WRITE_NV_VAR;
2354dea3101eS
2355dea3101eS /* Structure for MB Command RUN_BIU_DIAG (04) */
2356dea3101eS /* Structure for MB Command RUN_BIU_DIAG64 (0x84) */
2357dea3101eS
2358dea3101eS typedef struct {
2359dea3101eS uint32_t rsvd1;
2360dea3101eS union {
2361dea3101eS struct {
2362dea3101eS struct ulp_bde xmit_bde;
2363dea3101eS struct ulp_bde rcv_bde;
2364dea3101eS } s1;
2365dea3101eS struct {
2366dea3101eS struct ulp_bde64 xmit_bde64;
2367dea3101eS struct ulp_bde64 rcv_bde64;
2368dea3101eS } s2;
2369dea3101eS } un;
2370dea3101eS } BIU_DIAG_VAR;
2371dea3101eS
2372c7495937SJames Smart /* Structure for MB command READ_EVENT_LOG (0x38) */
2373c7495937SJames Smart struct READ_EVENT_LOG_VAR {
2374c7495937SJames Smart uint32_t word1;
2375c7495937SJames Smart #define lpfc_event_log_SHIFT 29
2376c7495937SJames Smart #define lpfc_event_log_MASK 0x00000001
2377c7495937SJames Smart #define lpfc_event_log_WORD word1
2378c7495937SJames Smart #define USE_MAILBOX_RESPONSE 1
2379c7495937SJames Smart uint32_t offset;
2380c7495937SJames Smart struct ulp_bde64 rcv_bde64;
2381c7495937SJames Smart };
2382c7495937SJames Smart
2383dea3101eS /* Structure for MB Command INIT_LINK (05) */
2384dea3101eS
2385dea3101eS typedef struct {
2386dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2387dea3101eS uint32_t rsvd1:24;
2388dea3101eS uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2389dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2390dea3101eS uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2391dea3101eS uint32_t rsvd1:24;
2392dea3101eS #endif
2393dea3101eS
2394dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2395dea3101eS uint8_t fabric_AL_PA; /* If using a Fabric Assigned AL_PA */
2396dea3101eS uint8_t rsvd2;
2397dea3101eS uint16_t link_flags;
2398dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2399dea3101eS uint16_t link_flags;
2400dea3101eS uint8_t rsvd2;
2401dea3101eS uint8_t fabric_AL_PA; /* If using a Fabric Assigned AL_PA */
2402dea3101eS #endif
2403dea3101eS
2404dea3101eS #define FLAGS_TOPOLOGY_MODE_LOOP_PT 0x00 /* Attempt loop then pt-pt */
24051b51197dSJames Smart #define FLAGS_LOCAL_LB 0x01 /* link_flags (=1) ENDEC loopback */
2406dea3101eS #define FLAGS_TOPOLOGY_MODE_PT_PT 0x02 /* Attempt pt-pt only */
2407dea3101eS #define FLAGS_TOPOLOGY_MODE_LOOP 0x04 /* Attempt loop only */
2408dea3101eS #define FLAGS_TOPOLOGY_MODE_PT_LOOP 0x06 /* Attempt pt-pt then loop */
2409ed957684SJames Smart #define FLAGS_UNREG_LOGIN_ALL 0x08 /* UNREG_LOGIN all on link down */
2410dea3101eS #define FLAGS_LIRP_LILP 0x80 /* LIRP / LILP is disabled */
2411dea3101eS
2412dea3101eS #define FLAGS_TOPOLOGY_FAILOVER 0x0400 /* Bit 10 */
2413dea3101eS #define FLAGS_LINK_SPEED 0x0800 /* Bit 11 */
24144b0b91d4SJames Smart #define FLAGS_IMED_ABORT 0x04000 /* Bit 14 */
2415dea3101eS
2416dea3101eS uint32_t link_speed;
241776a95d75SJames Smart #define LINK_SPEED_AUTO 0x0 /* Auto selection */
241876a95d75SJames Smart #define LINK_SPEED_1G 0x1 /* 1 Gigabaud */
241976a95d75SJames Smart #define LINK_SPEED_2G 0x2 /* 2 Gigabaud */
242076a95d75SJames Smart #define LINK_SPEED_4G 0x4 /* 4 Gigabaud */
242176a95d75SJames Smart #define LINK_SPEED_8G 0x8 /* 8 Gigabaud */
242276a95d75SJames Smart #define LINK_SPEED_10G 0x10 /* 10 Gigabaud */
242376a95d75SJames Smart #define LINK_SPEED_16G 0x11 /* 16 Gigabaud */
2424d38dd52cSJames Smart #define LINK_SPEED_32G 0x14 /* 32 Gigabaud */
2425fbd8a6baSJames Smart #define LINK_SPEED_64G 0x17 /* 64 Gigabaud */
2426fbd8a6baSJames Smart #define LINK_SPEED_128G 0x1A /* 128 Gigabaud */
2427fbd8a6baSJames Smart #define LINK_SPEED_256G 0x1D /* 256 Gigabaud */
2428dea3101eS
2429dea3101eS } INIT_LINK_VAR;
2430dea3101eS
2431dea3101eS /* Structure for MB Command DOWN_LINK (06) */
2432dea3101eS
2433dea3101eS typedef struct {
2434dea3101eS uint32_t rsvd1;
2435dea3101eS } DOWN_LINK_VAR;
2436dea3101eS
2437dea3101eS /* Structure for MB Command CONFIG_LINK (07) */
2438dea3101eS
2439dea3101eS typedef struct {
2440dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2441dea3101eS uint32_t cr:1;
2442dea3101eS uint32_t ci:1;
2443dea3101eS uint32_t cr_delay:6;
2444dea3101eS uint32_t cr_count:8;
2445dea3101eS uint32_t rsvd1:8;
2446dea3101eS uint32_t MaxBBC:8;
2447dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2448dea3101eS uint32_t MaxBBC:8;
2449dea3101eS uint32_t rsvd1:8;
2450dea3101eS uint32_t cr_count:8;
2451dea3101eS uint32_t cr_delay:6;
2452dea3101eS uint32_t ci:1;
2453dea3101eS uint32_t cr:1;
2454dea3101eS #endif
2455dea3101eS
2456dea3101eS uint32_t myId;
2457dea3101eS uint32_t rsvd2;
2458dea3101eS uint32_t edtov;
2459dea3101eS uint32_t arbtov;
2460dea3101eS uint32_t ratov;
2461dea3101eS uint32_t rttov;
2462dea3101eS uint32_t altov;
2463dea3101eS uint32_t crtov;
246444fd7fe3SJames Smart
246544fd7fe3SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
246644fd7fe3SJames Smart uint32_t rsvd4:19;
246744fd7fe3SJames Smart uint32_t cscn:1;
246844fd7fe3SJames Smart uint32_t bbscn:4;
246944fd7fe3SJames Smart uint32_t rsvd3:8;
247044fd7fe3SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
247144fd7fe3SJames Smart uint32_t rsvd3:8;
247244fd7fe3SJames Smart uint32_t bbscn:4;
247344fd7fe3SJames Smart uint32_t cscn:1;
247444fd7fe3SJames Smart uint32_t rsvd4:19;
247544fd7fe3SJames Smart #endif
247644fd7fe3SJames Smart
2477dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2478dea3101eS uint32_t rrq_enable:1;
2479dea3101eS uint32_t rrq_immed:1;
248044fd7fe3SJames Smart uint32_t rsvd5:29;
2481dea3101eS uint32_t ack0_enable:1;
2482dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2483dea3101eS uint32_t ack0_enable:1;
248444fd7fe3SJames Smart uint32_t rsvd5:29;
2485dea3101eS uint32_t rrq_immed:1;
2486dea3101eS uint32_t rrq_enable:1;
2487dea3101eS #endif
2488dea3101eS } CONFIG_LINK;
2489dea3101eS
2490dea3101eS /* Structure for MB Command PART_SLIM (08)
2491dea3101eS * will be removed since SLI1 is no longer supported!
2492dea3101eS */
2493dea3101eS typedef struct {
2494dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2495dea3101eS uint16_t offCiocb;
2496dea3101eS uint16_t numCiocb;
2497dea3101eS uint16_t offRiocb;
2498dea3101eS uint16_t numRiocb;
2499dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2500dea3101eS uint16_t numCiocb;
2501dea3101eS uint16_t offCiocb;
2502dea3101eS uint16_t numRiocb;
2503dea3101eS uint16_t offRiocb;
2504dea3101eS #endif
2505dea3101eS } RING_DEF;
2506dea3101eS
2507dea3101eS typedef struct {
2508dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2509dea3101eS uint32_t unused1:24;
2510dea3101eS uint32_t numRing:8;
2511dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2512dea3101eS uint32_t numRing:8;
2513dea3101eS uint32_t unused1:24;
2514dea3101eS #endif
2515dea3101eS
2516dea3101eS RING_DEF ringdef[4];
2517dea3101eS uint32_t hbainit;
2518dea3101eS } PART_SLIM_VAR;
2519dea3101eS
2520dea3101eS /* Structure for MB Command CONFIG_RING (09) */
2521dea3101eS
2522dea3101eS typedef struct {
2523dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2524dea3101eS uint32_t unused2:6;
2525dea3101eS uint32_t recvSeq:1;
2526dea3101eS uint32_t recvNotify:1;
2527dea3101eS uint32_t numMask:8;
2528dea3101eS uint32_t profile:8;
2529dea3101eS uint32_t unused1:4;
2530dea3101eS uint32_t ring:4;
2531dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2532dea3101eS uint32_t ring:4;
2533dea3101eS uint32_t unused1:4;
2534dea3101eS uint32_t profile:8;
2535dea3101eS uint32_t numMask:8;
2536dea3101eS uint32_t recvNotify:1;
2537dea3101eS uint32_t recvSeq:1;
2538dea3101eS uint32_t unused2:6;
2539dea3101eS #endif
2540dea3101eS
2541dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2542dea3101eS uint16_t maxRespXchg;
2543dea3101eS uint16_t maxOrigXchg;
2544dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2545dea3101eS uint16_t maxOrigXchg;
2546dea3101eS uint16_t maxRespXchg;
2547dea3101eS #endif
2548dea3101eS
2549dea3101eS RR_REG rrRegs[6];
2550dea3101eS } CONFIG_RING_VAR;
2551dea3101eS
2552dea3101eS /* Structure for MB Command RESET_RING (10) */
2553dea3101eS
2554dea3101eS typedef struct {
2555dea3101eS uint32_t ring_no;
2556dea3101eS } RESET_RING_VAR;
2557dea3101eS
2558dea3101eS /* Structure for MB Command READ_CONFIG (11) */
2559dea3101eS
2560dea3101eS typedef struct {
2561dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2562dea3101eS uint32_t cr:1;
2563dea3101eS uint32_t ci:1;
2564dea3101eS uint32_t cr_delay:6;
2565dea3101eS uint32_t cr_count:8;
2566dea3101eS uint32_t InitBBC:8;
2567dea3101eS uint32_t MaxBBC:8;
2568dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2569dea3101eS uint32_t MaxBBC:8;
2570dea3101eS uint32_t InitBBC:8;
2571dea3101eS uint32_t cr_count:8;
2572dea3101eS uint32_t cr_delay:6;
2573dea3101eS uint32_t ci:1;
2574dea3101eS uint32_t cr:1;
2575dea3101eS #endif
2576dea3101eS
2577dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2578dea3101eS uint32_t topology:8;
2579dea3101eS uint32_t myDid:24;
2580dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2581dea3101eS uint32_t myDid:24;
2582dea3101eS uint32_t topology:8;
2583dea3101eS #endif
2584dea3101eS
2585dea3101eS /* Defines for topology (defined previously) */
2586dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2587dea3101eS uint32_t AR:1;
2588dea3101eS uint32_t IR:1;
2589dea3101eS uint32_t rsvd1:29;
2590dea3101eS uint32_t ack0:1;
2591dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2592dea3101eS uint32_t ack0:1;
2593dea3101eS uint32_t rsvd1:29;
2594dea3101eS uint32_t IR:1;
2595dea3101eS uint32_t AR:1;
2596dea3101eS #endif
2597dea3101eS
2598dea3101eS uint32_t edtov;
2599dea3101eS uint32_t arbtov;
2600dea3101eS uint32_t ratov;
2601dea3101eS uint32_t rttov;
2602dea3101eS uint32_t altov;
2603dea3101eS uint32_t lmt;
260474b72a59SJamie Wellnitz #define LMT_RESERVED 0x000 /* Not used */
260574b72a59SJamie Wellnitz #define LMT_1Gb 0x004
260674b72a59SJamie Wellnitz #define LMT_2Gb 0x008
260774b72a59SJamie Wellnitz #define LMT_4Gb 0x040
260874b72a59SJamie Wellnitz #define LMT_8Gb 0x080
260974b72a59SJamie Wellnitz #define LMT_10Gb 0x100
261076a95d75SJames Smart #define LMT_16Gb 0x200
2611d38dd52cSJames Smart #define LMT_32Gb 0x400
2612fbd8a6baSJames Smart #define LMT_64Gb 0x800
2613fbd8a6baSJames Smart #define LMT_128Gb 0x1000
2614fbd8a6baSJames Smart #define LMT_256Gb 0x2000
2615dea3101eS uint32_t rsvd2;
2616dea3101eS uint32_t rsvd3;
2617dea3101eS uint32_t max_xri;
2618dea3101eS uint32_t max_iocb;
2619dea3101eS uint32_t max_rpi;
2620dea3101eS uint32_t avail_xri;
2621dea3101eS uint32_t avail_iocb;
2622dea3101eS uint32_t avail_rpi;
2623858c9f6cSJames Smart uint32_t max_vpi;
2624858c9f6cSJames Smart uint32_t rsvd4;
2625858c9f6cSJames Smart uint32_t rsvd5;
2626858c9f6cSJames Smart uint32_t avail_vpi;
2627dea3101eS } READ_CONFIG_VAR;
2628dea3101eS
2629dea3101eS /* Structure for MB Command READ_RCONFIG (12) */
2630dea3101eS
2631dea3101eS typedef struct {
2632dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2633dea3101eS uint32_t rsvd2:7;
2634dea3101eS uint32_t recvNotify:1;
2635dea3101eS uint32_t numMask:8;
2636dea3101eS uint32_t profile:8;
2637dea3101eS uint32_t rsvd1:4;
2638dea3101eS uint32_t ring:4;
2639dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2640dea3101eS uint32_t ring:4;
2641dea3101eS uint32_t rsvd1:4;
2642dea3101eS uint32_t profile:8;
2643dea3101eS uint32_t numMask:8;
2644dea3101eS uint32_t recvNotify:1;
2645dea3101eS uint32_t rsvd2:7;
2646dea3101eS #endif
2647dea3101eS
2648dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2649dea3101eS uint16_t maxResp;
2650dea3101eS uint16_t maxOrig;
2651dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2652dea3101eS uint16_t maxOrig;
2653dea3101eS uint16_t maxResp;
2654dea3101eS #endif
2655dea3101eS
2656dea3101eS RR_REG rrRegs[6];
2657dea3101eS
2658dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2659dea3101eS uint16_t cmdRingOffset;
2660dea3101eS uint16_t cmdEntryCnt;
2661dea3101eS uint16_t rspRingOffset;
2662dea3101eS uint16_t rspEntryCnt;
2663dea3101eS uint16_t nextCmdOffset;
2664dea3101eS uint16_t rsvd3;
2665dea3101eS uint16_t nextRspOffset;
2666dea3101eS uint16_t rsvd4;
2667dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2668dea3101eS uint16_t cmdEntryCnt;
2669dea3101eS uint16_t cmdRingOffset;
2670dea3101eS uint16_t rspEntryCnt;
2671dea3101eS uint16_t rspRingOffset;
2672dea3101eS uint16_t rsvd3;
2673dea3101eS uint16_t nextCmdOffset;
2674dea3101eS uint16_t rsvd4;
2675dea3101eS uint16_t nextRspOffset;
2676dea3101eS #endif
2677dea3101eS } READ_RCONF_VAR;
2678dea3101eS
2679dea3101eS /* Structure for MB Command READ_SPARM (13) */
2680dea3101eS /* Structure for MB Command READ_SPARM64 (0x8D) */
2681dea3101eS
2682dea3101eS typedef struct {
2683dea3101eS uint32_t rsvd1;
2684dea3101eS uint32_t rsvd2;
2685dea3101eS union {
2686dea3101eS struct ulp_bde sp; /* This BDE points to struct serv_parm
2687dea3101eS structure */
2688dea3101eS struct ulp_bde64 sp64;
2689dea3101eS } un;
2690ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
2691ed957684SJames Smart uint16_t rsvd3;
2692ed957684SJames Smart uint16_t vpi;
2693ed957684SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
2694ed957684SJames Smart uint16_t vpi;
2695ed957684SJames Smart uint16_t rsvd3;
2696ed957684SJames Smart #endif
2697dea3101eS } READ_SPARM_VAR;
2698dea3101eS
2699dea3101eS /* Structure for MB Command READ_STATUS (14) */
2700f4fbf4acSJames Smart enum read_status_word1 {
2701f4fbf4acSJames Smart RD_ST_CC = 0x01,
2702f4fbf4acSJames Smart RD_ST_XKB = 0x80,
2703f4fbf4acSJames Smart };
2704f4fbf4acSJames Smart
2705f4fbf4acSJames Smart enum read_status_word17 {
2706f4fbf4acSJames Smart RD_ST_XMIT_XKB_MASK = 0x3fffff,
2707f4fbf4acSJames Smart };
2708f4fbf4acSJames Smart
2709f4fbf4acSJames Smart enum read_status_word18 {
2710f4fbf4acSJames Smart RD_ST_RCV_XKB_MASK = 0x3fffff,
2711f4fbf4acSJames Smart };
2712dea3101eS
2713dea3101eS typedef struct {
2714f4fbf4acSJames Smart u8 clear_counters; /* rsvd 7:1, cc 0 */
2715f4fbf4acSJames Smart u8 rsvd5;
2716f4fbf4acSJames Smart u8 rsvd6;
2717f4fbf4acSJames Smart u8 xkb; /* xkb 7, rsvd 6:0 */
2718f4fbf4acSJames Smart
2719f4fbf4acSJames Smart u32 rsvd8;
2720dea3101eS
2721dea3101eS uint32_t xmitByteCnt;
2722dea3101eS uint32_t rcvByteCnt;
2723dea3101eS uint32_t xmitFrameCnt;
2724dea3101eS uint32_t rcvFrameCnt;
2725dea3101eS uint32_t xmitSeqCnt;
2726dea3101eS uint32_t rcvSeqCnt;
2727dea3101eS uint32_t totalOrigExchanges;
2728dea3101eS uint32_t totalRespExchanges;
2729dea3101eS uint32_t rcvPbsyCnt;
2730dea3101eS uint32_t rcvFbsyCnt;
2731f4fbf4acSJames Smart
2732f4fbf4acSJames Smart u32 drop_frame_no_rq;
2733f4fbf4acSJames Smart u32 empty_rq;
2734f4fbf4acSJames Smart u32 drop_frame_no_xri;
2735f4fbf4acSJames Smart u32 empty_xri;
2736f4fbf4acSJames Smart
2737f4fbf4acSJames Smart u32 xmit_xkb; /* rsvd 31:22, xmit_xkb 21:0 */
2738f4fbf4acSJames Smart u32 rcv_xkb; /* rsvd 31:22, rcv_xkb 21:0 */
2739dea3101eS } READ_STATUS_VAR;
2740dea3101eS
2741dea3101eS /* Structure for MB Command READ_RPI (15) */
2742dea3101eS /* Structure for MB Command READ_RPI64 (0x8F) */
2743dea3101eS
2744dea3101eS typedef struct {
2745dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2746dea3101eS uint16_t nextRpi;
2747dea3101eS uint16_t reqRpi;
2748dea3101eS uint32_t rsvd2:8;
2749dea3101eS uint32_t DID:24;
2750dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2751dea3101eS uint16_t reqRpi;
2752dea3101eS uint16_t nextRpi;
2753dea3101eS uint32_t DID:24;
2754dea3101eS uint32_t rsvd2:8;
2755dea3101eS #endif
2756dea3101eS
2757dea3101eS union {
2758dea3101eS struct ulp_bde sp;
2759dea3101eS struct ulp_bde64 sp64;
2760dea3101eS } un;
2761dea3101eS
2762dea3101eS } READ_RPI_VAR;
2763dea3101eS
2764dea3101eS /* Structure for MB Command READ_XRI (16) */
2765dea3101eS
2766dea3101eS typedef struct {
2767dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2768dea3101eS uint16_t nextXri;
2769dea3101eS uint16_t reqXri;
2770dea3101eS uint16_t rsvd1;
2771dea3101eS uint16_t rpi;
2772dea3101eS uint32_t rsvd2:8;
2773dea3101eS uint32_t DID:24;
2774dea3101eS uint32_t rsvd3:8;
2775dea3101eS uint32_t SID:24;
2776dea3101eS uint32_t rsvd4;
2777dea3101eS uint8_t seqId;
2778dea3101eS uint8_t rsvd5;
2779dea3101eS uint16_t seqCount;
2780dea3101eS uint16_t oxId;
2781dea3101eS uint16_t rxId;
2782dea3101eS uint32_t rsvd6:30;
2783dea3101eS uint32_t si:1;
2784dea3101eS uint32_t exchOrig:1;
2785dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2786dea3101eS uint16_t reqXri;
2787dea3101eS uint16_t nextXri;
2788dea3101eS uint16_t rpi;
2789dea3101eS uint16_t rsvd1;
2790dea3101eS uint32_t DID:24;
2791dea3101eS uint32_t rsvd2:8;
2792dea3101eS uint32_t SID:24;
2793dea3101eS uint32_t rsvd3:8;
2794dea3101eS uint32_t rsvd4;
2795dea3101eS uint16_t seqCount;
2796dea3101eS uint8_t rsvd5;
2797dea3101eS uint8_t seqId;
2798dea3101eS uint16_t rxId;
2799dea3101eS uint16_t oxId;
2800dea3101eS uint32_t exchOrig:1;
2801dea3101eS uint32_t si:1;
2802dea3101eS uint32_t rsvd6:30;
2803dea3101eS #endif
2804dea3101eS } READ_XRI_VAR;
2805dea3101eS
2806dea3101eS /* Structure for MB Command READ_REV (17) */
2807dea3101eS
2808dea3101eS typedef struct {
2809dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2810dea3101eS uint32_t cv:1;
2811dea3101eS uint32_t rr:1;
2812ed957684SJames Smart uint32_t rsvd2:2;
2813ed957684SJames Smart uint32_t v3req:1;
2814ed957684SJames Smart uint32_t v3rsp:1;
2815ed957684SJames Smart uint32_t rsvd1:25;
2816dea3101eS uint32_t rv:1;
2817dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2818dea3101eS uint32_t rv:1;
2819ed957684SJames Smart uint32_t rsvd1:25;
2820ed957684SJames Smart uint32_t v3rsp:1;
2821ed957684SJames Smart uint32_t v3req:1;
2822ed957684SJames Smart uint32_t rsvd2:2;
2823dea3101eS uint32_t rr:1;
2824dea3101eS uint32_t cv:1;
2825dea3101eS #endif
2826dea3101eS
2827dea3101eS uint32_t biuRev;
2828dea3101eS uint32_t smRev;
2829dea3101eS union {
2830dea3101eS uint32_t smFwRev;
2831dea3101eS struct {
2832dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2833dea3101eS uint8_t ProgType;
2834dea3101eS uint8_t ProgId;
2835dea3101eS uint16_t ProgVer:4;
2836dea3101eS uint16_t ProgRev:4;
2837dea3101eS uint16_t ProgFixLvl:2;
2838dea3101eS uint16_t ProgDistType:2;
2839dea3101eS uint16_t DistCnt:4;
2840dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2841dea3101eS uint16_t DistCnt:4;
2842dea3101eS uint16_t ProgDistType:2;
2843dea3101eS uint16_t ProgFixLvl:2;
2844dea3101eS uint16_t ProgRev:4;
2845dea3101eS uint16_t ProgVer:4;
2846dea3101eS uint8_t ProgId;
2847dea3101eS uint8_t ProgType;
2848dea3101eS #endif
2849dea3101eS
2850dea3101eS } b;
2851dea3101eS } un;
2852dea3101eS uint32_t endecRev;
2853dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2854dea3101eS uint8_t feaLevelHigh;
2855dea3101eS uint8_t feaLevelLow;
2856dea3101eS uint8_t fcphHigh;
2857dea3101eS uint8_t fcphLow;
2858dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2859dea3101eS uint8_t fcphLow;
2860dea3101eS uint8_t fcphHigh;
2861dea3101eS uint8_t feaLevelLow;
2862dea3101eS uint8_t feaLevelHigh;
2863dea3101eS #endif
2864dea3101eS
2865dea3101eS uint32_t postKernRev;
2866dea3101eS uint32_t opFwRev;
2867dea3101eS uint8_t opFwName[16];
2868dea3101eS uint32_t sli1FwRev;
2869dea3101eS uint8_t sli1FwName[16];
2870dea3101eS uint32_t sli2FwRev;
2871dea3101eS uint8_t sli2FwName[16];
2872ed957684SJames Smart uint32_t sli3Feat;
2873ed957684SJames Smart uint32_t RandomData[6];
2874dea3101eS } READ_REV_VAR;
2875dea3101eS
2876dea3101eS /* Structure for MB Command READ_LINK_STAT (18) */
2877dea3101eS
2878dea3101eS typedef struct {
28794258e98eSJames Smart uint32_t word0;
28804258e98eSJames Smart
28814258e98eSJames Smart #define lpfc_read_link_stat_rec_SHIFT 0
28824258e98eSJames Smart #define lpfc_read_link_stat_rec_MASK 0x1
28834258e98eSJames Smart #define lpfc_read_link_stat_rec_WORD word0
28844258e98eSJames Smart
28854258e98eSJames Smart #define lpfc_read_link_stat_gec_SHIFT 1
28864258e98eSJames Smart #define lpfc_read_link_stat_gec_MASK 0x1
28874258e98eSJames Smart #define lpfc_read_link_stat_gec_WORD word0
28884258e98eSJames Smart
28894258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_SHIFT 2
28904258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_MASK 0x3FFFFF
28914258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_WORD word0
28924258e98eSJames Smart
28934258e98eSJames Smart #define lpfc_read_link_stat_rsvd_SHIFT 24
28944258e98eSJames Smart #define lpfc_read_link_stat_rsvd_MASK 0x1F
28954258e98eSJames Smart #define lpfc_read_link_stat_rsvd_WORD word0
28964258e98eSJames Smart
28974258e98eSJames Smart #define lpfc_read_link_stat_gec2_SHIFT 29
28984258e98eSJames Smart #define lpfc_read_link_stat_gec2_MASK 0x1
28994258e98eSJames Smart #define lpfc_read_link_stat_gec2_WORD word0
29004258e98eSJames Smart
29014258e98eSJames Smart #define lpfc_read_link_stat_clrc_SHIFT 30
29024258e98eSJames Smart #define lpfc_read_link_stat_clrc_MASK 0x1
29034258e98eSJames Smart #define lpfc_read_link_stat_clrc_WORD word0
29044258e98eSJames Smart
29054258e98eSJames Smart #define lpfc_read_link_stat_clof_SHIFT 31
29064258e98eSJames Smart #define lpfc_read_link_stat_clof_MASK 0x1
29074258e98eSJames Smart #define lpfc_read_link_stat_clof_WORD word0
29084258e98eSJames Smart
2909dea3101eS uint32_t linkFailureCnt;
2910dea3101eS uint32_t lossSyncCnt;
2911dea3101eS uint32_t lossSignalCnt;
2912dea3101eS uint32_t primSeqErrCnt;
2913dea3101eS uint32_t invalidXmitWord;
2914dea3101eS uint32_t crcCnt;
2915dea3101eS uint32_t primSeqTimeout;
2916dea3101eS uint32_t elasticOverrun;
2917dea3101eS uint32_t arbTimeout;
29184258e98eSJames Smart uint32_t advRecBufCredit;
29194258e98eSJames Smart uint32_t curRecBufCredit;
29204258e98eSJames Smart uint32_t advTransBufCredit;
29214258e98eSJames Smart uint32_t curTransBufCredit;
29224258e98eSJames Smart uint32_t recEofCount;
29234258e98eSJames Smart uint32_t recEofdtiCount;
29244258e98eSJames Smart uint32_t recEofniCount;
29254258e98eSJames Smart uint32_t recSofcount;
29264258e98eSJames Smart uint32_t rsvd1;
29274258e98eSJames Smart uint32_t rsvd2;
29284258e98eSJames Smart uint32_t recDrpXriCount;
29294258e98eSJames Smart uint32_t fecCorrBlkCount;
29304258e98eSJames Smart uint32_t fecUncorrBlkCount;
2931dea3101eS } READ_LNK_VAR;
2932dea3101eS
2933dea3101eS /* Structure for MB Command REG_LOGIN (19) */
2934dea3101eS /* Structure for MB Command REG_LOGIN64 (0x93) */
2935dea3101eS
2936dea3101eS typedef struct {
2937dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2938dea3101eS uint16_t rsvd1;
2939dea3101eS uint16_t rpi;
2940dea3101eS uint32_t rsvd2:8;
2941dea3101eS uint32_t did:24;
2942dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2943dea3101eS uint16_t rpi;
2944dea3101eS uint16_t rsvd1;
2945dea3101eS uint32_t did:24;
2946dea3101eS uint32_t rsvd2:8;
2947dea3101eS #endif
2948dea3101eS
2949dea3101eS union {
2950dea3101eS struct ulp_bde sp;
2951dea3101eS struct ulp_bde64 sp64;
2952dea3101eS } un;
2953dea3101eS
2954ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
2955ed957684SJames Smart uint16_t rsvd6;
2956ed957684SJames Smart uint16_t vpi;
2957ed957684SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
2958ed957684SJames Smart uint16_t vpi;
2959ed957684SJames Smart uint16_t rsvd6;
2960ed957684SJames Smart #endif
2961ed957684SJames Smart
2962dea3101eS } REG_LOGIN_VAR;
2963dea3101eS
2964dea3101eS /* Word 30 contents for REG_LOGIN */
2965dea3101eS typedef union {
2966dea3101eS struct {
2967dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2968dea3101eS uint16_t rsvd1:12;
2969dea3101eS uint16_t wd30_class:4;
2970dea3101eS uint16_t xri;
2971dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2972dea3101eS uint16_t xri;
2973dea3101eS uint16_t wd30_class:4;
2974dea3101eS uint16_t rsvd1:12;
2975dea3101eS #endif
2976dea3101eS } f;
2977dea3101eS uint32_t word;
2978dea3101eS } REG_WD30;
2979dea3101eS
2980dea3101eS /* Structure for MB Command UNREG_LOGIN (20) */
2981dea3101eS
2982dea3101eS typedef struct {
2983dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
2984dea3101eS uint16_t rsvd1;
2985dea3101eS uint16_t rpi;
2986ed957684SJames Smart uint32_t rsvd2;
2987ed957684SJames Smart uint32_t rsvd3;
2988ed957684SJames Smart uint32_t rsvd4;
2989ed957684SJames Smart uint32_t rsvd5;
2990ed957684SJames Smart uint16_t rsvd6;
2991ed957684SJames Smart uint16_t vpi;
2992dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
2993dea3101eS uint16_t rpi;
2994dea3101eS uint16_t rsvd1;
2995ed957684SJames Smart uint32_t rsvd2;
2996ed957684SJames Smart uint32_t rsvd3;
2997ed957684SJames Smart uint32_t rsvd4;
2998ed957684SJames Smart uint32_t rsvd5;
2999ed957684SJames Smart uint16_t vpi;
3000ed957684SJames Smart uint16_t rsvd6;
3001dea3101eS #endif
3002dea3101eS } UNREG_LOGIN_VAR;
3003dea3101eS
300492d7f7b0SJames Smart /* Structure for MB Command REG_VPI (0x96) */
300592d7f7b0SJames Smart typedef struct {
300692d7f7b0SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
300792d7f7b0SJames Smart uint32_t rsvd1;
300838b92ef8SJames Smart uint32_t rsvd2:7;
300938b92ef8SJames Smart uint32_t upd:1;
301092d7f7b0SJames Smart uint32_t sid:24;
3011c868595dSJames Smart uint32_t wwn[2];
301292d7f7b0SJames Smart uint32_t rsvd5;
3013da0436e9SJames Smart uint16_t vfi;
301492d7f7b0SJames Smart uint16_t vpi;
301592d7f7b0SJames Smart #else /* __LITTLE_ENDIAN */
301692d7f7b0SJames Smart uint32_t rsvd1;
301792d7f7b0SJames Smart uint32_t sid:24;
301838b92ef8SJames Smart uint32_t upd:1;
301938b92ef8SJames Smart uint32_t rsvd2:7;
3020c868595dSJames Smart uint32_t wwn[2];
302192d7f7b0SJames Smart uint32_t rsvd5;
302292d7f7b0SJames Smart uint16_t vpi;
3023da0436e9SJames Smart uint16_t vfi;
302492d7f7b0SJames Smart #endif
302592d7f7b0SJames Smart } REG_VPI_VAR;
302692d7f7b0SJames Smart
302792d7f7b0SJames Smart /* Structure for MB Command UNREG_VPI (0x97) */
302892d7f7b0SJames Smart typedef struct {
302992d7f7b0SJames Smart uint32_t rsvd1;
30306669f9bbSJames Smart #ifdef __BIG_ENDIAN_BITFIELD
30316669f9bbSJames Smart uint16_t rsvd2;
30326669f9bbSJames Smart uint16_t sli4_vpi;
30336669f9bbSJames Smart #else /* __LITTLE_ENDIAN */
30346669f9bbSJames Smart uint16_t sli4_vpi;
30356669f9bbSJames Smart uint16_t rsvd2;
30366669f9bbSJames Smart #endif
303792d7f7b0SJames Smart uint32_t rsvd3;
303892d7f7b0SJames Smart uint32_t rsvd4;
303992d7f7b0SJames Smart uint32_t rsvd5;
304092d7f7b0SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
304192d7f7b0SJames Smart uint16_t rsvd6;
304292d7f7b0SJames Smart uint16_t vpi;
304392d7f7b0SJames Smart #else /* __LITTLE_ENDIAN */
304492d7f7b0SJames Smart uint16_t vpi;
304592d7f7b0SJames Smart uint16_t rsvd6;
304692d7f7b0SJames Smart #endif
304792d7f7b0SJames Smart } UNREG_VPI_VAR;
304892d7f7b0SJames Smart
3049dea3101eS /* Structure for MB Command UNREG_D_ID (0x23) */
3050dea3101eS
3051dea3101eS typedef struct {
3052dea3101eS uint32_t did;
3053ed957684SJames Smart uint32_t rsvd2;
3054ed957684SJames Smart uint32_t rsvd3;
3055ed957684SJames Smart uint32_t rsvd4;
3056ed957684SJames Smart uint32_t rsvd5;
3057ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3058ed957684SJames Smart uint16_t rsvd6;
3059ed957684SJames Smart uint16_t vpi;
3060ed957684SJames Smart #else
3061ed957684SJames Smart uint16_t vpi;
3062ed957684SJames Smart uint16_t rsvd6;
3063ed957684SJames Smart #endif
3064dea3101eS } UNREG_D_ID_VAR;
3065dea3101eS
306676a95d75SJames Smart /* Structure for MB Command READ_TOPOLOGY (0x95) */
306776a95d75SJames Smart struct lpfc_mbx_read_top {
3068dea3101eS uint32_t eventTag; /* Event tag */
306976a95d75SJames Smart uint32_t word2;
307076a95d75SJames Smart #define lpfc_mbx_read_top_fa_SHIFT 12
307176a95d75SJames Smart #define lpfc_mbx_read_top_fa_MASK 0x00000001
307276a95d75SJames Smart #define lpfc_mbx_read_top_fa_WORD word2
307376a95d75SJames Smart #define lpfc_mbx_read_top_mm_SHIFT 11
307476a95d75SJames Smart #define lpfc_mbx_read_top_mm_MASK 0x00000001
307576a95d75SJames Smart #define lpfc_mbx_read_top_mm_WORD word2
307676a95d75SJames Smart #define lpfc_mbx_read_top_pb_SHIFT 9
307776a95d75SJames Smart #define lpfc_mbx_read_top_pb_MASK 0X00000001
307876a95d75SJames Smart #define lpfc_mbx_read_top_pb_WORD word2
307976a95d75SJames Smart #define lpfc_mbx_read_top_il_SHIFT 8
308076a95d75SJames Smart #define lpfc_mbx_read_top_il_MASK 0x00000001
308176a95d75SJames Smart #define lpfc_mbx_read_top_il_WORD word2
308276a95d75SJames Smart #define lpfc_mbx_read_top_att_type_SHIFT 0
308376a95d75SJames Smart #define lpfc_mbx_read_top_att_type_MASK 0x000000FF
308476a95d75SJames Smart #define lpfc_mbx_read_top_att_type_WORD word2
308576a95d75SJames Smart #define LPFC_ATT_RESERVED 0x00 /* Reserved - attType */
308676a95d75SJames Smart #define LPFC_ATT_LINK_UP 0x01 /* Link is up */
308776a95d75SJames Smart #define LPFC_ATT_LINK_DOWN 0x02 /* Link is down */
3088aeb3c817SJames Smart #define LPFC_ATT_UNEXP_WWPN 0x06 /* Link is down Unexpected WWWPN */
308976a95d75SJames Smart uint32_t word3;
309076a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_SHIFT 24
309176a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_MASK 0x000000FF
309276a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_WORD word3
309376a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_SHIFT 16
309476a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_MASK 0x000000FF
309576a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_WORD word3
309676a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_SHIFT 8
309776a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_MASK 0x000000FF
309876a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_WORD word3
309976a95d75SJames Smart #define lpfc_mbx_read_top_topology_SHIFT 0
310076a95d75SJames Smart #define lpfc_mbx_read_top_topology_MASK 0x000000FF
310176a95d75SJames Smart #define lpfc_mbx_read_top_topology_WORD word3
310276a95d75SJames Smart #define LPFC_TOPOLOGY_PT_PT 0x01 /* Topology is pt-pt / pt-fabric */
310376a95d75SJames Smart #define LPFC_TOPOLOGY_LOOP 0x02 /* Topology is FC-AL */
3104dea3101eS /* store the LILP AL_PA position map into */
3105dea3101eS struct ulp_bde64 lilpBde64;
310676a95d75SJames Smart #define LPFC_ALPA_MAP_SIZE 128
310776a95d75SJames Smart uint32_t word7;
310876a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_SHIFT 31
310976a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_MASK 0x00000001
311076a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_WORD word7
311176a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_SHIFT 30
311276a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_MASK 0x00000001
311376a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_WORD word7
311476a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_SHIFT 8
311576a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_MASK 0x000000FF
311676a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_WORD word7
311776a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_SHIFT 4
311876a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_MASK 0x0000000F
311976a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_WORD word7
312076a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_SHIFT 2
312176a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_MASK 0x00000003
312276a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_WORD word7
312376a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_SHIFT 0
312476a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_MASK 0x00000003
312576a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_WORD word7
312676a95d75SJames Smart uint32_t word8;
312776a95d75SJames Smart #define lpfc_mbx_read_top_lu_SHIFT 31
312876a95d75SJames Smart #define lpfc_mbx_read_top_lu_MASK 0x00000001
312976a95d75SJames Smart #define lpfc_mbx_read_top_lu_WORD word8
313076a95d75SJames Smart #define lpfc_mbx_read_top_tf_SHIFT 30
313176a95d75SJames Smart #define lpfc_mbx_read_top_tf_MASK 0x00000001
313276a95d75SJames Smart #define lpfc_mbx_read_top_tf_WORD word8
313376a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_SHIFT 8
313476a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_MASK 0x000000FF
313576a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_WORD word8
313676a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_SHIFT 4
313776a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_MASK 0x0000000F
313876a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_WORD word8
313976a95d75SJames Smart #define lpfc_mbx_read_top_tx_SHIFT 2
314076a95d75SJames Smart #define lpfc_mbx_read_top_tx_MASK 0x00000003
314176a95d75SJames Smart #define lpfc_mbx_read_top_tx_WORD word8
314276a95d75SJames Smart #define lpfc_mbx_read_top_rx_SHIFT 0
314376a95d75SJames Smart #define lpfc_mbx_read_top_rx_MASK 0x00000003
314476a95d75SJames Smart #define lpfc_mbx_read_top_rx_WORD word8
314576a95d75SJames Smart #define LPFC_LINK_SPEED_UNKNOWN 0x0
314676a95d75SJames Smart #define LPFC_LINK_SPEED_1GHZ 0x04
314776a95d75SJames Smart #define LPFC_LINK_SPEED_2GHZ 0x08
314876a95d75SJames Smart #define LPFC_LINK_SPEED_4GHZ 0x10
314976a95d75SJames Smart #define LPFC_LINK_SPEED_8GHZ 0x20
315076a95d75SJames Smart #define LPFC_LINK_SPEED_10GHZ 0x40
315176a95d75SJames Smart #define LPFC_LINK_SPEED_16GHZ 0x80
3152d38dd52cSJames Smart #define LPFC_LINK_SPEED_32GHZ 0x90
3153fbd8a6baSJames Smart #define LPFC_LINK_SPEED_64GHZ 0xA0
3154fbd8a6baSJames Smart #define LPFC_LINK_SPEED_128GHZ 0xB0
3155fbd8a6baSJames Smart #define LPFC_LINK_SPEED_256GHZ 0xC0
315676a95d75SJames Smart };
3157dea3101eS
3158dea3101eS /* Structure for MB Command CLEAR_LA (22) */
3159dea3101eS
3160dea3101eS typedef struct {
3161dea3101eS uint32_t eventTag; /* Event tag */
3162dea3101eS uint32_t rsvd1;
3163dea3101eS } CLEAR_LA_VAR;
3164dea3101eS
3165dea3101eS /* Structure for MB Command DUMP */
3166dea3101eS
3167dea3101eS typedef struct {
3168dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3169dea3101eS uint32_t rsvd:25;
3170dea3101eS uint32_t ra:1;
3171dea3101eS uint32_t co:1;
3172dea3101eS uint32_t cv:1;
3173dea3101eS uint32_t type:4;
3174dea3101eS uint32_t entry_index:16;
3175dea3101eS uint32_t region_id:16;
3176dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3177dea3101eS uint32_t type:4;
3178dea3101eS uint32_t cv:1;
3179dea3101eS uint32_t co:1;
3180dea3101eS uint32_t ra:1;
3181dea3101eS uint32_t rsvd:25;
3182dea3101eS uint32_t region_id:16;
3183dea3101eS uint32_t entry_index:16;
3184dea3101eS #endif
3185dea3101eS
3186da0436e9SJames Smart uint32_t sli4_length;
3187dea3101eS uint32_t word_cnt;
3188dea3101eS uint32_t resp_offset;
3189dea3101eS } DUMP_VAR;
3190dea3101eS
3191dea3101eS #define DMP_MEM_REG 0x1
3192dea3101eS #define DMP_NV_PARAMS 0x2
31933ef6d24cSJames Smart #define DMP_LMSD 0x3 /* Link Module Serial Data */
31943ef6d24cSJames Smart #define DMP_WELL_KNOWN 0x4
3195dea3101eS
3196dea3101eS #define DMP_REGION_VPD 0xe
3197dea3101eS #define DMP_VPD_SIZE 0x400 /* maximum amount of VPD */
3198dea3101eS #define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */
3199dea3101eS #define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */
3200dea3101eS
3201da0436e9SJames Smart #define DMP_REGION_VPORT 0x16 /* VPort info region */
3202da0436e9SJames Smart #define DMP_VPORT_REGION_SIZE 0x200
3203da0436e9SJames Smart #define DMP_MBOX_OFFSET_WORD 0x5
3204da0436e9SJames Smart
3205a0c87cbdSJames Smart #define DMP_REGION_23 0x17 /* fcoe param and port state region */
3206a0c87cbdSJames Smart #define DMP_RGN23_SIZE 0x400
3207da0436e9SJames Smart
320897207482SJames Smart #define WAKE_UP_PARMS_REGION_ID 4
320997207482SJames Smart #define WAKE_UP_PARMS_WORD_SIZE 15
321097207482SJames Smart
3211da0436e9SJames Smart struct vport_rec {
3212da0436e9SJames Smart uint8_t wwpn[8];
3213da0436e9SJames Smart uint8_t wwnn[8];
3214da0436e9SJames Smart };
3215da0436e9SJames Smart
3216da0436e9SJames Smart #define VPORT_INFO_SIG 0x32324752
3217da0436e9SJames Smart #define VPORT_INFO_REV_MASK 0xff
3218da0436e9SJames Smart #define VPORT_INFO_REV 0x1
3219da0436e9SJames Smart #define MAX_STATIC_VPORT_COUNT 16
3220da0436e9SJames Smart struct static_vport_info {
3221da0436e9SJames Smart uint32_t signature;
3222da0436e9SJames Smart uint32_t rev;
3223da0436e9SJames Smart struct vport_rec vport_list[MAX_STATIC_VPORT_COUNT];
3224da0436e9SJames Smart uint32_t resvd[66];
3225da0436e9SJames Smart };
3226da0436e9SJames Smart
322797207482SJames Smart /* Option rom version structure */
322897207482SJames Smart struct prog_id {
322997207482SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
323097207482SJames Smart uint8_t type;
323197207482SJames Smart uint8_t id;
323297207482SJames Smart uint32_t ver:4; /* Major Version */
323397207482SJames Smart uint32_t rev:4; /* Revision */
323497207482SJames Smart uint32_t lev:2; /* Level */
323597207482SJames Smart uint32_t dist:2; /* Dist Type */
323697207482SJames Smart uint32_t num:4; /* number after dist type */
323797207482SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
323897207482SJames Smart uint32_t num:4; /* number after dist type */
323997207482SJames Smart uint32_t dist:2; /* Dist Type */
324097207482SJames Smart uint32_t lev:2; /* Level */
324197207482SJames Smart uint32_t rev:4; /* Revision */
324297207482SJames Smart uint32_t ver:4; /* Major Version */
324397207482SJames Smart uint8_t id;
324497207482SJames Smart uint8_t type;
324597207482SJames Smart #endif
324697207482SJames Smart };
324797207482SJames Smart
3248d7c255b2SJames Smart /* Structure for MB Command UPDATE_CFG (0x1B) */
3249d7c255b2SJames Smart
3250d7c255b2SJames Smart struct update_cfg_var {
3251d7c255b2SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3252d7c255b2SJames Smart uint32_t rsvd2:16;
3253d7c255b2SJames Smart uint32_t type:8;
3254d7c255b2SJames Smart uint32_t rsvd:1;
3255d7c255b2SJames Smart uint32_t ra:1;
3256d7c255b2SJames Smart uint32_t co:1;
3257d7c255b2SJames Smart uint32_t cv:1;
3258d7c255b2SJames Smart uint32_t req:4;
3259d7c255b2SJames Smart uint32_t entry_length:16;
3260d7c255b2SJames Smart uint32_t region_id:16;
3261d7c255b2SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
3262d7c255b2SJames Smart uint32_t req:4;
3263d7c255b2SJames Smart uint32_t cv:1;
3264d7c255b2SJames Smart uint32_t co:1;
3265d7c255b2SJames Smart uint32_t ra:1;
3266d7c255b2SJames Smart uint32_t rsvd:1;
3267d7c255b2SJames Smart uint32_t type:8;
3268d7c255b2SJames Smart uint32_t rsvd2:16;
3269d7c255b2SJames Smart uint32_t region_id:16;
3270d7c255b2SJames Smart uint32_t entry_length:16;
3271d7c255b2SJames Smart #endif
3272d7c255b2SJames Smart
3273d7c255b2SJames Smart uint32_t resp_info;
3274d7c255b2SJames Smart uint32_t byte_cnt;
3275d7c255b2SJames Smart uint32_t data_offset;
3276d7c255b2SJames Smart };
3277d7c255b2SJames Smart
3278ed957684SJames Smart struct hbq_mask {
3279ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3280ed957684SJames Smart uint8_t tmatch;
3281ed957684SJames Smart uint8_t tmask;
3282ed957684SJames Smart uint8_t rctlmatch;
3283ed957684SJames Smart uint8_t rctlmask;
3284ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3285ed957684SJames Smart uint8_t rctlmask;
3286ed957684SJames Smart uint8_t rctlmatch;
3287ed957684SJames Smart uint8_t tmask;
3288ed957684SJames Smart uint8_t tmatch;
3289ed957684SJames Smart #endif
3290ed957684SJames Smart };
3291ed957684SJames Smart
3292ed957684SJames Smart
3293ed957684SJames Smart /* Structure for MB Command CONFIG_HBQ (7c) */
3294ed957684SJames Smart
3295ed957684SJames Smart struct config_hbq_var {
3296ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3297ed957684SJames Smart uint32_t rsvd1 :7;
3298ed957684SJames Smart uint32_t recvNotify :1; /* Receive Notification */
3299ed957684SJames Smart uint32_t numMask :8; /* # Mask Entries */
3300ed957684SJames Smart uint32_t profile :8; /* Selection Profile */
3301ed957684SJames Smart uint32_t rsvd2 :8;
3302ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3303ed957684SJames Smart uint32_t rsvd2 :8;
3304ed957684SJames Smart uint32_t profile :8; /* Selection Profile */
3305ed957684SJames Smart uint32_t numMask :8; /* # Mask Entries */
3306ed957684SJames Smart uint32_t recvNotify :1; /* Receive Notification */
3307ed957684SJames Smart uint32_t rsvd1 :7;
3308ed957684SJames Smart #endif
3309ed957684SJames Smart
3310ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3311ed957684SJames Smart uint32_t hbqId :16;
3312ed957684SJames Smart uint32_t rsvd3 :12;
3313ed957684SJames Smart uint32_t ringMask :4;
3314ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3315ed957684SJames Smart uint32_t ringMask :4;
3316ed957684SJames Smart uint32_t rsvd3 :12;
3317ed957684SJames Smart uint32_t hbqId :16;
3318ed957684SJames Smart #endif
3319ed957684SJames Smart
3320ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3321ed957684SJames Smart uint32_t entry_count :16;
3322ed957684SJames Smart uint32_t rsvd4 :8;
3323ed957684SJames Smart uint32_t headerLen :8;
3324ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3325ed957684SJames Smart uint32_t headerLen :8;
3326ed957684SJames Smart uint32_t rsvd4 :8;
3327ed957684SJames Smart uint32_t entry_count :16;
3328ed957684SJames Smart #endif
3329ed957684SJames Smart
3330ed957684SJames Smart uint32_t hbqaddrLow;
3331ed957684SJames Smart uint32_t hbqaddrHigh;
3332ed957684SJames Smart
3333ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3334ed957684SJames Smart uint32_t rsvd5 :31;
3335ed957684SJames Smart uint32_t logEntry :1;
3336ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3337ed957684SJames Smart uint32_t logEntry :1;
3338ed957684SJames Smart uint32_t rsvd5 :31;
3339ed957684SJames Smart #endif
3340ed957684SJames Smart
3341ed957684SJames Smart uint32_t rsvd6; /* w7 */
3342ed957684SJames Smart uint32_t rsvd7; /* w8 */
3343ed957684SJames Smart uint32_t rsvd8; /* w9 */
3344ed957684SJames Smart
3345ed957684SJames Smart struct hbq_mask hbqMasks[6];
3346ed957684SJames Smart
3347ed957684SJames Smart
3348ed957684SJames Smart union {
3349ed957684SJames Smart uint32_t allprofiles[12];
3350ed957684SJames Smart
3351ed957684SJames Smart struct {
3352ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3353ed957684SJames Smart uint32_t seqlenoff :16;
3354ed957684SJames Smart uint32_t maxlen :16;
3355ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3356ed957684SJames Smart uint32_t maxlen :16;
3357ed957684SJames Smart uint32_t seqlenoff :16;
3358ed957684SJames Smart #endif
3359ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3360ed957684SJames Smart uint32_t rsvd1 :28;
3361ed957684SJames Smart uint32_t seqlenbcnt :4;
3362ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3363ed957684SJames Smart uint32_t seqlenbcnt :4;
3364ed957684SJames Smart uint32_t rsvd1 :28;
3365ed957684SJames Smart #endif
3366ed957684SJames Smart uint32_t rsvd[10];
3367ed957684SJames Smart } profile2;
3368ed957684SJames Smart
3369ed957684SJames Smart struct {
3370ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3371ed957684SJames Smart uint32_t seqlenoff :16;
3372ed957684SJames Smart uint32_t maxlen :16;
3373ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3374ed957684SJames Smart uint32_t maxlen :16;
3375ed957684SJames Smart uint32_t seqlenoff :16;
3376ed957684SJames Smart #endif
3377ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3378ed957684SJames Smart uint32_t cmdcodeoff :28;
3379ed957684SJames Smart uint32_t rsvd1 :12;
3380ed957684SJames Smart uint32_t seqlenbcnt :4;
3381ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3382ed957684SJames Smart uint32_t seqlenbcnt :4;
3383ed957684SJames Smart uint32_t rsvd1 :12;
3384ed957684SJames Smart uint32_t cmdcodeoff :28;
3385ed957684SJames Smart #endif
3386ed957684SJames Smart uint32_t cmdmatch[8];
3387ed957684SJames Smart
3388ed957684SJames Smart uint32_t rsvd[2];
3389ed957684SJames Smart } profile3;
3390ed957684SJames Smart
3391ed957684SJames Smart struct {
3392ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3393ed957684SJames Smart uint32_t seqlenoff :16;
3394ed957684SJames Smart uint32_t maxlen :16;
3395ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3396ed957684SJames Smart uint32_t maxlen :16;
3397ed957684SJames Smart uint32_t seqlenoff :16;
3398ed957684SJames Smart #endif
3399ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3400ed957684SJames Smart uint32_t cmdcodeoff :28;
3401ed957684SJames Smart uint32_t rsvd1 :12;
3402ed957684SJames Smart uint32_t seqlenbcnt :4;
3403ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3404ed957684SJames Smart uint32_t seqlenbcnt :4;
3405ed957684SJames Smart uint32_t rsvd1 :12;
3406ed957684SJames Smart uint32_t cmdcodeoff :28;
3407ed957684SJames Smart #endif
3408ed957684SJames Smart uint32_t cmdmatch[8];
3409ed957684SJames Smart
3410ed957684SJames Smart uint32_t rsvd[2];
3411ed957684SJames Smart } profile5;
3412ed957684SJames Smart
3413ed957684SJames Smart } profiles;
3414ed957684SJames Smart
3415ed957684SJames Smart };
3416ed957684SJames Smart
3417ed957684SJames Smart
3418dea3101eS
34192e0fef85SJames Smart /* Structure for MB Command CONFIG_PORT (0x88) */
3420dea3101eS typedef struct {
3421ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3422ed957684SJames Smart uint32_t cBE : 1;
3423ed957684SJames Smart uint32_t cET : 1;
3424ed957684SJames Smart uint32_t cHpcb : 1;
3425ed957684SJames Smart uint32_t cMA : 1;
3426ed957684SJames Smart uint32_t sli_mode : 4;
3427ed957684SJames Smart uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3428ed957684SJames Smart * config block */
3429ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3430ed957684SJames Smart uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3431ed957684SJames Smart * config block */
3432ed957684SJames Smart uint32_t sli_mode : 4;
3433ed957684SJames Smart uint32_t cMA : 1;
3434ed957684SJames Smart uint32_t cHpcb : 1;
3435ed957684SJames Smart uint32_t cET : 1;
3436ed957684SJames Smart uint32_t cBE : 1;
3437ed957684SJames Smart #endif
3438ed957684SJames Smart
3439dea3101eS uint32_t pcbLow; /* bit 31:0 of memory based port config block */
3440dea3101eS uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
344197207482SJames Smart uint32_t hbainit[5];
344297207482SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
344397207482SJames Smart uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
344497207482SJames Smart uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
344597207482SJames Smart #else /* __LITTLE_ENDIAN */
344697207482SJames Smart uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
344797207482SJames Smart uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
344897207482SJames Smart #endif
3449ed957684SJames Smart
3450ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
34510e75461aSJames Smart uint32_t rsvd1 : 20; /* Reserved */
3452cb69f7deSJames Smart uint32_t casabt : 1; /* Configure async abts status notice */
3453cb69f7deSJames Smart uint32_t rsvd2 : 2; /* Reserved */
345481301a9bSJames Smart uint32_t cbg : 1; /* Configure BlockGuard */
3455ed957684SJames Smart uint32_t cmv : 1; /* Configure Max VPIs */
3456ed957684SJames Smart uint32_t ccrp : 1; /* Config Command Ring Polling */
3457ed957684SJames Smart uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3458ed957684SJames Smart uint32_t chbs : 1; /* Cofigure Host Backing store */
3459ed957684SJames Smart uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3460ed957684SJames Smart uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3461ed957684SJames Smart uint32_t cmx : 1; /* Configure Max XRIs */
3462ed957684SJames Smart uint32_t cmr : 1; /* Configure Max RPIs */
3463ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3464ed957684SJames Smart uint32_t cmr : 1; /* Configure Max RPIs */
3465ed957684SJames Smart uint32_t cmx : 1; /* Configure Max XRIs */
3466ed957684SJames Smart uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3467ed957684SJames Smart uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3468ed957684SJames Smart uint32_t chbs : 1; /* Cofigure Host Backing store */
3469ed957684SJames Smart uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3470ed957684SJames Smart uint32_t ccrp : 1; /* Config Command Ring Polling */
3471ed957684SJames Smart uint32_t cmv : 1; /* Configure Max VPIs */
347281301a9bSJames Smart uint32_t cbg : 1; /* Configure BlockGuard */
3473cb69f7deSJames Smart uint32_t rsvd2 : 2; /* Reserved */
3474cb69f7deSJames Smart uint32_t casabt : 1; /* Configure async abts status notice */
34750e75461aSJames Smart uint32_t rsvd1 : 20; /* Reserved */
3476ed957684SJames Smart #endif
3477ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
34780e75461aSJames Smart uint32_t rsvd3 : 20; /* Reserved */
3479cb69f7deSJames Smart uint32_t gasabt : 1; /* Grant async abts status notice */
3480cb69f7deSJames Smart uint32_t rsvd4 : 2; /* Reserved */
348181301a9bSJames Smart uint32_t gbg : 1; /* Grant BlockGuard */
3482ed957684SJames Smart uint32_t gmv : 1; /* Grant Max VPIs */
3483ed957684SJames Smart uint32_t gcrp : 1; /* Grant Command Ring Polling */
3484ed957684SJames Smart uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3485ed957684SJames Smart uint32_t ghbs : 1; /* Grant Host Backing Store */
3486ed957684SJames Smart uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3487ed957684SJames Smart uint32_t gerbm : 1; /* Grant ERBM Request */
3488ed957684SJames Smart uint32_t gmx : 1; /* Grant Max XRIs */
3489ed957684SJames Smart uint32_t gmr : 1; /* Grant Max RPIs */
3490ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3491ed957684SJames Smart uint32_t gmr : 1; /* Grant Max RPIs */
3492ed957684SJames Smart uint32_t gmx : 1; /* Grant Max XRIs */
3493ed957684SJames Smart uint32_t gerbm : 1; /* Grant ERBM Request */
3494ed957684SJames Smart uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3495ed957684SJames Smart uint32_t ghbs : 1; /* Grant Host Backing Store */
3496ed957684SJames Smart uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3497ed957684SJames Smart uint32_t gcrp : 1; /* Grant Command Ring Polling */
3498ed957684SJames Smart uint32_t gmv : 1; /* Grant Max VPIs */
349981301a9bSJames Smart uint32_t gbg : 1; /* Grant BlockGuard */
3500cb69f7deSJames Smart uint32_t rsvd4 : 2; /* Reserved */
3501cb69f7deSJames Smart uint32_t gasabt : 1; /* Grant async abts status notice */
35020e75461aSJames Smart uint32_t rsvd3 : 20; /* Reserved */
3503ed957684SJames Smart #endif
3504ed957684SJames Smart
3505ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3506ed957684SJames Smart uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3507ed957684SJames Smart uint32_t max_xri : 16; /* Max XRIs Port should configure */
3508ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3509ed957684SJames Smart uint32_t max_xri : 16; /* Max XRIs Port should configure */
3510ed957684SJames Smart uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3511ed957684SJames Smart #endif
3512ed957684SJames Smart
3513ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
3514ed957684SJames Smart uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3515da0436e9SJames Smart uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3516ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3517da0436e9SJames Smart uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3518ed957684SJames Smart uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3519ed957684SJames Smart #endif
3520ed957684SJames Smart
3521da0436e9SJames Smart uint32_t rsvd6; /* Reserved */
3522ed957684SJames Smart
3523ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
35240e75461aSJames Smart uint32_t rsvd7 : 16;
3525ed957684SJames Smart uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3526ed957684SJames Smart #else /* __LITTLE_ENDIAN */
3527ed957684SJames Smart uint32_t max_vpi : 16; /* Max number of virt N-Ports */
35280e75461aSJames Smart uint32_t rsvd7 : 16;
3529ed957684SJames Smart #endif
3530ed957684SJames Smart
3531dea3101eS } CONFIG_PORT_VAR;
3532dea3101eS
35339399627fSJames Smart /* Structure for MB Command CONFIG_MSI (0x30) */
35349399627fSJames Smart struct config_msi_var {
35359399627fSJames Smart #ifdef __BIG_ENDIAN_BITFIELD
35369399627fSJames Smart uint32_t dfltMsgNum:8; /* Default message number */
35379399627fSJames Smart uint32_t rsvd1:11; /* Reserved */
35389399627fSJames Smart uint32_t NID:5; /* Number of secondary attention IDs */
35399399627fSJames Smart uint32_t rsvd2:5; /* Reserved */
35409399627fSJames Smart uint32_t dfltPresent:1; /* Default message number present */
35419399627fSJames Smart uint32_t addFlag:1; /* Add association flag */
35429399627fSJames Smart uint32_t reportFlag:1; /* Report association flag */
35439399627fSJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
35449399627fSJames Smart uint32_t reportFlag:1; /* Report association flag */
35459399627fSJames Smart uint32_t addFlag:1; /* Add association flag */
35469399627fSJames Smart uint32_t dfltPresent:1; /* Default message number present */
35479399627fSJames Smart uint32_t rsvd2:5; /* Reserved */
35489399627fSJames Smart uint32_t NID:5; /* Number of secondary attention IDs */
35499399627fSJames Smart uint32_t rsvd1:11; /* Reserved */
35509399627fSJames Smart uint32_t dfltMsgNum:8; /* Default message number */
35519399627fSJames Smart #endif
35529399627fSJames Smart uint32_t attentionConditions[2];
35539399627fSJames Smart uint8_t attentionId[16];
35549399627fSJames Smart uint8_t messageNumberByHA[64];
35559399627fSJames Smart uint8_t messageNumberByID[16];
35569399627fSJames Smart uint32_t autoClearHA[2];
35579399627fSJames Smart #ifdef __BIG_ENDIAN_BITFIELD
35589399627fSJames Smart uint32_t rsvd3:16;
35599399627fSJames Smart uint32_t autoClearID:16;
35609399627fSJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
35619399627fSJames Smart uint32_t autoClearID:16;
35629399627fSJames Smart uint32_t rsvd3:16;
35639399627fSJames Smart #endif
35649399627fSJames Smart uint32_t rsvd4;
35659399627fSJames Smart };
35669399627fSJames Smart
3567dea3101eS /* SLI-2 Port Control Block */
3568dea3101eS
3569dea3101eS /* SLIM POINTER */
3570dea3101eS #define SLIMOFF 0x30 /* WORD */
3571dea3101eS
3572dea3101eS typedef struct _SLI2_RDSC {
3573dea3101eS uint32_t cmdEntries;
3574dea3101eS uint32_t cmdAddrLow;
3575dea3101eS uint32_t cmdAddrHigh;
3576dea3101eS
3577dea3101eS uint32_t rspEntries;
3578dea3101eS uint32_t rspAddrLow;
3579dea3101eS uint32_t rspAddrHigh;
3580dea3101eS } SLI2_RDSC;
3581dea3101eS
3582dea3101eS typedef struct _PCB {
3583dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3584dea3101eS uint32_t type:8;
3585497888cfSPhil Carmody #define TYPE_NATIVE_SLI2 0x01
3586dea3101eS uint32_t feature:8;
3587497888cfSPhil Carmody #define FEATURE_INITIAL_SLI2 0x01
3588dea3101eS uint32_t rsvd:12;
3589dea3101eS uint32_t maxRing:4;
3590dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3591dea3101eS uint32_t maxRing:4;
3592dea3101eS uint32_t rsvd:12;
3593dea3101eS uint32_t feature:8;
3594497888cfSPhil Carmody #define FEATURE_INITIAL_SLI2 0x01
3595dea3101eS uint32_t type:8;
3596497888cfSPhil Carmody #define TYPE_NATIVE_SLI2 0x01
3597dea3101eS #endif
3598dea3101eS
3599dea3101eS uint32_t mailBoxSize;
3600dea3101eS uint32_t mbAddrLow;
3601dea3101eS uint32_t mbAddrHigh;
3602dea3101eS
3603dea3101eS uint32_t hgpAddrLow;
3604dea3101eS uint32_t hgpAddrHigh;
3605dea3101eS
3606dea3101eS uint32_t pgpAddrLow;
3607dea3101eS uint32_t pgpAddrHigh;
36082a76a283SJames Smart SLI2_RDSC rdsc[MAX_SLI3_RINGS];
3609dea3101eS } PCB_t;
3610dea3101eS
3611dea3101eS /* NEW_FEATURE */
3612dea3101eS typedef struct {
3613dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3614dea3101eS uint32_t rsvd0:27;
3615dea3101eS uint32_t discardFarp:1;
3616dea3101eS uint32_t IPEnable:1;
3617dea3101eS uint32_t nodeName:1;
3618dea3101eS uint32_t portName:1;
3619dea3101eS uint32_t filterEnable:1;
3620dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3621dea3101eS uint32_t filterEnable:1;
3622dea3101eS uint32_t portName:1;
3623dea3101eS uint32_t nodeName:1;
3624dea3101eS uint32_t IPEnable:1;
3625dea3101eS uint32_t discardFarp:1;
3626dea3101eS uint32_t rsvd:27;
3627dea3101eS #endif
3628dea3101eS
3629dea3101eS uint8_t portname[8]; /* Used to be struct lpfc_name */
3630dea3101eS uint8_t nodename[8];
3631dea3101eS uint32_t rsvd1;
3632dea3101eS uint32_t rsvd2;
3633dea3101eS uint32_t rsvd3;
3634dea3101eS uint32_t IPAddress;
3635dea3101eS } CONFIG_FARP_VAR;
3636dea3101eS
363757127f15SJames Smart /* Structure for MB Command MBX_ASYNCEVT_ENABLE (0x33) */
363857127f15SJames Smart
363957127f15SJames Smart typedef struct {
364057127f15SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
364157127f15SJames Smart uint32_t rsvd:30;
364257127f15SJames Smart uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
364357127f15SJames Smart #else /* __LITTLE_ENDIAN */
364457127f15SJames Smart uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
364557127f15SJames Smart uint32_t rsvd:30;
364657127f15SJames Smart #endif
364757127f15SJames Smart } ASYNCEVT_ENABLE_VAR;
364857127f15SJames Smart
3649dea3101eS /* Union of all Mailbox Command types */
3650dea3101eS #define MAILBOX_CMD_WSIZE 32
3651dea3101eS #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
36527a470277SJames Smart /* ext_wsize times 4 bytes should not be greater than max xmit size */
36537a470277SJames Smart #define MAILBOX_EXT_WSIZE 512
36547a470277SJames Smart #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t))
36557a470277SJames Smart #define MAILBOX_HBA_EXT_OFFSET 0x100
36567a470277SJames Smart /* max mbox xmit size is a page size for sysfs IO operations */
3657c0c11512SJames Smart #define MAILBOX_SYSFS_MAX 4096
3658dea3101eS
3659dea3101eS typedef union {
3660ed957684SJames Smart uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/
3661ed957684SJames Smart * feature/max ring number
3662ed957684SJames Smart */
3663dea3101eS LOAD_SM_VAR varLdSM; /* cmd = 1 (LOAD_SM) */
3664dea3101eS READ_NV_VAR varRDnvp; /* cmd = 2 (READ_NVPARMS) */
3665dea3101eS WRITE_NV_VAR varWTnvp; /* cmd = 3 (WRITE_NVPARMS) */
3666dea3101eS BIU_DIAG_VAR varBIUdiag; /* cmd = 4 (RUN_BIU_DIAG) */
3667dea3101eS INIT_LINK_VAR varInitLnk; /* cmd = 5 (INIT_LINK) */
3668dea3101eS DOWN_LINK_VAR varDwnLnk; /* cmd = 6 (DOWN_LINK) */
3669dea3101eS CONFIG_LINK varCfgLnk; /* cmd = 7 (CONFIG_LINK) */
3670dea3101eS PART_SLIM_VAR varSlim; /* cmd = 8 (PART_SLIM) */
3671dea3101eS CONFIG_RING_VAR varCfgRing; /* cmd = 9 (CONFIG_RING) */
3672dea3101eS RESET_RING_VAR varRstRing; /* cmd = 10 (RESET_RING) */
3673dea3101eS READ_CONFIG_VAR varRdConfig; /* cmd = 11 (READ_CONFIG) */
3674dea3101eS READ_RCONF_VAR varRdRConfig; /* cmd = 12 (READ_RCONFIG) */
3675dea3101eS READ_SPARM_VAR varRdSparm; /* cmd = 13 (READ_SPARM(64)) */
3676dea3101eS READ_STATUS_VAR varRdStatus; /* cmd = 14 (READ_STATUS) */
3677dea3101eS READ_RPI_VAR varRdRPI; /* cmd = 15 (READ_RPI(64)) */
3678dea3101eS READ_XRI_VAR varRdXRI; /* cmd = 16 (READ_XRI) */
3679dea3101eS READ_REV_VAR varRdRev; /* cmd = 17 (READ_REV) */
3680dea3101eS READ_LNK_VAR varRdLnk; /* cmd = 18 (READ_LNK_STAT) */
3681dea3101eS REG_LOGIN_VAR varRegLogin; /* cmd = 19 (REG_LOGIN(64)) */
3682dea3101eS UNREG_LOGIN_VAR varUnregLogin; /* cmd = 20 (UNREG_LOGIN) */
3683dea3101eS CLEAR_LA_VAR varClearLA; /* cmd = 22 (CLEAR_LA) */
3684dea3101eS DUMP_VAR varDmp; /* Warm Start DUMP mbx cmd */
3685dea3101eS UNREG_D_ID_VAR varUnregDID; /* cmd = 0x23 (UNREG_D_ID) */
3686ed957684SJames Smart CONFIG_FARP_VAR varCfgFarp; /* cmd = 0x25 (CONFIG_FARP)
3687ed957684SJames Smart * NEW_FEATURE
3688ed957684SJames Smart */
3689ed957684SJames Smart struct config_hbq_var varCfgHbq;/* cmd = 0x7c (CONFIG_HBQ) */
3690d7c255b2SJames Smart struct update_cfg_var varUpdateCfg; /* cmd = 0x1B (UPDATE_CFG)*/
3691dea3101eS CONFIG_PORT_VAR varCfgPort; /* cmd = 0x88 (CONFIG_PORT) */
369276a95d75SJames Smart struct lpfc_mbx_read_top varReadTop; /* cmd = 0x95 (READ_TOPOLOGY) */
369392d7f7b0SJames Smart REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */
369492d7f7b0SJames Smart UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */
369557127f15SJames Smart ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */
3696c7495937SJames Smart struct READ_EVENT_LOG_VAR varRdEventLog; /* cmd = 0x38
3697c7495937SJames Smart * (READ_EVENT_LOG)
3698c7495937SJames Smart */
36999399627fSJames Smart struct config_msi_var varCfgMSI;/* cmd = x30 (CONFIG_MSI) */
3700dea3101eS } MAILVARIANTS;
3701dea3101eS
3702dea3101eS /*
3703dea3101eS * SLI-2 specific structures
3704dea3101eS */
3705dea3101eS
37064cc2da1dSJames.Smart@Emulex.Com struct lpfc_hgp {
37074cc2da1dSJames.Smart@Emulex.Com __le32 cmdPutInx;
37084cc2da1dSJames.Smart@Emulex.Com __le32 rspGetInx;
37094cc2da1dSJames.Smart@Emulex.Com };
3710dea3101eS
37114cc2da1dSJames.Smart@Emulex.Com struct lpfc_pgp {
37124cc2da1dSJames.Smart@Emulex.Com __le32 cmdGetInx;
37134cc2da1dSJames.Smart@Emulex.Com __le32 rspPutInx;
37144cc2da1dSJames.Smart@Emulex.Com };
3715dea3101eS
3716ed957684SJames Smart struct sli2_desc {
3717dea3101eS uint32_t unused1[16];
37182a76a283SJames Smart struct lpfc_hgp host[MAX_SLI3_RINGS];
37192a76a283SJames Smart struct lpfc_pgp port[MAX_SLI3_RINGS];
3720ed957684SJames Smart };
3721ed957684SJames Smart
3722ed957684SJames Smart struct sli3_desc {
37232a76a283SJames Smart struct lpfc_hgp host[MAX_SLI3_RINGS];
3724ed957684SJames Smart uint32_t reserved[8];
3725ed957684SJames Smart uint32_t hbq_put[16];
3726ed957684SJames Smart };
3727ed957684SJames Smart
3728ed957684SJames Smart struct sli3_pgp {
37292a76a283SJames Smart struct lpfc_pgp port[MAX_SLI3_RINGS];
3730ed957684SJames Smart uint32_t hbq_get[16];
3731ed957684SJames Smart };
3732dea3101eS
373334b02dcdSJames Smart union sli_var {
3734ed957684SJames Smart struct sli2_desc s2;
3735ed957684SJames Smart struct sli3_desc s3;
3736ed957684SJames Smart struct sli3_pgp s3_pgp;
373734b02dcdSJames Smart };
3738dea3101eS
3739dea3101eS typedef struct {
3740c167dd0bSKees Cook struct_group_tagged(MAILBOX_word0, bits,
3741c167dd0bSKees Cook union {
3742c167dd0bSKees Cook struct {
3743dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3744dea3101eS uint16_t mbxStatus;
3745dea3101eS uint8_t mbxCommand;
3746dea3101eS uint8_t mbxReserved:6;
3747dea3101eS uint8_t mbxHc:1;
3748dea3101eS uint8_t mbxOwner:1; /* Low order bit first word */
3749dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3750dea3101eS uint8_t mbxOwner:1; /* Low order bit first word */
3751dea3101eS uint8_t mbxHc:1;
3752dea3101eS uint8_t mbxReserved:6;
3753dea3101eS uint8_t mbxCommand;
3754dea3101eS uint16_t mbxStatus;
3755dea3101eS #endif
3756c167dd0bSKees Cook };
3757c167dd0bSKees Cook u32 word0;
3758c167dd0bSKees Cook };
3759c167dd0bSKees Cook );
3760dea3101eS
3761dea3101eS MAILVARIANTS un;
376234b02dcdSJames Smart union sli_var us;
3763dea3101eS } MAILBOX_t;
3764dea3101eS
3765dea3101eS /*
3766dea3101eS * Begin Structure Definitions for IOCB Commands
3767dea3101eS */
3768dea3101eS
3769dea3101eS typedef struct {
3770dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3771dea3101eS uint8_t statAction;
3772dea3101eS uint8_t statRsn;
3773dea3101eS uint8_t statBaExp;
3774dea3101eS uint8_t statLocalError;
3775dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3776dea3101eS uint8_t statLocalError;
3777dea3101eS uint8_t statBaExp;
3778dea3101eS uint8_t statRsn;
3779dea3101eS uint8_t statAction;
3780dea3101eS #endif
3781dea3101eS /* statRsn P/F_RJT reason codes */
3782dea3101eS #define RJT_BAD_D_ID 0x01 /* Invalid D_ID field */
3783dea3101eS #define RJT_BAD_S_ID 0x02 /* Invalid S_ID field */
3784dea3101eS #define RJT_UNAVAIL_TEMP 0x03 /* N_Port unavailable temp. */
3785dea3101eS #define RJT_UNAVAIL_PERM 0x04 /* N_Port unavailable perm. */
3786dea3101eS #define RJT_UNSUP_CLASS 0x05 /* Class not supported */
3787dea3101eS #define RJT_DELIM_ERR 0x06 /* Delimiter usage error */
3788dea3101eS #define RJT_UNSUP_TYPE 0x07 /* Type not supported */
3789dea3101eS #define RJT_BAD_CONTROL 0x08 /* Invalid link conrtol */
3790dea3101eS #define RJT_BAD_RCTL 0x09 /* R_CTL invalid */
3791dea3101eS #define RJT_BAD_FCTL 0x0A /* F_CTL invalid */
3792dea3101eS #define RJT_BAD_OXID 0x0B /* OX_ID invalid */
3793dea3101eS #define RJT_BAD_RXID 0x0C /* RX_ID invalid */
3794dea3101eS #define RJT_BAD_SEQID 0x0D /* SEQ_ID invalid */
3795dea3101eS #define RJT_BAD_DFCTL 0x0E /* DF_CTL invalid */
3796dea3101eS #define RJT_BAD_SEQCNT 0x0F /* SEQ_CNT invalid */
3797dea3101eS #define RJT_BAD_PARM 0x10 /* Param. field invalid */
3798dea3101eS #define RJT_XCHG_ERR 0x11 /* Exchange error */
3799dea3101eS #define RJT_PROT_ERR 0x12 /* Protocol error */
3800dea3101eS #define RJT_BAD_LENGTH 0x13 /* Invalid Length */
3801dea3101eS #define RJT_UNEXPECTED_ACK 0x14 /* Unexpected ACK */
3802dea3101eS #define RJT_LOGIN_REQUIRED 0x16 /* Login required */
3803dea3101eS #define RJT_TOO_MANY_SEQ 0x17 /* Excessive sequences */
3804dea3101eS #define RJT_XCHG_NOT_STRT 0x18 /* Exchange not started */
3805dea3101eS #define RJT_UNSUP_SEC_HDR 0x19 /* Security hdr not supported */
3806dea3101eS #define RJT_UNAVAIL_PATH 0x1A /* Fabric Path not available */
3807dea3101eS #define RJT_VENDOR_UNIQUE 0xFF /* Vendor unique error */
3808dea3101eS
3809dea3101eS #define IOERR_SUCCESS 0x00 /* statLocalError */
3810dea3101eS #define IOERR_MISSING_CONTINUE 0x01
3811dea3101eS #define IOERR_SEQUENCE_TIMEOUT 0x02
3812dea3101eS #define IOERR_INTERNAL_ERROR 0x03
3813dea3101eS #define IOERR_INVALID_RPI 0x04
3814dea3101eS #define IOERR_NO_XRI 0x05
3815dea3101eS #define IOERR_ILLEGAL_COMMAND 0x06
3816dea3101eS #define IOERR_XCHG_DROPPED 0x07
3817dea3101eS #define IOERR_ILLEGAL_FIELD 0x08
38182e81b1a3SJames Smart #define IOERR_RPI_SUSPENDED 0x09
3819dea3101eS #define IOERR_TOO_MANY_BUFFERS 0x0A
3820dea3101eS #define IOERR_RCV_BUFFER_WAITING 0x0B
3821dea3101eS #define IOERR_NO_CONNECTION 0x0C
3822dea3101eS #define IOERR_TX_DMA_FAILED 0x0D
3823dea3101eS #define IOERR_RX_DMA_FAILED 0x0E
3824dea3101eS #define IOERR_ILLEGAL_FRAME 0x0F
3825dea3101eS #define IOERR_EXTRA_DATA 0x10
3826dea3101eS #define IOERR_NO_RESOURCES 0x11
3827dea3101eS #define IOERR_RESERVED 0x12
3828dea3101eS #define IOERR_ILLEGAL_LENGTH 0x13
3829dea3101eS #define IOERR_UNSUPPORTED_FEATURE 0x14
3830dea3101eS #define IOERR_ABORT_IN_PROGRESS 0x15
3831dea3101eS #define IOERR_ABORT_REQUESTED 0x16
3832dea3101eS #define IOERR_RECEIVE_BUFFER_TIMEOUT 0x17
3833dea3101eS #define IOERR_LOOP_OPEN_FAILURE 0x18
3834dea3101eS #define IOERR_RING_RESET 0x19
3835dea3101eS #define IOERR_LINK_DOWN 0x1A
3836dea3101eS #define IOERR_CORRUPTED_DATA 0x1B
3837dea3101eS #define IOERR_CORRUPTED_RPI 0x1C
3838dea3101eS #define IOERR_OUT_OF_ORDER_DATA 0x1D
3839dea3101eS #define IOERR_OUT_OF_ORDER_ACK 0x1E
3840dea3101eS #define IOERR_DUP_FRAME 0x1F
3841dea3101eS #define IOERR_LINK_CONTROL_FRAME 0x20 /* ACK_N received */
3842dea3101eS #define IOERR_BAD_HOST_ADDRESS 0x21
3843dea3101eS #define IOERR_RCV_HDRBUF_WAITING 0x22
3844dea3101eS #define IOERR_MISSING_HDR_BUFFER 0x23
3845dea3101eS #define IOERR_MSEQ_CHAIN_CORRUPTED 0x24
3846dea3101eS #define IOERR_ABORTMULT_REQUESTED 0x25
3847dea3101eS #define IOERR_BUFFER_SHORTAGE 0x28
3848dea3101eS #define IOERR_DEFAULT 0x29
3849dea3101eS #define IOERR_CNT 0x2A
3850b92938b4SJames Smart #define IOERR_SLER_FAILURE 0x46
3851b92938b4SJames Smart #define IOERR_SLER_CMD_RCV_FAILURE 0x47
3852b92938b4SJames Smart #define IOERR_SLER_REC_RJT_ERR 0x48
3853b92938b4SJames Smart #define IOERR_SLER_REC_SRR_RETRY_ERR 0x49
3854b92938b4SJames Smart #define IOERR_SLER_SRR_RJT_ERR 0x4A
3855b92938b4SJames Smart #define IOERR_SLER_RRQ_RJT_ERR 0x4C
3856b92938b4SJames Smart #define IOERR_SLER_RRQ_RETRY_ERR 0x4D
3857b92938b4SJames Smart #define IOERR_SLER_ABTS_ERR 0x4E
3858ab56dc2eSJames Smart #define IOERR_ELXSEC_KEY_UNWRAP_ERROR 0xF0
3859ab56dc2eSJames Smart #define IOERR_ELXSEC_KEY_UNWRAP_COMPARE_ERROR 0xF1
3860ab56dc2eSJames Smart #define IOERR_ELXSEC_CRYPTO_ERROR 0xF2
3861ab56dc2eSJames Smart #define IOERR_ELXSEC_CRYPTO_COMPARE_ERROR 0xF3
3862dea3101eS #define IOERR_DRVR_MASK 0x100
3863dea3101eS #define IOERR_SLI_DOWN 0x101 /* ulpStatus - Driver defined */
3864dea3101eS #define IOERR_SLI_BRESET 0x102
3865dea3101eS #define IOERR_SLI_ABORTED 0x103
3866e3d2b802SJames Smart #define IOERR_PARAM_MASK 0x1ff
3867dea3101eS } PARM_ERR;
3868dea3101eS
3869dea3101eS typedef union {
3870dea3101eS struct {
3871dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3872dea3101eS uint8_t Rctl; /* R_CTL field */
3873dea3101eS uint8_t Type; /* TYPE field */
3874dea3101eS uint8_t Dfctl; /* DF_CTL field */
3875dea3101eS uint8_t Fctl; /* Bits 0-7 of IOCB word 5 */
3876dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3877dea3101eS uint8_t Fctl; /* Bits 0-7 of IOCB word 5 */
3878dea3101eS uint8_t Dfctl; /* DF_CTL field */
3879dea3101eS uint8_t Type; /* TYPE field */
3880dea3101eS uint8_t Rctl; /* R_CTL field */
3881dea3101eS #endif
3882dea3101eS
3883dea3101eS #define BC 0x02 /* Broadcast Received - Fctl */
3884dea3101eS #define SI 0x04 /* Sequence Initiative */
3885dea3101eS #define LA 0x08 /* Ignore Link Attention state */
3886dea3101eS #define LS 0x80 /* Last Sequence */
3887dea3101eS } hcsw;
3888dea3101eS uint32_t reserved;
3889dea3101eS } WORD5;
3890dea3101eS
3891dea3101eS /* IOCB Command template for a generic response */
3892dea3101eS typedef struct {
3893dea3101eS uint32_t reserved[4];
3894dea3101eS PARM_ERR perr;
3895dea3101eS } GENERIC_RSP;
3896dea3101eS
3897dea3101eS /* IOCB Command template for XMIT / XMIT_BCAST / RCV_SEQUENCE / XMIT_ELS */
3898dea3101eS typedef struct {
3899dea3101eS struct ulp_bde xrsqbde[2];
3900dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */
3901dea3101eS WORD5 w5; /* Header control/status word */
3902dea3101eS } XR_SEQ_FIELDS;
3903dea3101eS
3904dea3101eS /* IOCB Command template for ELS_REQUEST */
3905dea3101eS typedef struct {
3906dea3101eS struct ulp_bde elsReq;
3907dea3101eS struct ulp_bde elsRsp;
3908dea3101eS
3909dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3910dea3101eS uint32_t word4Rsvd:7;
3911dea3101eS uint32_t fl:1;
3912dea3101eS uint32_t myID:24;
3913dea3101eS uint32_t word5Rsvd:8;
3914dea3101eS uint32_t remoteID:24;
3915dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3916dea3101eS uint32_t myID:24;
3917dea3101eS uint32_t fl:1;
3918dea3101eS uint32_t word4Rsvd:7;
3919dea3101eS uint32_t remoteID:24;
3920dea3101eS uint32_t word5Rsvd:8;
3921dea3101eS #endif
3922dea3101eS } ELS_REQUEST;
3923dea3101eS
3924dea3101eS /* IOCB Command template for RCV_ELS_REQ */
3925dea3101eS typedef struct {
3926dea3101eS struct ulp_bde elsReq[2];
3927dea3101eS uint32_t parmRo;
3928dea3101eS
3929dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3930dea3101eS uint32_t word5Rsvd:8;
3931dea3101eS uint32_t remoteID:24;
3932dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3933dea3101eS uint32_t remoteID:24;
3934dea3101eS uint32_t word5Rsvd:8;
3935dea3101eS #endif
3936dea3101eS } RCV_ELS_REQ;
3937dea3101eS
3938dea3101eS /* IOCB Command template for ABORT / CLOSE_XRI */
3939dea3101eS typedef struct {
3940dea3101eS uint32_t rsvd[3];
3941dea3101eS uint32_t abortType;
3942dea3101eS #define ABORT_TYPE_ABTX 0x00000000
3943dea3101eS #define ABORT_TYPE_ABTS 0x00000001
3944dea3101eS uint32_t parm;
3945dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3946dea3101eS uint16_t abortContextTag; /* ulpContext from command to abort/close */
3947dea3101eS uint16_t abortIoTag; /* ulpIoTag from command to abort/close */
3948dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3949dea3101eS uint16_t abortIoTag; /* ulpIoTag from command to abort/close */
3950dea3101eS uint16_t abortContextTag; /* ulpContext from command to abort/close */
3951dea3101eS #endif
3952dea3101eS } AC_XRI;
3953dea3101eS
3954dea3101eS /* IOCB Command template for ABORT_MXRI64 */
3955dea3101eS typedef struct {
3956dea3101eS uint32_t rsvd[3];
3957dea3101eS uint32_t abortType;
3958dea3101eS uint32_t parm;
3959dea3101eS uint32_t iotag32;
3960dea3101eS } A_MXRI64;
3961dea3101eS
3962dea3101eS /* IOCB Command template for GET_RPI */
3963dea3101eS typedef struct {
3964dea3101eS uint32_t rsvd[4];
3965dea3101eS uint32_t parmRo;
3966dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
3967dea3101eS uint32_t word5Rsvd:8;
3968dea3101eS uint32_t remoteID:24;
3969dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
3970dea3101eS uint32_t remoteID:24;
3971dea3101eS uint32_t word5Rsvd:8;
3972dea3101eS #endif
3973dea3101eS } GET_RPI;
3974dea3101eS
3975dea3101eS /* IOCB Command template for all FCP Initiator commands */
3976dea3101eS typedef struct {
3977dea3101eS struct ulp_bde fcpi_cmnd; /* FCP_CMND payload descriptor */
3978dea3101eS struct ulp_bde fcpi_rsp; /* Rcv buffer */
3979dea3101eS uint32_t fcpi_parm;
3980dea3101eS uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3981dea3101eS } FCPI_FIELDS;
3982dea3101eS
3983dea3101eS /* IOCB Command template for all FCP Target commands */
3984dea3101eS typedef struct {
3985dea3101eS struct ulp_bde fcpt_Buffer[2]; /* FCP_CMND payload descriptor */
3986dea3101eS uint32_t fcpt_Offset;
3987dea3101eS uint32_t fcpt_Length; /* transfer ready for IWRITE */
3988dea3101eS } FCPT_FIELDS;
3989dea3101eS
3990dea3101eS /* SLI-2 IOCB structure definitions */
3991dea3101eS
3992dea3101eS /* IOCB Command template for 64 bit XMIT / XMIT_BCAST / XMIT_ELS */
3993dea3101eS typedef struct {
3994dea3101eS ULP_BDL bdl;
3995dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */
3996dea3101eS WORD5 w5; /* Header control/status word */
3997dea3101eS } XMT_SEQ_FIELDS64;
3998dea3101eS
3999939723a4SJames Smart /* This word is remote ports D_ID for XMIT_ELS_RSP64 */
4000939723a4SJames Smart #define xmit_els_remoteID xrsqRo
4001939723a4SJames Smart
4002dea3101eS /* IOCB Command template for 64 bit RCV_SEQUENCE64 */
4003dea3101eS typedef struct {
4004dea3101eS struct ulp_bde64 rcvBde;
4005dea3101eS uint32_t rsvd1;
4006dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */
4007dea3101eS WORD5 w5; /* Header control/status word */
4008dea3101eS } RCV_SEQ_FIELDS64;
4009dea3101eS
4010dea3101eS /* IOCB Command template for ELS_REQUEST64 */
4011dea3101eS typedef struct {
4012dea3101eS ULP_BDL bdl;
4013dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
4014dea3101eS uint32_t word4Rsvd:7;
4015dea3101eS uint32_t fl:1;
4016dea3101eS uint32_t myID:24;
4017dea3101eS uint32_t word5Rsvd:8;
4018dea3101eS uint32_t remoteID:24;
4019dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
4020dea3101eS uint32_t myID:24;
4021dea3101eS uint32_t fl:1;
4022dea3101eS uint32_t word4Rsvd:7;
4023dea3101eS uint32_t remoteID:24;
4024dea3101eS uint32_t word5Rsvd:8;
4025dea3101eS #endif
4026dea3101eS } ELS_REQUEST64;
4027dea3101eS
4028dea3101eS /* IOCB Command template for GEN_REQUEST64 */
4029dea3101eS typedef struct {
4030dea3101eS ULP_BDL bdl;
4031dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */
4032dea3101eS WORD5 w5; /* Header control/status word */
4033dea3101eS } GEN_REQUEST64;
4034dea3101eS
4035dea3101eS /* IOCB Command template for RCV_ELS_REQ64 */
4036dea3101eS typedef struct {
4037dea3101eS struct ulp_bde64 elsReq;
4038dea3101eS uint32_t rcvd1;
4039dea3101eS uint32_t parmRo;
4040dea3101eS
4041dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
4042dea3101eS uint32_t word5Rsvd:8;
4043dea3101eS uint32_t remoteID:24;
4044dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
4045dea3101eS uint32_t remoteID:24;
4046dea3101eS uint32_t word5Rsvd:8;
4047dea3101eS #endif
4048dea3101eS } RCV_ELS_REQ64;
4049dea3101eS
40509c2face6SJames Smart /* IOCB Command template for RCV_SEQ64 */
40519c2face6SJames Smart struct rcv_seq64 {
40529c2face6SJames Smart struct ulp_bde64 elsReq;
40539c2face6SJames Smart uint32_t hbq_1;
40549c2face6SJames Smart uint32_t parmRo;
40559c2face6SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
40569c2face6SJames Smart uint32_t rctl:8;
40579c2face6SJames Smart uint32_t type:8;
40589c2face6SJames Smart uint32_t dfctl:8;
40599c2face6SJames Smart uint32_t ls:1;
40609c2face6SJames Smart uint32_t fs:1;
40619c2face6SJames Smart uint32_t rsvd2:3;
40629c2face6SJames Smart uint32_t si:1;
40639c2face6SJames Smart uint32_t bc:1;
40649c2face6SJames Smart uint32_t rsvd3:1;
40659c2face6SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
40669c2face6SJames Smart uint32_t rsvd3:1;
40679c2face6SJames Smart uint32_t bc:1;
40689c2face6SJames Smart uint32_t si:1;
40699c2face6SJames Smart uint32_t rsvd2:3;
40709c2face6SJames Smart uint32_t fs:1;
40719c2face6SJames Smart uint32_t ls:1;
40729c2face6SJames Smart uint32_t dfctl:8;
40739c2face6SJames Smart uint32_t type:8;
40749c2face6SJames Smart uint32_t rctl:8;
40759c2face6SJames Smart #endif
40769c2face6SJames Smart };
40779c2face6SJames Smart
4078dea3101eS /* IOCB Command template for all 64 bit FCP Initiator commands */
4079dea3101eS typedef struct {
4080dea3101eS ULP_BDL bdl;
4081dea3101eS uint32_t fcpi_parm;
4082dea3101eS uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
4083dea3101eS } FCPI_FIELDS64;
4084dea3101eS
4085dea3101eS /* IOCB Command template for all 64 bit FCP Target commands */
4086dea3101eS typedef struct {
4087dea3101eS ULP_BDL bdl;
4088dea3101eS uint32_t fcpt_Offset;
4089dea3101eS uint32_t fcpt_Length; /* transfer ready for IWRITE */
4090dea3101eS } FCPT_FIELDS64;
4091dea3101eS
409257127f15SJames Smart /* IOCB Command template for Async Status iocb commands */
409357127f15SJames Smart typedef struct {
409457127f15SJames Smart uint32_t rsvd[4];
409557127f15SJames Smart uint32_t param;
409657127f15SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
409757127f15SJames Smart uint16_t evt_code; /* High order bits word 5 */
409857127f15SJames Smart uint16_t sub_ctxt_tag; /* Low order bits word 5 */
409957127f15SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */
410057127f15SJames Smart uint16_t sub_ctxt_tag; /* High order bits word 5 */
410157127f15SJames Smart uint16_t evt_code; /* Low order bits word 5 */
410257127f15SJames Smart #endif
410357127f15SJames Smart } ASYNCSTAT_FIELDS;
410457127f15SJames Smart #define ASYNC_TEMP_WARN 0x100
410557127f15SJames Smart #define ASYNC_TEMP_SAFE 0x101
4106cb69f7deSJames Smart #define ASYNC_STATUS_CN 0x102
410757127f15SJames Smart
4108ed957684SJames Smart /* IOCB Command template for CMD_IOCB_RCV_ELS64_CX (0xB7)
4109ed957684SJames Smart or CMD_IOCB_RCV_SEQ64_CX (0xB5) */
4110ed957684SJames Smart
4111ed957684SJames Smart struct rcv_sli3 {
4112ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD
41137851fe2cSJames Smart uint16_t ox_id;
41147851fe2cSJames Smart uint16_t seq_cnt;
41157851fe2cSJames Smart
4116ed957684SJames Smart uint16_t vpi;
4117ed957684SJames Smart uint16_t word9Rsvd;
4118ed957684SJames Smart #else /* __LITTLE_ENDIAN */
41197851fe2cSJames Smart uint16_t seq_cnt;
41207851fe2cSJames Smart uint16_t ox_id;
41217851fe2cSJames Smart
4122ed957684SJames Smart uint16_t word9Rsvd;
4123ed957684SJames Smart uint16_t vpi;
4124ed957684SJames Smart #endif
4125ed957684SJames Smart uint32_t word10Rsvd;
4126ed957684SJames Smart uint32_t acc_len; /* accumulated length */
4127ed957684SJames Smart struct ulp_bde64 bde2;
4128ed957684SJames Smart };
4129ed957684SJames Smart
413076bb24efSJames Smart /* Structure used for a single HBQ entry */
413176bb24efSJames Smart struct lpfc_hbq_entry {
413276bb24efSJames Smart struct ulp_bde64 bde;
413376bb24efSJames Smart uint32_t buffer_tag;
413476bb24efSJames Smart };
413592d7f7b0SJames Smart
413676bb24efSJames Smart /* IOCB Command template for QUE_XRI64_CX (0xB3) command */
413776bb24efSJames Smart typedef struct {
413876bb24efSJames Smart struct lpfc_hbq_entry buff;
413976bb24efSJames Smart uint32_t rsvd;
414076bb24efSJames Smart uint32_t rsvd1;
414176bb24efSJames Smart } QUE_XRI64_CX_FIELDS;
414276bb24efSJames Smart
414376bb24efSJames Smart struct que_xri64cx_ext_fields {
414476bb24efSJames Smart uint32_t iotag64_low;
414576bb24efSJames Smart uint32_t iotag64_high;
414676bb24efSJames Smart uint32_t ebde_count;
414776bb24efSJames Smart uint32_t rsvd;
414876bb24efSJames Smart struct lpfc_hbq_entry buff[5];
414976bb24efSJames Smart };
415092d7f7b0SJames Smart
415181301a9bSJames Smart struct sli3_bg_fields {
415281301a9bSJames Smart uint32_t filler[6]; /* word 8-13 in IOCB */
415381301a9bSJames Smart uint32_t bghm; /* word 14 - BlockGuard High Water Mark */
415481301a9bSJames Smart /* Bitfields for bgstat (BlockGuard Status - word 15 of IOCB) */
415581301a9bSJames Smart #define BGS_BIDIR_BG_PROF_MASK 0xff000000
415681301a9bSJames Smart #define BGS_BIDIR_BG_PROF_SHIFT 24
415781301a9bSJames Smart #define BGS_BIDIR_ERR_COND_FLAGS_MASK 0x003f0000
415881301a9bSJames Smart #define BGS_BIDIR_ERR_COND_SHIFT 16
415981301a9bSJames Smart #define BGS_BG_PROFILE_MASK 0x0000ff00
416081301a9bSJames Smart #define BGS_BG_PROFILE_SHIFT 8
416181301a9bSJames Smart #define BGS_INVALID_PROF_MASK 0x00000020
416281301a9bSJames Smart #define BGS_INVALID_PROF_SHIFT 5
416381301a9bSJames Smart #define BGS_UNINIT_DIF_BLOCK_MASK 0x00000010
416481301a9bSJames Smart #define BGS_UNINIT_DIF_BLOCK_SHIFT 4
416581301a9bSJames Smart #define BGS_HI_WATER_MARK_PRESENT_MASK 0x00000008
416681301a9bSJames Smart #define BGS_HI_WATER_MARK_PRESENT_SHIFT 3
416781301a9bSJames Smart #define BGS_REFTAG_ERR_MASK 0x00000004
416881301a9bSJames Smart #define BGS_REFTAG_ERR_SHIFT 2
416981301a9bSJames Smart #define BGS_APPTAG_ERR_MASK 0x00000002
417081301a9bSJames Smart #define BGS_APPTAG_ERR_SHIFT 1
417181301a9bSJames Smart #define BGS_GUARD_ERR_MASK 0x00000001
417281301a9bSJames Smart #define BGS_GUARD_ERR_SHIFT 0
417381301a9bSJames Smart uint32_t bgstat; /* word 15 - BlockGuard Status */
417481301a9bSJames Smart };
417581301a9bSJames Smart
417681301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat)417781301a9bSJames Smart lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat)
417881301a9bSJames Smart {
4179bc73905aSJames Smart return (bgstat & BGS_BIDIR_BG_PROF_MASK) >>
418081301a9bSJames Smart BGS_BIDIR_BG_PROF_SHIFT;
418181301a9bSJames Smart }
418281301a9bSJames Smart
418381301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_bidir_err_cond(uint32_t bgstat)418481301a9bSJames Smart lpfc_bgs_get_bidir_err_cond(uint32_t bgstat)
418581301a9bSJames Smart {
4186bc73905aSJames Smart return (bgstat & BGS_BIDIR_ERR_COND_FLAGS_MASK) >>
418781301a9bSJames Smart BGS_BIDIR_ERR_COND_SHIFT;
418881301a9bSJames Smart }
418981301a9bSJames Smart
419081301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_bg_prof(uint32_t bgstat)419181301a9bSJames Smart lpfc_bgs_get_bg_prof(uint32_t bgstat)
419281301a9bSJames Smart {
4193bc73905aSJames Smart return (bgstat & BGS_BG_PROFILE_MASK) >>
419481301a9bSJames Smart BGS_BG_PROFILE_SHIFT;
419581301a9bSJames Smart }
419681301a9bSJames Smart
419781301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_invalid_prof(uint32_t bgstat)419881301a9bSJames Smart lpfc_bgs_get_invalid_prof(uint32_t bgstat)
419981301a9bSJames Smart {
4200bc73905aSJames Smart return (bgstat & BGS_INVALID_PROF_MASK) >>
420181301a9bSJames Smart BGS_INVALID_PROF_SHIFT;
420281301a9bSJames Smart }
420381301a9bSJames Smart
420481301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_uninit_dif_block(uint32_t bgstat)420581301a9bSJames Smart lpfc_bgs_get_uninit_dif_block(uint32_t bgstat)
420681301a9bSJames Smart {
4207bc73905aSJames Smart return (bgstat & BGS_UNINIT_DIF_BLOCK_MASK) >>
420881301a9bSJames Smart BGS_UNINIT_DIF_BLOCK_SHIFT;
420981301a9bSJames Smart }
421081301a9bSJames Smart
421181301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat)421281301a9bSJames Smart lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat)
421381301a9bSJames Smart {
4214bc73905aSJames Smart return (bgstat & BGS_HI_WATER_MARK_PRESENT_MASK) >>
421581301a9bSJames Smart BGS_HI_WATER_MARK_PRESENT_SHIFT;
421681301a9bSJames Smart }
421781301a9bSJames Smart
421881301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_reftag_err(uint32_t bgstat)421981301a9bSJames Smart lpfc_bgs_get_reftag_err(uint32_t bgstat)
422081301a9bSJames Smart {
4221bc73905aSJames Smart return (bgstat & BGS_REFTAG_ERR_MASK) >>
422281301a9bSJames Smart BGS_REFTAG_ERR_SHIFT;
422381301a9bSJames Smart }
422481301a9bSJames Smart
422581301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_apptag_err(uint32_t bgstat)422681301a9bSJames Smart lpfc_bgs_get_apptag_err(uint32_t bgstat)
422781301a9bSJames Smart {
4228bc73905aSJames Smart return (bgstat & BGS_APPTAG_ERR_MASK) >>
422981301a9bSJames Smart BGS_APPTAG_ERR_SHIFT;
423081301a9bSJames Smart }
423181301a9bSJames Smart
423281301a9bSJames Smart static inline uint32_t
lpfc_bgs_get_guard_err(uint32_t bgstat)423381301a9bSJames Smart lpfc_bgs_get_guard_err(uint32_t bgstat)
423481301a9bSJames Smart {
4235bc73905aSJames Smart return (bgstat & BGS_GUARD_ERR_MASK) >>
423681301a9bSJames Smart BGS_GUARD_ERR_SHIFT;
423781301a9bSJames Smart }
423881301a9bSJames Smart
423934b02dcdSJames Smart #define LPFC_EXT_DATA_BDE_COUNT 3
424034b02dcdSJames Smart struct fcp_irw_ext {
424134b02dcdSJames Smart uint32_t io_tag64_low;
424234b02dcdSJames Smart uint32_t io_tag64_high;
424334b02dcdSJames Smart #ifdef __BIG_ENDIAN_BITFIELD
424434b02dcdSJames Smart uint8_t reserved1;
424534b02dcdSJames Smart uint8_t reserved2;
424634b02dcdSJames Smart uint8_t reserved3;
424734b02dcdSJames Smart uint8_t ebde_count;
424834b02dcdSJames Smart #else /* __LITTLE_ENDIAN */
424934b02dcdSJames Smart uint8_t ebde_count;
425034b02dcdSJames Smart uint8_t reserved3;
425134b02dcdSJames Smart uint8_t reserved2;
425234b02dcdSJames Smart uint8_t reserved1;
425334b02dcdSJames Smart #endif
425434b02dcdSJames Smart uint32_t reserved4;
425534b02dcdSJames Smart struct ulp_bde64 rbde; /* response bde */
425634b02dcdSJames Smart struct ulp_bde64 dbde[LPFC_EXT_DATA_BDE_COUNT]; /* data BDE or BPL */
425734b02dcdSJames Smart uint8_t icd[32]; /* immediate command data (32 bytes) */
425834b02dcdSJames Smart };
425934b02dcdSJames Smart
4260dea3101eS typedef struct _IOCB { /* IOCB structure */
4261dea3101eS union {
4262dea3101eS GENERIC_RSP grsp; /* Generic response */
4263dea3101eS XR_SEQ_FIELDS xrseq; /* XMIT / BCAST / RCV_SEQUENCE cmd */
4264dea3101eS struct ulp_bde cont[3]; /* up to 3 continuation bdes */
4265dea3101eS RCV_ELS_REQ rcvels; /* RCV_ELS_REQ template */
4266dea3101eS AC_XRI acxri; /* ABORT / CLOSE_XRI template */
4267dea3101eS A_MXRI64 amxri; /* abort multiple xri command overlay */
4268dea3101eS GET_RPI getrpi; /* GET_RPI template */
4269dea3101eS FCPI_FIELDS fcpi; /* FCP Initiator template */
4270dea3101eS FCPT_FIELDS fcpt; /* FCP target template */
4271dea3101eS
4272dea3101eS /* SLI-2 structures */
4273dea3101eS
4274dea3101eS struct ulp_bde64 cont64[2]; /* up to 2 64 bit continuation
4275ed957684SJames Smart * bde_64s */
4276dea3101eS ELS_REQUEST64 elsreq64; /* ELS_REQUEST template */
4277dea3101eS GEN_REQUEST64 genreq64; /* GEN_REQUEST template */
4278dea3101eS RCV_ELS_REQ64 rcvels64; /* RCV_ELS_REQ template */
4279dea3101eS XMT_SEQ_FIELDS64 xseq64; /* XMIT / BCAST cmd */
4280dea3101eS FCPI_FIELDS64 fcpi64; /* FCP 64 bit Initiator template */
4281dea3101eS FCPT_FIELDS64 fcpt64; /* FCP 64 bit target template */
428257127f15SJames Smart ASYNCSTAT_FIELDS asyncstat; /* async_status iocb */
428376bb24efSJames Smart QUE_XRI64_CX_FIELDS quexri64cx; /* que_xri64_cx fields */
42849c2face6SJames Smart struct rcv_seq64 rcvseq64; /* RCV_SEQ64 and RCV_CONT64 */
4285546fc854SJames Smart struct sli4_bls_rsp bls_rsp; /* UNSOL ABTS BLS_RSP params */
4286dea3101eS uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
4287dea3101eS } un;
4288dea3101eS union {
4289dea3101eS struct {
4290dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
4291dea3101eS uint16_t ulpContext; /* High order bits word 6 */
4292dea3101eS uint16_t ulpIoTag; /* Low order bits word 6 */
4293dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
4294dea3101eS uint16_t ulpIoTag; /* Low order bits word 6 */
4295dea3101eS uint16_t ulpContext; /* High order bits word 6 */
4296dea3101eS #endif
4297dea3101eS } t1;
4298dea3101eS struct {
4299dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
4300dea3101eS uint16_t ulpContext; /* High order bits word 6 */
4301dea3101eS uint16_t ulpIoTag1:2; /* Low order bits word 6 */
4302dea3101eS uint16_t ulpIoTag0:14; /* Low order bits word 6 */
4303dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
4304dea3101eS uint16_t ulpIoTag0:14; /* Low order bits word 6 */
4305dea3101eS uint16_t ulpIoTag1:2; /* Low order bits word 6 */
4306dea3101eS uint16_t ulpContext; /* High order bits word 6 */
4307dea3101eS #endif
4308dea3101eS } t2;
4309dea3101eS } un1;
4310dea3101eS #define ulpContext un1.t1.ulpContext
4311dea3101eS #define ulpIoTag un1.t1.ulpIoTag
4312dea3101eS #define ulpIoTag0 un1.t2.ulpIoTag0
4313dea3101eS
4314dea3101eS #ifdef __BIG_ENDIAN_BITFIELD
4315dea3101eS uint32_t ulpTimeout:8;
4316dea3101eS uint32_t ulpXS:1;
4317dea3101eS uint32_t ulpFCP2Rcvy:1;
4318dea3101eS uint32_t ulpPU:2;
4319dea3101eS uint32_t ulpIr:1;
4320dea3101eS uint32_t ulpClass:3;
4321dea3101eS uint32_t ulpCommand:8;
4322dea3101eS uint32_t ulpStatus:4;
4323dea3101eS uint32_t ulpBdeCount:2;
4324dea3101eS uint32_t ulpLe:1;
4325dea3101eS uint32_t ulpOwner:1; /* Low order bit word 7 */
4326dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */
4327dea3101eS uint32_t ulpOwner:1; /* Low order bit word 7 */
4328dea3101eS uint32_t ulpLe:1;
4329dea3101eS uint32_t ulpBdeCount:2;
4330dea3101eS uint32_t ulpStatus:4;
4331dea3101eS uint32_t ulpCommand:8;
4332dea3101eS uint32_t ulpClass:3;
4333dea3101eS uint32_t ulpIr:1;
4334dea3101eS uint32_t ulpPU:2;
4335dea3101eS uint32_t ulpFCP2Rcvy:1;
4336dea3101eS uint32_t ulpXS:1;
4337dea3101eS uint32_t ulpTimeout:8;
4338dea3101eS #endif
433992d7f7b0SJames Smart
4340ed957684SJames Smart union {
4341ed957684SJames Smart struct rcv_sli3 rcvsli3; /* words 8 - 15 */
434276bb24efSJames Smart
434376bb24efSJames Smart /* words 8-31 used for que_xri_cx iocb */
434476bb24efSJames Smart struct que_xri64cx_ext_fields que_xri64cx_ext_words;
434534b02dcdSJames Smart struct fcp_irw_ext fcp_ext;
4346ed957684SJames Smart uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
434781301a9bSJames Smart
434881301a9bSJames Smart /* words 8-15 for BlockGuard */
434981301a9bSJames Smart struct sli3_bg_fields sli3_bg;
4350ed957684SJames Smart } unsli3;
4351dea3101eS
4352ed957684SJames Smart #define ulpCt_h ulpXS
4353ed957684SJames Smart #define ulpCt_l ulpFCP2Rcvy
4354ed957684SJames Smart
4355ed957684SJames Smart #define IOCB_FCP 1 /* IOCB is used for FCP ELS cmds-ulpRsvByte */
4356ed957684SJames Smart #define IOCB_IP 2 /* IOCB is used for IP ELS cmds */
4357dea3101eS #define PARM_UNUSED 0 /* PU field (Word 4) not used */
4358dea3101eS #define PARM_REL_OFF 1 /* PU field (Word 4) = R. O. */
4359dea3101eS #define PARM_READ_CHECK 2 /* PU field (Word 4) = Data Transfer Length */
436092d7f7b0SJames Smart #define PARM_NPIV_DID 3
4361dea3101eS #define CLASS1 0 /* Class 1 */
4362dea3101eS #define CLASS2 1 /* Class 2 */
4363dea3101eS #define CLASS3 2 /* Class 3 */
4364dea3101eS #define CLASS_FCP_INTERMIX 7 /* FCP Data->Cls 1, all else->Cls 2 */
4365dea3101eS
4366dea3101eS #define IOSTAT_SUCCESS 0x0 /* ulpStatus - HBA defined */
4367dea3101eS #define IOSTAT_FCP_RSP_ERROR 0x1
4368dea3101eS #define IOSTAT_REMOTE_STOP 0x2
4369dea3101eS #define IOSTAT_LOCAL_REJECT 0x3
4370dea3101eS #define IOSTAT_NPORT_RJT 0x4
4371dea3101eS #define IOSTAT_FABRIC_RJT 0x5
4372dea3101eS #define IOSTAT_NPORT_BSY 0x6
4373dea3101eS #define IOSTAT_FABRIC_BSY 0x7
4374dea3101eS #define IOSTAT_INTERMED_RSP 0x8
4375dea3101eS #define IOSTAT_LS_RJT 0x9
4376dea3101eS #define IOSTAT_BA_RJT 0xA
4377dea3101eS #define IOSTAT_RSVD1 0xB
4378dea3101eS #define IOSTAT_RSVD2 0xC
4379dea3101eS #define IOSTAT_RSVD3 0xD
4380dea3101eS #define IOSTAT_RSVD4 0xE
438192d7f7b0SJames Smart #define IOSTAT_NEED_BUFFER 0xF
4382dea3101eS #define IOSTAT_DRIVER_REJECT 0x10 /* ulpStatus - Driver defined */
4383dea3101eS #define IOSTAT_DEFAULT 0xF /* Same as rsvd5 for now */
4384dea3101eS #define IOSTAT_CNT 0x11
4385dea3101eS
4386dea3101eS } IOCB_t;
4387dea3101eS
4388dea3101eS
4389dea3101eS #define SLI1_SLIM_SIZE (4 * 1024)
4390dea3101eS
4391dea3101eS /* Up to 498 IOCBs will fit into 16k
4392dea3101eS * 256 (MAILBOX_t) + 140 (PCB_t) + ( 32 (IOCB_t) * 498 ) = < 16384
4393dea3101eS */
4394ed957684SJames Smart #define SLI2_SLIM_SIZE (64 * 1024)
4395dea3101eS
4396dea3101eS /* Maximum IOCBs that will fit in SLI2 slim */
4397dea3101eS #define MAX_SLI2_IOCB 498
4398ed957684SJames Smart #define MAX_SLIM_IOCB_SIZE (SLI2_SLIM_SIZE - \
43997a470277SJames Smart (sizeof(MAILBOX_t) + sizeof(PCB_t) + \
44007a470277SJames Smart sizeof(uint32_t) * MAILBOX_EXT_WSIZE))
4401ed957684SJames Smart
4402ed957684SJames Smart /* HBQ entries are 4 words each = 4k */
4403ed957684SJames Smart #define LPFC_TOTAL_HBQ_SIZE (sizeof(struct lpfc_hbq_entry) * \
4404ed957684SJames Smart lpfc_sli_hbq_count())
4405dea3101eS
4406dea3101eS struct lpfc_sli2_slim {
4407dea3101eS MAILBOX_t mbx;
44087a470277SJames Smart uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE];
4409dea3101eS PCB_t pcb;
4410ed957684SJames Smart IOCB_t IOCBs[MAX_SLIM_IOCB_SIZE];
4411dea3101eS };
4412dea3101eS
44132e0fef85SJames Smart /*
44142e0fef85SJames Smart * This function checks PCI device to allow special handling for LC HBAs.
44152e0fef85SJames Smart *
44162e0fef85SJames Smart * Parameters:
44172e0fef85SJames Smart * device : struct pci_dev 's device field
44182e0fef85SJames Smart *
44192e0fef85SJames Smart * return 1 => TRUE
44202e0fef85SJames Smart * 0 => FALSE
44212e0fef85SJames Smart */
4422dea3101eS static inline int
lpfc_is_LC_HBA(unsigned short device)4423dea3101eS lpfc_is_LC_HBA(unsigned short device)
4424dea3101eS {
4425dea3101eS if ((device == PCI_DEVICE_ID_TFLY) ||
4426dea3101eS (device == PCI_DEVICE_ID_PFLY) ||
4427dea3101eS (device == PCI_DEVICE_ID_LP101) ||
4428dea3101eS (device == PCI_DEVICE_ID_BMID) ||
4429dea3101eS (device == PCI_DEVICE_ID_BSMB) ||
4430dea3101eS (device == PCI_DEVICE_ID_ZMID) ||
4431dea3101eS (device == PCI_DEVICE_ID_ZSMB) ||
443209372820SJames Smart (device == PCI_DEVICE_ID_SAT_MID) ||
443309372820SJames Smart (device == PCI_DEVICE_ID_SAT_SMB) ||
4434dea3101eS (device == PCI_DEVICE_ID_RFLY))
4435dea3101eS return 1;
4436dea3101eS else
4437dea3101eS return 0;
4438dea3101eS }
4439858c9f6cSJames Smart
4440da0436e9SJames Smart #define BPL_ALIGN_SZ 8 /* 8 byte alignment for bpl and mbufs */
4441