1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2021 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <scsi/scsi_host.h> 25 #include <linux/ktime.h> 26 #include <linux/workqueue.h> 27 28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 29 #define CONFIG_SCSI_LPFC_DEBUG_FS 30 #endif 31 32 struct lpfc_sli2_slim; 33 34 #define ELX_MODEL_NAME_SIZE 80 35 36 #define LPFC_PCI_DEV_LP 0x1 37 #define LPFC_PCI_DEV_OC 0x2 38 39 #define LPFC_SLI_REV2 2 40 #define LPFC_SLI_REV3 3 41 #define LPFC_SLI_REV4 4 42 43 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 44 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 45 requests */ 46 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 47 the NameServer before giving up. */ 48 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 49 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 50 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi 51 cmnd for menlo needs nearly twice as for firmware 52 downloads using bsg */ 53 54 #define LPFC_DEFAULT_XPSGL_SIZE 256 55 #define LPFC_MAX_SG_TABLESIZE 0xffff 56 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 57 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ 58 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 59 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 60 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ 61 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 62 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 63 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */ 64 65 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 66 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 67 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 68 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 69 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 70 #define LPFC_MIN_TGT_QDEPTH 10 71 #define LPFC_MAX_TGT_QDEPTH 0xFFFF 72 73 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data 74 collection. */ 75 /* 76 * Following time intervals are used of adjusting SCSI device 77 * queue depths when there are driver resource error or Firmware 78 * resource error. 79 */ 80 /* 1 Second */ 81 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 82 83 /* Number of exchanges reserved for discovery to complete */ 84 #define LPFC_DISC_IOCB_BUFF_COUNT 20 85 86 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 87 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 88 89 /* Error Attention event polling interval */ 90 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 91 92 /* Define macros for 64 bit support */ 93 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 94 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 95 #define getPaddr(high, low) ((dma_addr_t)( \ 96 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 97 /* Provide maximum configuration definitions. */ 98 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 99 #define FC_MAX_ADPTMSG 64 100 101 #define MAX_HBAEVT 32 102 #define MAX_HBAS_NO_RESET 16 103 104 /* Number of MSI-X vectors the driver uses */ 105 #define LPFC_MSIX_VECTORS 2 106 107 /* lpfc wait event data ready flag */ 108 #define LPFC_DATA_READY 0 /* bit 0 */ 109 110 /* queue dump line buffer size */ 111 #define LPFC_LBUF_SZ 128 112 113 /* mailbox system shutdown options */ 114 #define LPFC_MBX_NO_WAIT 0 115 #define LPFC_MBX_WAIT 1 116 117 #define LPFC_CFG_PARAM_MAGIC_NUM 0xFEAA0005 118 #define LPFC_PORT_CFG_NAME "/cfg/port.cfg" 119 120 #define lpfc_rangecheck(val, min, max) \ 121 ((uint)(val) >= (uint)(min) && (val) <= (max)) 122 123 enum lpfc_polling_flags { 124 ENABLE_FCP_RING_POLLING = 0x1, 125 DISABLE_FCP_RING_INT = 0x2 126 }; 127 128 struct perf_prof { 129 uint16_t cmd_cpu[40]; 130 uint16_t rsp_cpu[40]; 131 uint16_t qh_cpu[40]; 132 uint16_t wqidx[40]; 133 }; 134 135 /* 136 * Provide for FC4 TYPE x28 - NVME. The 137 * bit mask for FCP and NVME is 0x8 identically 138 * because they are 32 bit positions distance. 139 */ 140 #define LPFC_FC4_TYPE_BITMASK 0x00000100 141 142 /* Provide DMA memory definitions the driver uses per port instance. */ 143 struct lpfc_dmabuf { 144 struct list_head list; 145 void *virt; /* virtual address ptr */ 146 dma_addr_t phys; /* mapped address */ 147 uint32_t buffer_tag; /* used for tagged queue ring */ 148 }; 149 150 struct lpfc_nvmet_ctxbuf { 151 struct list_head list; 152 struct lpfc_async_xchg_ctx *context; 153 struct lpfc_iocbq *iocbq; 154 struct lpfc_sglq *sglq; 155 struct work_struct defer_work; 156 }; 157 158 struct lpfc_dma_pool { 159 struct lpfc_dmabuf *elements; 160 uint32_t max_count; 161 uint32_t current_count; 162 }; 163 164 struct hbq_dmabuf { 165 struct lpfc_dmabuf hbuf; 166 struct lpfc_dmabuf dbuf; 167 uint16_t total_size; 168 uint16_t bytes_recv; 169 uint32_t tag; 170 struct lpfc_cq_event cq_event; 171 unsigned long time_stamp; 172 void *context; 173 }; 174 175 struct rqb_dmabuf { 176 struct lpfc_dmabuf hbuf; 177 struct lpfc_dmabuf dbuf; 178 uint16_t total_size; 179 uint16_t bytes_recv; 180 uint16_t idx; 181 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 182 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 183 }; 184 185 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 186 #define MEM_PRI 0x100 187 188 189 /****************************************************************************/ 190 /* Device VPD save area */ 191 /****************************************************************************/ 192 typedef struct lpfc_vpd { 193 uint32_t status; /* vpd status value */ 194 uint32_t length; /* number of bytes actually returned */ 195 struct { 196 uint32_t rsvd1; /* Revision numbers */ 197 uint32_t biuRev; 198 uint32_t smRev; 199 uint32_t smFwRev; 200 uint32_t endecRev; 201 uint16_t rBit; 202 uint8_t fcphHigh; 203 uint8_t fcphLow; 204 uint8_t feaLevelHigh; 205 uint8_t feaLevelLow; 206 uint32_t postKernRev; 207 uint32_t opFwRev; 208 uint8_t opFwName[16]; 209 uint32_t sli1FwRev; 210 uint8_t sli1FwName[16]; 211 uint32_t sli2FwRev; 212 uint8_t sli2FwName[16]; 213 } rev; 214 struct { 215 #ifdef __BIG_ENDIAN_BITFIELD 216 uint32_t rsvd3 :20; /* Reserved */ 217 uint32_t rsvd2 : 3; /* Reserved */ 218 uint32_t cbg : 1; /* Configure BlockGuard */ 219 uint32_t cmv : 1; /* Configure Max VPIs */ 220 uint32_t ccrp : 1; /* Config Command Ring Polling */ 221 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 222 uint32_t chbs : 1; /* Cofigure Host Backing store */ 223 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 224 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 225 uint32_t cmx : 1; /* Configure Max XRIs */ 226 uint32_t cmr : 1; /* Configure Max RPIs */ 227 #else /* __LITTLE_ENDIAN */ 228 uint32_t cmr : 1; /* Configure Max RPIs */ 229 uint32_t cmx : 1; /* Configure Max XRIs */ 230 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 231 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 232 uint32_t chbs : 1; /* Cofigure Host Backing store */ 233 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 234 uint32_t ccrp : 1; /* Config Command Ring Polling */ 235 uint32_t cmv : 1; /* Configure Max VPIs */ 236 uint32_t cbg : 1; /* Configure BlockGuard */ 237 uint32_t rsvd2 : 3; /* Reserved */ 238 uint32_t rsvd3 :20; /* Reserved */ 239 #endif 240 } sli3Feat; 241 } lpfc_vpd_t; 242 243 244 /* 245 * lpfc stat counters 246 */ 247 struct lpfc_stats { 248 /* Statistics for ELS commands */ 249 uint32_t elsLogiCol; 250 uint32_t elsRetryExceeded; 251 uint32_t elsXmitRetry; 252 uint32_t elsDelayRetry; 253 uint32_t elsRcvDrop; 254 uint32_t elsRcvFrame; 255 uint32_t elsRcvRSCN; 256 uint32_t elsRcvRNID; 257 uint32_t elsRcvFARP; 258 uint32_t elsRcvFARPR; 259 uint32_t elsRcvFLOGI; 260 uint32_t elsRcvPLOGI; 261 uint32_t elsRcvADISC; 262 uint32_t elsRcvPDISC; 263 uint32_t elsRcvFAN; 264 uint32_t elsRcvLOGO; 265 uint32_t elsRcvPRLO; 266 uint32_t elsRcvPRLI; 267 uint32_t elsRcvLIRR; 268 uint32_t elsRcvRLS; 269 uint32_t elsRcvRPL; 270 uint32_t elsRcvRRQ; 271 uint32_t elsRcvRTV; 272 uint32_t elsRcvECHO; 273 uint32_t elsRcvLCB; 274 uint32_t elsRcvRDP; 275 uint32_t elsRcvRDF; 276 uint32_t elsXmitFLOGI; 277 uint32_t elsXmitFDISC; 278 uint32_t elsXmitPLOGI; 279 uint32_t elsXmitPRLI; 280 uint32_t elsXmitADISC; 281 uint32_t elsXmitLOGO; 282 uint32_t elsXmitSCR; 283 uint32_t elsXmitRSCN; 284 uint32_t elsXmitRNID; 285 uint32_t elsXmitFARP; 286 uint32_t elsXmitFARPR; 287 uint32_t elsXmitACC; 288 uint32_t elsXmitLSRJT; 289 290 uint32_t frameRcvBcast; 291 uint32_t frameRcvMulti; 292 uint32_t strayXmitCmpl; 293 uint32_t frameXmitDelay; 294 uint32_t xriCmdCmpl; 295 uint32_t xriStatErr; 296 uint32_t LinkUp; 297 uint32_t LinkDown; 298 uint32_t LinkMultiEvent; 299 uint32_t NoRcvBuf; 300 uint32_t fcpCmd; 301 uint32_t fcpCmpl; 302 uint32_t fcpRspErr; 303 uint32_t fcpRemoteStop; 304 uint32_t fcpPortRjt; 305 uint32_t fcpPortBusy; 306 uint32_t fcpError; 307 uint32_t fcpLocalErr; 308 }; 309 310 struct lpfc_hba; 311 312 313 #define LPFC_VMID_TIMER 300 /* timer interval in seconds */ 314 315 #define LPFC_MAX_VMID_SIZE 256 316 #define LPFC_COMPRESS_VMID_SIZE 16 317 318 union lpfc_vmid_io_tag { 319 u32 app_id; /* App Id vmid */ 320 u8 cs_ctl_vmid; /* Priority tag vmid */ 321 }; 322 323 #define JIFFIES_PER_HR (HZ * 60 * 60) 324 325 struct lpfc_vmid { 326 u8 flag; 327 #define LPFC_VMID_SLOT_FREE 0x0 328 #define LPFC_VMID_SLOT_USED 0x1 329 #define LPFC_VMID_REQ_REGISTER 0x2 330 #define LPFC_VMID_REGISTERED 0x4 331 #define LPFC_VMID_DE_REGISTER 0x8 332 char host_vmid[LPFC_MAX_VMID_SIZE]; 333 union lpfc_vmid_io_tag un; 334 struct hlist_node hnode; 335 u64 io_rd_cnt; 336 u64 io_wr_cnt; 337 u8 vmid_len; 338 u8 delete_inactive; /* Delete if inactive flag 0 = no, 1 = yes */ 339 u32 hash_index; 340 u64 __percpu *last_io_time; 341 }; 342 343 #define lpfc_vmid_is_type_priority_tag(vport)\ 344 (vport->vmid_priority_tagging ? 1 : 0) 345 346 #define LPFC_VMID_HASH_SIZE 256 347 #define LPFC_VMID_HASH_MASK 255 348 #define LPFC_VMID_HASH_SHIFT 6 349 350 struct lpfc_vmid_context { 351 struct lpfc_vmid *vmp; 352 struct lpfc_nodelist *nlp; 353 bool instantiated; 354 }; 355 356 struct lpfc_vmid_priority_range { 357 u8 low; 358 u8 high; 359 u8 qos; 360 }; 361 362 struct lpfc_vmid_priority_info { 363 u32 num_descriptors; 364 struct lpfc_vmid_priority_range *vmid_range; 365 }; 366 367 #define QFPA_EVEN_ONLY 0x01 368 #define QFPA_ODD_ONLY 0x02 369 #define QFPA_EVEN_ODD 0x03 370 371 enum discovery_state { 372 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 373 LPFC_VPORT_FAILED = 1, /* vport has failed */ 374 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 375 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 376 LPFC_FDISC = 8, /* FDISC sent for vport */ 377 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 378 * configured */ 379 LPFC_NS_REG = 10, /* Register with NameServer */ 380 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 381 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 382 * device authentication / discovery */ 383 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 384 LPFC_VPORT_READY = 32, 385 }; 386 387 enum hba_state { 388 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 389 LPFC_WARM_START = 1, /* HBA state after selective reset */ 390 LPFC_INIT_START = 2, /* Initial state after board reset */ 391 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 392 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 393 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 394 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 395 * CLEAR_LA */ 396 LPFC_HBA_READY = 32, 397 LPFC_HBA_ERROR = -1 398 }; 399 400 struct lpfc_trunk_link_state { 401 enum hba_state state; 402 uint8_t fault; 403 }; 404 405 struct lpfc_trunk_link { 406 struct lpfc_trunk_link_state link0, 407 link1, 408 link2, 409 link3; 410 }; 411 412 /* Format of congestion module parameters */ 413 struct lpfc_cgn_param { 414 uint32_t cgn_param_magic; 415 uint8_t cgn_param_version; /* version 1 */ 416 uint8_t cgn_param_mode; /* 0=off 1=managed 2=monitor only */ 417 #define LPFC_CFG_OFF 0 418 #define LPFC_CFG_MANAGED 1 419 #define LPFC_CFG_MONITOR 2 420 uint8_t cgn_rsvd1; 421 uint8_t cgn_rsvd2; 422 uint8_t cgn_param_level0; 423 uint8_t cgn_param_level1; 424 uint8_t cgn_param_level2; 425 uint8_t byte11; 426 uint8_t byte12; 427 uint8_t byte13; 428 uint8_t byte14; 429 uint8_t byte15; 430 }; 431 432 /* Max number of days of congestion data */ 433 #define LPFC_MAX_CGN_DAYS 10 434 435 /* Format of congestion buffer info 436 * This structure defines memory thats allocated and registered with 437 * the HBA firmware. When adding or removing fields from this structure 438 * the alignment must match the HBA firmware. 439 */ 440 441 struct lpfc_cgn_info { 442 /* Header */ 443 __le16 cgn_info_size; /* is sizeof(struct lpfc_cgn_info) */ 444 uint8_t cgn_info_version; /* represents format of structure */ 445 #define LPFC_CGN_INFO_V1 1 446 #define LPFC_CGN_INFO_V2 2 447 #define LPFC_CGN_INFO_V3 3 448 uint8_t cgn_info_mode; /* 0=off 1=managed 2=monitor only */ 449 uint8_t cgn_info_detect; 450 uint8_t cgn_info_action; 451 uint8_t cgn_info_level0; 452 uint8_t cgn_info_level1; 453 uint8_t cgn_info_level2; 454 455 /* Start Time */ 456 uint8_t cgn_info_month; 457 uint8_t cgn_info_day; 458 uint8_t cgn_info_year; 459 uint8_t cgn_info_hour; 460 uint8_t cgn_info_minute; 461 uint8_t cgn_info_second; 462 463 /* minute / hours / daily indices */ 464 uint8_t cgn_index_minute; 465 uint8_t cgn_index_hour; 466 uint8_t cgn_index_day; 467 468 __le16 cgn_warn_freq; 469 __le16 cgn_alarm_freq; 470 __le16 cgn_lunq; 471 uint8_t cgn_pad1[8]; 472 473 /* Driver Information */ 474 __le16 cgn_drvr_min[60]; 475 __le32 cgn_drvr_hr[24]; 476 __le32 cgn_drvr_day[LPFC_MAX_CGN_DAYS]; 477 478 /* Congestion Warnings */ 479 __le16 cgn_warn_min[60]; 480 __le32 cgn_warn_hr[24]; 481 __le32 cgn_warn_day[LPFC_MAX_CGN_DAYS]; 482 483 /* Latency Information */ 484 __le32 cgn_latency_min[60]; 485 __le32 cgn_latency_hr[24]; 486 __le32 cgn_latency_day[LPFC_MAX_CGN_DAYS]; 487 488 /* Bandwidth Information */ 489 __le16 cgn_bw_min[60]; 490 __le16 cgn_bw_hr[24]; 491 __le16 cgn_bw_day[LPFC_MAX_CGN_DAYS]; 492 493 /* Congestion Alarms */ 494 __le16 cgn_alarm_min[60]; 495 __le32 cgn_alarm_hr[24]; 496 __le32 cgn_alarm_day[LPFC_MAX_CGN_DAYS]; 497 498 /* Start of congestion statistics */ 499 uint8_t cgn_stat_npm; /* Notifications per minute */ 500 501 /* Start Time */ 502 uint8_t cgn_stat_month; 503 uint8_t cgn_stat_day; 504 uint8_t cgn_stat_year; 505 uint8_t cgn_stat_hour; 506 uint8_t cgn_stat_minute; 507 uint8_t cgn_pad2[2]; 508 509 __le32 cgn_notification; 510 __le32 cgn_peer_notification; 511 __le32 link_integ_notification; 512 __le32 delivery_notification; 513 514 uint8_t cgn_stat_cgn_month; /* Last congestion notification FPIN */ 515 uint8_t cgn_stat_cgn_day; 516 uint8_t cgn_stat_cgn_year; 517 uint8_t cgn_stat_cgn_hour; 518 uint8_t cgn_stat_cgn_min; 519 uint8_t cgn_stat_cgn_sec; 520 521 uint8_t cgn_stat_peer_month; /* Last peer congestion FPIN */ 522 uint8_t cgn_stat_peer_day; 523 uint8_t cgn_stat_peer_year; 524 uint8_t cgn_stat_peer_hour; 525 uint8_t cgn_stat_peer_min; 526 uint8_t cgn_stat_peer_sec; 527 528 uint8_t cgn_stat_lnk_month; /* Last link integrity FPIN */ 529 uint8_t cgn_stat_lnk_day; 530 uint8_t cgn_stat_lnk_year; 531 uint8_t cgn_stat_lnk_hour; 532 uint8_t cgn_stat_lnk_min; 533 uint8_t cgn_stat_lnk_sec; 534 535 uint8_t cgn_stat_del_month; /* Last delivery notification FPIN */ 536 uint8_t cgn_stat_del_day; 537 uint8_t cgn_stat_del_year; 538 uint8_t cgn_stat_del_hour; 539 uint8_t cgn_stat_del_min; 540 uint8_t cgn_stat_del_sec; 541 #define LPFC_CGN_STAT_SIZE 48 542 #define LPFC_CGN_DATA_SIZE (sizeof(struct lpfc_cgn_info) - \ 543 LPFC_CGN_STAT_SIZE - sizeof(uint32_t)) 544 545 __le32 cgn_info_crc; 546 #define LPFC_CGN_CRC32_MAGIC_NUMBER 0x1EDC6F41 547 #define LPFC_CGN_CRC32_SEED 0xFFFFFFFF 548 }; 549 550 #define LPFC_CGN_INFO_SZ (sizeof(struct lpfc_cgn_info) - \ 551 sizeof(uint32_t)) 552 553 struct lpfc_cgn_stat { 554 atomic64_t total_bytes; 555 atomic64_t rcv_bytes; 556 atomic64_t rx_latency; 557 #define LPFC_CGN_NOT_SENT 0xFFFFFFFFFFFFFFFFLL 558 atomic_t rx_io_cnt; 559 }; 560 561 struct lpfc_cgn_acqe_stat { 562 atomic64_t alarm; 563 atomic64_t warn; 564 }; 565 566 struct lpfc_vport { 567 struct lpfc_hba *phba; 568 struct list_head listentry; 569 uint8_t port_type; 570 #define LPFC_PHYSICAL_PORT 1 571 #define LPFC_NPIV_PORT 2 572 #define LPFC_FABRIC_PORT 3 573 enum discovery_state port_state; 574 575 uint16_t vpi; 576 uint16_t vfi; 577 uint8_t vpi_state; 578 #define LPFC_VPI_REGISTERED 0x1 579 580 uint32_t fc_flag; /* FC flags */ 581 /* Several of these flags are HBA centric and should be moved to 582 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 583 */ 584 #define FC_PT2PT 0x1 /* pt2pt with no fabric */ 585 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 586 #define FC_DISC_TMO 0x4 /* Discovery timer running */ 587 #define FC_PUBLIC_LOOP 0x8 /* Public loop */ 588 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 589 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 590 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 591 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 592 #define FC_FABRIC 0x100 /* We are fabric attached */ 593 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 594 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 595 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 596 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 597 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 598 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 599 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 600 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 601 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 602 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 603 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 604 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 605 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 606 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 607 608 uint32_t ct_flags; 609 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 610 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 611 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 612 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 613 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 614 615 struct list_head fc_nodes; 616 617 /* Keep counters for the number of entries in each list. */ 618 uint16_t fc_plogi_cnt; 619 uint16_t fc_adisc_cnt; 620 uint16_t fc_reglogin_cnt; 621 uint16_t fc_prli_cnt; 622 uint16_t fc_unmap_cnt; 623 uint16_t fc_map_cnt; 624 uint16_t fc_npr_cnt; 625 uint16_t fc_unused_cnt; 626 struct serv_parm fc_sparam; /* buffer for our service parameters */ 627 628 uint32_t fc_myDID; /* fibre channel S_ID */ 629 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 630 struct lpfc_name fabric_portname; 631 struct lpfc_name fabric_nodename; 632 633 int32_t stopped; /* HBA has not been restarted since last ERATT */ 634 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 635 636 uint32_t num_disc_nodes; /* in addition to hba_state */ 637 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 638 639 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 640 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 641 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 642 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 643 struct lpfc_name fc_nodename; /* fc nodename */ 644 struct lpfc_name fc_portname; /* fc portname */ 645 646 struct lpfc_work_evt disc_timeout_evt; 647 648 struct timer_list fc_disctmo; /* Discovery rescue timer */ 649 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 650 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 651 652 spinlock_t work_port_lock; 653 uint32_t work_port_events; /* Timeout to be handled */ 654 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 655 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 656 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 657 658 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 659 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 660 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 661 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 662 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 663 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 664 #define WORKER_CHECK_INACTIVE_VMID 0x4000 /* hba: check inactive vmids */ 665 #define WORKER_CHECK_VMID_ISSUE_QFPA 0x8000 /* vport: Check if qfpa needs 666 * to be issued */ 667 668 struct timer_list els_tmofunc; 669 struct timer_list delayed_disc_tmo; 670 671 int unreg_vpi_cmpl; 672 673 uint8_t load_flag; 674 #define FC_LOADING 0x1 /* HBA in process of loading drvr */ 675 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 676 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 677 #define FC_ALLOW_VMID 0x8 /* Allow VMID I/Os */ 678 #define FC_DEREGISTER_ALL_APP_ID 0x10 /* Deregister all VMIDs */ 679 /* Vport Config Parameters */ 680 uint32_t cfg_scan_down; 681 uint32_t cfg_lun_queue_depth; 682 uint32_t cfg_nodev_tmo; 683 uint32_t cfg_devloss_tmo; 684 uint32_t cfg_restrict_login; 685 uint32_t cfg_peer_port_login; 686 uint32_t cfg_fcp_class; 687 uint32_t cfg_use_adisc; 688 uint32_t cfg_discovery_threads; 689 uint32_t cfg_log_verbose; 690 uint32_t cfg_enable_fc4_type; 691 uint32_t cfg_max_luns; 692 uint32_t cfg_enable_da_id; 693 uint32_t cfg_max_scsicmpl_time; 694 uint32_t cfg_tgt_queue_depth; 695 uint32_t cfg_first_burst_size; 696 uint32_t dev_loss_tmo_changed; 697 /* VMID parameters */ 698 u8 lpfc_vmid_host_uuid[LPFC_COMPRESS_VMID_SIZE]; 699 u32 max_vmid; /* maximum VMIDs allowed per port */ 700 u32 cur_vmid_cnt; /* Current VMID count */ 701 #define LPFC_MIN_VMID 4 702 #define LPFC_MAX_VMID 255 703 u32 vmid_inactivity_timeout; /* Time after which the VMID */ 704 /* deregisters from switch */ 705 u32 vmid_priority_tagging; 706 #define LPFC_VMID_PRIO_TAG_DISABLE 0 /* Disable */ 707 #define LPFC_VMID_PRIO_TAG_SUP_TARGETS 1 /* Allow supported targets only */ 708 #define LPFC_VMID_PRIO_TAG_ALL_TARGETS 2 /* Allow all targets */ 709 unsigned long *vmid_priority_range; 710 #define LPFC_VMID_MAX_PRIORITY_RANGE 256 711 #define LPFC_VMID_PRIORITY_BITMAP_SIZE 32 712 u8 vmid_flag; 713 #define LPFC_VMID_IN_USE 0x1 714 #define LPFC_VMID_ISSUE_QFPA 0x2 715 #define LPFC_VMID_QFPA_CMPL 0x4 716 #define LPFC_VMID_QOS_ENABLED 0x8 717 #define LPFC_VMID_TIMER_ENBLD 0x10 718 struct fc_qfpa_res *qfpa_res; 719 720 struct fc_vport *fc_vport; 721 722 struct lpfc_vmid *vmid; 723 DECLARE_HASHTABLE(hash_table, 8); 724 rwlock_t vmid_lock; 725 struct lpfc_vmid_priority_info vmid_priority; 726 727 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 728 struct dentry *debug_disc_trc; 729 struct dentry *debug_nodelist; 730 struct dentry *debug_nvmestat; 731 struct dentry *debug_scsistat; 732 struct dentry *debug_ioktime; 733 struct dentry *debug_hdwqstat; 734 struct dentry *vport_debugfs_root; 735 struct lpfc_debugfs_trc *disc_trc; 736 atomic_t disc_trc_cnt; 737 #endif 738 uint8_t stat_data_enabled; 739 uint8_t stat_data_blocked; 740 struct list_head rcv_buffer_list; 741 unsigned long rcv_buffer_time_stamp; 742 uint32_t vport_flag; 743 #define STATIC_VPORT 1 744 #define FAWWPN_SET 2 745 #define FAWWPN_PARAM_CHG 4 746 747 uint16_t fdmi_num_disc; 748 uint32_t fdmi_hba_mask; 749 uint32_t fdmi_port_mask; 750 751 /* There is a single nvme instance per vport. */ 752 struct nvme_fc_local_port *localport; 753 uint8_t nvmei_support; /* driver supports NVME Initiator */ 754 uint32_t last_fcp_wqidx; 755 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */ 756 }; 757 758 struct hbq_s { 759 uint16_t entry_count; /* Current number of HBQ slots */ 760 uint16_t buffer_count; /* Current number of buffers posted */ 761 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 762 uint32_t hbqPutIdx; /* HBQ slot to use */ 763 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 764 void *hbq_virt; /* Virtual ptr to this hbq */ 765 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 766 /* Callback for HBQ buffer allocation */ 767 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 768 /* Callback for HBQ buffer free */ 769 void (*hbq_free_buffer) (struct lpfc_hba *, 770 struct hbq_dmabuf *); 771 }; 772 773 /* this matches the position in the lpfc_hbq_defs array */ 774 #define LPFC_ELS_HBQ 0 775 #define LPFC_MAX_HBQS 1 776 777 enum hba_temp_state { 778 HBA_NORMAL_TEMP, 779 HBA_OVER_TEMP 780 }; 781 782 enum intr_type_t { 783 NONE = 0, 784 INTx, 785 MSI, 786 MSIX, 787 }; 788 789 #define LPFC_CT_CTX_MAX 64 790 struct unsol_rcv_ct_ctx { 791 uint32_t ctxt_id; 792 uint32_t SID; 793 uint32_t valid; 794 #define UNSOL_INVALID 0 795 #define UNSOL_VALID 1 796 uint16_t oxid; 797 uint16_t rxid; 798 }; 799 800 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 801 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 802 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 803 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 804 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 805 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 806 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 807 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 808 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */ 809 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G 810 811 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64" 812 813 enum nemb_type { 814 nemb_mse = 1, 815 nemb_hbd 816 }; 817 818 enum mbox_type { 819 mbox_rd = 1, 820 mbox_wr 821 }; 822 823 enum dma_type { 824 dma_mbox = 1, 825 dma_ebuf 826 }; 827 828 enum sta_type { 829 sta_pre_addr = 1, 830 sta_pos_addr 831 }; 832 833 struct lpfc_mbox_ext_buf_ctx { 834 uint32_t state; 835 #define LPFC_BSG_MBOX_IDLE 0 836 #define LPFC_BSG_MBOX_HOST 1 837 #define LPFC_BSG_MBOX_PORT 2 838 #define LPFC_BSG_MBOX_DONE 3 839 #define LPFC_BSG_MBOX_ABTS 4 840 enum nemb_type nembType; 841 enum mbox_type mboxType; 842 uint32_t numBuf; 843 uint32_t mbxTag; 844 uint32_t seqNum; 845 struct lpfc_dmabuf *mbx_dmabuf; 846 struct list_head ext_dmabuf_list; 847 }; 848 849 struct lpfc_epd_pool { 850 /* Expedite pool */ 851 struct list_head list; 852 u32 count; 853 spinlock_t lock; /* lock for expedite pool */ 854 }; 855 856 enum ras_state { 857 INACTIVE, 858 REG_INPROGRESS, 859 ACTIVE 860 }; 861 862 struct lpfc_ras_fwlog { 863 uint8_t *fwlog_buff; 864 uint32_t fw_buffcount; /* Buffer size posted to FW */ 865 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */ 866 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024) 867 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024) 868 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024) 869 uint32_t fw_loglevel; /* Log level set */ 870 struct lpfc_dmabuf lwpd; 871 struct list_head fwlog_buff_list; 872 873 /* RAS support status on adapter */ 874 bool ras_hwsupport; /* RAS Support available on HW or not */ 875 bool ras_enabled; /* Ras Enabled for the function */ 876 #define LPFC_RAS_DISABLE_LOGGING 0x00 877 #define LPFC_RAS_ENABLE_LOGGING 0x01 878 enum ras_state state; /* RAS logging running state */ 879 }; 880 881 #define DBG_LOG_STR_SZ 256 882 #define DBG_LOG_SZ 256 883 884 struct dbg_log_ent { 885 char log[DBG_LOG_STR_SZ]; 886 u64 t_ns; 887 }; 888 889 enum lpfc_irq_chann_mode { 890 /* Assign IRQs to all possible cpus that have hardware queues */ 891 NORMAL_MODE, 892 893 /* Assign IRQs only to cpus on the same numa node as HBA */ 894 NUMA_MODE, 895 896 /* Assign IRQs only on non-hyperthreaded CPUs. This is the 897 * same as normal_mode, but assign IRQS only on physical CPUs. 898 */ 899 NHT_MODE, 900 }; 901 902 struct lpfc_hba { 903 /* SCSI interface function jump table entries */ 904 struct lpfc_io_buf * (*lpfc_get_scsi_buf) 905 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, 906 struct scsi_cmnd *cmnd); 907 int (*lpfc_scsi_prep_dma_buf) 908 (struct lpfc_hba *, struct lpfc_io_buf *); 909 void (*lpfc_scsi_unprep_dma_buf) 910 (struct lpfc_hba *, struct lpfc_io_buf *); 911 void (*lpfc_release_scsi_buf) 912 (struct lpfc_hba *, struct lpfc_io_buf *); 913 void (*lpfc_rampdown_queue_depth) 914 (struct lpfc_hba *); 915 void (*lpfc_scsi_prep_cmnd) 916 (struct lpfc_vport *, struct lpfc_io_buf *, 917 struct lpfc_nodelist *); 918 int (*lpfc_scsi_prep_cmnd_buf) 919 (struct lpfc_vport *vport, 920 struct lpfc_io_buf *lpfc_cmd, 921 uint8_t tmo); 922 923 /* IOCB interface function jump table entries */ 924 int (*__lpfc_sli_issue_iocb) 925 (struct lpfc_hba *, uint32_t, 926 struct lpfc_iocbq *, uint32_t); 927 int (*__lpfc_sli_issue_fcp_io) 928 (struct lpfc_hba *phba, uint32_t ring_number, 929 struct lpfc_iocbq *piocb, uint32_t flag); 930 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 931 struct lpfc_iocbq *); 932 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 933 IOCB_t * (*lpfc_get_iocb_from_iocbq) 934 (struct lpfc_iocbq *); 935 void (*lpfc_scsi_cmd_iocb_cmpl) 936 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *); 937 938 /* MBOX interface function jump table entries */ 939 int (*lpfc_sli_issue_mbox) 940 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 941 942 /* Slow-path IOCB process function jump table entries */ 943 void (*lpfc_sli_handle_slow_ring_event) 944 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 945 uint32_t mask); 946 947 /* INIT device interface function jump table entries */ 948 int (*lpfc_sli_hbq_to_firmware) 949 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 950 int (*lpfc_sli_brdrestart) 951 (struct lpfc_hba *); 952 int (*lpfc_sli_brdready) 953 (struct lpfc_hba *, uint32_t); 954 void (*lpfc_handle_eratt) 955 (struct lpfc_hba *); 956 void (*lpfc_stop_port) 957 (struct lpfc_hba *); 958 int (*lpfc_hba_init_link) 959 (struct lpfc_hba *, uint32_t); 960 int (*lpfc_hba_down_link) 961 (struct lpfc_hba *, uint32_t); 962 int (*lpfc_selective_reset) 963 (struct lpfc_hba *); 964 965 int (*lpfc_bg_scsi_prep_dma_buf) 966 (struct lpfc_hba *, struct lpfc_io_buf *); 967 /* Add new entries here */ 968 969 /* expedite pool */ 970 struct lpfc_epd_pool epd_pool; 971 972 /* SLI4 specific HBA data structure */ 973 struct lpfc_sli4_hba sli4_hba; 974 975 struct workqueue_struct *wq; 976 struct delayed_work eq_delay_work; 977 978 #define LPFC_IDLE_STAT_DELAY 1000 979 struct delayed_work idle_stat_delay_work; 980 981 struct lpfc_sli sli; 982 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 983 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 984 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 985 #define LPFC_SLI3_HBQ_ENABLED 0x01 986 #define LPFC_SLI3_NPIV_ENABLED 0x02 987 #define LPFC_SLI3_VPORT_TEARDOWN 0x04 988 #define LPFC_SLI3_CRP_ENABLED 0x08 989 #define LPFC_SLI3_BG_ENABLED 0x20 990 #define LPFC_SLI3_DSS_ENABLED 0x40 991 #define LPFC_SLI4_PERFH_ENABLED 0x80 992 #define LPFC_SLI4_PHWQ_ENABLED 0x100 993 uint32_t iocb_cmd_size; 994 uint32_t iocb_rsp_size; 995 996 struct lpfc_trunk_link trunk_link; 997 enum hba_state link_state; 998 uint32_t link_flag; /* link state flags */ 999 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 1000 /* This flag is set while issuing */ 1001 /* INIT_LINK mailbox command */ 1002 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 1003 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 1004 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 1005 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 1006 #define LS_CT_VEN_RPA 0x20 /* Vendor RPA sent to switch */ 1007 1008 uint32_t hba_flag; /* hba generic flags */ 1009 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 1010 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 1011 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 1012 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 1013 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 1014 #define HBA_PERSISTENT_TOPO 0x20 /* Persistent topology support in hba */ 1015 #define ELS_XRI_ABORT_EVENT 0x40 /* ELS_XRI abort event was queued */ 1016 #define ASYNC_EVENT 0x80 1017 #define LINK_DISABLED 0x100 /* Link disabled by user */ 1018 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 1019 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 1020 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 1021 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 1022 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 1023 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 1024 #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */ 1025 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */ 1026 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 1027 #define HBA_FORCED_LINK_SPEED 0x40000 /* 1028 * Firmware supports Forced Link Speed 1029 * capability 1030 */ 1031 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */ 1032 #define HBA_CGN_RSVD1 0x200000 /* Reserved CGN flag */ 1033 #define HBA_CGN_DAY_WRAP 0x400000 /* HBA Congestion info day wraps */ 1034 #define HBA_DEFER_FLOGI 0x800000 /* Defer FLOGI till read_sparm cmpl */ 1035 #define HBA_SETUP 0x1000000 /* Signifies HBA setup is completed */ 1036 #define HBA_NEEDS_CFG_PORT 0x2000000 /* SLI3 - needs a CONFIG_PORT mbox */ 1037 #define HBA_HBEAT_INP 0x4000000 /* mbox HBEAT is in progress */ 1038 #define HBA_HBEAT_TMO 0x8000000 /* HBEAT initiated after timeout */ 1039 #define HBA_FLOGI_OUTSTANDING 0x10000000 /* FLOGI is outstanding */ 1040 1041 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 1042 struct lpfc_dmabuf slim2p; 1043 1044 MAILBOX_t *mbox; 1045 uint32_t *mbox_ext; 1046 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 1047 uint32_t ha_copy; 1048 struct _PCB *pcb; 1049 struct _IOCB *IOCBs; 1050 1051 struct lpfc_dmabuf hbqslimp; 1052 1053 uint16_t pci_cfg_value; 1054 1055 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 1056 1057 uint32_t fc_eventTag; /* event tag for link attention */ 1058 uint32_t link_events; 1059 1060 /* These fields used to be binfo */ 1061 uint32_t fc_pref_DID; /* preferred D_ID */ 1062 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 1063 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 1064 uint32_t fc_edtov; /* E_D_TOV timer value */ 1065 uint32_t fc_arbtov; /* ARB_TOV timer value */ 1066 uint32_t fc_ratov; /* R_A_TOV timer value */ 1067 uint32_t fc_rttov; /* R_T_TOV timer value */ 1068 uint32_t fc_altov; /* AL_TOV timer value */ 1069 uint32_t fc_crtov; /* C_R_TOV timer value */ 1070 1071 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 1072 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 1073 1074 uint32_t lmt; 1075 1076 uint32_t fc_topology; /* link topology, from LINK INIT */ 1077 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 1078 1079 struct lpfc_stats fc_stat; 1080 1081 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 1082 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 1083 1084 uint8_t wwnn[8]; 1085 uint8_t wwpn[8]; 1086 uint32_t RandomData[7]; 1087 uint8_t fcp_embed_io; 1088 uint8_t nvmet_support; /* driver supports NVMET */ 1089 #define LPFC_NVMET_MAX_PORTS 32 1090 uint8_t mds_diags_support; 1091 uint8_t bbcredit_support; 1092 uint8_t enab_exp_wqcq_pages; 1093 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */ 1094 1095 /* HBA Config Parameters */ 1096 uint32_t cfg_ack0; 1097 uint32_t cfg_xri_rebalancing; 1098 uint32_t cfg_xpsgl; 1099 uint32_t cfg_enable_npiv; 1100 uint32_t cfg_enable_rrq; 1101 uint32_t cfg_topology; 1102 uint32_t cfg_link_speed; 1103 #define LPFC_FCF_FOV 1 /* Fast fcf failover */ 1104 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 1105 uint32_t cfg_fcf_failover_policy; 1106 uint32_t cfg_fcp_io_sched; 1107 uint32_t cfg_ns_query; 1108 uint32_t cfg_fcp2_no_tgt_reset; 1109 uint32_t cfg_cr_delay; 1110 uint32_t cfg_cr_count; 1111 uint32_t cfg_multi_ring_support; 1112 uint32_t cfg_multi_ring_rctl; 1113 uint32_t cfg_multi_ring_type; 1114 uint32_t cfg_poll; 1115 uint32_t cfg_poll_tmo; 1116 uint32_t cfg_task_mgmt_tmo; 1117 uint32_t cfg_use_msi; 1118 uint32_t cfg_auto_imax; 1119 uint32_t cfg_fcp_imax; 1120 uint32_t cfg_force_rscn; 1121 uint32_t cfg_cq_poll_threshold; 1122 uint32_t cfg_cq_max_proc_limit; 1123 uint32_t cfg_fcp_cpu_map; 1124 uint32_t cfg_fcp_mq_threshold; 1125 uint32_t cfg_hdw_queue; 1126 uint32_t cfg_irq_chann; 1127 uint32_t cfg_suppress_rsp; 1128 uint32_t cfg_nvme_oas; 1129 uint32_t cfg_nvme_embed_cmd; 1130 uint32_t cfg_nvmet_mrq_post; 1131 uint32_t cfg_nvmet_mrq; 1132 uint32_t cfg_enable_nvmet; 1133 uint32_t cfg_nvme_enable_fb; 1134 uint32_t cfg_nvmet_fb_size; 1135 uint32_t cfg_total_seg_cnt; 1136 uint32_t cfg_sg_seg_cnt; 1137 uint32_t cfg_nvme_seg_cnt; 1138 uint32_t cfg_scsi_seg_cnt; 1139 uint32_t cfg_sg_dma_buf_size; 1140 uint64_t cfg_soft_wwnn; 1141 uint64_t cfg_soft_wwpn; 1142 uint32_t cfg_hba_queue_depth; 1143 uint32_t cfg_enable_hba_reset; 1144 uint32_t cfg_enable_hba_heartbeat; 1145 uint32_t cfg_fof; 1146 uint32_t cfg_EnableXLane; 1147 uint8_t cfg_oas_tgt_wwpn[8]; 1148 uint8_t cfg_oas_vpt_wwpn[8]; 1149 uint32_t cfg_oas_lun_state; 1150 #define OAS_LUN_ENABLE 1 1151 #define OAS_LUN_DISABLE 0 1152 uint32_t cfg_oas_lun_status; 1153 #define OAS_LUN_STATUS_EXISTS 0x01 1154 uint32_t cfg_oas_flags; 1155 #define OAS_FIND_ANY_VPORT 0x01 1156 #define OAS_FIND_ANY_TARGET 0x02 1157 #define OAS_LUN_VALID 0x04 1158 uint32_t cfg_oas_priority; 1159 uint32_t cfg_XLanePriority; 1160 uint32_t cfg_enable_bg; 1161 uint32_t cfg_prot_mask; 1162 uint32_t cfg_prot_guard; 1163 uint32_t cfg_hostmem_hgp; 1164 uint32_t cfg_log_verbose; 1165 uint32_t cfg_enable_fc4_type; 1166 uint32_t cfg_aer_support; 1167 uint32_t cfg_sriov_nr_virtfn; 1168 uint32_t cfg_request_firmware_upgrade; 1169 uint32_t cfg_suppress_link_up; 1170 uint32_t cfg_rrq_xri_bitmap_sz; 1171 u32 cfg_fcp_wait_abts_rsp; 1172 uint32_t cfg_delay_discovery; 1173 uint32_t cfg_sli_mode; 1174 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 1175 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 1176 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 1177 uint32_t cfg_fdmi_on; 1178 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 1179 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 1180 uint32_t cfg_enable_SmartSAN; 1181 uint32_t cfg_enable_mds_diags; 1182 uint32_t cfg_ras_fwlog_level; 1183 uint32_t cfg_ras_fwlog_buffsize; 1184 uint32_t cfg_ras_fwlog_func; 1185 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */ 1186 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */ 1187 #define LPFC_ENABLE_FCP 1 1188 #define LPFC_ENABLE_NVME 2 1189 #define LPFC_ENABLE_BOTH 3 1190 uint32_t cfg_enable_pbde; 1191 uint32_t cfg_enable_mi; 1192 struct nvmet_fc_target_port *targetport; 1193 lpfc_vpd_t vpd; /* vital product data */ 1194 1195 u32 cfg_max_vmid; /* maximum VMIDs allowed per port */ 1196 u32 cfg_vmid_app_header; 1197 #define LPFC_VMID_APP_HEADER_DISABLE 0 1198 #define LPFC_VMID_APP_HEADER_ENABLE 1 1199 u32 cfg_vmid_priority_tagging; 1200 u32 cfg_vmid_inactivity_timeout; /* Time after which the VMID */ 1201 /* deregisters from switch */ 1202 struct pci_dev *pcidev; 1203 struct list_head work_list; 1204 uint32_t work_ha; /* Host Attention Bits for WT */ 1205 uint32_t work_ha_mask; /* HA Bits owned by WT */ 1206 uint32_t work_hs; /* HS stored in case of ERRAT */ 1207 uint32_t work_status[2]; /* Extra status from SLIM */ 1208 1209 wait_queue_head_t work_waitq; 1210 struct task_struct *worker_thread; 1211 unsigned long data_flags; 1212 uint32_t border_sge_num; 1213 1214 uint32_t hbq_in_use; /* HBQs in use flag */ 1215 uint32_t hbq_count; /* Count of configured HBQs */ 1216 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 1217 1218 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 1219 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 1220 1221 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 1222 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 1223 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 1224 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 1225 PCI BAR0 */ 1226 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 1227 PCI BAR2 */ 1228 1229 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 1230 PCI BAR0 with dual-ULP support */ 1231 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 1232 PCI BAR2 with dual-ULP support */ 1233 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 1234 PCI BAR4 with dual-ULP support */ 1235 #define PCI_64BIT_BAR0 0 1236 #define PCI_64BIT_BAR2 2 1237 #define PCI_64BIT_BAR4 4 1238 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 1239 void __iomem *HAregaddr; /* virtual address for host attn reg */ 1240 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 1241 void __iomem *HSregaddr; /* virtual address for host status 1242 reg */ 1243 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 1244 1245 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 1246 struct lpfc_pgp *port_gp; 1247 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 1248 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 1249 1250 int brd_no; /* FC board number */ 1251 char SerialNumber[32]; /* adapter Serial Number */ 1252 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 1253 char BIOSVersion[16]; /* Boot BIOS version */ 1254 char ModelDesc[256]; /* Model Description */ 1255 char ModelName[80]; /* Model Name */ 1256 char ProgramType[256]; /* Program Type */ 1257 char Port[20]; /* Port No */ 1258 uint8_t vpd_flag; /* VPD data flag */ 1259 1260 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 1261 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 1262 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 1263 #define VPD_PORT 0x8 /* valid vpd port data */ 1264 #define VPD_MASK 0xf /* mask for any vpd data */ 1265 1266 uint8_t soft_wwn_enable; 1267 1268 struct timer_list fcp_poll_timer; 1269 struct timer_list eratt_poll; 1270 uint32_t eratt_poll_interval; 1271 1272 uint64_t bg_guard_err_cnt; 1273 uint64_t bg_apptag_err_cnt; 1274 uint64_t bg_reftag_err_cnt; 1275 1276 /* fastpath list. */ 1277 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 1278 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 1279 struct list_head lpfc_scsi_buf_list_get; 1280 struct list_head lpfc_scsi_buf_list_put; 1281 uint32_t total_scsi_bufs; 1282 struct list_head lpfc_iocb_list; 1283 uint32_t total_iocbq_bufs; 1284 struct list_head active_rrq_list; 1285 spinlock_t hbalock; 1286 struct work_struct unblock_request_work; /* SCSI layer unblock IOs */ 1287 1288 /* dma_mem_pools */ 1289 struct dma_pool *lpfc_sg_dma_buf_pool; 1290 struct dma_pool *lpfc_mbuf_pool; 1291 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */ 1292 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */ 1293 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 1294 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 1295 struct dma_pool *lpfc_cmd_rsp_buf_pool; 1296 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 1297 1298 mempool_t *mbox_mem_pool; 1299 mempool_t *nlp_mem_pool; 1300 mempool_t *rrq_pool; 1301 mempool_t *active_rrq_pool; 1302 1303 struct fc_host_statistics link_stats; 1304 enum lpfc_irq_chann_mode irq_chann_mode; 1305 enum intr_type_t intr_type; 1306 uint32_t intr_mode; 1307 #define LPFC_INTR_ERROR 0xFFFFFFFF 1308 struct list_head port_list; 1309 spinlock_t port_list_lock; /* lock for port_list mutations */ 1310 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 1311 uint16_t max_vpi; /* Maximum virtual nports */ 1312 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */ 1313 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */ 1314 uint16_t max_vports; /* 1315 * For IOV HBAs max_vpi can change 1316 * after a reset. max_vports is max 1317 * number of vports present. This can 1318 * be greater than max_vpi. 1319 */ 1320 uint16_t vpi_base; 1321 uint16_t vfi_base; 1322 unsigned long *vpi_bmask; /* vpi allocation table */ 1323 uint16_t *vpi_ids; 1324 uint16_t vpi_count; 1325 struct list_head lpfc_vpi_blk_list; 1326 1327 /* Data structure used by fabric iocb scheduler */ 1328 struct list_head fabric_iocb_list; 1329 atomic_t fabric_iocb_count; 1330 struct timer_list fabric_block_timer; 1331 unsigned long bit_flags; 1332 #define FABRIC_COMANDS_BLOCKED 0 1333 atomic_t num_rsrc_err; 1334 atomic_t num_cmd_success; 1335 unsigned long last_rsrc_error_time; 1336 unsigned long last_ramp_down_time; 1337 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1338 struct dentry *hba_debugfs_root; 1339 atomic_t debugfs_vport_count; 1340 struct dentry *debug_multixri_pools; 1341 struct dentry *debug_hbqinfo; 1342 struct dentry *debug_dumpHostSlim; 1343 struct dentry *debug_dumpHBASlim; 1344 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1345 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1346 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 1347 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 1348 struct dentry *debug_writeApp; /* inject write app_tag errors */ 1349 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 1350 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 1351 struct dentry *debug_readApp; /* inject read app_tag errors */ 1352 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1353 1354 struct dentry *debug_nvmeio_trc; 1355 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1356 struct dentry *debug_hdwqinfo; 1357 #ifdef LPFC_HDWQ_LOCK_STAT 1358 struct dentry *debug_lockstat; 1359 #endif 1360 struct dentry *debug_cgn_buffer; 1361 struct dentry *debug_rx_monitor; 1362 struct dentry *debug_ras_log; 1363 atomic_t nvmeio_trc_cnt; 1364 uint32_t nvmeio_trc_size; 1365 uint32_t nvmeio_trc_output_idx; 1366 1367 /* T10 DIF error injection */ 1368 uint32_t lpfc_injerr_wgrd_cnt; 1369 uint32_t lpfc_injerr_wapp_cnt; 1370 uint32_t lpfc_injerr_wref_cnt; 1371 uint32_t lpfc_injerr_rgrd_cnt; 1372 uint32_t lpfc_injerr_rapp_cnt; 1373 uint32_t lpfc_injerr_rref_cnt; 1374 uint32_t lpfc_injerr_nportid; 1375 struct lpfc_name lpfc_injerr_wwpn; 1376 sector_t lpfc_injerr_lba; 1377 #define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1378 1379 struct dentry *debug_slow_ring_trc; 1380 struct lpfc_debugfs_trc *slow_ring_trc; 1381 atomic_t slow_ring_trc_cnt; 1382 /* iDiag debugfs sub-directory */ 1383 struct dentry *idiag_root; 1384 struct dentry *idiag_pci_cfg; 1385 struct dentry *idiag_bar_acc; 1386 struct dentry *idiag_que_info; 1387 struct dentry *idiag_que_acc; 1388 struct dentry *idiag_drb_acc; 1389 struct dentry *idiag_ctl_acc; 1390 struct dentry *idiag_mbx_acc; 1391 struct dentry *idiag_ext_acc; 1392 uint8_t lpfc_idiag_last_eq; 1393 #endif 1394 uint16_t nvmeio_trc_on; 1395 1396 /* Used for deferred freeing of ELS data buffers */ 1397 struct list_head elsbuf; 1398 int elsbuf_cnt; 1399 int elsbuf_prev_cnt; 1400 1401 uint8_t temp_sensor_support; 1402 /* Fields used for heart beat. */ 1403 unsigned long last_completion_time; 1404 unsigned long skipped_hb; 1405 struct timer_list hb_tmofunc; 1406 struct timer_list rrq_tmr; 1407 enum hba_temp_state over_temp_state; 1408 /* 1409 * Following bit will be set for all buffer tags which are not 1410 * associated with any HBQ. 1411 */ 1412 #define QUE_BUFTAG_BIT (1<<31) 1413 uint32_t buffer_tag_count; 1414 int wait_4_mlo_maint_flg; 1415 wait_queue_head_t wait_4_mlo_m_q; 1416 /* data structure used for latency data collection */ 1417 #define LPFC_NO_BUCKET 0 1418 #define LPFC_LINEAR_BUCKET 1 1419 #define LPFC_POWER2_BUCKET 2 1420 uint8_t bucket_type; 1421 uint32_t bucket_base; 1422 uint32_t bucket_step; 1423 1424 /* Maximum number of events that can be outstanding at any time*/ 1425 #define LPFC_MAX_EVT_COUNT 512 1426 atomic_t fast_event_count; 1427 uint32_t fcoe_eventtag; 1428 uint32_t fcoe_eventtag_at_fcf_scan; 1429 uint32_t fcoe_cvl_eventtag; 1430 uint32_t fcoe_cvl_eventtag_attn; 1431 struct lpfc_fcf fcf; 1432 uint8_t fc_map[3]; 1433 uint8_t valid_vlan; 1434 uint16_t vlan_id; 1435 struct list_head fcf_conn_rec_list; 1436 1437 bool defer_flogi_acc_flag; 1438 uint16_t defer_flogi_acc_rx_id; 1439 uint16_t defer_flogi_acc_ox_id; 1440 1441 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1442 struct list_head ct_ev_waiters; 1443 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1444 uint32_t ctx_idx; 1445 struct timer_list inactive_vmid_poll; 1446 1447 /* RAS Support */ 1448 struct lpfc_ras_fwlog ras_fwlog; 1449 1450 uint8_t menlo_flag; /* menlo generic flags */ 1451 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */ 1452 uint32_t iocb_cnt; 1453 uint32_t iocb_max; 1454 atomic_t sdev_cnt; 1455 spinlock_t devicelock; /* lock for luns list */ 1456 mempool_t *device_data_mem_pool; 1457 struct list_head luns; 1458 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1459 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1460 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1461 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1462 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1463 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1464 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1465 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1466 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1467 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1468 uint16_t sfp_alarm; 1469 uint16_t sfp_warning; 1470 1471 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1472 uint16_t hdwqstat_on; 1473 #define LPFC_CHECK_OFF 0 1474 #define LPFC_CHECK_NVME_IO 1 1475 #define LPFC_CHECK_NVMET_IO 2 1476 #define LPFC_CHECK_SCSI_IO 4 1477 uint16_t ktime_on; 1478 uint64_t ktime_data_samples; 1479 uint64_t ktime_status_samples; 1480 uint64_t ktime_last_cmd; 1481 uint64_t ktime_seg1_total; 1482 uint64_t ktime_seg1_min; 1483 uint64_t ktime_seg1_max; 1484 uint64_t ktime_seg2_total; 1485 uint64_t ktime_seg2_min; 1486 uint64_t ktime_seg2_max; 1487 uint64_t ktime_seg3_total; 1488 uint64_t ktime_seg3_min; 1489 uint64_t ktime_seg3_max; 1490 uint64_t ktime_seg4_total; 1491 uint64_t ktime_seg4_min; 1492 uint64_t ktime_seg4_max; 1493 uint64_t ktime_seg5_total; 1494 uint64_t ktime_seg5_min; 1495 uint64_t ktime_seg5_max; 1496 uint64_t ktime_seg6_total; 1497 uint64_t ktime_seg6_min; 1498 uint64_t ktime_seg6_max; 1499 uint64_t ktime_seg7_total; 1500 uint64_t ktime_seg7_min; 1501 uint64_t ktime_seg7_max; 1502 uint64_t ktime_seg8_total; 1503 uint64_t ktime_seg8_min; 1504 uint64_t ktime_seg8_max; 1505 uint64_t ktime_seg9_total; 1506 uint64_t ktime_seg9_min; 1507 uint64_t ktime_seg9_max; 1508 uint64_t ktime_seg10_total; 1509 uint64_t ktime_seg10_min; 1510 uint64_t ktime_seg10_max; 1511 #endif 1512 /* CMF objects */ 1513 struct lpfc_cgn_stat __percpu *cmf_stat; 1514 uint32_t cmf_interval_rate; /* timer interval limit in ms */ 1515 uint32_t cmf_timer_cnt; 1516 #define LPFC_CMF_INTERVAL 90 1517 uint64_t cmf_link_byte_count; 1518 uint64_t cmf_max_line_rate; 1519 uint64_t cmf_max_bytes_per_interval; 1520 uint64_t cmf_last_sync_bw; 1521 #define LPFC_CMF_BLK_SIZE 512 1522 struct hrtimer cmf_timer; 1523 atomic_t cmf_bw_wait; 1524 atomic_t cmf_busy; 1525 atomic_t cmf_stop_io; /* To block request and stop IO's */ 1526 uint32_t cmf_active_mode; 1527 uint32_t cmf_info_per_interval; 1528 #define LPFC_MAX_CMF_INFO 32 1529 struct timespec64 cmf_latency; /* Interval congestion timestamp */ 1530 uint32_t cmf_last_ts; /* Interval congestion time (ms) */ 1531 uint32_t cmf_active_info; 1532 1533 /* Signal / FPIN handling for Congestion Mgmt */ 1534 u8 cgn_reg_fpin; /* Negotiated value from RDF */ 1535 u8 cgn_init_reg_fpin; /* Initial value from READ_CONFIG */ 1536 #define LPFC_CGN_FPIN_NONE 0x0 1537 #define LPFC_CGN_FPIN_WARN 0x1 1538 #define LPFC_CGN_FPIN_ALARM 0x2 1539 #define LPFC_CGN_FPIN_BOTH (LPFC_CGN_FPIN_WARN | LPFC_CGN_FPIN_ALARM) 1540 1541 u8 cgn_reg_signal; /* Negotiated value from EDC */ 1542 u8 cgn_init_reg_signal; /* Initial value from READ_CONFIG */ 1543 /* cgn_reg_signal and cgn_init_reg_signal use 1544 * enum fc_edc_cg_signal_cap_types 1545 */ 1546 u16 cgn_fpin_frequency; 1547 #define LPFC_FPIN_INIT_FREQ 0xffff 1548 u32 cgn_sig_freq; 1549 u32 cgn_acqe_cnt; 1550 1551 /* RX monitor handling for CMF */ 1552 struct rxtable_entry *rxtable; /* RX_monitor information */ 1553 atomic_t rxtable_idx_head; 1554 #define LPFC_RXMONITOR_TABLE_IN_USE (LPFC_MAX_RXMONITOR_ENTRY + 73) 1555 atomic_t rxtable_idx_tail; 1556 atomic_t rx_max_read_cnt; /* Maximum read bytes */ 1557 uint64_t rx_block_cnt; 1558 1559 /* Congestion parameters from flash */ 1560 struct lpfc_cgn_param cgn_p; 1561 1562 /* Statistics counter for ACQE cgn alarms and warnings */ 1563 struct lpfc_cgn_acqe_stat cgn_acqe_stat; 1564 1565 /* Congestion buffer information */ 1566 struct lpfc_dmabuf *cgn_i; /* Congestion Info buffer */ 1567 atomic_t cgn_fabric_warn_cnt; /* Total warning cgn events for info */ 1568 atomic_t cgn_fabric_alarm_cnt; /* Total alarm cgn events for info */ 1569 atomic_t cgn_sync_warn_cnt; /* Total warning events for SYNC wqe */ 1570 atomic_t cgn_sync_alarm_cnt; /* Total alarm events for SYNC wqe */ 1571 atomic_t cgn_driver_evt_cnt; /* Total driver cgn events for fmw */ 1572 atomic_t cgn_latency_evt_cnt; 1573 struct timespec64 cgn_daily_ts; 1574 atomic64_t cgn_latency_evt; /* Avg latency per minute */ 1575 unsigned long cgn_evt_timestamp; 1576 #define LPFC_CGN_TIMER_TO_MIN 60000 /* ms in a minute */ 1577 uint32_t cgn_evt_minute; 1578 #define LPFC_SEC_MIN 60 1579 #define LPFC_MIN_HOUR 60 1580 #define LPFC_HOUR_DAY 24 1581 #define LPFC_MIN_DAY (LPFC_MIN_HOUR * LPFC_HOUR_DAY) 1582 1583 struct hlist_node cpuhp; /* used for cpuhp per hba callback */ 1584 struct timer_list cpuhp_poll_timer; 1585 struct list_head poll_list; /* slowpath eq polling list */ 1586 #define LPFC_POLL_HB 1 /* slowpath heartbeat */ 1587 #define LPFC_POLL_FASTPATH 0 /* called from fastpath */ 1588 #define LPFC_POLL_SLOWPATH 1 /* called from slowpath */ 1589 1590 char os_host_name[MAXHOSTNAMELEN]; 1591 1592 /* SCSI host template information - for physical port */ 1593 struct scsi_host_template port_template; 1594 /* SCSI host template information - for all vports */ 1595 struct scsi_host_template vport_template; 1596 atomic_t dbg_log_idx; 1597 atomic_t dbg_log_cnt; 1598 atomic_t dbg_log_dmping; 1599 struct dbg_log_ent dbg_log[DBG_LOG_SZ]; 1600 }; 1601 1602 #define LPFC_MAX_RXMONITOR_ENTRY 800 1603 #define LPFC_MAX_RXMONITOR_DUMP 32 1604 struct rxtable_entry { 1605 uint64_t total_bytes; /* Total no of read bytes requested */ 1606 uint64_t rcv_bytes; /* Total no of read bytes completed */ 1607 uint64_t avg_io_size; 1608 uint64_t avg_io_latency;/* Average io latency in microseconds */ 1609 uint64_t max_read_cnt; /* Maximum read bytes */ 1610 uint64_t max_bytes_per_interval; 1611 uint32_t cmf_busy; 1612 uint32_t cmf_info; /* CMF_SYNC_WQE info */ 1613 uint32_t io_cnt; 1614 uint32_t timer_utilization; 1615 uint32_t timer_interval; 1616 }; 1617 1618 static inline struct Scsi_Host * 1619 lpfc_shost_from_vport(struct lpfc_vport *vport) 1620 { 1621 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1622 } 1623 1624 static inline void 1625 lpfc_set_loopback_flag(struct lpfc_hba *phba) 1626 { 1627 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1628 phba->link_flag |= LS_LOOPBACK_MODE; 1629 else 1630 phba->link_flag &= ~LS_LOOPBACK_MODE; 1631 } 1632 1633 static inline int 1634 lpfc_is_link_up(struct lpfc_hba *phba) 1635 { 1636 return phba->link_state == LPFC_LINK_UP || 1637 phba->link_state == LPFC_CLEAR_LA || 1638 phba->link_state == LPFC_HBA_READY; 1639 } 1640 1641 static inline void 1642 lpfc_worker_wake_up(struct lpfc_hba *phba) 1643 { 1644 /* Set the lpfc data pending flag */ 1645 set_bit(LPFC_DATA_READY, &phba->data_flags); 1646 1647 /* Wake up worker thread */ 1648 wake_up(&phba->work_waitq); 1649 return; 1650 } 1651 1652 static inline int 1653 lpfc_readl(void __iomem *addr, uint32_t *data) 1654 { 1655 uint32_t temp; 1656 temp = readl(addr); 1657 if (temp == 0xffffffff) 1658 return -EIO; 1659 *data = temp; 1660 return 0; 1661 } 1662 1663 static inline int 1664 lpfc_sli_read_hs(struct lpfc_hba *phba) 1665 { 1666 /* 1667 * There was a link/board error. Read the status register to retrieve 1668 * the error event and process it. 1669 */ 1670 phba->sli.slistat.err_attn_event++; 1671 1672 /* Save status info and check for unplug error */ 1673 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1674 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1675 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1676 return -EIO; 1677 } 1678 1679 /* Clear chip Host Attention error bit */ 1680 writel(HA_ERATT, phba->HAregaddr); 1681 readl(phba->HAregaddr); /* flush */ 1682 phba->pport->stopped = 1; 1683 1684 return 0; 1685 } 1686 1687 static inline struct lpfc_sli_ring * 1688 lpfc_phba_elsring(struct lpfc_hba *phba) 1689 { 1690 /* Return NULL if sli_rev has become invalid due to bad fw */ 1691 if (phba->sli_rev != LPFC_SLI_REV4 && 1692 phba->sli_rev != LPFC_SLI_REV3 && 1693 phba->sli_rev != LPFC_SLI_REV2) 1694 return NULL; 1695 1696 if (phba->sli_rev == LPFC_SLI_REV4) { 1697 if (phba->sli4_hba.els_wq) 1698 return phba->sli4_hba.els_wq->pring; 1699 else 1700 return NULL; 1701 } 1702 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1703 } 1704 1705 /** 1706 * lpfc_next_online_cpu - Finds next online CPU on cpumask 1707 * @mask: Pointer to phba's cpumask member. 1708 * @start: starting cpu index 1709 * 1710 * Note: If no valid cpu found, then nr_cpu_ids is returned. 1711 * 1712 **/ 1713 static inline unsigned int 1714 lpfc_next_online_cpu(const struct cpumask *mask, unsigned int start) 1715 { 1716 unsigned int cpu_it; 1717 1718 for_each_cpu_wrap(cpu_it, mask, start) { 1719 if (cpu_online(cpu_it)) 1720 break; 1721 } 1722 1723 return cpu_it; 1724 } 1725 /** 1726 * lpfc_sli4_mod_hba_eq_delay - update EQ delay 1727 * @phba: Pointer to HBA context object. 1728 * @q: The Event Queue to update. 1729 * @delay: The delay value (in us) to be written. 1730 * 1731 **/ 1732 static inline void 1733 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq, 1734 u32 delay) 1735 { 1736 struct lpfc_register reg_data; 1737 1738 reg_data.word0 = 0; 1739 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id); 1740 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay); 1741 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr); 1742 eq->q_mode = delay; 1743 } 1744 1745 1746 /* 1747 * Macro that declares tables and a routine to perform enum type to 1748 * ascii string lookup. 1749 * 1750 * Defines a <key,value> table for an enum. Uses xxx_INIT defines for 1751 * the enum to populate the table. Macro defines a routine (named 1752 * by caller) that will search all elements of the table for the key 1753 * and return the name string if found or "Unrecognized" if not found. 1754 */ 1755 #define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \ 1756 static struct { \ 1757 enum enum_name value; \ 1758 char *name; \ 1759 } fc_##enum_name##_e2str_names[] = enum_init; \ 1760 static const char *routine(enum enum_name table_key) \ 1761 { \ 1762 int i; \ 1763 char *name = "Unrecognized"; \ 1764 \ 1765 for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\ 1766 if (fc_##enum_name##_e2str_names[i].value == table_key) {\ 1767 name = fc_##enum_name##_e2str_names[i].name; \ 1768 break; \ 1769 } \ 1770 } \ 1771 return name; \ 1772 } 1773 1774 /** 1775 * lpfc_is_vmid_enabled - returns if VMID is enabled for either switch types 1776 * @phba: Pointer to HBA context object. 1777 * 1778 * Relationship between the enable, target support and if vmid tag is required 1779 * for the particular combination 1780 * --------------------------------------------------- 1781 * Switch Enable Flag Target Support VMID Needed 1782 * --------------------------------------------------- 1783 * App Id 0 NA N 1784 * App Id 1 0 N 1785 * App Id 1 1 Y 1786 * Pr Tag 0 NA N 1787 * Pr Tag 1 0 N 1788 * Pr Tag 1 1 Y 1789 * Pr Tag 2 * Y 1790 --------------------------------------------------- 1791 * 1792 **/ 1793 static inline int lpfc_is_vmid_enabled(struct lpfc_hba *phba) 1794 { 1795 return phba->cfg_vmid_app_header || phba->cfg_vmid_priority_tagging; 1796 } 1797