1 /* 2 * This file is provided under a dual BSD/GPLv2 license. When using or 3 * redistributing this file, you may do so under either license. 4 * 5 * GPL LICENSE SUMMARY 6 * 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21 * The full GNU General Public License is included in this distribution 22 * in the file called LICENSE.GPL. 23 * 24 * BSD LICENSE 25 * 26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27 * All rights reserved. 28 * 29 * Redistribution and use in source and binary forms, with or without 30 * modification, are permitted provided that the following conditions 31 * are met: 32 * 33 * * Redistributions of source code must retain the above copyright 34 * notice, this list of conditions and the following disclaimer. 35 * * Redistributions in binary form must reproduce the above copyright 36 * notice, this list of conditions and the following disclaimer in 37 * the documentation and/or other materials provided with the 38 * distribution. 39 * * Neither the name of Intel Corporation nor the names of its 40 * contributors may be used to endorse or promote products derived 41 * from this software without specific prior written permission. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 */ 55 56 57 #if !defined(_SCI_HOST_H_) 58 #define _SCI_HOST_H_ 59 60 #include "phy.h" 61 /*#include "task.h"*/ 62 #include "timers.h" 63 #include "remote_device.h" 64 65 #define DRV_NAME "isci" 66 #define SCI_PCI_BAR_COUNT 2 67 #define SCI_NUM_MSI_X_INT 2 68 #define SCI_SMU_BAR 0 69 #define SCI_SMU_BAR_SIZE (16*1024) 70 #define SCI_SCU_BAR 1 71 #define SCI_SCU_BAR_SIZE (4*1024*1024) 72 #define SCI_IO_SPACE_BAR0 2 73 #define SCI_IO_SPACE_BAR1 3 74 #define ISCI_CAN_QUEUE_VAL 250 /* < SCI_MAX_IO_REQUESTS ? */ 75 #define SCIC_CONTROLLER_STOP_TIMEOUT 5000 76 77 struct coherent_memory_info { 78 struct list_head node; 79 dma_addr_t dma_handle; 80 void *vaddr; 81 size_t size; 82 struct sci_physical_memory_descriptor *mde; 83 }; 84 85 struct isci_host { 86 struct scic_sds_controller *core_controller; 87 union scic_oem_parameters oem_parameters; 88 89 int id; /* unique within a given pci device */ 90 struct isci_timer_list timer_list_struct; 91 void *core_ctrl_memory; 92 struct dma_pool *dma_pool; 93 unsigned int dma_pool_alloc_size; 94 struct isci_phy phys[SCI_MAX_PHYS]; 95 96 /* isci_ports and sas_ports are implicitly parallel to the 97 * ports maintained by the core 98 */ 99 struct isci_port isci_ports[SCI_MAX_PORTS]; 100 struct asd_sas_port sas_ports[SCI_MAX_PORTS]; 101 struct sas_ha_struct sas_ha; 102 103 int can_queue; 104 spinlock_t queue_lock; 105 spinlock_t state_lock; 106 107 struct pci_dev *pdev; 108 u8 sas_addr[SAS_ADDR_SIZE]; 109 110 enum isci_status status; 111 #define IHOST_START_PENDING 0 112 #define IHOST_STOP_PENDING 1 113 unsigned long flags; 114 wait_queue_head_t eventq; 115 struct Scsi_Host *shost; 116 struct tasklet_struct completion_tasklet; 117 struct list_head mdl_struct_list; 118 struct list_head requests_to_complete; 119 struct list_head requests_to_abort; 120 spinlock_t scic_lock; 121 struct isci_host *next; 122 }; 123 124 125 /** 126 * struct isci_pci_info - This class represents the pci function containing the 127 * controllers. Depending on PCI SKU, there could be up to 2 controllers in 128 * the PCI function. 129 */ 130 #define SCI_MAX_MSIX_INT (SCI_NUM_MSI_X_INT*SCI_MAX_CONTROLLERS) 131 132 struct isci_pci_info { 133 struct msix_entry msix_entries[SCI_MAX_MSIX_INT]; 134 int core_lib_array_index; 135 struct isci_host *hosts; 136 }; 137 138 static inline struct isci_pci_info *to_pci_info(struct pci_dev *pdev) 139 { 140 return pci_get_drvdata(pdev); 141 } 142 143 #define for_each_isci_host(isci_host, pdev) \ 144 for (isci_host = to_pci_info(pdev)->hosts;\ 145 isci_host; isci_host = isci_host->next) 146 147 static inline 148 enum isci_status isci_host_get_state( 149 struct isci_host *isci_host) 150 { 151 return isci_host->status; 152 } 153 154 155 static inline void isci_host_change_state( 156 struct isci_host *isci_host, 157 enum isci_status status) 158 { 159 unsigned long flags; 160 161 dev_dbg(&isci_host->pdev->dev, 162 "%s: isci_host = %p, state = 0x%x", 163 __func__, 164 isci_host, 165 status); 166 spin_lock_irqsave(&isci_host->state_lock, flags); 167 isci_host->status = status; 168 spin_unlock_irqrestore(&isci_host->state_lock, flags); 169 170 } 171 172 static inline int isci_host_can_queue( 173 struct isci_host *isci_host, 174 int num) 175 { 176 int ret = 0; 177 unsigned long flags; 178 179 spin_lock_irqsave(&isci_host->queue_lock, flags); 180 if ((isci_host->can_queue - num) < 0) { 181 dev_dbg(&isci_host->pdev->dev, 182 "%s: isci_host->can_queue = %d\n", 183 __func__, 184 isci_host->can_queue); 185 ret = -SAS_QUEUE_FULL; 186 187 } else 188 isci_host->can_queue -= num; 189 190 spin_unlock_irqrestore(&isci_host->queue_lock, flags); 191 192 return ret; 193 } 194 195 static inline void isci_host_can_dequeue( 196 struct isci_host *isci_host, 197 int num) 198 { 199 unsigned long flags; 200 201 spin_lock_irqsave(&isci_host->queue_lock, flags); 202 isci_host->can_queue += num; 203 spin_unlock_irqrestore(&isci_host->queue_lock, flags); 204 } 205 206 static inline void wait_for_start(struct isci_host *ihost) 207 { 208 wait_event(ihost->eventq, !test_bit(IHOST_START_PENDING, &ihost->flags)); 209 } 210 211 static inline void wait_for_stop(struct isci_host *ihost) 212 { 213 wait_event(ihost->eventq, !test_bit(IHOST_STOP_PENDING, &ihost->flags)); 214 } 215 216 217 /** 218 * isci_host_from_sas_ha() - This accessor retrieves the isci_host object 219 * reference from the Linux sas_ha_struct reference. 220 * @ha_struct,: This parameter points to the Linux sas_ha_struct object 221 * 222 * A reference to the associated isci_host structure. 223 */ 224 #define isci_host_from_sas_ha(ha_struct) \ 225 ((struct isci_host *)(ha_struct)->lldd_ha) 226 227 /** 228 * isci_host_scan_finished() - 229 * 230 * This function is one of the SCSI Host Template functions. The SCSI midlayer 231 * calls this function during a target scan, approx. once every 10 millisecs. 232 */ 233 int isci_host_scan_finished( 234 struct Scsi_Host *, 235 unsigned long); 236 237 238 /** 239 * isci_host_scan_start() - 240 * 241 * This function is one of the SCSI Host Template function, called by the SCSI 242 * mid layer berfore a target scan begins. The core library controller start 243 * routine is called from here. 244 */ 245 void isci_host_scan_start( 246 struct Scsi_Host *); 247 248 /** 249 * isci_host_start_complete() - 250 * 251 * This function is called by the core library, through the ISCI Module, to 252 * indicate controller start status. 253 */ 254 void isci_host_start_complete( 255 struct isci_host *, 256 enum sci_status); 257 258 void isci_host_stop_complete( 259 struct isci_host *isci_host, 260 enum sci_status completion_status); 261 262 int isci_host_init(struct isci_host *); 263 264 void isci_host_init_controller_names( 265 struct isci_host *isci_host, 266 unsigned int controller_idx); 267 268 void isci_host_deinit( 269 struct isci_host *); 270 271 void isci_host_port_link_up( 272 struct isci_host *, 273 struct scic_sds_port *, 274 struct scic_sds_phy *); 275 int isci_host_dev_found(struct domain_device *); 276 277 void isci_host_remote_device_start_complete( 278 struct isci_host *, 279 struct isci_remote_device *, 280 enum sci_status); 281 282 #endif /* !defined(_SCI_HOST_H_) */ 283