1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 12 * NON INFRINGEMENT. See the GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * 18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/pci-aspm.h> 27 #include <linux/kernel.h> 28 #include <linux/slab.h> 29 #include <linux/delay.h> 30 #include <linux/fs.h> 31 #include <linux/timer.h> 32 #include <linux/seq_file.h> 33 #include <linux/init.h> 34 #include <linux/spinlock.h> 35 #include <linux/compat.h> 36 #include <linux/blktrace_api.h> 37 #include <linux/uaccess.h> 38 #include <linux/io.h> 39 #include <linux/dma-mapping.h> 40 #include <linux/completion.h> 41 #include <linux/moduleparam.h> 42 #include <scsi/scsi.h> 43 #include <scsi/scsi_cmnd.h> 44 #include <scsi/scsi_device.h> 45 #include <scsi/scsi_host.h> 46 #include <scsi/scsi_tcq.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/kthread.h> 52 #include <linux/jiffies.h> 53 #include "hpsa_cmd.h" 54 #include "hpsa.h" 55 56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 57 #define HPSA_DRIVER_VERSION "2.0.2-1" 58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 59 #define HPSA "hpsa" 60 61 /* How long to wait (in milliseconds) for board to go into simple mode */ 62 #define MAX_CONFIG_WAIT 30000 63 #define MAX_IOCTL_CONFIG_WAIT 1000 64 65 /*define how many times we will try a command because of bus resets */ 66 #define MAX_CMD_RETRIES 3 67 68 /* Embedded module documentation macros - see modules.h */ 69 MODULE_AUTHOR("Hewlett-Packard Company"); 70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 71 HPSA_DRIVER_VERSION); 72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 73 MODULE_VERSION(HPSA_DRIVER_VERSION); 74 MODULE_LICENSE("GPL"); 75 76 static int hpsa_allow_any; 77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 78 MODULE_PARM_DESC(hpsa_allow_any, 79 "Allow hpsa driver to access unknown HP Smart Array hardware"); 80 static int hpsa_simple_mode; 81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 82 MODULE_PARM_DESC(hpsa_simple_mode, 83 "Use 'simple mode' rather than 'performant mode'"); 84 85 /* define the PCI info for the cards we can control */ 86 static const struct pci_device_id hpsa_pci_device_id[] = { 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a}, 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 104 {0,} 105 }; 106 107 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 108 109 /* board_id = Subsystem Device ID & Vendor ID 110 * product = Marketing Name for the board 111 * access = Address of the struct of function pointers 112 */ 113 static struct board_type products[] = { 114 {0x3241103C, "Smart Array P212", &SA5_access}, 115 {0x3243103C, "Smart Array P410", &SA5_access}, 116 {0x3245103C, "Smart Array P410i", &SA5_access}, 117 {0x3247103C, "Smart Array P411", &SA5_access}, 118 {0x3249103C, "Smart Array P812", &SA5_access}, 119 {0x324a103C, "Smart Array P712m", &SA5_access}, 120 {0x324b103C, "Smart Array P711m", &SA5_access}, 121 {0x3350103C, "Smart Array", &SA5_access}, 122 {0x3351103C, "Smart Array", &SA5_access}, 123 {0x3352103C, "Smart Array", &SA5_access}, 124 {0x3353103C, "Smart Array", &SA5_access}, 125 {0x3354103C, "Smart Array", &SA5_access}, 126 {0x3355103C, "Smart Array", &SA5_access}, 127 {0x3356103C, "Smart Array", &SA5_access}, 128 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 129 }; 130 131 static int number_of_controllers; 132 133 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list); 134 static spinlock_t lockup_detector_lock; 135 static struct task_struct *hpsa_lockup_detector; 136 137 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 138 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 139 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); 140 static void start_io(struct ctlr_info *h); 141 142 #ifdef CONFIG_COMPAT 143 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg); 144 #endif 145 146 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 147 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); 148 static struct CommandList *cmd_alloc(struct ctlr_info *h); 149 static struct CommandList *cmd_special_alloc(struct ctlr_info *h); 150 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 152 int cmd_type); 153 154 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 155 static void hpsa_scan_start(struct Scsi_Host *); 156 static int hpsa_scan_finished(struct Scsi_Host *sh, 157 unsigned long elapsed_time); 158 static int hpsa_change_queue_depth(struct scsi_device *sdev, 159 int qdepth, int reason); 160 161 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 162 static int hpsa_slave_alloc(struct scsi_device *sdev); 163 static void hpsa_slave_destroy(struct scsi_device *sdev); 164 165 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); 166 static int check_for_unit_attention(struct ctlr_info *h, 167 struct CommandList *c); 168 static void check_ioctl_unit_attention(struct ctlr_info *h, 169 struct CommandList *c); 170 /* performant mode helper functions */ 171 static void calc_bucket_map(int *bucket, int num_buckets, 172 int nsgs, int *bucket_map); 173 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 174 static inline u32 next_command(struct ctlr_info *h); 175 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, 176 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 177 u64 *cfg_offset); 178 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 179 unsigned long *memory_bar); 180 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 181 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, 182 void __iomem *vaddr, int wait_for_ready); 183 #define BOARD_NOT_READY 0 184 #define BOARD_READY 1 185 186 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 187 { 188 unsigned long *priv = shost_priv(sdev->host); 189 return (struct ctlr_info *) *priv; 190 } 191 192 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 193 { 194 unsigned long *priv = shost_priv(sh); 195 return (struct ctlr_info *) *priv; 196 } 197 198 static int check_for_unit_attention(struct ctlr_info *h, 199 struct CommandList *c) 200 { 201 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 202 return 0; 203 204 switch (c->err_info->SenseInfo[12]) { 205 case STATE_CHANGED: 206 dev_warn(&h->pdev->dev, HPSA "%d: a state change " 207 "detected, command retried\n", h->ctlr); 208 break; 209 case LUN_FAILED: 210 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure " 211 "detected, action required\n", h->ctlr); 212 break; 213 case REPORT_LUNS_CHANGED: 214 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data " 215 "changed, action required\n", h->ctlr); 216 /* 217 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 218 * target (array) devices. 219 */ 220 break; 221 case POWER_OR_RESET: 222 dev_warn(&h->pdev->dev, HPSA "%d: a power on " 223 "or device reset detected\n", h->ctlr); 224 break; 225 case UNIT_ATTENTION_CLEARED: 226 dev_warn(&h->pdev->dev, HPSA "%d: unit attention " 227 "cleared by another initiator\n", h->ctlr); 228 break; 229 default: 230 dev_warn(&h->pdev->dev, HPSA "%d: unknown " 231 "unit attention detected\n", h->ctlr); 232 break; 233 } 234 return 1; 235 } 236 237 static ssize_t host_store_rescan(struct device *dev, 238 struct device_attribute *attr, 239 const char *buf, size_t count) 240 { 241 struct ctlr_info *h; 242 struct Scsi_Host *shost = class_to_shost(dev); 243 h = shost_to_hba(shost); 244 hpsa_scan_start(h->scsi_host); 245 return count; 246 } 247 248 static ssize_t host_show_firmware_revision(struct device *dev, 249 struct device_attribute *attr, char *buf) 250 { 251 struct ctlr_info *h; 252 struct Scsi_Host *shost = class_to_shost(dev); 253 unsigned char *fwrev; 254 255 h = shost_to_hba(shost); 256 if (!h->hba_inquiry_data) 257 return 0; 258 fwrev = &h->hba_inquiry_data[32]; 259 return snprintf(buf, 20, "%c%c%c%c\n", 260 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 261 } 262 263 static ssize_t host_show_commands_outstanding(struct device *dev, 264 struct device_attribute *attr, char *buf) 265 { 266 struct Scsi_Host *shost = class_to_shost(dev); 267 struct ctlr_info *h = shost_to_hba(shost); 268 269 return snprintf(buf, 20, "%d\n", h->commands_outstanding); 270 } 271 272 static ssize_t host_show_transport_mode(struct device *dev, 273 struct device_attribute *attr, char *buf) 274 { 275 struct ctlr_info *h; 276 struct Scsi_Host *shost = class_to_shost(dev); 277 278 h = shost_to_hba(shost); 279 return snprintf(buf, 20, "%s\n", 280 h->transMethod & CFGTBL_Trans_Performant ? 281 "performant" : "simple"); 282 } 283 284 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 285 static u32 unresettable_controller[] = { 286 0x324a103C, /* Smart Array P712m */ 287 0x324b103C, /* SmartArray P711m */ 288 0x3223103C, /* Smart Array P800 */ 289 0x3234103C, /* Smart Array P400 */ 290 0x3235103C, /* Smart Array P400i */ 291 0x3211103C, /* Smart Array E200i */ 292 0x3212103C, /* Smart Array E200 */ 293 0x3213103C, /* Smart Array E200i */ 294 0x3214103C, /* Smart Array E200i */ 295 0x3215103C, /* Smart Array E200i */ 296 0x3237103C, /* Smart Array E500 */ 297 0x323D103C, /* Smart Array P700m */ 298 0x40800E11, /* Smart Array 5i */ 299 0x409C0E11, /* Smart Array 6400 */ 300 0x409D0E11, /* Smart Array 6400 EM */ 301 }; 302 303 /* List of controllers which cannot even be soft reset */ 304 static u32 soft_unresettable_controller[] = { 305 0x40800E11, /* Smart Array 5i */ 306 /* Exclude 640x boards. These are two pci devices in one slot 307 * which share a battery backed cache module. One controls the 308 * cache, the other accesses the cache through the one that controls 309 * it. If we reset the one controlling the cache, the other will 310 * likely not be happy. Just forbid resetting this conjoined mess. 311 * The 640x isn't really supported by hpsa anyway. 312 */ 313 0x409C0E11, /* Smart Array 6400 */ 314 0x409D0E11, /* Smart Array 6400 EM */ 315 }; 316 317 static int ctlr_is_hard_resettable(u32 board_id) 318 { 319 int i; 320 321 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 322 if (unresettable_controller[i] == board_id) 323 return 0; 324 return 1; 325 } 326 327 static int ctlr_is_soft_resettable(u32 board_id) 328 { 329 int i; 330 331 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) 332 if (soft_unresettable_controller[i] == board_id) 333 return 0; 334 return 1; 335 } 336 337 static int ctlr_is_resettable(u32 board_id) 338 { 339 return ctlr_is_hard_resettable(board_id) || 340 ctlr_is_soft_resettable(board_id); 341 } 342 343 static ssize_t host_show_resettable(struct device *dev, 344 struct device_attribute *attr, char *buf) 345 { 346 struct ctlr_info *h; 347 struct Scsi_Host *shost = class_to_shost(dev); 348 349 h = shost_to_hba(shost); 350 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 351 } 352 353 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 354 { 355 return (scsi3addr[3] & 0xC0) == 0x40; 356 } 357 358 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 359 "UNKNOWN" 360 }; 361 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) 362 363 static ssize_t raid_level_show(struct device *dev, 364 struct device_attribute *attr, char *buf) 365 { 366 ssize_t l = 0; 367 unsigned char rlevel; 368 struct ctlr_info *h; 369 struct scsi_device *sdev; 370 struct hpsa_scsi_dev_t *hdev; 371 unsigned long flags; 372 373 sdev = to_scsi_device(dev); 374 h = sdev_to_hba(sdev); 375 spin_lock_irqsave(&h->lock, flags); 376 hdev = sdev->hostdata; 377 if (!hdev) { 378 spin_unlock_irqrestore(&h->lock, flags); 379 return -ENODEV; 380 } 381 382 /* Is this even a logical drive? */ 383 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { 384 spin_unlock_irqrestore(&h->lock, flags); 385 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 386 return l; 387 } 388 389 rlevel = hdev->raid_level; 390 spin_unlock_irqrestore(&h->lock, flags); 391 if (rlevel > RAID_UNKNOWN) 392 rlevel = RAID_UNKNOWN; 393 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 394 return l; 395 } 396 397 static ssize_t lunid_show(struct device *dev, 398 struct device_attribute *attr, char *buf) 399 { 400 struct ctlr_info *h; 401 struct scsi_device *sdev; 402 struct hpsa_scsi_dev_t *hdev; 403 unsigned long flags; 404 unsigned char lunid[8]; 405 406 sdev = to_scsi_device(dev); 407 h = sdev_to_hba(sdev); 408 spin_lock_irqsave(&h->lock, flags); 409 hdev = sdev->hostdata; 410 if (!hdev) { 411 spin_unlock_irqrestore(&h->lock, flags); 412 return -ENODEV; 413 } 414 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 415 spin_unlock_irqrestore(&h->lock, flags); 416 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 417 lunid[0], lunid[1], lunid[2], lunid[3], 418 lunid[4], lunid[5], lunid[6], lunid[7]); 419 } 420 421 static ssize_t unique_id_show(struct device *dev, 422 struct device_attribute *attr, char *buf) 423 { 424 struct ctlr_info *h; 425 struct scsi_device *sdev; 426 struct hpsa_scsi_dev_t *hdev; 427 unsigned long flags; 428 unsigned char sn[16]; 429 430 sdev = to_scsi_device(dev); 431 h = sdev_to_hba(sdev); 432 spin_lock_irqsave(&h->lock, flags); 433 hdev = sdev->hostdata; 434 if (!hdev) { 435 spin_unlock_irqrestore(&h->lock, flags); 436 return -ENODEV; 437 } 438 memcpy(sn, hdev->device_id, sizeof(sn)); 439 spin_unlock_irqrestore(&h->lock, flags); 440 return snprintf(buf, 16 * 2 + 2, 441 "%02X%02X%02X%02X%02X%02X%02X%02X" 442 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 443 sn[0], sn[1], sn[2], sn[3], 444 sn[4], sn[5], sn[6], sn[7], 445 sn[8], sn[9], sn[10], sn[11], 446 sn[12], sn[13], sn[14], sn[15]); 447 } 448 449 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 450 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 451 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 452 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 453 static DEVICE_ATTR(firmware_revision, S_IRUGO, 454 host_show_firmware_revision, NULL); 455 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 456 host_show_commands_outstanding, NULL); 457 static DEVICE_ATTR(transport_mode, S_IRUGO, 458 host_show_transport_mode, NULL); 459 static DEVICE_ATTR(resettable, S_IRUGO, 460 host_show_resettable, NULL); 461 462 static struct device_attribute *hpsa_sdev_attrs[] = { 463 &dev_attr_raid_level, 464 &dev_attr_lunid, 465 &dev_attr_unique_id, 466 NULL, 467 }; 468 469 static struct device_attribute *hpsa_shost_attrs[] = { 470 &dev_attr_rescan, 471 &dev_attr_firmware_revision, 472 &dev_attr_commands_outstanding, 473 &dev_attr_transport_mode, 474 &dev_attr_resettable, 475 NULL, 476 }; 477 478 static struct scsi_host_template hpsa_driver_template = { 479 .module = THIS_MODULE, 480 .name = HPSA, 481 .proc_name = HPSA, 482 .queuecommand = hpsa_scsi_queue_command, 483 .scan_start = hpsa_scan_start, 484 .scan_finished = hpsa_scan_finished, 485 .change_queue_depth = hpsa_change_queue_depth, 486 .this_id = -1, 487 .use_clustering = ENABLE_CLUSTERING, 488 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 489 .ioctl = hpsa_ioctl, 490 .slave_alloc = hpsa_slave_alloc, 491 .slave_destroy = hpsa_slave_destroy, 492 #ifdef CONFIG_COMPAT 493 .compat_ioctl = hpsa_compat_ioctl, 494 #endif 495 .sdev_attrs = hpsa_sdev_attrs, 496 .shost_attrs = hpsa_shost_attrs, 497 .max_sectors = 8192, 498 }; 499 500 501 /* Enqueuing and dequeuing functions for cmdlists. */ 502 static inline void addQ(struct list_head *list, struct CommandList *c) 503 { 504 list_add_tail(&c->list, list); 505 } 506 507 static inline u32 next_command(struct ctlr_info *h) 508 { 509 u32 a; 510 511 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 512 return h->access.command_completed(h); 513 514 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { 515 a = *(h->reply_pool_head); /* Next cmd in ring buffer */ 516 (h->reply_pool_head)++; 517 h->commands_outstanding--; 518 } else { 519 a = FIFO_EMPTY; 520 } 521 /* Check for wraparound */ 522 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { 523 h->reply_pool_head = h->reply_pool; 524 h->reply_pool_wraparound ^= 1; 525 } 526 return a; 527 } 528 529 /* set_performant_mode: Modify the tag for cciss performant 530 * set bit 0 for pull model, bits 3-1 for block fetch 531 * register number 532 */ 533 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c) 534 { 535 if (likely(h->transMethod & CFGTBL_Trans_Performant)) 536 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 537 } 538 539 static void enqueue_cmd_and_start_io(struct ctlr_info *h, 540 struct CommandList *c) 541 { 542 unsigned long flags; 543 544 set_performant_mode(h, c); 545 spin_lock_irqsave(&h->lock, flags); 546 addQ(&h->reqQ, c); 547 h->Qdepth++; 548 start_io(h); 549 spin_unlock_irqrestore(&h->lock, flags); 550 } 551 552 static inline void removeQ(struct CommandList *c) 553 { 554 if (WARN_ON(list_empty(&c->list))) 555 return; 556 list_del_init(&c->list); 557 } 558 559 static inline int is_hba_lunid(unsigned char scsi3addr[]) 560 { 561 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 562 } 563 564 static inline int is_scsi_rev_5(struct ctlr_info *h) 565 { 566 if (!h->hba_inquiry_data) 567 return 0; 568 if ((h->hba_inquiry_data[2] & 0x07) == 5) 569 return 1; 570 return 0; 571 } 572 573 static int hpsa_find_target_lun(struct ctlr_info *h, 574 unsigned char scsi3addr[], int bus, int *target, int *lun) 575 { 576 /* finds an unused bus, target, lun for a new physical device 577 * assumes h->devlock is held 578 */ 579 int i, found = 0; 580 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 581 582 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 583 584 for (i = 0; i < h->ndevices; i++) { 585 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 586 __set_bit(h->dev[i]->target, lun_taken); 587 } 588 589 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 590 if (i < HPSA_MAX_DEVICES) { 591 /* *bus = 1; */ 592 *target = i; 593 *lun = 0; 594 found = 1; 595 } 596 return !found; 597 } 598 599 /* Add an entry into h->dev[] array. */ 600 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, 601 struct hpsa_scsi_dev_t *device, 602 struct hpsa_scsi_dev_t *added[], int *nadded) 603 { 604 /* assumes h->devlock is held */ 605 int n = h->ndevices; 606 int i; 607 unsigned char addr1[8], addr2[8]; 608 struct hpsa_scsi_dev_t *sd; 609 610 if (n >= HPSA_MAX_DEVICES) { 611 dev_err(&h->pdev->dev, "too many devices, some will be " 612 "inaccessible.\n"); 613 return -1; 614 } 615 616 /* physical devices do not have lun or target assigned until now. */ 617 if (device->lun != -1) 618 /* Logical device, lun is already assigned. */ 619 goto lun_assigned; 620 621 /* If this device a non-zero lun of a multi-lun device 622 * byte 4 of the 8-byte LUN addr will contain the logical 623 * unit no, zero otherise. 624 */ 625 if (device->scsi3addr[4] == 0) { 626 /* This is not a non-zero lun of a multi-lun device */ 627 if (hpsa_find_target_lun(h, device->scsi3addr, 628 device->bus, &device->target, &device->lun) != 0) 629 return -1; 630 goto lun_assigned; 631 } 632 633 /* This is a non-zero lun of a multi-lun device. 634 * Search through our list and find the device which 635 * has the same 8 byte LUN address, excepting byte 4. 636 * Assign the same bus and target for this new LUN. 637 * Use the logical unit number from the firmware. 638 */ 639 memcpy(addr1, device->scsi3addr, 8); 640 addr1[4] = 0; 641 for (i = 0; i < n; i++) { 642 sd = h->dev[i]; 643 memcpy(addr2, sd->scsi3addr, 8); 644 addr2[4] = 0; 645 /* differ only in byte 4? */ 646 if (memcmp(addr1, addr2, 8) == 0) { 647 device->bus = sd->bus; 648 device->target = sd->target; 649 device->lun = device->scsi3addr[4]; 650 break; 651 } 652 } 653 if (device->lun == -1) { 654 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 655 " suspect firmware bug or unsupported hardware " 656 "configuration.\n"); 657 return -1; 658 } 659 660 lun_assigned: 661 662 h->dev[n] = device; 663 h->ndevices++; 664 added[*nadded] = device; 665 (*nadded)++; 666 667 /* initially, (before registering with scsi layer) we don't 668 * know our hostno and we don't want to print anything first 669 * time anyway (the scsi layer's inquiries will show that info) 670 */ 671 /* if (hostno != -1) */ 672 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", 673 scsi_device_type(device->devtype), hostno, 674 device->bus, device->target, device->lun); 675 return 0; 676 } 677 678 /* Update an entry in h->dev[] array. */ 679 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno, 680 int entry, struct hpsa_scsi_dev_t *new_entry) 681 { 682 /* assumes h->devlock is held */ 683 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 684 685 /* Raid level changed. */ 686 h->dev[entry]->raid_level = new_entry->raid_level; 687 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n", 688 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 689 new_entry->target, new_entry->lun); 690 } 691 692 /* Replace an entry from h->dev[] array. */ 693 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, 694 int entry, struct hpsa_scsi_dev_t *new_entry, 695 struct hpsa_scsi_dev_t *added[], int *nadded, 696 struct hpsa_scsi_dev_t *removed[], int *nremoved) 697 { 698 /* assumes h->devlock is held */ 699 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 700 removed[*nremoved] = h->dev[entry]; 701 (*nremoved)++; 702 703 /* 704 * New physical devices won't have target/lun assigned yet 705 * so we need to preserve the values in the slot we are replacing. 706 */ 707 if (new_entry->target == -1) { 708 new_entry->target = h->dev[entry]->target; 709 new_entry->lun = h->dev[entry]->lun; 710 } 711 712 h->dev[entry] = new_entry; 713 added[*nadded] = new_entry; 714 (*nadded)++; 715 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n", 716 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 717 new_entry->target, new_entry->lun); 718 } 719 720 /* Remove an entry from h->dev[] array. */ 721 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, 722 struct hpsa_scsi_dev_t *removed[], int *nremoved) 723 { 724 /* assumes h->devlock is held */ 725 int i; 726 struct hpsa_scsi_dev_t *sd; 727 728 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 729 730 sd = h->dev[entry]; 731 removed[*nremoved] = h->dev[entry]; 732 (*nremoved)++; 733 734 for (i = entry; i < h->ndevices-1; i++) 735 h->dev[i] = h->dev[i+1]; 736 h->ndevices--; 737 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", 738 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, 739 sd->lun); 740 } 741 742 #define SCSI3ADDR_EQ(a, b) ( \ 743 (a)[7] == (b)[7] && \ 744 (a)[6] == (b)[6] && \ 745 (a)[5] == (b)[5] && \ 746 (a)[4] == (b)[4] && \ 747 (a)[3] == (b)[3] && \ 748 (a)[2] == (b)[2] && \ 749 (a)[1] == (b)[1] && \ 750 (a)[0] == (b)[0]) 751 752 static void fixup_botched_add(struct ctlr_info *h, 753 struct hpsa_scsi_dev_t *added) 754 { 755 /* called when scsi_add_device fails in order to re-adjust 756 * h->dev[] to match the mid layer's view. 757 */ 758 unsigned long flags; 759 int i, j; 760 761 spin_lock_irqsave(&h->lock, flags); 762 for (i = 0; i < h->ndevices; i++) { 763 if (h->dev[i] == added) { 764 for (j = i; j < h->ndevices-1; j++) 765 h->dev[j] = h->dev[j+1]; 766 h->ndevices--; 767 break; 768 } 769 } 770 spin_unlock_irqrestore(&h->lock, flags); 771 kfree(added); 772 } 773 774 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 775 struct hpsa_scsi_dev_t *dev2) 776 { 777 /* we compare everything except lun and target as these 778 * are not yet assigned. Compare parts likely 779 * to differ first 780 */ 781 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 782 sizeof(dev1->scsi3addr)) != 0) 783 return 0; 784 if (memcmp(dev1->device_id, dev2->device_id, 785 sizeof(dev1->device_id)) != 0) 786 return 0; 787 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 788 return 0; 789 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 790 return 0; 791 if (dev1->devtype != dev2->devtype) 792 return 0; 793 if (dev1->bus != dev2->bus) 794 return 0; 795 return 1; 796 } 797 798 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 799 struct hpsa_scsi_dev_t *dev2) 800 { 801 /* Device attributes that can change, but don't mean 802 * that the device is a different device, nor that the OS 803 * needs to be told anything about the change. 804 */ 805 if (dev1->raid_level != dev2->raid_level) 806 return 1; 807 return 0; 808 } 809 810 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 811 * and return needle location in *index. If scsi3addr matches, but not 812 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 813 * location in *index. 814 * In the case of a minor device attribute change, such as RAID level, just 815 * return DEVICE_UPDATED, along with the updated device's location in index. 816 * If needle not found, return DEVICE_NOT_FOUND. 817 */ 818 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 819 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 820 int *index) 821 { 822 int i; 823 #define DEVICE_NOT_FOUND 0 824 #define DEVICE_CHANGED 1 825 #define DEVICE_SAME 2 826 #define DEVICE_UPDATED 3 827 for (i = 0; i < haystack_size; i++) { 828 if (haystack[i] == NULL) /* previously removed. */ 829 continue; 830 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 831 *index = i; 832 if (device_is_the_same(needle, haystack[i])) { 833 if (device_updated(needle, haystack[i])) 834 return DEVICE_UPDATED; 835 return DEVICE_SAME; 836 } else { 837 return DEVICE_CHANGED; 838 } 839 } 840 } 841 *index = -1; 842 return DEVICE_NOT_FOUND; 843 } 844 845 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, 846 struct hpsa_scsi_dev_t *sd[], int nsds) 847 { 848 /* sd contains scsi3 addresses and devtypes, and inquiry 849 * data. This function takes what's in sd to be the current 850 * reality and updates h->dev[] to reflect that reality. 851 */ 852 int i, entry, device_change, changes = 0; 853 struct hpsa_scsi_dev_t *csd; 854 unsigned long flags; 855 struct hpsa_scsi_dev_t **added, **removed; 856 int nadded, nremoved; 857 struct Scsi_Host *sh = NULL; 858 859 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 860 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 861 862 if (!added || !removed) { 863 dev_warn(&h->pdev->dev, "out of memory in " 864 "adjust_hpsa_scsi_table\n"); 865 goto free_and_out; 866 } 867 868 spin_lock_irqsave(&h->devlock, flags); 869 870 /* find any devices in h->dev[] that are not in 871 * sd[] and remove them from h->dev[], and for any 872 * devices which have changed, remove the old device 873 * info and add the new device info. 874 * If minor device attributes change, just update 875 * the existing device structure. 876 */ 877 i = 0; 878 nremoved = 0; 879 nadded = 0; 880 while (i < h->ndevices) { 881 csd = h->dev[i]; 882 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 883 if (device_change == DEVICE_NOT_FOUND) { 884 changes++; 885 hpsa_scsi_remove_entry(h, hostno, i, 886 removed, &nremoved); 887 continue; /* remove ^^^, hence i not incremented */ 888 } else if (device_change == DEVICE_CHANGED) { 889 changes++; 890 hpsa_scsi_replace_entry(h, hostno, i, sd[entry], 891 added, &nadded, removed, &nremoved); 892 /* Set it to NULL to prevent it from being freed 893 * at the bottom of hpsa_update_scsi_devices() 894 */ 895 sd[entry] = NULL; 896 } else if (device_change == DEVICE_UPDATED) { 897 hpsa_scsi_update_entry(h, hostno, i, sd[entry]); 898 } 899 i++; 900 } 901 902 /* Now, make sure every device listed in sd[] is also 903 * listed in h->dev[], adding them if they aren't found 904 */ 905 906 for (i = 0; i < nsds; i++) { 907 if (!sd[i]) /* if already added above. */ 908 continue; 909 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 910 h->ndevices, &entry); 911 if (device_change == DEVICE_NOT_FOUND) { 912 changes++; 913 if (hpsa_scsi_add_entry(h, hostno, sd[i], 914 added, &nadded) != 0) 915 break; 916 sd[i] = NULL; /* prevent from being freed later. */ 917 } else if (device_change == DEVICE_CHANGED) { 918 /* should never happen... */ 919 changes++; 920 dev_warn(&h->pdev->dev, 921 "device unexpectedly changed.\n"); 922 /* but if it does happen, we just ignore that device */ 923 } 924 } 925 spin_unlock_irqrestore(&h->devlock, flags); 926 927 /* Don't notify scsi mid layer of any changes the first time through 928 * (or if there are no changes) scsi_scan_host will do it later the 929 * first time through. 930 */ 931 if (hostno == -1 || !changes) 932 goto free_and_out; 933 934 sh = h->scsi_host; 935 /* Notify scsi mid layer of any removed devices */ 936 for (i = 0; i < nremoved; i++) { 937 struct scsi_device *sdev = 938 scsi_device_lookup(sh, removed[i]->bus, 939 removed[i]->target, removed[i]->lun); 940 if (sdev != NULL) { 941 scsi_remove_device(sdev); 942 scsi_device_put(sdev); 943 } else { 944 /* We don't expect to get here. 945 * future cmds to this device will get selection 946 * timeout as if the device was gone. 947 */ 948 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " 949 " for removal.", hostno, removed[i]->bus, 950 removed[i]->target, removed[i]->lun); 951 } 952 kfree(removed[i]); 953 removed[i] = NULL; 954 } 955 956 /* Notify scsi mid layer of any added devices */ 957 for (i = 0; i < nadded; i++) { 958 if (scsi_add_device(sh, added[i]->bus, 959 added[i]->target, added[i]->lun) == 0) 960 continue; 961 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " 962 "device not added.\n", hostno, added[i]->bus, 963 added[i]->target, added[i]->lun); 964 /* now we have to remove it from h->dev, 965 * since it didn't get added to scsi mid layer 966 */ 967 fixup_botched_add(h, added[i]); 968 } 969 970 free_and_out: 971 kfree(added); 972 kfree(removed); 973 } 974 975 /* 976 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t * 977 * Assume's h->devlock is held. 978 */ 979 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 980 int bus, int target, int lun) 981 { 982 int i; 983 struct hpsa_scsi_dev_t *sd; 984 985 for (i = 0; i < h->ndevices; i++) { 986 sd = h->dev[i]; 987 if (sd->bus == bus && sd->target == target && sd->lun == lun) 988 return sd; 989 } 990 return NULL; 991 } 992 993 /* link sdev->hostdata to our per-device structure. */ 994 static int hpsa_slave_alloc(struct scsi_device *sdev) 995 { 996 struct hpsa_scsi_dev_t *sd; 997 unsigned long flags; 998 struct ctlr_info *h; 999 1000 h = sdev_to_hba(sdev); 1001 spin_lock_irqsave(&h->devlock, flags); 1002 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1003 sdev_id(sdev), sdev->lun); 1004 if (sd != NULL) 1005 sdev->hostdata = sd; 1006 spin_unlock_irqrestore(&h->devlock, flags); 1007 return 0; 1008 } 1009 1010 static void hpsa_slave_destroy(struct scsi_device *sdev) 1011 { 1012 /* nothing to do. */ 1013 } 1014 1015 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 1016 { 1017 int i; 1018 1019 if (!h->cmd_sg_list) 1020 return; 1021 for (i = 0; i < h->nr_cmds; i++) { 1022 kfree(h->cmd_sg_list[i]); 1023 h->cmd_sg_list[i] = NULL; 1024 } 1025 kfree(h->cmd_sg_list); 1026 h->cmd_sg_list = NULL; 1027 } 1028 1029 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h) 1030 { 1031 int i; 1032 1033 if (h->chainsize <= 0) 1034 return 0; 1035 1036 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 1037 GFP_KERNEL); 1038 if (!h->cmd_sg_list) 1039 return -ENOMEM; 1040 for (i = 0; i < h->nr_cmds; i++) { 1041 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 1042 h->chainsize, GFP_KERNEL); 1043 if (!h->cmd_sg_list[i]) 1044 goto clean; 1045 } 1046 return 0; 1047 1048 clean: 1049 hpsa_free_sg_chain_blocks(h); 1050 return -ENOMEM; 1051 } 1052 1053 static void hpsa_map_sg_chain_block(struct ctlr_info *h, 1054 struct CommandList *c) 1055 { 1056 struct SGDescriptor *chain_sg, *chain_block; 1057 u64 temp64; 1058 1059 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1060 chain_block = h->cmd_sg_list[c->cmdindex]; 1061 chain_sg->Ext = HPSA_SG_CHAIN; 1062 chain_sg->Len = sizeof(*chain_sg) * 1063 (c->Header.SGTotal - h->max_cmd_sg_entries); 1064 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len, 1065 PCI_DMA_TODEVICE); 1066 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL); 1067 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL); 1068 } 1069 1070 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 1071 struct CommandList *c) 1072 { 1073 struct SGDescriptor *chain_sg; 1074 union u64bit temp64; 1075 1076 if (c->Header.SGTotal <= h->max_cmd_sg_entries) 1077 return; 1078 1079 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1080 temp64.val32.lower = chain_sg->Addr.lower; 1081 temp64.val32.upper = chain_sg->Addr.upper; 1082 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); 1083 } 1084 1085 static void complete_scsi_command(struct CommandList *cp) 1086 { 1087 struct scsi_cmnd *cmd; 1088 struct ctlr_info *h; 1089 struct ErrorInfo *ei; 1090 1091 unsigned char sense_key; 1092 unsigned char asc; /* additional sense code */ 1093 unsigned char ascq; /* additional sense code qualifier */ 1094 unsigned long sense_data_size; 1095 1096 ei = cp->err_info; 1097 cmd = (struct scsi_cmnd *) cp->scsi_cmd; 1098 h = cp->h; 1099 1100 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 1101 if (cp->Header.SGTotal > h->max_cmd_sg_entries) 1102 hpsa_unmap_sg_chain_block(h, cp); 1103 1104 cmd->result = (DID_OK << 16); /* host byte */ 1105 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 1106 cmd->result |= ei->ScsiStatus; 1107 1108 /* copy the sense data whether we need to or not. */ 1109 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 1110 sense_data_size = SCSI_SENSE_BUFFERSIZE; 1111 else 1112 sense_data_size = sizeof(ei->SenseInfo); 1113 if (ei->SenseLen < sense_data_size) 1114 sense_data_size = ei->SenseLen; 1115 1116 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 1117 scsi_set_resid(cmd, ei->ResidualCnt); 1118 1119 if (ei->CommandStatus == 0) { 1120 cmd->scsi_done(cmd); 1121 cmd_free(h, cp); 1122 return; 1123 } 1124 1125 /* an error has occurred */ 1126 switch (ei->CommandStatus) { 1127 1128 case CMD_TARGET_STATUS: 1129 if (ei->ScsiStatus) { 1130 /* Get sense key */ 1131 sense_key = 0xf & ei->SenseInfo[2]; 1132 /* Get additional sense code */ 1133 asc = ei->SenseInfo[12]; 1134 /* Get addition sense code qualifier */ 1135 ascq = ei->SenseInfo[13]; 1136 } 1137 1138 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 1139 if (check_for_unit_attention(h, cp)) { 1140 cmd->result = DID_SOFT_ERROR << 16; 1141 break; 1142 } 1143 if (sense_key == ILLEGAL_REQUEST) { 1144 /* 1145 * SCSI REPORT_LUNS is commonly unsupported on 1146 * Smart Array. Suppress noisy complaint. 1147 */ 1148 if (cp->Request.CDB[0] == REPORT_LUNS) 1149 break; 1150 1151 /* If ASC/ASCQ indicate Logical Unit 1152 * Not Supported condition, 1153 */ 1154 if ((asc == 0x25) && (ascq == 0x0)) { 1155 dev_warn(&h->pdev->dev, "cp %p " 1156 "has check condition\n", cp); 1157 break; 1158 } 1159 } 1160 1161 if (sense_key == NOT_READY) { 1162 /* If Sense is Not Ready, Logical Unit 1163 * Not ready, Manual Intervention 1164 * required 1165 */ 1166 if ((asc == 0x04) && (ascq == 0x03)) { 1167 dev_warn(&h->pdev->dev, "cp %p " 1168 "has check condition: unit " 1169 "not ready, manual " 1170 "intervention required\n", cp); 1171 break; 1172 } 1173 } 1174 if (sense_key == ABORTED_COMMAND) { 1175 /* Aborted command is retryable */ 1176 dev_warn(&h->pdev->dev, "cp %p " 1177 "has check condition: aborted command: " 1178 "ASC: 0x%x, ASCQ: 0x%x\n", 1179 cp, asc, ascq); 1180 cmd->result = DID_SOFT_ERROR << 16; 1181 break; 1182 } 1183 /* Must be some other type of check condition */ 1184 dev_warn(&h->pdev->dev, "cp %p has check condition: " 1185 "unknown type: " 1186 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1187 "Returning result: 0x%x, " 1188 "cmd=[%02x %02x %02x %02x %02x " 1189 "%02x %02x %02x %02x %02x %02x " 1190 "%02x %02x %02x %02x %02x]\n", 1191 cp, sense_key, asc, ascq, 1192 cmd->result, 1193 cmd->cmnd[0], cmd->cmnd[1], 1194 cmd->cmnd[2], cmd->cmnd[3], 1195 cmd->cmnd[4], cmd->cmnd[5], 1196 cmd->cmnd[6], cmd->cmnd[7], 1197 cmd->cmnd[8], cmd->cmnd[9], 1198 cmd->cmnd[10], cmd->cmnd[11], 1199 cmd->cmnd[12], cmd->cmnd[13], 1200 cmd->cmnd[14], cmd->cmnd[15]); 1201 break; 1202 } 1203 1204 1205 /* Problem was not a check condition 1206 * Pass it up to the upper layers... 1207 */ 1208 if (ei->ScsiStatus) { 1209 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 1210 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1211 "Returning result: 0x%x\n", 1212 cp, ei->ScsiStatus, 1213 sense_key, asc, ascq, 1214 cmd->result); 1215 } else { /* scsi status is zero??? How??? */ 1216 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 1217 "Returning no connection.\n", cp), 1218 1219 /* Ordinarily, this case should never happen, 1220 * but there is a bug in some released firmware 1221 * revisions that allows it to happen if, for 1222 * example, a 4100 backplane loses power and 1223 * the tape drive is in it. We assume that 1224 * it's a fatal error of some kind because we 1225 * can't show that it wasn't. We will make it 1226 * look like selection timeout since that is 1227 * the most common reason for this to occur, 1228 * and it's severe enough. 1229 */ 1230 1231 cmd->result = DID_NO_CONNECT << 16; 1232 } 1233 break; 1234 1235 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1236 break; 1237 case CMD_DATA_OVERRUN: 1238 dev_warn(&h->pdev->dev, "cp %p has" 1239 " completed with data overrun " 1240 "reported\n", cp); 1241 break; 1242 case CMD_INVALID: { 1243 /* print_bytes(cp, sizeof(*cp), 1, 0); 1244 print_cmd(cp); */ 1245 /* We get CMD_INVALID if you address a non-existent device 1246 * instead of a selection timeout (no response). You will 1247 * see this if you yank out a drive, then try to access it. 1248 * This is kind of a shame because it means that any other 1249 * CMD_INVALID (e.g. driver bug) will get interpreted as a 1250 * missing target. */ 1251 cmd->result = DID_NO_CONNECT << 16; 1252 } 1253 break; 1254 case CMD_PROTOCOL_ERR: 1255 dev_warn(&h->pdev->dev, "cp %p has " 1256 "protocol error \n", cp); 1257 break; 1258 case CMD_HARDWARE_ERR: 1259 cmd->result = DID_ERROR << 16; 1260 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp); 1261 break; 1262 case CMD_CONNECTION_LOST: 1263 cmd->result = DID_ERROR << 16; 1264 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); 1265 break; 1266 case CMD_ABORTED: 1267 cmd->result = DID_ABORT << 16; 1268 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", 1269 cp, ei->ScsiStatus); 1270 break; 1271 case CMD_ABORT_FAILED: 1272 cmd->result = DID_ERROR << 16; 1273 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); 1274 break; 1275 case CMD_UNSOLICITED_ABORT: 1276 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 1277 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited " 1278 "abort\n", cp); 1279 break; 1280 case CMD_TIMEOUT: 1281 cmd->result = DID_TIME_OUT << 16; 1282 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); 1283 break; 1284 case CMD_UNABORTABLE: 1285 cmd->result = DID_ERROR << 16; 1286 dev_warn(&h->pdev->dev, "Command unabortable\n"); 1287 break; 1288 default: 1289 cmd->result = DID_ERROR << 16; 1290 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 1291 cp, ei->CommandStatus); 1292 } 1293 cmd->scsi_done(cmd); 1294 cmd_free(h, cp); 1295 } 1296 1297 static void hpsa_pci_unmap(struct pci_dev *pdev, 1298 struct CommandList *c, int sg_used, int data_direction) 1299 { 1300 int i; 1301 union u64bit addr64; 1302 1303 for (i = 0; i < sg_used; i++) { 1304 addr64.val32.lower = c->SG[i].Addr.lower; 1305 addr64.val32.upper = c->SG[i].Addr.upper; 1306 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len, 1307 data_direction); 1308 } 1309 } 1310 1311 static void hpsa_map_one(struct pci_dev *pdev, 1312 struct CommandList *cp, 1313 unsigned char *buf, 1314 size_t buflen, 1315 int data_direction) 1316 { 1317 u64 addr64; 1318 1319 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 1320 cp->Header.SGList = 0; 1321 cp->Header.SGTotal = 0; 1322 return; 1323 } 1324 1325 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction); 1326 cp->SG[0].Addr.lower = 1327 (u32) (addr64 & (u64) 0x00000000FFFFFFFF); 1328 cp->SG[0].Addr.upper = 1329 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF); 1330 cp->SG[0].Len = buflen; 1331 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */ 1332 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */ 1333 } 1334 1335 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 1336 struct CommandList *c) 1337 { 1338 DECLARE_COMPLETION_ONSTACK(wait); 1339 1340 c->waiting = &wait; 1341 enqueue_cmd_and_start_io(h, c); 1342 wait_for_completion(&wait); 1343 } 1344 1345 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h, 1346 struct CommandList *c) 1347 { 1348 unsigned long flags; 1349 1350 /* If controller lockup detected, fake a hardware error. */ 1351 spin_lock_irqsave(&h->lock, flags); 1352 if (unlikely(h->lockup_detected)) { 1353 spin_unlock_irqrestore(&h->lock, flags); 1354 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 1355 } else { 1356 spin_unlock_irqrestore(&h->lock, flags); 1357 hpsa_scsi_do_simple_cmd_core(h, c); 1358 } 1359 } 1360 1361 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 1362 struct CommandList *c, int data_direction) 1363 { 1364 int retry_count = 0; 1365 1366 do { 1367 memset(c->err_info, 0, sizeof(*c->err_info)); 1368 hpsa_scsi_do_simple_cmd_core(h, c); 1369 retry_count++; 1370 } while (check_for_unit_attention(h, c) && retry_count <= 3); 1371 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 1372 } 1373 1374 static void hpsa_scsi_interpret_error(struct CommandList *cp) 1375 { 1376 struct ErrorInfo *ei; 1377 struct device *d = &cp->h->pdev->dev; 1378 1379 ei = cp->err_info; 1380 switch (ei->CommandStatus) { 1381 case CMD_TARGET_STATUS: 1382 dev_warn(d, "cmd %p has completed with errors\n", cp); 1383 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp, 1384 ei->ScsiStatus); 1385 if (ei->ScsiStatus == 0) 1386 dev_warn(d, "SCSI status is abnormally zero. " 1387 "(probably indicates selection timeout " 1388 "reported incorrectly due to a known " 1389 "firmware bug, circa July, 2001.)\n"); 1390 break; 1391 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1392 dev_info(d, "UNDERRUN\n"); 1393 break; 1394 case CMD_DATA_OVERRUN: 1395 dev_warn(d, "cp %p has completed with data overrun\n", cp); 1396 break; 1397 case CMD_INVALID: { 1398 /* controller unfortunately reports SCSI passthru's 1399 * to non-existent targets as invalid commands. 1400 */ 1401 dev_warn(d, "cp %p is reported invalid (probably means " 1402 "target device no longer present)\n", cp); 1403 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0); 1404 print_cmd(cp); */ 1405 } 1406 break; 1407 case CMD_PROTOCOL_ERR: 1408 dev_warn(d, "cp %p has protocol error \n", cp); 1409 break; 1410 case CMD_HARDWARE_ERR: 1411 /* cmd->result = DID_ERROR << 16; */ 1412 dev_warn(d, "cp %p had hardware error\n", cp); 1413 break; 1414 case CMD_CONNECTION_LOST: 1415 dev_warn(d, "cp %p had connection lost\n", cp); 1416 break; 1417 case CMD_ABORTED: 1418 dev_warn(d, "cp %p was aborted\n", cp); 1419 break; 1420 case CMD_ABORT_FAILED: 1421 dev_warn(d, "cp %p reports abort failed\n", cp); 1422 break; 1423 case CMD_UNSOLICITED_ABORT: 1424 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp); 1425 break; 1426 case CMD_TIMEOUT: 1427 dev_warn(d, "cp %p timed out\n", cp); 1428 break; 1429 case CMD_UNABORTABLE: 1430 dev_warn(d, "Command unabortable\n"); 1431 break; 1432 default: 1433 dev_warn(d, "cp %p returned unknown status %x\n", cp, 1434 ei->CommandStatus); 1435 } 1436 } 1437 1438 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 1439 unsigned char page, unsigned char *buf, 1440 unsigned char bufsize) 1441 { 1442 int rc = IO_OK; 1443 struct CommandList *c; 1444 struct ErrorInfo *ei; 1445 1446 c = cmd_special_alloc(h); 1447 1448 if (c == NULL) { /* trouble... */ 1449 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1450 return -ENOMEM; 1451 } 1452 1453 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD); 1454 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1455 ei = c->err_info; 1456 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 1457 hpsa_scsi_interpret_error(c); 1458 rc = -1; 1459 } 1460 cmd_special_free(h, c); 1461 return rc; 1462 } 1463 1464 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr) 1465 { 1466 int rc = IO_OK; 1467 struct CommandList *c; 1468 struct ErrorInfo *ei; 1469 1470 c = cmd_special_alloc(h); 1471 1472 if (c == NULL) { /* trouble... */ 1473 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1474 return -ENOMEM; 1475 } 1476 1477 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG); 1478 hpsa_scsi_do_simple_cmd_core(h, c); 1479 /* no unmap needed here because no data xfer. */ 1480 1481 ei = c->err_info; 1482 if (ei->CommandStatus != 0) { 1483 hpsa_scsi_interpret_error(c); 1484 rc = -1; 1485 } 1486 cmd_special_free(h, c); 1487 return rc; 1488 } 1489 1490 static void hpsa_get_raid_level(struct ctlr_info *h, 1491 unsigned char *scsi3addr, unsigned char *raid_level) 1492 { 1493 int rc; 1494 unsigned char *buf; 1495 1496 *raid_level = RAID_UNKNOWN; 1497 buf = kzalloc(64, GFP_KERNEL); 1498 if (!buf) 1499 return; 1500 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64); 1501 if (rc == 0) 1502 *raid_level = buf[8]; 1503 if (*raid_level > RAID_UNKNOWN) 1504 *raid_level = RAID_UNKNOWN; 1505 kfree(buf); 1506 return; 1507 } 1508 1509 /* Get the device id from inquiry page 0x83 */ 1510 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 1511 unsigned char *device_id, int buflen) 1512 { 1513 int rc; 1514 unsigned char *buf; 1515 1516 if (buflen > 16) 1517 buflen = 16; 1518 buf = kzalloc(64, GFP_KERNEL); 1519 if (!buf) 1520 return -1; 1521 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64); 1522 if (rc == 0) 1523 memcpy(device_id, &buf[8], buflen); 1524 kfree(buf); 1525 return rc != 0; 1526 } 1527 1528 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 1529 struct ReportLUNdata *buf, int bufsize, 1530 int extended_response) 1531 { 1532 int rc = IO_OK; 1533 struct CommandList *c; 1534 unsigned char scsi3addr[8]; 1535 struct ErrorInfo *ei; 1536 1537 c = cmd_special_alloc(h); 1538 if (c == NULL) { /* trouble... */ 1539 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1540 return -1; 1541 } 1542 /* address the controller */ 1543 memset(scsi3addr, 0, sizeof(scsi3addr)); 1544 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 1545 buf, bufsize, 0, scsi3addr, TYPE_CMD); 1546 if (extended_response) 1547 c->Request.CDB[1] = extended_response; 1548 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1549 ei = c->err_info; 1550 if (ei->CommandStatus != 0 && 1551 ei->CommandStatus != CMD_DATA_UNDERRUN) { 1552 hpsa_scsi_interpret_error(c); 1553 rc = -1; 1554 } 1555 cmd_special_free(h, c); 1556 return rc; 1557 } 1558 1559 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 1560 struct ReportLUNdata *buf, 1561 int bufsize, int extended_response) 1562 { 1563 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); 1564 } 1565 1566 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 1567 struct ReportLUNdata *buf, int bufsize) 1568 { 1569 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 1570 } 1571 1572 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 1573 int bus, int target, int lun) 1574 { 1575 device->bus = bus; 1576 device->target = target; 1577 device->lun = lun; 1578 } 1579 1580 static int hpsa_update_device_info(struct ctlr_info *h, 1581 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 1582 unsigned char *is_OBDR_device) 1583 { 1584 1585 #define OBDR_SIG_OFFSET 43 1586 #define OBDR_TAPE_SIG "$DR-10" 1587 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 1588 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 1589 1590 unsigned char *inq_buff; 1591 unsigned char *obdr_sig; 1592 1593 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 1594 if (!inq_buff) 1595 goto bail_out; 1596 1597 /* Do an inquiry to the device to see what it is. */ 1598 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 1599 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 1600 /* Inquiry failed (msg printed already) */ 1601 dev_err(&h->pdev->dev, 1602 "hpsa_update_device_info: inquiry failed\n"); 1603 goto bail_out; 1604 } 1605 1606 this_device->devtype = (inq_buff[0] & 0x1f); 1607 memcpy(this_device->scsi3addr, scsi3addr, 8); 1608 memcpy(this_device->vendor, &inq_buff[8], 1609 sizeof(this_device->vendor)); 1610 memcpy(this_device->model, &inq_buff[16], 1611 sizeof(this_device->model)); 1612 memset(this_device->device_id, 0, 1613 sizeof(this_device->device_id)); 1614 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 1615 sizeof(this_device->device_id)); 1616 1617 if (this_device->devtype == TYPE_DISK && 1618 is_logical_dev_addr_mode(scsi3addr)) 1619 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 1620 else 1621 this_device->raid_level = RAID_UNKNOWN; 1622 1623 if (is_OBDR_device) { 1624 /* See if this is a One-Button-Disaster-Recovery device 1625 * by looking for "$DR-10" at offset 43 in inquiry data. 1626 */ 1627 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 1628 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 1629 strncmp(obdr_sig, OBDR_TAPE_SIG, 1630 OBDR_SIG_LEN) == 0); 1631 } 1632 1633 kfree(inq_buff); 1634 return 0; 1635 1636 bail_out: 1637 kfree(inq_buff); 1638 return 1; 1639 } 1640 1641 static unsigned char *ext_target_model[] = { 1642 "MSA2012", 1643 "MSA2024", 1644 "MSA2312", 1645 "MSA2324", 1646 "P2000 G3 SAS", 1647 NULL, 1648 }; 1649 1650 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1651 { 1652 int i; 1653 1654 for (i = 0; ext_target_model[i]; i++) 1655 if (strncmp(device->model, ext_target_model[i], 1656 strlen(ext_target_model[i])) == 0) 1657 return 1; 1658 return 0; 1659 } 1660 1661 /* Helper function to assign bus, target, lun mapping of devices. 1662 * Puts non-external target logical volumes on bus 0, external target logical 1663 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. 1664 * Logical drive target and lun are assigned at this time, but 1665 * physical device lun and target assignment are deferred (assigned 1666 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 1667 */ 1668 static void figure_bus_target_lun(struct ctlr_info *h, 1669 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 1670 { 1671 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); 1672 1673 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 1674 /* physical device, target and lun filled in later */ 1675 if (is_hba_lunid(lunaddrbytes)) 1676 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff); 1677 else 1678 /* defer target, lun assignment for physical devices */ 1679 hpsa_set_bus_target_lun(device, 2, -1, -1); 1680 return; 1681 } 1682 /* It's a logical device */ 1683 if (is_ext_target(h, device)) { 1684 /* external target way, put logicals on bus 1 1685 * and match target/lun numbers box 1686 * reports, other smart array, bus 0, target 0, match lunid 1687 */ 1688 hpsa_set_bus_target_lun(device, 1689 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff); 1690 return; 1691 } 1692 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff); 1693 } 1694 1695 /* 1696 * If there is no lun 0 on a target, linux won't find any devices. 1697 * For the external targets (arrays), we have to manually detect the enclosure 1698 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report 1699 * it for some reason. *tmpdevice is the target we're adding, 1700 * this_device is a pointer into the current element of currentsd[] 1701 * that we're building up in update_scsi_devices(), below. 1702 * lunzerobits is a bitmap that tracks which targets already have a 1703 * lun 0 assigned. 1704 * Returns 1 if an enclosure was added, 0 if not. 1705 */ 1706 static int add_ext_target_dev(struct ctlr_info *h, 1707 struct hpsa_scsi_dev_t *tmpdevice, 1708 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes, 1709 unsigned long lunzerobits[], int *n_ext_target_devs) 1710 { 1711 unsigned char scsi3addr[8]; 1712 1713 if (test_bit(tmpdevice->target, lunzerobits)) 1714 return 0; /* There is already a lun 0 on this target. */ 1715 1716 if (!is_logical_dev_addr_mode(lunaddrbytes)) 1717 return 0; /* It's the logical targets that may lack lun 0. */ 1718 1719 if (!is_ext_target(h, tmpdevice)) 1720 return 0; /* Only external target devices have this problem. */ 1721 1722 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */ 1723 return 0; 1724 1725 memset(scsi3addr, 0, 8); 1726 scsi3addr[3] = tmpdevice->target; 1727 if (is_hba_lunid(scsi3addr)) 1728 return 0; /* Don't add the RAID controller here. */ 1729 1730 if (is_scsi_rev_5(h)) 1731 return 0; /* p1210m doesn't need to do this. */ 1732 1733 if (*n_ext_target_devs >= MAX_EXT_TARGETS) { 1734 dev_warn(&h->pdev->dev, "Maximum number of external " 1735 "target devices exceeded. Check your hardware " 1736 "configuration."); 1737 return 0; 1738 } 1739 1740 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL)) 1741 return 0; 1742 (*n_ext_target_devs)++; 1743 hpsa_set_bus_target_lun(this_device, 1744 tmpdevice->bus, tmpdevice->target, 0); 1745 set_bit(tmpdevice->target, lunzerobits); 1746 return 1; 1747 } 1748 1749 /* 1750 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 1751 * logdev. The number of luns in physdev and logdev are returned in 1752 * *nphysicals and *nlogicals, respectively. 1753 * Returns 0 on success, -1 otherwise. 1754 */ 1755 static int hpsa_gather_lun_info(struct ctlr_info *h, 1756 int reportlunsize, 1757 struct ReportLUNdata *physdev, u32 *nphysicals, 1758 struct ReportLUNdata *logdev, u32 *nlogicals) 1759 { 1760 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { 1761 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 1762 return -1; 1763 } 1764 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8; 1765 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 1766 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." 1767 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1768 *nphysicals - HPSA_MAX_PHYS_LUN); 1769 *nphysicals = HPSA_MAX_PHYS_LUN; 1770 } 1771 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) { 1772 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 1773 return -1; 1774 } 1775 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 1776 /* Reject Logicals in excess of our max capability. */ 1777 if (*nlogicals > HPSA_MAX_LUN) { 1778 dev_warn(&h->pdev->dev, 1779 "maximum logical LUNs (%d) exceeded. " 1780 "%d LUNs ignored.\n", HPSA_MAX_LUN, 1781 *nlogicals - HPSA_MAX_LUN); 1782 *nlogicals = HPSA_MAX_LUN; 1783 } 1784 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 1785 dev_warn(&h->pdev->dev, 1786 "maximum logical + physical LUNs (%d) exceeded. " 1787 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1788 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 1789 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 1790 } 1791 return 0; 1792 } 1793 1794 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i, 1795 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list, 1796 struct ReportLUNdata *logdev_list) 1797 { 1798 /* Helper function, figure out where the LUN ID info is coming from 1799 * given index i, lists of physical and logical devices, where in 1800 * the list the raid controller is supposed to appear (first or last) 1801 */ 1802 1803 int logicals_start = nphysicals + (raid_ctlr_position == 0); 1804 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 1805 1806 if (i == raid_ctlr_position) 1807 return RAID_CTLR_LUNID; 1808 1809 if (i < logicals_start) 1810 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0]; 1811 1812 if (i < last_device) 1813 return &logdev_list->LUN[i - nphysicals - 1814 (raid_ctlr_position == 0)][0]; 1815 BUG(); 1816 return NULL; 1817 } 1818 1819 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) 1820 { 1821 /* the idea here is we could get notified 1822 * that some devices have changed, so we do a report 1823 * physical luns and report logical luns cmd, and adjust 1824 * our list of devices accordingly. 1825 * 1826 * The scsi3addr's of devices won't change so long as the 1827 * adapter is not reset. That means we can rescan and 1828 * tell which devices we already know about, vs. new 1829 * devices, vs. disappearing devices. 1830 */ 1831 struct ReportLUNdata *physdev_list = NULL; 1832 struct ReportLUNdata *logdev_list = NULL; 1833 u32 nphysicals = 0; 1834 u32 nlogicals = 0; 1835 u32 ndev_allocated = 0; 1836 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 1837 int ncurrent = 0; 1838 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; 1839 int i, n_ext_target_devs, ndevs_to_allocate; 1840 int raid_ctlr_position; 1841 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 1842 1843 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 1844 physdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1845 logdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1846 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 1847 1848 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) { 1849 dev_err(&h->pdev->dev, "out of memory\n"); 1850 goto out; 1851 } 1852 memset(lunzerobits, 0, sizeof(lunzerobits)); 1853 1854 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals, 1855 logdev_list, &nlogicals)) 1856 goto out; 1857 1858 /* We might see up to the maximum number of logical and physical disks 1859 * plus external target devices, and a device for the local RAID 1860 * controller. 1861 */ 1862 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 1863 1864 /* Allocate the per device structures */ 1865 for (i = 0; i < ndevs_to_allocate; i++) { 1866 if (i >= HPSA_MAX_DEVICES) { 1867 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 1868 " %d devices ignored.\n", HPSA_MAX_DEVICES, 1869 ndevs_to_allocate - HPSA_MAX_DEVICES); 1870 break; 1871 } 1872 1873 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 1874 if (!currentsd[i]) { 1875 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 1876 __FILE__, __LINE__); 1877 goto out; 1878 } 1879 ndev_allocated++; 1880 } 1881 1882 if (unlikely(is_scsi_rev_5(h))) 1883 raid_ctlr_position = 0; 1884 else 1885 raid_ctlr_position = nphysicals + nlogicals; 1886 1887 /* adjust our table of devices */ 1888 n_ext_target_devs = 0; 1889 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 1890 u8 *lunaddrbytes, is_OBDR = 0; 1891 1892 /* Figure out where the LUN ID info is coming from */ 1893 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 1894 i, nphysicals, nlogicals, physdev_list, logdev_list); 1895 /* skip masked physical devices. */ 1896 if (lunaddrbytes[3] & 0xC0 && 1897 i < nphysicals + (raid_ctlr_position == 0)) 1898 continue; 1899 1900 /* Get device type, vendor, model, device id */ 1901 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 1902 &is_OBDR)) 1903 continue; /* skip it if we can't talk to it. */ 1904 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 1905 this_device = currentsd[ncurrent]; 1906 1907 /* 1908 * For external target devices, we have to insert a LUN 0 which 1909 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there 1910 * is nonetheless an enclosure device there. We have to 1911 * present that otherwise linux won't find anything if 1912 * there is no lun 0. 1913 */ 1914 if (add_ext_target_dev(h, tmpdevice, this_device, 1915 lunaddrbytes, lunzerobits, 1916 &n_ext_target_devs)) { 1917 ncurrent++; 1918 this_device = currentsd[ncurrent]; 1919 } 1920 1921 *this_device = *tmpdevice; 1922 1923 switch (this_device->devtype) { 1924 case TYPE_ROM: 1925 /* We don't *really* support actual CD-ROM devices, 1926 * just "One Button Disaster Recovery" tape drive 1927 * which temporarily pretends to be a CD-ROM drive. 1928 * So we check that the device is really an OBDR tape 1929 * device by checking for "$DR-10" in bytes 43-48 of 1930 * the inquiry data. 1931 */ 1932 if (is_OBDR) 1933 ncurrent++; 1934 break; 1935 case TYPE_DISK: 1936 if (i < nphysicals) 1937 break; 1938 ncurrent++; 1939 break; 1940 case TYPE_TAPE: 1941 case TYPE_MEDIUM_CHANGER: 1942 ncurrent++; 1943 break; 1944 case TYPE_RAID: 1945 /* Only present the Smartarray HBA as a RAID controller. 1946 * If it's a RAID controller other than the HBA itself 1947 * (an external RAID controller, MSA500 or similar) 1948 * don't present it. 1949 */ 1950 if (!is_hba_lunid(lunaddrbytes)) 1951 break; 1952 ncurrent++; 1953 break; 1954 default: 1955 break; 1956 } 1957 if (ncurrent >= HPSA_MAX_DEVICES) 1958 break; 1959 } 1960 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); 1961 out: 1962 kfree(tmpdevice); 1963 for (i = 0; i < ndev_allocated; i++) 1964 kfree(currentsd[i]); 1965 kfree(currentsd); 1966 kfree(physdev_list); 1967 kfree(logdev_list); 1968 } 1969 1970 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 1971 * dma mapping and fills in the scatter gather entries of the 1972 * hpsa command, cp. 1973 */ 1974 static int hpsa_scatter_gather(struct ctlr_info *h, 1975 struct CommandList *cp, 1976 struct scsi_cmnd *cmd) 1977 { 1978 unsigned int len; 1979 struct scatterlist *sg; 1980 u64 addr64; 1981 int use_sg, i, sg_index, chained; 1982 struct SGDescriptor *curr_sg; 1983 1984 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 1985 1986 use_sg = scsi_dma_map(cmd); 1987 if (use_sg < 0) 1988 return use_sg; 1989 1990 if (!use_sg) 1991 goto sglist_finished; 1992 1993 curr_sg = cp->SG; 1994 chained = 0; 1995 sg_index = 0; 1996 scsi_for_each_sg(cmd, sg, use_sg, i) { 1997 if (i == h->max_cmd_sg_entries - 1 && 1998 use_sg > h->max_cmd_sg_entries) { 1999 chained = 1; 2000 curr_sg = h->cmd_sg_list[cp->cmdindex]; 2001 sg_index = 0; 2002 } 2003 addr64 = (u64) sg_dma_address(sg); 2004 len = sg_dma_len(sg); 2005 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL); 2006 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL); 2007 curr_sg->Len = len; 2008 curr_sg->Ext = 0; /* we are not chaining */ 2009 curr_sg++; 2010 } 2011 2012 if (use_sg + chained > h->maxSG) 2013 h->maxSG = use_sg + chained; 2014 2015 if (chained) { 2016 cp->Header.SGList = h->max_cmd_sg_entries; 2017 cp->Header.SGTotal = (u16) (use_sg + 1); 2018 hpsa_map_sg_chain_block(h, cp); 2019 return 0; 2020 } 2021 2022 sglist_finished: 2023 2024 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 2025 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */ 2026 return 0; 2027 } 2028 2029 2030 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd, 2031 void (*done)(struct scsi_cmnd *)) 2032 { 2033 struct ctlr_info *h; 2034 struct hpsa_scsi_dev_t *dev; 2035 unsigned char scsi3addr[8]; 2036 struct CommandList *c; 2037 unsigned long flags; 2038 2039 /* Get the ptr to our adapter structure out of cmd->host. */ 2040 h = sdev_to_hba(cmd->device); 2041 dev = cmd->device->hostdata; 2042 if (!dev) { 2043 cmd->result = DID_NO_CONNECT << 16; 2044 done(cmd); 2045 return 0; 2046 } 2047 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 2048 2049 spin_lock_irqsave(&h->lock, flags); 2050 if (unlikely(h->lockup_detected)) { 2051 spin_unlock_irqrestore(&h->lock, flags); 2052 cmd->result = DID_ERROR << 16; 2053 done(cmd); 2054 return 0; 2055 } 2056 /* Need a lock as this is being allocated from the pool */ 2057 c = cmd_alloc(h); 2058 spin_unlock_irqrestore(&h->lock, flags); 2059 if (c == NULL) { /* trouble... */ 2060 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); 2061 return SCSI_MLQUEUE_HOST_BUSY; 2062 } 2063 2064 /* Fill in the command list header */ 2065 2066 cmd->scsi_done = done; /* save this for use by completion code */ 2067 2068 /* save c in case we have to abort it */ 2069 cmd->host_scribble = (unsigned char *) c; 2070 2071 c->cmd_type = CMD_SCSI; 2072 c->scsi_cmd = cmd; 2073 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2074 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 2075 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT); 2076 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT; 2077 2078 /* Fill in the request block... */ 2079 2080 c->Request.Timeout = 0; 2081 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 2082 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 2083 c->Request.CDBLen = cmd->cmd_len; 2084 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 2085 c->Request.Type.Type = TYPE_CMD; 2086 c->Request.Type.Attribute = ATTR_SIMPLE; 2087 switch (cmd->sc_data_direction) { 2088 case DMA_TO_DEVICE: 2089 c->Request.Type.Direction = XFER_WRITE; 2090 break; 2091 case DMA_FROM_DEVICE: 2092 c->Request.Type.Direction = XFER_READ; 2093 break; 2094 case DMA_NONE: 2095 c->Request.Type.Direction = XFER_NONE; 2096 break; 2097 case DMA_BIDIRECTIONAL: 2098 /* This can happen if a buggy application does a scsi passthru 2099 * and sets both inlen and outlen to non-zero. ( see 2100 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 2101 */ 2102 2103 c->Request.Type.Direction = XFER_RSVD; 2104 /* This is technically wrong, and hpsa controllers should 2105 * reject it with CMD_INVALID, which is the most correct 2106 * response, but non-fibre backends appear to let it 2107 * slide by, and give the same results as if this field 2108 * were set correctly. Either way is acceptable for 2109 * our purposes here. 2110 */ 2111 2112 break; 2113 2114 default: 2115 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 2116 cmd->sc_data_direction); 2117 BUG(); 2118 break; 2119 } 2120 2121 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 2122 cmd_free(h, c); 2123 return SCSI_MLQUEUE_HOST_BUSY; 2124 } 2125 enqueue_cmd_and_start_io(h, c); 2126 /* the cmd'll come back via intr handler in complete_scsi_command() */ 2127 return 0; 2128 } 2129 2130 static DEF_SCSI_QCMD(hpsa_scsi_queue_command) 2131 2132 static void hpsa_scan_start(struct Scsi_Host *sh) 2133 { 2134 struct ctlr_info *h = shost_to_hba(sh); 2135 unsigned long flags; 2136 2137 /* wait until any scan already in progress is finished. */ 2138 while (1) { 2139 spin_lock_irqsave(&h->scan_lock, flags); 2140 if (h->scan_finished) 2141 break; 2142 spin_unlock_irqrestore(&h->scan_lock, flags); 2143 wait_event(h->scan_wait_queue, h->scan_finished); 2144 /* Note: We don't need to worry about a race between this 2145 * thread and driver unload because the midlayer will 2146 * have incremented the reference count, so unload won't 2147 * happen if we're in here. 2148 */ 2149 } 2150 h->scan_finished = 0; /* mark scan as in progress */ 2151 spin_unlock_irqrestore(&h->scan_lock, flags); 2152 2153 hpsa_update_scsi_devices(h, h->scsi_host->host_no); 2154 2155 spin_lock_irqsave(&h->scan_lock, flags); 2156 h->scan_finished = 1; /* mark scan as finished. */ 2157 wake_up_all(&h->scan_wait_queue); 2158 spin_unlock_irqrestore(&h->scan_lock, flags); 2159 } 2160 2161 static int hpsa_scan_finished(struct Scsi_Host *sh, 2162 unsigned long elapsed_time) 2163 { 2164 struct ctlr_info *h = shost_to_hba(sh); 2165 unsigned long flags; 2166 int finished; 2167 2168 spin_lock_irqsave(&h->scan_lock, flags); 2169 finished = h->scan_finished; 2170 spin_unlock_irqrestore(&h->scan_lock, flags); 2171 return finished; 2172 } 2173 2174 static int hpsa_change_queue_depth(struct scsi_device *sdev, 2175 int qdepth, int reason) 2176 { 2177 struct ctlr_info *h = sdev_to_hba(sdev); 2178 2179 if (reason != SCSI_QDEPTH_DEFAULT) 2180 return -ENOTSUPP; 2181 2182 if (qdepth < 1) 2183 qdepth = 1; 2184 else 2185 if (qdepth > h->nr_cmds) 2186 qdepth = h->nr_cmds; 2187 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); 2188 return sdev->queue_depth; 2189 } 2190 2191 static void hpsa_unregister_scsi(struct ctlr_info *h) 2192 { 2193 /* we are being forcibly unloaded, and may not refuse. */ 2194 scsi_remove_host(h->scsi_host); 2195 scsi_host_put(h->scsi_host); 2196 h->scsi_host = NULL; 2197 } 2198 2199 static int hpsa_register_scsi(struct ctlr_info *h) 2200 { 2201 struct Scsi_Host *sh; 2202 int error; 2203 2204 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 2205 if (sh == NULL) 2206 goto fail; 2207 2208 sh->io_port = 0; 2209 sh->n_io_port = 0; 2210 sh->this_id = -1; 2211 sh->max_channel = 3; 2212 sh->max_cmd_len = MAX_COMMAND_SIZE; 2213 sh->max_lun = HPSA_MAX_LUN; 2214 sh->max_id = HPSA_MAX_LUN; 2215 sh->can_queue = h->nr_cmds; 2216 sh->cmd_per_lun = h->nr_cmds; 2217 sh->sg_tablesize = h->maxsgentries; 2218 h->scsi_host = sh; 2219 sh->hostdata[0] = (unsigned long) h; 2220 sh->irq = h->intr[h->intr_mode]; 2221 sh->unique_id = sh->irq; 2222 error = scsi_add_host(sh, &h->pdev->dev); 2223 if (error) 2224 goto fail_host_put; 2225 scsi_scan_host(sh); 2226 return 0; 2227 2228 fail_host_put: 2229 dev_err(&h->pdev->dev, "%s: scsi_add_host" 2230 " failed for controller %d\n", __func__, h->ctlr); 2231 scsi_host_put(sh); 2232 return error; 2233 fail: 2234 dev_err(&h->pdev->dev, "%s: scsi_host_alloc" 2235 " failed for controller %d\n", __func__, h->ctlr); 2236 return -ENOMEM; 2237 } 2238 2239 static int wait_for_device_to_become_ready(struct ctlr_info *h, 2240 unsigned char lunaddr[]) 2241 { 2242 int rc = 0; 2243 int count = 0; 2244 int waittime = 1; /* seconds */ 2245 struct CommandList *c; 2246 2247 c = cmd_special_alloc(h); 2248 if (!c) { 2249 dev_warn(&h->pdev->dev, "out of memory in " 2250 "wait_for_device_to_become_ready.\n"); 2251 return IO_ERROR; 2252 } 2253 2254 /* Send test unit ready until device ready, or give up. */ 2255 while (count < HPSA_TUR_RETRY_LIMIT) { 2256 2257 /* Wait for a bit. do this first, because if we send 2258 * the TUR right away, the reset will just abort it. 2259 */ 2260 msleep(1000 * waittime); 2261 count++; 2262 2263 /* Increase wait time with each try, up to a point. */ 2264 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 2265 waittime = waittime * 2; 2266 2267 /* Send the Test Unit Ready */ 2268 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD); 2269 hpsa_scsi_do_simple_cmd_core(h, c); 2270 /* no unmap needed here because no data xfer. */ 2271 2272 if (c->err_info->CommandStatus == CMD_SUCCESS) 2273 break; 2274 2275 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2276 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 2277 (c->err_info->SenseInfo[2] == NO_SENSE || 2278 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 2279 break; 2280 2281 dev_warn(&h->pdev->dev, "waiting %d secs " 2282 "for device to become ready.\n", waittime); 2283 rc = 1; /* device not ready. */ 2284 } 2285 2286 if (rc) 2287 dev_warn(&h->pdev->dev, "giving up on device.\n"); 2288 else 2289 dev_warn(&h->pdev->dev, "device is ready.\n"); 2290 2291 cmd_special_free(h, c); 2292 return rc; 2293 } 2294 2295 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 2296 * complaining. Doing a host- or bus-reset can't do anything good here. 2297 */ 2298 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 2299 { 2300 int rc; 2301 struct ctlr_info *h; 2302 struct hpsa_scsi_dev_t *dev; 2303 2304 /* find the controller to which the command to be aborted was sent */ 2305 h = sdev_to_hba(scsicmd->device); 2306 if (h == NULL) /* paranoia */ 2307 return FAILED; 2308 dev = scsicmd->device->hostdata; 2309 if (!dev) { 2310 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " 2311 "device lookup failed.\n"); 2312 return FAILED; 2313 } 2314 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n", 2315 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2316 /* send a reset to the SCSI LUN which the command was sent to */ 2317 rc = hpsa_send_reset(h, dev->scsi3addr); 2318 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) 2319 return SUCCESS; 2320 2321 dev_warn(&h->pdev->dev, "resetting device failed.\n"); 2322 return FAILED; 2323 } 2324 2325 /* 2326 * For operations that cannot sleep, a command block is allocated at init, 2327 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 2328 * which ones are free or in use. Lock must be held when calling this. 2329 * cmd_free() is the complement. 2330 */ 2331 static struct CommandList *cmd_alloc(struct ctlr_info *h) 2332 { 2333 struct CommandList *c; 2334 int i; 2335 union u64bit temp64; 2336 dma_addr_t cmd_dma_handle, err_dma_handle; 2337 2338 do { 2339 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 2340 if (i == h->nr_cmds) 2341 return NULL; 2342 } while (test_and_set_bit 2343 (i & (BITS_PER_LONG - 1), 2344 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); 2345 c = h->cmd_pool + i; 2346 memset(c, 0, sizeof(*c)); 2347 cmd_dma_handle = h->cmd_pool_dhandle 2348 + i * sizeof(*c); 2349 c->err_info = h->errinfo_pool + i; 2350 memset(c->err_info, 0, sizeof(*c->err_info)); 2351 err_dma_handle = h->errinfo_pool_dhandle 2352 + i * sizeof(*c->err_info); 2353 h->nr_allocs++; 2354 2355 c->cmdindex = i; 2356 2357 INIT_LIST_HEAD(&c->list); 2358 c->busaddr = (u32) cmd_dma_handle; 2359 temp64.val = (u64) err_dma_handle; 2360 c->ErrDesc.Addr.lower = temp64.val32.lower; 2361 c->ErrDesc.Addr.upper = temp64.val32.upper; 2362 c->ErrDesc.Len = sizeof(*c->err_info); 2363 2364 c->h = h; 2365 return c; 2366 } 2367 2368 /* For operations that can wait for kmalloc to possibly sleep, 2369 * this routine can be called. Lock need not be held to call 2370 * cmd_special_alloc. cmd_special_free() is the complement. 2371 */ 2372 static struct CommandList *cmd_special_alloc(struct ctlr_info *h) 2373 { 2374 struct CommandList *c; 2375 union u64bit temp64; 2376 dma_addr_t cmd_dma_handle, err_dma_handle; 2377 2378 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); 2379 if (c == NULL) 2380 return NULL; 2381 memset(c, 0, sizeof(*c)); 2382 2383 c->cmdindex = -1; 2384 2385 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info), 2386 &err_dma_handle); 2387 2388 if (c->err_info == NULL) { 2389 pci_free_consistent(h->pdev, 2390 sizeof(*c), c, cmd_dma_handle); 2391 return NULL; 2392 } 2393 memset(c->err_info, 0, sizeof(*c->err_info)); 2394 2395 INIT_LIST_HEAD(&c->list); 2396 c->busaddr = (u32) cmd_dma_handle; 2397 temp64.val = (u64) err_dma_handle; 2398 c->ErrDesc.Addr.lower = temp64.val32.lower; 2399 c->ErrDesc.Addr.upper = temp64.val32.upper; 2400 c->ErrDesc.Len = sizeof(*c->err_info); 2401 2402 c->h = h; 2403 return c; 2404 } 2405 2406 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 2407 { 2408 int i; 2409 2410 i = c - h->cmd_pool; 2411 clear_bit(i & (BITS_PER_LONG - 1), 2412 h->cmd_pool_bits + (i / BITS_PER_LONG)); 2413 h->nr_frees++; 2414 } 2415 2416 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) 2417 { 2418 union u64bit temp64; 2419 2420 temp64.val32.lower = c->ErrDesc.Addr.lower; 2421 temp64.val32.upper = c->ErrDesc.Addr.upper; 2422 pci_free_consistent(h->pdev, sizeof(*c->err_info), 2423 c->err_info, (dma_addr_t) temp64.val); 2424 pci_free_consistent(h->pdev, sizeof(*c), 2425 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK)); 2426 } 2427 2428 #ifdef CONFIG_COMPAT 2429 2430 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) 2431 { 2432 IOCTL32_Command_struct __user *arg32 = 2433 (IOCTL32_Command_struct __user *) arg; 2434 IOCTL_Command_struct arg64; 2435 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 2436 int err; 2437 u32 cp; 2438 2439 memset(&arg64, 0, sizeof(arg64)); 2440 err = 0; 2441 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2442 sizeof(arg64.LUN_info)); 2443 err |= copy_from_user(&arg64.Request, &arg32->Request, 2444 sizeof(arg64.Request)); 2445 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2446 sizeof(arg64.error_info)); 2447 err |= get_user(arg64.buf_size, &arg32->buf_size); 2448 err |= get_user(cp, &arg32->buf); 2449 arg64.buf = compat_ptr(cp); 2450 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2451 2452 if (err) 2453 return -EFAULT; 2454 2455 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p); 2456 if (err) 2457 return err; 2458 err |= copy_in_user(&arg32->error_info, &p->error_info, 2459 sizeof(arg32->error_info)); 2460 if (err) 2461 return -EFAULT; 2462 return err; 2463 } 2464 2465 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 2466 int cmd, void *arg) 2467 { 2468 BIG_IOCTL32_Command_struct __user *arg32 = 2469 (BIG_IOCTL32_Command_struct __user *) arg; 2470 BIG_IOCTL_Command_struct arg64; 2471 BIG_IOCTL_Command_struct __user *p = 2472 compat_alloc_user_space(sizeof(arg64)); 2473 int err; 2474 u32 cp; 2475 2476 memset(&arg64, 0, sizeof(arg64)); 2477 err = 0; 2478 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2479 sizeof(arg64.LUN_info)); 2480 err |= copy_from_user(&arg64.Request, &arg32->Request, 2481 sizeof(arg64.Request)); 2482 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2483 sizeof(arg64.error_info)); 2484 err |= get_user(arg64.buf_size, &arg32->buf_size); 2485 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 2486 err |= get_user(cp, &arg32->buf); 2487 arg64.buf = compat_ptr(cp); 2488 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2489 2490 if (err) 2491 return -EFAULT; 2492 2493 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); 2494 if (err) 2495 return err; 2496 err |= copy_in_user(&arg32->error_info, &p->error_info, 2497 sizeof(arg32->error_info)); 2498 if (err) 2499 return -EFAULT; 2500 return err; 2501 } 2502 2503 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg) 2504 { 2505 switch (cmd) { 2506 case CCISS_GETPCIINFO: 2507 case CCISS_GETINTINFO: 2508 case CCISS_SETINTINFO: 2509 case CCISS_GETNODENAME: 2510 case CCISS_SETNODENAME: 2511 case CCISS_GETHEARTBEAT: 2512 case CCISS_GETBUSTYPES: 2513 case CCISS_GETFIRMVER: 2514 case CCISS_GETDRIVVER: 2515 case CCISS_REVALIDVOLS: 2516 case CCISS_DEREGDISK: 2517 case CCISS_REGNEWDISK: 2518 case CCISS_REGNEWD: 2519 case CCISS_RESCANDISK: 2520 case CCISS_GETLUNINFO: 2521 return hpsa_ioctl(dev, cmd, arg); 2522 2523 case CCISS_PASSTHRU32: 2524 return hpsa_ioctl32_passthru(dev, cmd, arg); 2525 case CCISS_BIG_PASSTHRU32: 2526 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 2527 2528 default: 2529 return -ENOIOCTLCMD; 2530 } 2531 } 2532 #endif 2533 2534 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 2535 { 2536 struct hpsa_pci_info pciinfo; 2537 2538 if (!argp) 2539 return -EINVAL; 2540 pciinfo.domain = pci_domain_nr(h->pdev->bus); 2541 pciinfo.bus = h->pdev->bus->number; 2542 pciinfo.dev_fn = h->pdev->devfn; 2543 pciinfo.board_id = h->board_id; 2544 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 2545 return -EFAULT; 2546 return 0; 2547 } 2548 2549 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 2550 { 2551 DriverVer_type DriverVer; 2552 unsigned char vmaj, vmin, vsubmin; 2553 int rc; 2554 2555 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 2556 &vmaj, &vmin, &vsubmin); 2557 if (rc != 3) { 2558 dev_info(&h->pdev->dev, "driver version string '%s' " 2559 "unrecognized.", HPSA_DRIVER_VERSION); 2560 vmaj = 0; 2561 vmin = 0; 2562 vsubmin = 0; 2563 } 2564 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 2565 if (!argp) 2566 return -EINVAL; 2567 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 2568 return -EFAULT; 2569 return 0; 2570 } 2571 2572 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2573 { 2574 IOCTL_Command_struct iocommand; 2575 struct CommandList *c; 2576 char *buff = NULL; 2577 union u64bit temp64; 2578 2579 if (!argp) 2580 return -EINVAL; 2581 if (!capable(CAP_SYS_RAWIO)) 2582 return -EPERM; 2583 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 2584 return -EFAULT; 2585 if ((iocommand.buf_size < 1) && 2586 (iocommand.Request.Type.Direction != XFER_NONE)) { 2587 return -EINVAL; 2588 } 2589 if (iocommand.buf_size > 0) { 2590 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 2591 if (buff == NULL) 2592 return -EFAULT; 2593 if (iocommand.Request.Type.Direction == XFER_WRITE) { 2594 /* Copy the data into the buffer we created */ 2595 if (copy_from_user(buff, iocommand.buf, 2596 iocommand.buf_size)) { 2597 kfree(buff); 2598 return -EFAULT; 2599 } 2600 } else { 2601 memset(buff, 0, iocommand.buf_size); 2602 } 2603 } 2604 c = cmd_special_alloc(h); 2605 if (c == NULL) { 2606 kfree(buff); 2607 return -ENOMEM; 2608 } 2609 /* Fill in the command type */ 2610 c->cmd_type = CMD_IOCTL_PEND; 2611 /* Fill in Command Header */ 2612 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2613 if (iocommand.buf_size > 0) { /* buffer to fill */ 2614 c->Header.SGList = 1; 2615 c->Header.SGTotal = 1; 2616 } else { /* no buffers to fill */ 2617 c->Header.SGList = 0; 2618 c->Header.SGTotal = 0; 2619 } 2620 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 2621 /* use the kernel address the cmd block for tag */ 2622 c->Header.Tag.lower = c->busaddr; 2623 2624 /* Fill in Request block */ 2625 memcpy(&c->Request, &iocommand.Request, 2626 sizeof(c->Request)); 2627 2628 /* Fill in the scatter gather information */ 2629 if (iocommand.buf_size > 0) { 2630 temp64.val = pci_map_single(h->pdev, buff, 2631 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 2632 c->SG[0].Addr.lower = temp64.val32.lower; 2633 c->SG[0].Addr.upper = temp64.val32.upper; 2634 c->SG[0].Len = iocommand.buf_size; 2635 c->SG[0].Ext = 0; /* we are not chaining*/ 2636 } 2637 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 2638 if (iocommand.buf_size > 0) 2639 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 2640 check_ioctl_unit_attention(h, c); 2641 2642 /* Copy the error information out */ 2643 memcpy(&iocommand.error_info, c->err_info, 2644 sizeof(iocommand.error_info)); 2645 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 2646 kfree(buff); 2647 cmd_special_free(h, c); 2648 return -EFAULT; 2649 } 2650 if (iocommand.Request.Type.Direction == XFER_READ && 2651 iocommand.buf_size > 0) { 2652 /* Copy the data out of the buffer we created */ 2653 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 2654 kfree(buff); 2655 cmd_special_free(h, c); 2656 return -EFAULT; 2657 } 2658 } 2659 kfree(buff); 2660 cmd_special_free(h, c); 2661 return 0; 2662 } 2663 2664 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2665 { 2666 BIG_IOCTL_Command_struct *ioc; 2667 struct CommandList *c; 2668 unsigned char **buff = NULL; 2669 int *buff_size = NULL; 2670 union u64bit temp64; 2671 BYTE sg_used = 0; 2672 int status = 0; 2673 int i; 2674 u32 left; 2675 u32 sz; 2676 BYTE __user *data_ptr; 2677 2678 if (!argp) 2679 return -EINVAL; 2680 if (!capable(CAP_SYS_RAWIO)) 2681 return -EPERM; 2682 ioc = (BIG_IOCTL_Command_struct *) 2683 kmalloc(sizeof(*ioc), GFP_KERNEL); 2684 if (!ioc) { 2685 status = -ENOMEM; 2686 goto cleanup1; 2687 } 2688 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 2689 status = -EFAULT; 2690 goto cleanup1; 2691 } 2692 if ((ioc->buf_size < 1) && 2693 (ioc->Request.Type.Direction != XFER_NONE)) { 2694 status = -EINVAL; 2695 goto cleanup1; 2696 } 2697 /* Check kmalloc limits using all SGs */ 2698 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 2699 status = -EINVAL; 2700 goto cleanup1; 2701 } 2702 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 2703 status = -EINVAL; 2704 goto cleanup1; 2705 } 2706 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 2707 if (!buff) { 2708 status = -ENOMEM; 2709 goto cleanup1; 2710 } 2711 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 2712 if (!buff_size) { 2713 status = -ENOMEM; 2714 goto cleanup1; 2715 } 2716 left = ioc->buf_size; 2717 data_ptr = ioc->buf; 2718 while (left) { 2719 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 2720 buff_size[sg_used] = sz; 2721 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 2722 if (buff[sg_used] == NULL) { 2723 status = -ENOMEM; 2724 goto cleanup1; 2725 } 2726 if (ioc->Request.Type.Direction == XFER_WRITE) { 2727 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 2728 status = -ENOMEM; 2729 goto cleanup1; 2730 } 2731 } else 2732 memset(buff[sg_used], 0, sz); 2733 left -= sz; 2734 data_ptr += sz; 2735 sg_used++; 2736 } 2737 c = cmd_special_alloc(h); 2738 if (c == NULL) { 2739 status = -ENOMEM; 2740 goto cleanup1; 2741 } 2742 c->cmd_type = CMD_IOCTL_PEND; 2743 c->Header.ReplyQueue = 0; 2744 c->Header.SGList = c->Header.SGTotal = sg_used; 2745 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 2746 c->Header.Tag.lower = c->busaddr; 2747 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 2748 if (ioc->buf_size > 0) { 2749 int i; 2750 for (i = 0; i < sg_used; i++) { 2751 temp64.val = pci_map_single(h->pdev, buff[i], 2752 buff_size[i], PCI_DMA_BIDIRECTIONAL); 2753 c->SG[i].Addr.lower = temp64.val32.lower; 2754 c->SG[i].Addr.upper = temp64.val32.upper; 2755 c->SG[i].Len = buff_size[i]; 2756 /* we are not chaining */ 2757 c->SG[i].Ext = 0; 2758 } 2759 } 2760 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 2761 if (sg_used) 2762 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 2763 check_ioctl_unit_attention(h, c); 2764 /* Copy the error information out */ 2765 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 2766 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 2767 cmd_special_free(h, c); 2768 status = -EFAULT; 2769 goto cleanup1; 2770 } 2771 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { 2772 /* Copy the data out of the buffer we created */ 2773 BYTE __user *ptr = ioc->buf; 2774 for (i = 0; i < sg_used; i++) { 2775 if (copy_to_user(ptr, buff[i], buff_size[i])) { 2776 cmd_special_free(h, c); 2777 status = -EFAULT; 2778 goto cleanup1; 2779 } 2780 ptr += buff_size[i]; 2781 } 2782 } 2783 cmd_special_free(h, c); 2784 status = 0; 2785 cleanup1: 2786 if (buff) { 2787 for (i = 0; i < sg_used; i++) 2788 kfree(buff[i]); 2789 kfree(buff); 2790 } 2791 kfree(buff_size); 2792 kfree(ioc); 2793 return status; 2794 } 2795 2796 static void check_ioctl_unit_attention(struct ctlr_info *h, 2797 struct CommandList *c) 2798 { 2799 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2800 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 2801 (void) check_for_unit_attention(h, c); 2802 } 2803 /* 2804 * ioctl 2805 */ 2806 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) 2807 { 2808 struct ctlr_info *h; 2809 void __user *argp = (void __user *)arg; 2810 2811 h = sdev_to_hba(dev); 2812 2813 switch (cmd) { 2814 case CCISS_DEREGDISK: 2815 case CCISS_REGNEWDISK: 2816 case CCISS_REGNEWD: 2817 hpsa_scan_start(h->scsi_host); 2818 return 0; 2819 case CCISS_GETPCIINFO: 2820 return hpsa_getpciinfo_ioctl(h, argp); 2821 case CCISS_GETDRIVVER: 2822 return hpsa_getdrivver_ioctl(h, argp); 2823 case CCISS_PASSTHRU: 2824 return hpsa_passthru_ioctl(h, argp); 2825 case CCISS_BIG_PASSTHRU: 2826 return hpsa_big_passthru_ioctl(h, argp); 2827 default: 2828 return -ENOTTY; 2829 } 2830 } 2831 2832 static int __devinit hpsa_send_host_reset(struct ctlr_info *h, 2833 unsigned char *scsi3addr, u8 reset_type) 2834 { 2835 struct CommandList *c; 2836 2837 c = cmd_alloc(h); 2838 if (!c) 2839 return -ENOMEM; 2840 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 2841 RAID_CTLR_LUNID, TYPE_MSG); 2842 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 2843 c->waiting = NULL; 2844 enqueue_cmd_and_start_io(h, c); 2845 /* Don't wait for completion, the reset won't complete. Don't free 2846 * the command either. This is the last command we will send before 2847 * re-initializing everything, so it doesn't matter and won't leak. 2848 */ 2849 return 0; 2850 } 2851 2852 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 2853 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 2854 int cmd_type) 2855 { 2856 int pci_dir = XFER_NONE; 2857 2858 c->cmd_type = CMD_IOCTL_PEND; 2859 c->Header.ReplyQueue = 0; 2860 if (buff != NULL && size > 0) { 2861 c->Header.SGList = 1; 2862 c->Header.SGTotal = 1; 2863 } else { 2864 c->Header.SGList = 0; 2865 c->Header.SGTotal = 0; 2866 } 2867 c->Header.Tag.lower = c->busaddr; 2868 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 2869 2870 c->Request.Type.Type = cmd_type; 2871 if (cmd_type == TYPE_CMD) { 2872 switch (cmd) { 2873 case HPSA_INQUIRY: 2874 /* are we trying to read a vital product page */ 2875 if (page_code != 0) { 2876 c->Request.CDB[1] = 0x01; 2877 c->Request.CDB[2] = page_code; 2878 } 2879 c->Request.CDBLen = 6; 2880 c->Request.Type.Attribute = ATTR_SIMPLE; 2881 c->Request.Type.Direction = XFER_READ; 2882 c->Request.Timeout = 0; 2883 c->Request.CDB[0] = HPSA_INQUIRY; 2884 c->Request.CDB[4] = size & 0xFF; 2885 break; 2886 case HPSA_REPORT_LOG: 2887 case HPSA_REPORT_PHYS: 2888 /* Talking to controller so It's a physical command 2889 mode = 00 target = 0. Nothing to write. 2890 */ 2891 c->Request.CDBLen = 12; 2892 c->Request.Type.Attribute = ATTR_SIMPLE; 2893 c->Request.Type.Direction = XFER_READ; 2894 c->Request.Timeout = 0; 2895 c->Request.CDB[0] = cmd; 2896 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 2897 c->Request.CDB[7] = (size >> 16) & 0xFF; 2898 c->Request.CDB[8] = (size >> 8) & 0xFF; 2899 c->Request.CDB[9] = size & 0xFF; 2900 break; 2901 case HPSA_CACHE_FLUSH: 2902 c->Request.CDBLen = 12; 2903 c->Request.Type.Attribute = ATTR_SIMPLE; 2904 c->Request.Type.Direction = XFER_WRITE; 2905 c->Request.Timeout = 0; 2906 c->Request.CDB[0] = BMIC_WRITE; 2907 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 2908 c->Request.CDB[7] = (size >> 8) & 0xFF; 2909 c->Request.CDB[8] = size & 0xFF; 2910 break; 2911 case TEST_UNIT_READY: 2912 c->Request.CDBLen = 6; 2913 c->Request.Type.Attribute = ATTR_SIMPLE; 2914 c->Request.Type.Direction = XFER_NONE; 2915 c->Request.Timeout = 0; 2916 break; 2917 default: 2918 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 2919 BUG(); 2920 return; 2921 } 2922 } else if (cmd_type == TYPE_MSG) { 2923 switch (cmd) { 2924 2925 case HPSA_DEVICE_RESET_MSG: 2926 c->Request.CDBLen = 16; 2927 c->Request.Type.Type = 1; /* It is a MSG not a CMD */ 2928 c->Request.Type.Attribute = ATTR_SIMPLE; 2929 c->Request.Type.Direction = XFER_NONE; 2930 c->Request.Timeout = 0; /* Don't time out */ 2931 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 2932 c->Request.CDB[0] = cmd; 2933 c->Request.CDB[1] = 0x03; /* Reset target above */ 2934 /* If bytes 4-7 are zero, it means reset the */ 2935 /* LunID device */ 2936 c->Request.CDB[4] = 0x00; 2937 c->Request.CDB[5] = 0x00; 2938 c->Request.CDB[6] = 0x00; 2939 c->Request.CDB[7] = 0x00; 2940 break; 2941 2942 default: 2943 dev_warn(&h->pdev->dev, "unknown message type %d\n", 2944 cmd); 2945 BUG(); 2946 } 2947 } else { 2948 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 2949 BUG(); 2950 } 2951 2952 switch (c->Request.Type.Direction) { 2953 case XFER_READ: 2954 pci_dir = PCI_DMA_FROMDEVICE; 2955 break; 2956 case XFER_WRITE: 2957 pci_dir = PCI_DMA_TODEVICE; 2958 break; 2959 case XFER_NONE: 2960 pci_dir = PCI_DMA_NONE; 2961 break; 2962 default: 2963 pci_dir = PCI_DMA_BIDIRECTIONAL; 2964 } 2965 2966 hpsa_map_one(h->pdev, c, buff, size, pci_dir); 2967 2968 return; 2969 } 2970 2971 /* 2972 * Map (physical) PCI mem into (virtual) kernel space 2973 */ 2974 static void __iomem *remap_pci_mem(ulong base, ulong size) 2975 { 2976 ulong page_base = ((ulong) base) & PAGE_MASK; 2977 ulong page_offs = ((ulong) base) - page_base; 2978 void __iomem *page_remapped = ioremap(page_base, page_offs + size); 2979 2980 return page_remapped ? (page_remapped + page_offs) : NULL; 2981 } 2982 2983 /* Takes cmds off the submission queue and sends them to the hardware, 2984 * then puts them on the queue of cmds waiting for completion. 2985 */ 2986 static void start_io(struct ctlr_info *h) 2987 { 2988 struct CommandList *c; 2989 2990 while (!list_empty(&h->reqQ)) { 2991 c = list_entry(h->reqQ.next, struct CommandList, list); 2992 /* can't do anything if fifo is full */ 2993 if ((h->access.fifo_full(h))) { 2994 dev_warn(&h->pdev->dev, "fifo full\n"); 2995 break; 2996 } 2997 2998 /* Get the first entry from the Request Q */ 2999 removeQ(c); 3000 h->Qdepth--; 3001 3002 /* Tell the controller execute command */ 3003 h->access.submit_command(h, c); 3004 3005 /* Put job onto the completed Q */ 3006 addQ(&h->cmpQ, c); 3007 } 3008 } 3009 3010 static inline unsigned long get_next_completion(struct ctlr_info *h) 3011 { 3012 return h->access.command_completed(h); 3013 } 3014 3015 static inline bool interrupt_pending(struct ctlr_info *h) 3016 { 3017 return h->access.intr_pending(h); 3018 } 3019 3020 static inline long interrupt_not_for_us(struct ctlr_info *h) 3021 { 3022 return (h->access.intr_pending(h) == 0) || 3023 (h->interrupts_enabled == 0); 3024 } 3025 3026 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 3027 u32 raw_tag) 3028 { 3029 if (unlikely(tag_index >= h->nr_cmds)) { 3030 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 3031 return 1; 3032 } 3033 return 0; 3034 } 3035 3036 static inline void finish_cmd(struct CommandList *c, u32 raw_tag) 3037 { 3038 removeQ(c); 3039 if (likely(c->cmd_type == CMD_SCSI)) 3040 complete_scsi_command(c); 3041 else if (c->cmd_type == CMD_IOCTL_PEND) 3042 complete(c->waiting); 3043 } 3044 3045 static inline u32 hpsa_tag_contains_index(u32 tag) 3046 { 3047 return tag & DIRECT_LOOKUP_BIT; 3048 } 3049 3050 static inline u32 hpsa_tag_to_index(u32 tag) 3051 { 3052 return tag >> DIRECT_LOOKUP_SHIFT; 3053 } 3054 3055 3056 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag) 3057 { 3058 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 3059 #define HPSA_SIMPLE_ERROR_BITS 0x03 3060 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 3061 return tag & ~HPSA_SIMPLE_ERROR_BITS; 3062 return tag & ~HPSA_PERF_ERROR_BITS; 3063 } 3064 3065 /* process completion of an indexed ("direct lookup") command */ 3066 static inline u32 process_indexed_cmd(struct ctlr_info *h, 3067 u32 raw_tag) 3068 { 3069 u32 tag_index; 3070 struct CommandList *c; 3071 3072 tag_index = hpsa_tag_to_index(raw_tag); 3073 if (bad_tag(h, tag_index, raw_tag)) 3074 return next_command(h); 3075 c = h->cmd_pool + tag_index; 3076 finish_cmd(c, raw_tag); 3077 return next_command(h); 3078 } 3079 3080 /* process completion of a non-indexed command */ 3081 static inline u32 process_nonindexed_cmd(struct ctlr_info *h, 3082 u32 raw_tag) 3083 { 3084 u32 tag; 3085 struct CommandList *c = NULL; 3086 3087 tag = hpsa_tag_discard_error_bits(h, raw_tag); 3088 list_for_each_entry(c, &h->cmpQ, list) { 3089 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) { 3090 finish_cmd(c, raw_tag); 3091 return next_command(h); 3092 } 3093 } 3094 bad_tag(h, h->nr_cmds + 1, raw_tag); 3095 return next_command(h); 3096 } 3097 3098 /* Some controllers, like p400, will give us one interrupt 3099 * after a soft reset, even if we turned interrupts off. 3100 * Only need to check for this in the hpsa_xxx_discard_completions 3101 * functions. 3102 */ 3103 static int ignore_bogus_interrupt(struct ctlr_info *h) 3104 { 3105 if (likely(!reset_devices)) 3106 return 0; 3107 3108 if (likely(h->interrupts_enabled)) 3109 return 0; 3110 3111 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 3112 "(known firmware bug.) Ignoring.\n"); 3113 3114 return 1; 3115 } 3116 3117 static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id) 3118 { 3119 struct ctlr_info *h = dev_id; 3120 unsigned long flags; 3121 u32 raw_tag; 3122 3123 if (ignore_bogus_interrupt(h)) 3124 return IRQ_NONE; 3125 3126 if (interrupt_not_for_us(h)) 3127 return IRQ_NONE; 3128 spin_lock_irqsave(&h->lock, flags); 3129 h->last_intr_timestamp = get_jiffies_64(); 3130 while (interrupt_pending(h)) { 3131 raw_tag = get_next_completion(h); 3132 while (raw_tag != FIFO_EMPTY) 3133 raw_tag = next_command(h); 3134 } 3135 spin_unlock_irqrestore(&h->lock, flags); 3136 return IRQ_HANDLED; 3137 } 3138 3139 static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id) 3140 { 3141 struct ctlr_info *h = dev_id; 3142 unsigned long flags; 3143 u32 raw_tag; 3144 3145 if (ignore_bogus_interrupt(h)) 3146 return IRQ_NONE; 3147 3148 spin_lock_irqsave(&h->lock, flags); 3149 h->last_intr_timestamp = get_jiffies_64(); 3150 raw_tag = get_next_completion(h); 3151 while (raw_tag != FIFO_EMPTY) 3152 raw_tag = next_command(h); 3153 spin_unlock_irqrestore(&h->lock, flags); 3154 return IRQ_HANDLED; 3155 } 3156 3157 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id) 3158 { 3159 struct ctlr_info *h = dev_id; 3160 unsigned long flags; 3161 u32 raw_tag; 3162 3163 if (interrupt_not_for_us(h)) 3164 return IRQ_NONE; 3165 spin_lock_irqsave(&h->lock, flags); 3166 h->last_intr_timestamp = get_jiffies_64(); 3167 while (interrupt_pending(h)) { 3168 raw_tag = get_next_completion(h); 3169 while (raw_tag != FIFO_EMPTY) { 3170 if (hpsa_tag_contains_index(raw_tag)) 3171 raw_tag = process_indexed_cmd(h, raw_tag); 3172 else 3173 raw_tag = process_nonindexed_cmd(h, raw_tag); 3174 } 3175 } 3176 spin_unlock_irqrestore(&h->lock, flags); 3177 return IRQ_HANDLED; 3178 } 3179 3180 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id) 3181 { 3182 struct ctlr_info *h = dev_id; 3183 unsigned long flags; 3184 u32 raw_tag; 3185 3186 spin_lock_irqsave(&h->lock, flags); 3187 h->last_intr_timestamp = get_jiffies_64(); 3188 raw_tag = get_next_completion(h); 3189 while (raw_tag != FIFO_EMPTY) { 3190 if (hpsa_tag_contains_index(raw_tag)) 3191 raw_tag = process_indexed_cmd(h, raw_tag); 3192 else 3193 raw_tag = process_nonindexed_cmd(h, raw_tag); 3194 } 3195 spin_unlock_irqrestore(&h->lock, flags); 3196 return IRQ_HANDLED; 3197 } 3198 3199 /* Send a message CDB to the firmware. Careful, this only works 3200 * in simple mode, not performant mode due to the tag lookup. 3201 * We only ever use this immediately after a controller reset. 3202 */ 3203 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 3204 unsigned char type) 3205 { 3206 struct Command { 3207 struct CommandListHeader CommandHeader; 3208 struct RequestBlock Request; 3209 struct ErrDescriptor ErrorDescriptor; 3210 }; 3211 struct Command *cmd; 3212 static const size_t cmd_sz = sizeof(*cmd) + 3213 sizeof(cmd->ErrorDescriptor); 3214 dma_addr_t paddr64; 3215 uint32_t paddr32, tag; 3216 void __iomem *vaddr; 3217 int i, err; 3218 3219 vaddr = pci_ioremap_bar(pdev, 0); 3220 if (vaddr == NULL) 3221 return -ENOMEM; 3222 3223 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 3224 * CCISS commands, so they must be allocated from the lower 4GiB of 3225 * memory. 3226 */ 3227 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3228 if (err) { 3229 iounmap(vaddr); 3230 return -ENOMEM; 3231 } 3232 3233 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 3234 if (cmd == NULL) { 3235 iounmap(vaddr); 3236 return -ENOMEM; 3237 } 3238 3239 /* This must fit, because of the 32-bit consistent DMA mask. Also, 3240 * although there's no guarantee, we assume that the address is at 3241 * least 4-byte aligned (most likely, it's page-aligned). 3242 */ 3243 paddr32 = paddr64; 3244 3245 cmd->CommandHeader.ReplyQueue = 0; 3246 cmd->CommandHeader.SGList = 0; 3247 cmd->CommandHeader.SGTotal = 0; 3248 cmd->CommandHeader.Tag.lower = paddr32; 3249 cmd->CommandHeader.Tag.upper = 0; 3250 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 3251 3252 cmd->Request.CDBLen = 16; 3253 cmd->Request.Type.Type = TYPE_MSG; 3254 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; 3255 cmd->Request.Type.Direction = XFER_NONE; 3256 cmd->Request.Timeout = 0; /* Don't time out */ 3257 cmd->Request.CDB[0] = opcode; 3258 cmd->Request.CDB[1] = type; 3259 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 3260 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd); 3261 cmd->ErrorDescriptor.Addr.upper = 0; 3262 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo); 3263 3264 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 3265 3266 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 3267 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 3268 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32) 3269 break; 3270 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 3271 } 3272 3273 iounmap(vaddr); 3274 3275 /* we leak the DMA buffer here ... no choice since the controller could 3276 * still complete the command. 3277 */ 3278 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 3279 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 3280 opcode, type); 3281 return -ETIMEDOUT; 3282 } 3283 3284 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 3285 3286 if (tag & HPSA_ERROR_BIT) { 3287 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 3288 opcode, type); 3289 return -EIO; 3290 } 3291 3292 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 3293 opcode, type); 3294 return 0; 3295 } 3296 3297 #define hpsa_noop(p) hpsa_message(p, 3, 0) 3298 3299 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 3300 void * __iomem vaddr, u32 use_doorbell) 3301 { 3302 u16 pmcsr; 3303 int pos; 3304 3305 if (use_doorbell) { 3306 /* For everything after the P600, the PCI power state method 3307 * of resetting the controller doesn't work, so we have this 3308 * other way using the doorbell register. 3309 */ 3310 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 3311 writel(use_doorbell, vaddr + SA5_DOORBELL); 3312 } else { /* Try to do it the PCI power state way */ 3313 3314 /* Quoting from the Open CISS Specification: "The Power 3315 * Management Control/Status Register (CSR) controls the power 3316 * state of the device. The normal operating state is D0, 3317 * CSR=00h. The software off state is D3, CSR=03h. To reset 3318 * the controller, place the interface device in D3 then to D0, 3319 * this causes a secondary PCI reset which will reset the 3320 * controller." */ 3321 3322 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 3323 if (pos == 0) { 3324 dev_err(&pdev->dev, 3325 "hpsa_reset_controller: " 3326 "PCI PM not supported\n"); 3327 return -ENODEV; 3328 } 3329 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 3330 /* enter the D3hot power management state */ 3331 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 3332 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3333 pmcsr |= PCI_D3hot; 3334 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3335 3336 msleep(500); 3337 3338 /* enter the D0 power management state */ 3339 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3340 pmcsr |= PCI_D0; 3341 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3342 3343 /* 3344 * The P600 requires a small delay when changing states. 3345 * Otherwise we may think the board did not reset and we bail. 3346 * This for kdump only and is particular to the P600. 3347 */ 3348 msleep(500); 3349 } 3350 return 0; 3351 } 3352 3353 static __devinit void init_driver_version(char *driver_version, int len) 3354 { 3355 memset(driver_version, 0, len); 3356 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 3357 } 3358 3359 static __devinit int write_driver_ver_to_cfgtable( 3360 struct CfgTable __iomem *cfgtable) 3361 { 3362 char *driver_version; 3363 int i, size = sizeof(cfgtable->driver_version); 3364 3365 driver_version = kmalloc(size, GFP_KERNEL); 3366 if (!driver_version) 3367 return -ENOMEM; 3368 3369 init_driver_version(driver_version, size); 3370 for (i = 0; i < size; i++) 3371 writeb(driver_version[i], &cfgtable->driver_version[i]); 3372 kfree(driver_version); 3373 return 0; 3374 } 3375 3376 static __devinit void read_driver_ver_from_cfgtable( 3377 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver) 3378 { 3379 int i; 3380 3381 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 3382 driver_ver[i] = readb(&cfgtable->driver_version[i]); 3383 } 3384 3385 static __devinit int controller_reset_failed( 3386 struct CfgTable __iomem *cfgtable) 3387 { 3388 3389 char *driver_ver, *old_driver_ver; 3390 int rc, size = sizeof(cfgtable->driver_version); 3391 3392 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 3393 if (!old_driver_ver) 3394 return -ENOMEM; 3395 driver_ver = old_driver_ver + size; 3396 3397 /* After a reset, the 32 bytes of "driver version" in the cfgtable 3398 * should have been changed, otherwise we know the reset failed. 3399 */ 3400 init_driver_version(old_driver_ver, size); 3401 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 3402 rc = !memcmp(driver_ver, old_driver_ver, size); 3403 kfree(old_driver_ver); 3404 return rc; 3405 } 3406 /* This does a hard reset of the controller using PCI power management 3407 * states or the using the doorbell register. 3408 */ 3409 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) 3410 { 3411 u64 cfg_offset; 3412 u32 cfg_base_addr; 3413 u64 cfg_base_addr_index; 3414 void __iomem *vaddr; 3415 unsigned long paddr; 3416 u32 misc_fw_support; 3417 int rc; 3418 struct CfgTable __iomem *cfgtable; 3419 u32 use_doorbell; 3420 u32 board_id; 3421 u16 command_register; 3422 3423 /* For controllers as old as the P600, this is very nearly 3424 * the same thing as 3425 * 3426 * pci_save_state(pci_dev); 3427 * pci_set_power_state(pci_dev, PCI_D3hot); 3428 * pci_set_power_state(pci_dev, PCI_D0); 3429 * pci_restore_state(pci_dev); 3430 * 3431 * For controllers newer than the P600, the pci power state 3432 * method of resetting doesn't work so we have another way 3433 * using the doorbell register. 3434 */ 3435 3436 rc = hpsa_lookup_board_id(pdev, &board_id); 3437 if (rc < 0 || !ctlr_is_resettable(board_id)) { 3438 dev_warn(&pdev->dev, "Not resetting device.\n"); 3439 return -ENODEV; 3440 } 3441 3442 /* if controller is soft- but not hard resettable... */ 3443 if (!ctlr_is_hard_resettable(board_id)) 3444 return -ENOTSUPP; /* try soft reset later. */ 3445 3446 /* Save the PCI command register */ 3447 pci_read_config_word(pdev, 4, &command_register); 3448 /* Turn the board off. This is so that later pci_restore_state() 3449 * won't turn the board on before the rest of config space is ready. 3450 */ 3451 pci_disable_device(pdev); 3452 pci_save_state(pdev); 3453 3454 /* find the first memory BAR, so we can find the cfg table */ 3455 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 3456 if (rc) 3457 return rc; 3458 vaddr = remap_pci_mem(paddr, 0x250); 3459 if (!vaddr) 3460 return -ENOMEM; 3461 3462 /* find cfgtable in order to check if reset via doorbell is supported */ 3463 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 3464 &cfg_base_addr_index, &cfg_offset); 3465 if (rc) 3466 goto unmap_vaddr; 3467 cfgtable = remap_pci_mem(pci_resource_start(pdev, 3468 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 3469 if (!cfgtable) { 3470 rc = -ENOMEM; 3471 goto unmap_vaddr; 3472 } 3473 rc = write_driver_ver_to_cfgtable(cfgtable); 3474 if (rc) 3475 goto unmap_vaddr; 3476 3477 /* If reset via doorbell register is supported, use that. 3478 * There are two such methods. Favor the newest method. 3479 */ 3480 misc_fw_support = readl(&cfgtable->misc_fw_support); 3481 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 3482 if (use_doorbell) { 3483 use_doorbell = DOORBELL_CTLR_RESET2; 3484 } else { 3485 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 3486 if (use_doorbell) { 3487 dev_warn(&pdev->dev, "Soft reset not supported. " 3488 "Firmware update is required.\n"); 3489 rc = -ENOTSUPP; /* try soft reset */ 3490 goto unmap_cfgtable; 3491 } 3492 } 3493 3494 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 3495 if (rc) 3496 goto unmap_cfgtable; 3497 3498 pci_restore_state(pdev); 3499 rc = pci_enable_device(pdev); 3500 if (rc) { 3501 dev_warn(&pdev->dev, "failed to enable device.\n"); 3502 goto unmap_cfgtable; 3503 } 3504 pci_write_config_word(pdev, 4, command_register); 3505 3506 /* Some devices (notably the HP Smart Array 5i Controller) 3507 need a little pause here */ 3508 msleep(HPSA_POST_RESET_PAUSE_MSECS); 3509 3510 /* Wait for board to become not ready, then ready. */ 3511 dev_info(&pdev->dev, "Waiting for board to reset.\n"); 3512 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); 3513 if (rc) { 3514 dev_warn(&pdev->dev, 3515 "failed waiting for board to reset." 3516 " Will try soft reset.\n"); 3517 rc = -ENOTSUPP; /* Not expected, but try soft reset later */ 3518 goto unmap_cfgtable; 3519 } 3520 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 3521 if (rc) { 3522 dev_warn(&pdev->dev, 3523 "failed waiting for board to become ready " 3524 "after hard reset\n"); 3525 goto unmap_cfgtable; 3526 } 3527 3528 rc = controller_reset_failed(vaddr); 3529 if (rc < 0) 3530 goto unmap_cfgtable; 3531 if (rc) { 3532 dev_warn(&pdev->dev, "Unable to successfully reset " 3533 "controller. Will try soft reset.\n"); 3534 rc = -ENOTSUPP; 3535 } else { 3536 dev_info(&pdev->dev, "board ready after hard reset.\n"); 3537 } 3538 3539 unmap_cfgtable: 3540 iounmap(cfgtable); 3541 3542 unmap_vaddr: 3543 iounmap(vaddr); 3544 return rc; 3545 } 3546 3547 /* 3548 * We cannot read the structure directly, for portability we must use 3549 * the io functions. 3550 * This is for debug only. 3551 */ 3552 static void print_cfg_table(struct device *dev, struct CfgTable *tb) 3553 { 3554 #ifdef HPSA_DEBUG 3555 int i; 3556 char temp_name[17]; 3557 3558 dev_info(dev, "Controller Configuration information\n"); 3559 dev_info(dev, "------------------------------------\n"); 3560 for (i = 0; i < 4; i++) 3561 temp_name[i] = readb(&(tb->Signature[i])); 3562 temp_name[4] = '\0'; 3563 dev_info(dev, " Signature = %s\n", temp_name); 3564 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 3565 dev_info(dev, " Transport methods supported = 0x%x\n", 3566 readl(&(tb->TransportSupport))); 3567 dev_info(dev, " Transport methods active = 0x%x\n", 3568 readl(&(tb->TransportActive))); 3569 dev_info(dev, " Requested transport Method = 0x%x\n", 3570 readl(&(tb->HostWrite.TransportRequest))); 3571 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 3572 readl(&(tb->HostWrite.CoalIntDelay))); 3573 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 3574 readl(&(tb->HostWrite.CoalIntCount))); 3575 dev_info(dev, " Max outstanding commands = 0x%d\n", 3576 readl(&(tb->CmdsOutMax))); 3577 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 3578 for (i = 0; i < 16; i++) 3579 temp_name[i] = readb(&(tb->ServerName[i])); 3580 temp_name[16] = '\0'; 3581 dev_info(dev, " Server Name = %s\n", temp_name); 3582 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 3583 readl(&(tb->HeartBeat))); 3584 #endif /* HPSA_DEBUG */ 3585 } 3586 3587 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 3588 { 3589 int i, offset, mem_type, bar_type; 3590 3591 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 3592 return 0; 3593 offset = 0; 3594 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 3595 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 3596 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 3597 offset += 4; 3598 else { 3599 mem_type = pci_resource_flags(pdev, i) & 3600 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 3601 switch (mem_type) { 3602 case PCI_BASE_ADDRESS_MEM_TYPE_32: 3603 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 3604 offset += 4; /* 32 bit */ 3605 break; 3606 case PCI_BASE_ADDRESS_MEM_TYPE_64: 3607 offset += 8; 3608 break; 3609 default: /* reserved in PCI 2.2 */ 3610 dev_warn(&pdev->dev, 3611 "base address is invalid\n"); 3612 return -1; 3613 break; 3614 } 3615 } 3616 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 3617 return i + 1; 3618 } 3619 return -1; 3620 } 3621 3622 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 3623 * controllers that are capable. If not, we use IO-APIC mode. 3624 */ 3625 3626 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h) 3627 { 3628 #ifdef CONFIG_PCI_MSI 3629 int err; 3630 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1}, 3631 {0, 2}, {0, 3} 3632 }; 3633 3634 /* Some boards advertise MSI but don't really support it */ 3635 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 3636 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 3637 goto default_int_mode; 3638 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 3639 dev_info(&h->pdev->dev, "MSIX\n"); 3640 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4); 3641 if (!err) { 3642 h->intr[0] = hpsa_msix_entries[0].vector; 3643 h->intr[1] = hpsa_msix_entries[1].vector; 3644 h->intr[2] = hpsa_msix_entries[2].vector; 3645 h->intr[3] = hpsa_msix_entries[3].vector; 3646 h->msix_vector = 1; 3647 return; 3648 } 3649 if (err > 0) { 3650 dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 3651 "available\n", err); 3652 goto default_int_mode; 3653 } else { 3654 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", 3655 err); 3656 goto default_int_mode; 3657 } 3658 } 3659 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 3660 dev_info(&h->pdev->dev, "MSI\n"); 3661 if (!pci_enable_msi(h->pdev)) 3662 h->msi_vector = 1; 3663 else 3664 dev_warn(&h->pdev->dev, "MSI init failed\n"); 3665 } 3666 default_int_mode: 3667 #endif /* CONFIG_PCI_MSI */ 3668 /* if we get here we're going to use the default interrupt mode */ 3669 h->intr[h->intr_mode] = h->pdev->irq; 3670 } 3671 3672 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 3673 { 3674 int i; 3675 u32 subsystem_vendor_id, subsystem_device_id; 3676 3677 subsystem_vendor_id = pdev->subsystem_vendor; 3678 subsystem_device_id = pdev->subsystem_device; 3679 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 3680 subsystem_vendor_id; 3681 3682 for (i = 0; i < ARRAY_SIZE(products); i++) 3683 if (*board_id == products[i].board_id) 3684 return i; 3685 3686 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 3687 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 3688 !hpsa_allow_any) { 3689 dev_warn(&pdev->dev, "unrecognized board ID: " 3690 "0x%08x, ignoring.\n", *board_id); 3691 return -ENODEV; 3692 } 3693 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 3694 } 3695 3696 static inline bool hpsa_board_disabled(struct pci_dev *pdev) 3697 { 3698 u16 command; 3699 3700 (void) pci_read_config_word(pdev, PCI_COMMAND, &command); 3701 return ((command & PCI_COMMAND_MEMORY) == 0); 3702 } 3703 3704 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 3705 unsigned long *memory_bar) 3706 { 3707 int i; 3708 3709 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 3710 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 3711 /* addressing mode bits already removed */ 3712 *memory_bar = pci_resource_start(pdev, i); 3713 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 3714 *memory_bar); 3715 return 0; 3716 } 3717 dev_warn(&pdev->dev, "no memory BAR found\n"); 3718 return -ENODEV; 3719 } 3720 3721 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, 3722 void __iomem *vaddr, int wait_for_ready) 3723 { 3724 int i, iterations; 3725 u32 scratchpad; 3726 if (wait_for_ready) 3727 iterations = HPSA_BOARD_READY_ITERATIONS; 3728 else 3729 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 3730 3731 for (i = 0; i < iterations; i++) { 3732 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 3733 if (wait_for_ready) { 3734 if (scratchpad == HPSA_FIRMWARE_READY) 3735 return 0; 3736 } else { 3737 if (scratchpad != HPSA_FIRMWARE_READY) 3738 return 0; 3739 } 3740 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 3741 } 3742 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 3743 return -ENODEV; 3744 } 3745 3746 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, 3747 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 3748 u64 *cfg_offset) 3749 { 3750 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 3751 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 3752 *cfg_base_addr &= (u32) 0x0000ffff; 3753 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 3754 if (*cfg_base_addr_index == -1) { 3755 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 3756 return -ENODEV; 3757 } 3758 return 0; 3759 } 3760 3761 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h) 3762 { 3763 u64 cfg_offset; 3764 u32 cfg_base_addr; 3765 u64 cfg_base_addr_index; 3766 u32 trans_offset; 3767 int rc; 3768 3769 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 3770 &cfg_base_addr_index, &cfg_offset); 3771 if (rc) 3772 return rc; 3773 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 3774 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 3775 if (!h->cfgtable) 3776 return -ENOMEM; 3777 rc = write_driver_ver_to_cfgtable(h->cfgtable); 3778 if (rc) 3779 return rc; 3780 /* Find performant mode table. */ 3781 trans_offset = readl(&h->cfgtable->TransMethodOffset); 3782 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 3783 cfg_base_addr_index)+cfg_offset+trans_offset, 3784 sizeof(*h->transtable)); 3785 if (!h->transtable) 3786 return -ENOMEM; 3787 return 0; 3788 } 3789 3790 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 3791 { 3792 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 3793 3794 /* Limit commands in memory limited kdump scenario. */ 3795 if (reset_devices && h->max_commands > 32) 3796 h->max_commands = 32; 3797 3798 if (h->max_commands < 16) { 3799 dev_warn(&h->pdev->dev, "Controller reports " 3800 "max supported commands of %d, an obvious lie. " 3801 "Using 16. Ensure that firmware is up to date.\n", 3802 h->max_commands); 3803 h->max_commands = 16; 3804 } 3805 } 3806 3807 /* Interrogate the hardware for some limits: 3808 * max commands, max SG elements without chaining, and with chaining, 3809 * SG chain block size, etc. 3810 */ 3811 static void __devinit hpsa_find_board_params(struct ctlr_info *h) 3812 { 3813 hpsa_get_max_perf_mode_cmds(h); 3814 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ 3815 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 3816 /* 3817 * Limit in-command s/g elements to 32 save dma'able memory. 3818 * Howvever spec says if 0, use 31 3819 */ 3820 h->max_cmd_sg_entries = 31; 3821 if (h->maxsgentries > 512) { 3822 h->max_cmd_sg_entries = 32; 3823 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1; 3824 h->maxsgentries--; /* save one for chain pointer */ 3825 } else { 3826 h->maxsgentries = 31; /* default to traditional values */ 3827 h->chainsize = 0; 3828 } 3829 } 3830 3831 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 3832 { 3833 if ((readb(&h->cfgtable->Signature[0]) != 'C') || 3834 (readb(&h->cfgtable->Signature[1]) != 'I') || 3835 (readb(&h->cfgtable->Signature[2]) != 'S') || 3836 (readb(&h->cfgtable->Signature[3]) != 'S')) { 3837 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 3838 return false; 3839 } 3840 return true; 3841 } 3842 3843 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 3844 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h) 3845 { 3846 #ifdef CONFIG_X86 3847 u32 prefetch; 3848 3849 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 3850 prefetch |= 0x100; 3851 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 3852 #endif 3853 } 3854 3855 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 3856 * in a prefetch beyond physical memory. 3857 */ 3858 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 3859 { 3860 u32 dma_prefetch; 3861 3862 if (h->board_id != 0x3225103C) 3863 return; 3864 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 3865 dma_prefetch |= 0x8000; 3866 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 3867 } 3868 3869 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 3870 { 3871 int i; 3872 u32 doorbell_value; 3873 unsigned long flags; 3874 3875 /* under certain very rare conditions, this can take awhile. 3876 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 3877 * as we enter this code.) 3878 */ 3879 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 3880 spin_lock_irqsave(&h->lock, flags); 3881 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 3882 spin_unlock_irqrestore(&h->lock, flags); 3883 if (!(doorbell_value & CFGTBL_ChangeReq)) 3884 break; 3885 /* delay and try again */ 3886 usleep_range(10000, 20000); 3887 } 3888 } 3889 3890 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h) 3891 { 3892 u32 trans_support; 3893 3894 trans_support = readl(&(h->cfgtable->TransportSupport)); 3895 if (!(trans_support & SIMPLE_MODE)) 3896 return -ENOTSUPP; 3897 3898 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 3899 /* Update the field, and then ring the doorbell */ 3900 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 3901 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 3902 hpsa_wait_for_mode_change_ack(h); 3903 print_cfg_table(&h->pdev->dev, h->cfgtable); 3904 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { 3905 dev_warn(&h->pdev->dev, 3906 "unable to get board into simple mode\n"); 3907 return -ENODEV; 3908 } 3909 h->transMethod = CFGTBL_Trans_Simple; 3910 return 0; 3911 } 3912 3913 static int __devinit hpsa_pci_init(struct ctlr_info *h) 3914 { 3915 int prod_index, err; 3916 3917 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 3918 if (prod_index < 0) 3919 return -ENODEV; 3920 h->product_name = products[prod_index].product_name; 3921 h->access = *(products[prod_index].access); 3922 3923 if (hpsa_board_disabled(h->pdev)) { 3924 dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); 3925 return -ENODEV; 3926 } 3927 3928 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 3929 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 3930 3931 err = pci_enable_device(h->pdev); 3932 if (err) { 3933 dev_warn(&h->pdev->dev, "unable to enable PCI device\n"); 3934 return err; 3935 } 3936 3937 err = pci_request_regions(h->pdev, HPSA); 3938 if (err) { 3939 dev_err(&h->pdev->dev, 3940 "cannot obtain PCI resources, aborting\n"); 3941 return err; 3942 } 3943 hpsa_interrupt_mode(h); 3944 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 3945 if (err) 3946 goto err_out_free_res; 3947 h->vaddr = remap_pci_mem(h->paddr, 0x250); 3948 if (!h->vaddr) { 3949 err = -ENOMEM; 3950 goto err_out_free_res; 3951 } 3952 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 3953 if (err) 3954 goto err_out_free_res; 3955 err = hpsa_find_cfgtables(h); 3956 if (err) 3957 goto err_out_free_res; 3958 hpsa_find_board_params(h); 3959 3960 if (!hpsa_CISS_signature_present(h)) { 3961 err = -ENODEV; 3962 goto err_out_free_res; 3963 } 3964 hpsa_enable_scsi_prefetch(h); 3965 hpsa_p600_dma_prefetch_quirk(h); 3966 err = hpsa_enter_simple_mode(h); 3967 if (err) 3968 goto err_out_free_res; 3969 return 0; 3970 3971 err_out_free_res: 3972 if (h->transtable) 3973 iounmap(h->transtable); 3974 if (h->cfgtable) 3975 iounmap(h->cfgtable); 3976 if (h->vaddr) 3977 iounmap(h->vaddr); 3978 /* 3979 * Deliberately omit pci_disable_device(): it does something nasty to 3980 * Smart Array controllers that pci_enable_device does not undo 3981 */ 3982 pci_release_regions(h->pdev); 3983 return err; 3984 } 3985 3986 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h) 3987 { 3988 int rc; 3989 3990 #define HBA_INQUIRY_BYTE_COUNT 64 3991 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 3992 if (!h->hba_inquiry_data) 3993 return; 3994 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 3995 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 3996 if (rc != 0) { 3997 kfree(h->hba_inquiry_data); 3998 h->hba_inquiry_data = NULL; 3999 } 4000 } 4001 4002 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev) 4003 { 4004 int rc, i; 4005 4006 if (!reset_devices) 4007 return 0; 4008 4009 /* Reset the controller with a PCI power-cycle or via doorbell */ 4010 rc = hpsa_kdump_hard_reset_controller(pdev); 4011 4012 /* -ENOTSUPP here means we cannot reset the controller 4013 * but it's already (and still) up and running in 4014 * "performant mode". Or, it might be 640x, which can't reset 4015 * due to concerns about shared bbwc between 6402/6404 pair. 4016 */ 4017 if (rc == -ENOTSUPP) 4018 return rc; /* just try to do the kdump anyhow. */ 4019 if (rc) 4020 return -ENODEV; 4021 4022 /* Now try to get the controller to respond to a no-op */ 4023 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); 4024 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 4025 if (hpsa_noop(pdev) == 0) 4026 break; 4027 else 4028 dev_warn(&pdev->dev, "no-op failed%s\n", 4029 (i < 11 ? "; re-trying" : "")); 4030 } 4031 return 0; 4032 } 4033 4034 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h) 4035 { 4036 h->cmd_pool_bits = kzalloc( 4037 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 4038 sizeof(unsigned long), GFP_KERNEL); 4039 h->cmd_pool = pci_alloc_consistent(h->pdev, 4040 h->nr_cmds * sizeof(*h->cmd_pool), 4041 &(h->cmd_pool_dhandle)); 4042 h->errinfo_pool = pci_alloc_consistent(h->pdev, 4043 h->nr_cmds * sizeof(*h->errinfo_pool), 4044 &(h->errinfo_pool_dhandle)); 4045 if ((h->cmd_pool_bits == NULL) 4046 || (h->cmd_pool == NULL) 4047 || (h->errinfo_pool == NULL)) { 4048 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 4049 return -ENOMEM; 4050 } 4051 return 0; 4052 } 4053 4054 static void hpsa_free_cmd_pool(struct ctlr_info *h) 4055 { 4056 kfree(h->cmd_pool_bits); 4057 if (h->cmd_pool) 4058 pci_free_consistent(h->pdev, 4059 h->nr_cmds * sizeof(struct CommandList), 4060 h->cmd_pool, h->cmd_pool_dhandle); 4061 if (h->errinfo_pool) 4062 pci_free_consistent(h->pdev, 4063 h->nr_cmds * sizeof(struct ErrorInfo), 4064 h->errinfo_pool, 4065 h->errinfo_pool_dhandle); 4066 } 4067 4068 static int hpsa_request_irq(struct ctlr_info *h, 4069 irqreturn_t (*msixhandler)(int, void *), 4070 irqreturn_t (*intxhandler)(int, void *)) 4071 { 4072 int rc; 4073 4074 if (h->msix_vector || h->msi_vector) 4075 rc = request_irq(h->intr[h->intr_mode], msixhandler, 4076 0, h->devname, h); 4077 else 4078 rc = request_irq(h->intr[h->intr_mode], intxhandler, 4079 IRQF_SHARED, h->devname, h); 4080 if (rc) { 4081 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n", 4082 h->intr[h->intr_mode], h->devname); 4083 return -ENODEV; 4084 } 4085 return 0; 4086 } 4087 4088 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h) 4089 { 4090 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID, 4091 HPSA_RESET_TYPE_CONTROLLER)) { 4092 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); 4093 return -EIO; 4094 } 4095 4096 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 4097 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { 4098 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 4099 return -1; 4100 } 4101 4102 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 4103 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { 4104 dev_warn(&h->pdev->dev, "Board failed to become ready " 4105 "after soft reset.\n"); 4106 return -1; 4107 } 4108 4109 return 0; 4110 } 4111 4112 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 4113 { 4114 free_irq(h->intr[h->intr_mode], h); 4115 #ifdef CONFIG_PCI_MSI 4116 if (h->msix_vector) 4117 pci_disable_msix(h->pdev); 4118 else if (h->msi_vector) 4119 pci_disable_msi(h->pdev); 4120 #endif /* CONFIG_PCI_MSI */ 4121 hpsa_free_sg_chain_blocks(h); 4122 hpsa_free_cmd_pool(h); 4123 kfree(h->blockFetchTable); 4124 pci_free_consistent(h->pdev, h->reply_pool_size, 4125 h->reply_pool, h->reply_pool_dhandle); 4126 if (h->vaddr) 4127 iounmap(h->vaddr); 4128 if (h->transtable) 4129 iounmap(h->transtable); 4130 if (h->cfgtable) 4131 iounmap(h->cfgtable); 4132 pci_release_regions(h->pdev); 4133 kfree(h); 4134 } 4135 4136 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h) 4137 { 4138 assert_spin_locked(&lockup_detector_lock); 4139 if (!hpsa_lockup_detector) 4140 return; 4141 if (h->lockup_detected) 4142 return; /* already stopped the lockup detector */ 4143 list_del(&h->lockup_list); 4144 } 4145 4146 /* Called when controller lockup detected. */ 4147 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) 4148 { 4149 struct CommandList *c = NULL; 4150 4151 assert_spin_locked(&h->lock); 4152 /* Mark all outstanding commands as failed and complete them. */ 4153 while (!list_empty(list)) { 4154 c = list_entry(list->next, struct CommandList, list); 4155 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 4156 finish_cmd(c, c->Header.Tag.lower); 4157 } 4158 } 4159 4160 static void controller_lockup_detected(struct ctlr_info *h) 4161 { 4162 unsigned long flags; 4163 4164 assert_spin_locked(&lockup_detector_lock); 4165 remove_ctlr_from_lockup_detector_list(h); 4166 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4167 spin_lock_irqsave(&h->lock, flags); 4168 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 4169 spin_unlock_irqrestore(&h->lock, flags); 4170 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n", 4171 h->lockup_detected); 4172 pci_disable_device(h->pdev); 4173 spin_lock_irqsave(&h->lock, flags); 4174 fail_all_cmds_on_list(h, &h->cmpQ); 4175 fail_all_cmds_on_list(h, &h->reqQ); 4176 spin_unlock_irqrestore(&h->lock, flags); 4177 } 4178 4179 #define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ) 4180 #define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2) 4181 4182 static void detect_controller_lockup(struct ctlr_info *h) 4183 { 4184 u64 now; 4185 u32 heartbeat; 4186 unsigned long flags; 4187 4188 assert_spin_locked(&lockup_detector_lock); 4189 now = get_jiffies_64(); 4190 /* If we've received an interrupt recently, we're ok. */ 4191 if (time_after64(h->last_intr_timestamp + 4192 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now)) 4193 return; 4194 4195 /* 4196 * If we've already checked the heartbeat recently, we're ok. 4197 * This could happen if someone sends us a signal. We 4198 * otherwise don't care about signals in this thread. 4199 */ 4200 if (time_after64(h->last_heartbeat_timestamp + 4201 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now)) 4202 return; 4203 4204 /* If heartbeat has not changed since we last looked, we're not ok. */ 4205 spin_lock_irqsave(&h->lock, flags); 4206 heartbeat = readl(&h->cfgtable->HeartBeat); 4207 spin_unlock_irqrestore(&h->lock, flags); 4208 if (h->last_heartbeat == heartbeat) { 4209 controller_lockup_detected(h); 4210 return; 4211 } 4212 4213 /* We're ok. */ 4214 h->last_heartbeat = heartbeat; 4215 h->last_heartbeat_timestamp = now; 4216 } 4217 4218 static int detect_controller_lockup_thread(void *notused) 4219 { 4220 struct ctlr_info *h; 4221 unsigned long flags; 4222 4223 while (1) { 4224 struct list_head *this, *tmp; 4225 4226 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL); 4227 if (kthread_should_stop()) 4228 break; 4229 spin_lock_irqsave(&lockup_detector_lock, flags); 4230 list_for_each_safe(this, tmp, &hpsa_ctlr_list) { 4231 h = list_entry(this, struct ctlr_info, lockup_list); 4232 detect_controller_lockup(h); 4233 } 4234 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4235 } 4236 return 0; 4237 } 4238 4239 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h) 4240 { 4241 unsigned long flags; 4242 4243 spin_lock_irqsave(&lockup_detector_lock, flags); 4244 list_add_tail(&h->lockup_list, &hpsa_ctlr_list); 4245 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4246 } 4247 4248 static void start_controller_lockup_detector(struct ctlr_info *h) 4249 { 4250 /* Start the lockup detector thread if not already started */ 4251 if (!hpsa_lockup_detector) { 4252 spin_lock_init(&lockup_detector_lock); 4253 hpsa_lockup_detector = 4254 kthread_run(detect_controller_lockup_thread, 4255 NULL, HPSA); 4256 } 4257 if (!hpsa_lockup_detector) { 4258 dev_warn(&h->pdev->dev, 4259 "Could not start lockup detector thread\n"); 4260 return; 4261 } 4262 add_ctlr_to_lockup_detector_list(h); 4263 } 4264 4265 static void stop_controller_lockup_detector(struct ctlr_info *h) 4266 { 4267 unsigned long flags; 4268 4269 spin_lock_irqsave(&lockup_detector_lock, flags); 4270 remove_ctlr_from_lockup_detector_list(h); 4271 /* If the list of ctlr's to monitor is empty, stop the thread */ 4272 if (list_empty(&hpsa_ctlr_list)) { 4273 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4274 kthread_stop(hpsa_lockup_detector); 4275 spin_lock_irqsave(&lockup_detector_lock, flags); 4276 hpsa_lockup_detector = NULL; 4277 } 4278 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4279 } 4280 4281 static int __devinit hpsa_init_one(struct pci_dev *pdev, 4282 const struct pci_device_id *ent) 4283 { 4284 int dac, rc; 4285 struct ctlr_info *h; 4286 int try_soft_reset = 0; 4287 unsigned long flags; 4288 4289 if (number_of_controllers == 0) 4290 printk(KERN_INFO DRIVER_NAME "\n"); 4291 4292 rc = hpsa_init_reset_devices(pdev); 4293 if (rc) { 4294 if (rc != -ENOTSUPP) 4295 return rc; 4296 /* If the reset fails in a particular way (it has no way to do 4297 * a proper hard reset, so returns -ENOTSUPP) we can try to do 4298 * a soft reset once we get the controller configured up to the 4299 * point that it can accept a command. 4300 */ 4301 try_soft_reset = 1; 4302 rc = 0; 4303 } 4304 4305 reinit_after_soft_reset: 4306 4307 /* Command structures must be aligned on a 32-byte boundary because 4308 * the 5 lower bits of the address are used by the hardware. and by 4309 * the driver. See comments in hpsa.h for more info. 4310 */ 4311 #define COMMANDLIST_ALIGNMENT 32 4312 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 4313 h = kzalloc(sizeof(*h), GFP_KERNEL); 4314 if (!h) 4315 return -ENOMEM; 4316 4317 h->pdev = pdev; 4318 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 4319 INIT_LIST_HEAD(&h->cmpQ); 4320 INIT_LIST_HEAD(&h->reqQ); 4321 spin_lock_init(&h->lock); 4322 spin_lock_init(&h->scan_lock); 4323 rc = hpsa_pci_init(h); 4324 if (rc != 0) 4325 goto clean1; 4326 4327 sprintf(h->devname, HPSA "%d", number_of_controllers); 4328 h->ctlr = number_of_controllers; 4329 number_of_controllers++; 4330 4331 /* configure PCI DMA stuff */ 4332 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 4333 if (rc == 0) { 4334 dac = 1; 4335 } else { 4336 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 4337 if (rc == 0) { 4338 dac = 0; 4339 } else { 4340 dev_err(&pdev->dev, "no suitable DMA available\n"); 4341 goto clean1; 4342 } 4343 } 4344 4345 /* make sure the board interrupts are off */ 4346 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4347 4348 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx)) 4349 goto clean2; 4350 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n", 4351 h->devname, pdev->device, 4352 h->intr[h->intr_mode], dac ? "" : " not"); 4353 if (hpsa_allocate_cmd_pool(h)) 4354 goto clean4; 4355 if (hpsa_allocate_sg_chain_blocks(h)) 4356 goto clean4; 4357 init_waitqueue_head(&h->scan_wait_queue); 4358 h->scan_finished = 1; /* no scan currently in progress */ 4359 4360 pci_set_drvdata(pdev, h); 4361 h->ndevices = 0; 4362 h->scsi_host = NULL; 4363 spin_lock_init(&h->devlock); 4364 hpsa_put_ctlr_into_performant_mode(h); 4365 4366 /* At this point, the controller is ready to take commands. 4367 * Now, if reset_devices and the hard reset didn't work, try 4368 * the soft reset and see if that works. 4369 */ 4370 if (try_soft_reset) { 4371 4372 /* This is kind of gross. We may or may not get a completion 4373 * from the soft reset command, and if we do, then the value 4374 * from the fifo may or may not be valid. So, we wait 10 secs 4375 * after the reset throwing away any completions we get during 4376 * that time. Unregister the interrupt handler and register 4377 * fake ones to scoop up any residual completions. 4378 */ 4379 spin_lock_irqsave(&h->lock, flags); 4380 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4381 spin_unlock_irqrestore(&h->lock, flags); 4382 free_irq(h->intr[h->intr_mode], h); 4383 rc = hpsa_request_irq(h, hpsa_msix_discard_completions, 4384 hpsa_intx_discard_completions); 4385 if (rc) { 4386 dev_warn(&h->pdev->dev, "Failed to request_irq after " 4387 "soft reset.\n"); 4388 goto clean4; 4389 } 4390 4391 rc = hpsa_kdump_soft_reset(h); 4392 if (rc) 4393 /* Neither hard nor soft reset worked, we're hosed. */ 4394 goto clean4; 4395 4396 dev_info(&h->pdev->dev, "Board READY.\n"); 4397 dev_info(&h->pdev->dev, 4398 "Waiting for stale completions to drain.\n"); 4399 h->access.set_intr_mask(h, HPSA_INTR_ON); 4400 msleep(10000); 4401 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4402 4403 rc = controller_reset_failed(h->cfgtable); 4404 if (rc) 4405 dev_info(&h->pdev->dev, 4406 "Soft reset appears to have failed.\n"); 4407 4408 /* since the controller's reset, we have to go back and re-init 4409 * everything. Easiest to just forget what we've done and do it 4410 * all over again. 4411 */ 4412 hpsa_undo_allocations_after_kdump_soft_reset(h); 4413 try_soft_reset = 0; 4414 if (rc) 4415 /* don't go to clean4, we already unallocated */ 4416 return -ENODEV; 4417 4418 goto reinit_after_soft_reset; 4419 } 4420 4421 /* Turn the interrupts on so we can service requests */ 4422 h->access.set_intr_mask(h, HPSA_INTR_ON); 4423 4424 hpsa_hba_inquiry(h); 4425 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ 4426 start_controller_lockup_detector(h); 4427 return 1; 4428 4429 clean4: 4430 hpsa_free_sg_chain_blocks(h); 4431 hpsa_free_cmd_pool(h); 4432 free_irq(h->intr[h->intr_mode], h); 4433 clean2: 4434 clean1: 4435 kfree(h); 4436 return rc; 4437 } 4438 4439 static void hpsa_flush_cache(struct ctlr_info *h) 4440 { 4441 char *flush_buf; 4442 struct CommandList *c; 4443 4444 flush_buf = kzalloc(4, GFP_KERNEL); 4445 if (!flush_buf) 4446 return; 4447 4448 c = cmd_special_alloc(h); 4449 if (!c) { 4450 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 4451 goto out_of_memory; 4452 } 4453 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 4454 RAID_CTLR_LUNID, TYPE_CMD); 4455 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); 4456 if (c->err_info->CommandStatus != 0) 4457 dev_warn(&h->pdev->dev, 4458 "error flushing cache on controller\n"); 4459 cmd_special_free(h, c); 4460 out_of_memory: 4461 kfree(flush_buf); 4462 } 4463 4464 static void hpsa_shutdown(struct pci_dev *pdev) 4465 { 4466 struct ctlr_info *h; 4467 4468 h = pci_get_drvdata(pdev); 4469 /* Turn board interrupts off and send the flush cache command 4470 * sendcmd will turn off interrupt, and send the flush... 4471 * To write all data in the battery backed cache to disks 4472 */ 4473 hpsa_flush_cache(h); 4474 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4475 free_irq(h->intr[h->intr_mode], h); 4476 #ifdef CONFIG_PCI_MSI 4477 if (h->msix_vector) 4478 pci_disable_msix(h->pdev); 4479 else if (h->msi_vector) 4480 pci_disable_msi(h->pdev); 4481 #endif /* CONFIG_PCI_MSI */ 4482 } 4483 4484 static void __devexit hpsa_free_device_info(struct ctlr_info *h) 4485 { 4486 int i; 4487 4488 for (i = 0; i < h->ndevices; i++) 4489 kfree(h->dev[i]); 4490 } 4491 4492 static void __devexit hpsa_remove_one(struct pci_dev *pdev) 4493 { 4494 struct ctlr_info *h; 4495 4496 if (pci_get_drvdata(pdev) == NULL) { 4497 dev_err(&pdev->dev, "unable to remove device\n"); 4498 return; 4499 } 4500 h = pci_get_drvdata(pdev); 4501 stop_controller_lockup_detector(h); 4502 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ 4503 hpsa_shutdown(pdev); 4504 iounmap(h->vaddr); 4505 iounmap(h->transtable); 4506 iounmap(h->cfgtable); 4507 hpsa_free_device_info(h); 4508 hpsa_free_sg_chain_blocks(h); 4509 pci_free_consistent(h->pdev, 4510 h->nr_cmds * sizeof(struct CommandList), 4511 h->cmd_pool, h->cmd_pool_dhandle); 4512 pci_free_consistent(h->pdev, 4513 h->nr_cmds * sizeof(struct ErrorInfo), 4514 h->errinfo_pool, h->errinfo_pool_dhandle); 4515 pci_free_consistent(h->pdev, h->reply_pool_size, 4516 h->reply_pool, h->reply_pool_dhandle); 4517 kfree(h->cmd_pool_bits); 4518 kfree(h->blockFetchTable); 4519 kfree(h->hba_inquiry_data); 4520 /* 4521 * Deliberately omit pci_disable_device(): it does something nasty to 4522 * Smart Array controllers that pci_enable_device does not undo 4523 */ 4524 pci_release_regions(pdev); 4525 pci_set_drvdata(pdev, NULL); 4526 kfree(h); 4527 } 4528 4529 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 4530 __attribute__((unused)) pm_message_t state) 4531 { 4532 return -ENOSYS; 4533 } 4534 4535 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 4536 { 4537 return -ENOSYS; 4538 } 4539 4540 static struct pci_driver hpsa_pci_driver = { 4541 .name = HPSA, 4542 .probe = hpsa_init_one, 4543 .remove = __devexit_p(hpsa_remove_one), 4544 .id_table = hpsa_pci_device_id, /* id_table */ 4545 .shutdown = hpsa_shutdown, 4546 .suspend = hpsa_suspend, 4547 .resume = hpsa_resume, 4548 }; 4549 4550 /* Fill in bucket_map[], given nsgs (the max number of 4551 * scatter gather elements supported) and bucket[], 4552 * which is an array of 8 integers. The bucket[] array 4553 * contains 8 different DMA transfer sizes (in 16 4554 * byte increments) which the controller uses to fetch 4555 * commands. This function fills in bucket_map[], which 4556 * maps a given number of scatter gather elements to one of 4557 * the 8 DMA transfer sizes. The point of it is to allow the 4558 * controller to only do as much DMA as needed to fetch the 4559 * command, with the DMA transfer size encoded in the lower 4560 * bits of the command address. 4561 */ 4562 static void calc_bucket_map(int bucket[], int num_buckets, 4563 int nsgs, int *bucket_map) 4564 { 4565 int i, j, b, size; 4566 4567 /* even a command with 0 SGs requires 4 blocks */ 4568 #define MINIMUM_TRANSFER_BLOCKS 4 4569 #define NUM_BUCKETS 8 4570 /* Note, bucket_map must have nsgs+1 entries. */ 4571 for (i = 0; i <= nsgs; i++) { 4572 /* Compute size of a command with i SG entries */ 4573 size = i + MINIMUM_TRANSFER_BLOCKS; 4574 b = num_buckets; /* Assume the biggest bucket */ 4575 /* Find the bucket that is just big enough */ 4576 for (j = 0; j < 8; j++) { 4577 if (bucket[j] >= size) { 4578 b = j; 4579 break; 4580 } 4581 } 4582 /* for a command with i SG entries, use bucket b. */ 4583 bucket_map[i] = b; 4584 } 4585 } 4586 4587 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h, 4588 u32 use_short_tags) 4589 { 4590 int i; 4591 unsigned long register_value; 4592 4593 /* This is a bit complicated. There are 8 registers on 4594 * the controller which we write to to tell it 8 different 4595 * sizes of commands which there may be. It's a way of 4596 * reducing the DMA done to fetch each command. Encoded into 4597 * each command's tag are 3 bits which communicate to the controller 4598 * which of the eight sizes that command fits within. The size of 4599 * each command depends on how many scatter gather entries there are. 4600 * Each SG entry requires 16 bytes. The eight registers are programmed 4601 * with the number of 16-byte blocks a command of that size requires. 4602 * The smallest command possible requires 5 such 16 byte blocks. 4603 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 4604 * blocks. Note, this only extends to the SG entries contained 4605 * within the command block, and does not extend to chained blocks 4606 * of SG elements. bft[] contains the eight values we write to 4607 * the registers. They are not evenly distributed, but have more 4608 * sizes for small commands, and fewer sizes for larger commands. 4609 */ 4610 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 4611 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 4612 /* 5 = 1 s/g entry or 4k 4613 * 6 = 2 s/g entry or 8k 4614 * 8 = 4 s/g entry or 16k 4615 * 10 = 6 s/g entry or 24k 4616 */ 4617 4618 h->reply_pool_wraparound = 1; /* spec: init to 1 */ 4619 4620 /* Controller spec: zero out this buffer. */ 4621 memset(h->reply_pool, 0, h->reply_pool_size); 4622 h->reply_pool_head = h->reply_pool; 4623 4624 bft[7] = SG_ENTRIES_IN_CMD + 4; 4625 calc_bucket_map(bft, ARRAY_SIZE(bft), 4626 SG_ENTRIES_IN_CMD, h->blockFetchTable); 4627 for (i = 0; i < 8; i++) 4628 writel(bft[i], &h->transtable->BlockFetch[i]); 4629 4630 /* size of controller ring buffer */ 4631 writel(h->max_commands, &h->transtable->RepQSize); 4632 writel(1, &h->transtable->RepQCount); 4633 writel(0, &h->transtable->RepQCtrAddrLow32); 4634 writel(0, &h->transtable->RepQCtrAddrHigh32); 4635 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); 4636 writel(0, &h->transtable->RepQAddr0High32); 4637 writel(CFGTBL_Trans_Performant | use_short_tags, 4638 &(h->cfgtable->HostWrite.TransportRequest)); 4639 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 4640 hpsa_wait_for_mode_change_ack(h); 4641 register_value = readl(&(h->cfgtable->TransportActive)); 4642 if (!(register_value & CFGTBL_Trans_Performant)) { 4643 dev_warn(&h->pdev->dev, "unable to get board into" 4644 " performant mode\n"); 4645 return; 4646 } 4647 /* Change the access methods to the performant access methods */ 4648 h->access = SA5_performant_access; 4649 h->transMethod = CFGTBL_Trans_Performant; 4650 } 4651 4652 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 4653 { 4654 u32 trans_support; 4655 4656 if (hpsa_simple_mode) 4657 return; 4658 4659 trans_support = readl(&(h->cfgtable->TransportSupport)); 4660 if (!(trans_support & PERFORMANT_MODE)) 4661 return; 4662 4663 hpsa_get_max_perf_mode_cmds(h); 4664 /* Performant mode ring buffer and supporting data structures */ 4665 h->reply_pool_size = h->max_commands * sizeof(u64); 4666 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size, 4667 &(h->reply_pool_dhandle)); 4668 4669 /* Need a block fetch table for performant mode */ 4670 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 4671 sizeof(u32)), GFP_KERNEL); 4672 4673 if ((h->reply_pool == NULL) 4674 || (h->blockFetchTable == NULL)) 4675 goto clean_up; 4676 4677 hpsa_enter_performant_mode(h, 4678 trans_support & CFGTBL_Trans_use_short_tags); 4679 4680 return; 4681 4682 clean_up: 4683 if (h->reply_pool) 4684 pci_free_consistent(h->pdev, h->reply_pool_size, 4685 h->reply_pool, h->reply_pool_dhandle); 4686 kfree(h->blockFetchTable); 4687 } 4688 4689 /* 4690 * This is it. Register the PCI driver information for the cards we control 4691 * the OS will call our registered routines when it finds one of our cards. 4692 */ 4693 static int __init hpsa_init(void) 4694 { 4695 return pci_register_driver(&hpsa_pci_driver); 4696 } 4697 4698 static void __exit hpsa_cleanup(void) 4699 { 4700 pci_unregister_driver(&hpsa_pci_driver); 4701 } 4702 4703 module_init(hpsa_init); 4704 module_exit(hpsa_cleanup); 4705