1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 12 * NON INFRINGEMENT. See the GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * 18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/pci-aspm.h> 27 #include <linux/kernel.h> 28 #include <linux/slab.h> 29 #include <linux/delay.h> 30 #include <linux/fs.h> 31 #include <linux/timer.h> 32 #include <linux/seq_file.h> 33 #include <linux/init.h> 34 #include <linux/spinlock.h> 35 #include <linux/compat.h> 36 #include <linux/blktrace_api.h> 37 #include <linux/uaccess.h> 38 #include <linux/io.h> 39 #include <linux/dma-mapping.h> 40 #include <linux/completion.h> 41 #include <linux/moduleparam.h> 42 #include <scsi/scsi.h> 43 #include <scsi/scsi_cmnd.h> 44 #include <scsi/scsi_device.h> 45 #include <scsi/scsi_host.h> 46 #include <scsi/scsi_tcq.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/kthread.h> 52 #include <linux/jiffies.h> 53 #include "hpsa_cmd.h" 54 #include "hpsa.h" 55 56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 57 #define HPSA_DRIVER_VERSION "2.0.2-1" 58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 59 #define HPSA "hpsa" 60 61 /* How long to wait (in milliseconds) for board to go into simple mode */ 62 #define MAX_CONFIG_WAIT 30000 63 #define MAX_IOCTL_CONFIG_WAIT 1000 64 65 /*define how many times we will try a command because of bus resets */ 66 #define MAX_CMD_RETRIES 3 67 68 /* Embedded module documentation macros - see modules.h */ 69 MODULE_AUTHOR("Hewlett-Packard Company"); 70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 71 HPSA_DRIVER_VERSION); 72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 73 MODULE_VERSION(HPSA_DRIVER_VERSION); 74 MODULE_LICENSE("GPL"); 75 76 static int hpsa_allow_any; 77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 78 MODULE_PARM_DESC(hpsa_allow_any, 79 "Allow hpsa driver to access unknown HP Smart Array hardware"); 80 static int hpsa_simple_mode; 81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 82 MODULE_PARM_DESC(hpsa_simple_mode, 83 "Use 'simple mode' rather than 'performant mode'"); 84 85 /* define the PCI info for the cards we can control */ 86 static const struct pci_device_id hpsa_pci_device_id[] = { 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a}, 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 104 {0,} 105 }; 106 107 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 108 109 /* board_id = Subsystem Device ID & Vendor ID 110 * product = Marketing Name for the board 111 * access = Address of the struct of function pointers 112 */ 113 static struct board_type products[] = { 114 {0x3241103C, "Smart Array P212", &SA5_access}, 115 {0x3243103C, "Smart Array P410", &SA5_access}, 116 {0x3245103C, "Smart Array P410i", &SA5_access}, 117 {0x3247103C, "Smart Array P411", &SA5_access}, 118 {0x3249103C, "Smart Array P812", &SA5_access}, 119 {0x324a103C, "Smart Array P712m", &SA5_access}, 120 {0x324b103C, "Smart Array P711m", &SA5_access}, 121 {0x3350103C, "Smart Array", &SA5_access}, 122 {0x3351103C, "Smart Array", &SA5_access}, 123 {0x3352103C, "Smart Array", &SA5_access}, 124 {0x3353103C, "Smart Array", &SA5_access}, 125 {0x3354103C, "Smart Array", &SA5_access}, 126 {0x3355103C, "Smart Array", &SA5_access}, 127 {0x3356103C, "Smart Array", &SA5_access}, 128 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 129 }; 130 131 static int number_of_controllers; 132 133 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list); 134 static spinlock_t lockup_detector_lock; 135 static struct task_struct *hpsa_lockup_detector; 136 137 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 138 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 139 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); 140 static void start_io(struct ctlr_info *h); 141 142 #ifdef CONFIG_COMPAT 143 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg); 144 #endif 145 146 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 147 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); 148 static struct CommandList *cmd_alloc(struct ctlr_info *h); 149 static struct CommandList *cmd_special_alloc(struct ctlr_info *h); 150 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 152 int cmd_type); 153 154 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 155 static void hpsa_scan_start(struct Scsi_Host *); 156 static int hpsa_scan_finished(struct Scsi_Host *sh, 157 unsigned long elapsed_time); 158 static int hpsa_change_queue_depth(struct scsi_device *sdev, 159 int qdepth, int reason); 160 161 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 162 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 163 static int hpsa_slave_alloc(struct scsi_device *sdev); 164 static void hpsa_slave_destroy(struct scsi_device *sdev); 165 166 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); 167 static int check_for_unit_attention(struct ctlr_info *h, 168 struct CommandList *c); 169 static void check_ioctl_unit_attention(struct ctlr_info *h, 170 struct CommandList *c); 171 /* performant mode helper functions */ 172 static void calc_bucket_map(int *bucket, int num_buckets, 173 int nsgs, int *bucket_map); 174 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 175 static inline u32 next_command(struct ctlr_info *h, u8 q); 176 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, 177 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 178 u64 *cfg_offset); 179 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 180 unsigned long *memory_bar); 181 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 182 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, 183 void __iomem *vaddr, int wait_for_ready); 184 static inline void finish_cmd(struct CommandList *c); 185 #define BOARD_NOT_READY 0 186 #define BOARD_READY 1 187 188 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 189 { 190 unsigned long *priv = shost_priv(sdev->host); 191 return (struct ctlr_info *) *priv; 192 } 193 194 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 195 { 196 unsigned long *priv = shost_priv(sh); 197 return (struct ctlr_info *) *priv; 198 } 199 200 static int check_for_unit_attention(struct ctlr_info *h, 201 struct CommandList *c) 202 { 203 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 204 return 0; 205 206 switch (c->err_info->SenseInfo[12]) { 207 case STATE_CHANGED: 208 dev_warn(&h->pdev->dev, HPSA "%d: a state change " 209 "detected, command retried\n", h->ctlr); 210 break; 211 case LUN_FAILED: 212 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure " 213 "detected, action required\n", h->ctlr); 214 break; 215 case REPORT_LUNS_CHANGED: 216 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data " 217 "changed, action required\n", h->ctlr); 218 /* 219 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 220 * target (array) devices. 221 */ 222 break; 223 case POWER_OR_RESET: 224 dev_warn(&h->pdev->dev, HPSA "%d: a power on " 225 "or device reset detected\n", h->ctlr); 226 break; 227 case UNIT_ATTENTION_CLEARED: 228 dev_warn(&h->pdev->dev, HPSA "%d: unit attention " 229 "cleared by another initiator\n", h->ctlr); 230 break; 231 default: 232 dev_warn(&h->pdev->dev, HPSA "%d: unknown " 233 "unit attention detected\n", h->ctlr); 234 break; 235 } 236 return 1; 237 } 238 239 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 240 { 241 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 242 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 243 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 244 return 0; 245 dev_warn(&h->pdev->dev, HPSA "device busy"); 246 return 1; 247 } 248 249 static ssize_t host_store_rescan(struct device *dev, 250 struct device_attribute *attr, 251 const char *buf, size_t count) 252 { 253 struct ctlr_info *h; 254 struct Scsi_Host *shost = class_to_shost(dev); 255 h = shost_to_hba(shost); 256 hpsa_scan_start(h->scsi_host); 257 return count; 258 } 259 260 static ssize_t host_show_firmware_revision(struct device *dev, 261 struct device_attribute *attr, char *buf) 262 { 263 struct ctlr_info *h; 264 struct Scsi_Host *shost = class_to_shost(dev); 265 unsigned char *fwrev; 266 267 h = shost_to_hba(shost); 268 if (!h->hba_inquiry_data) 269 return 0; 270 fwrev = &h->hba_inquiry_data[32]; 271 return snprintf(buf, 20, "%c%c%c%c\n", 272 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 273 } 274 275 static ssize_t host_show_commands_outstanding(struct device *dev, 276 struct device_attribute *attr, char *buf) 277 { 278 struct Scsi_Host *shost = class_to_shost(dev); 279 struct ctlr_info *h = shost_to_hba(shost); 280 281 return snprintf(buf, 20, "%d\n", h->commands_outstanding); 282 } 283 284 static ssize_t host_show_transport_mode(struct device *dev, 285 struct device_attribute *attr, char *buf) 286 { 287 struct ctlr_info *h; 288 struct Scsi_Host *shost = class_to_shost(dev); 289 290 h = shost_to_hba(shost); 291 return snprintf(buf, 20, "%s\n", 292 h->transMethod & CFGTBL_Trans_Performant ? 293 "performant" : "simple"); 294 } 295 296 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 297 static u32 unresettable_controller[] = { 298 0x324a103C, /* Smart Array P712m */ 299 0x324b103C, /* SmartArray P711m */ 300 0x3223103C, /* Smart Array P800 */ 301 0x3234103C, /* Smart Array P400 */ 302 0x3235103C, /* Smart Array P400i */ 303 0x3211103C, /* Smart Array E200i */ 304 0x3212103C, /* Smart Array E200 */ 305 0x3213103C, /* Smart Array E200i */ 306 0x3214103C, /* Smart Array E200i */ 307 0x3215103C, /* Smart Array E200i */ 308 0x3237103C, /* Smart Array E500 */ 309 0x323D103C, /* Smart Array P700m */ 310 0x40800E11, /* Smart Array 5i */ 311 0x409C0E11, /* Smart Array 6400 */ 312 0x409D0E11, /* Smart Array 6400 EM */ 313 0x40700E11, /* Smart Array 5300 */ 314 0x40820E11, /* Smart Array 532 */ 315 0x40830E11, /* Smart Array 5312 */ 316 0x409A0E11, /* Smart Array 641 */ 317 0x409B0E11, /* Smart Array 642 */ 318 0x40910E11, /* Smart Array 6i */ 319 }; 320 321 /* List of controllers which cannot even be soft reset */ 322 static u32 soft_unresettable_controller[] = { 323 0x40800E11, /* Smart Array 5i */ 324 0x40700E11, /* Smart Array 5300 */ 325 0x40820E11, /* Smart Array 532 */ 326 0x40830E11, /* Smart Array 5312 */ 327 0x409A0E11, /* Smart Array 641 */ 328 0x409B0E11, /* Smart Array 642 */ 329 0x40910E11, /* Smart Array 6i */ 330 /* Exclude 640x boards. These are two pci devices in one slot 331 * which share a battery backed cache module. One controls the 332 * cache, the other accesses the cache through the one that controls 333 * it. If we reset the one controlling the cache, the other will 334 * likely not be happy. Just forbid resetting this conjoined mess. 335 * The 640x isn't really supported by hpsa anyway. 336 */ 337 0x409C0E11, /* Smart Array 6400 */ 338 0x409D0E11, /* Smart Array 6400 EM */ 339 }; 340 341 static int ctlr_is_hard_resettable(u32 board_id) 342 { 343 int i; 344 345 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 346 if (unresettable_controller[i] == board_id) 347 return 0; 348 return 1; 349 } 350 351 static int ctlr_is_soft_resettable(u32 board_id) 352 { 353 int i; 354 355 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) 356 if (soft_unresettable_controller[i] == board_id) 357 return 0; 358 return 1; 359 } 360 361 static int ctlr_is_resettable(u32 board_id) 362 { 363 return ctlr_is_hard_resettable(board_id) || 364 ctlr_is_soft_resettable(board_id); 365 } 366 367 static ssize_t host_show_resettable(struct device *dev, 368 struct device_attribute *attr, char *buf) 369 { 370 struct ctlr_info *h; 371 struct Scsi_Host *shost = class_to_shost(dev); 372 373 h = shost_to_hba(shost); 374 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 375 } 376 377 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 378 { 379 return (scsi3addr[3] & 0xC0) == 0x40; 380 } 381 382 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 383 "1(ADM)", "UNKNOWN" 384 }; 385 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) 386 387 static ssize_t raid_level_show(struct device *dev, 388 struct device_attribute *attr, char *buf) 389 { 390 ssize_t l = 0; 391 unsigned char rlevel; 392 struct ctlr_info *h; 393 struct scsi_device *sdev; 394 struct hpsa_scsi_dev_t *hdev; 395 unsigned long flags; 396 397 sdev = to_scsi_device(dev); 398 h = sdev_to_hba(sdev); 399 spin_lock_irqsave(&h->lock, flags); 400 hdev = sdev->hostdata; 401 if (!hdev) { 402 spin_unlock_irqrestore(&h->lock, flags); 403 return -ENODEV; 404 } 405 406 /* Is this even a logical drive? */ 407 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { 408 spin_unlock_irqrestore(&h->lock, flags); 409 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 410 return l; 411 } 412 413 rlevel = hdev->raid_level; 414 spin_unlock_irqrestore(&h->lock, flags); 415 if (rlevel > RAID_UNKNOWN) 416 rlevel = RAID_UNKNOWN; 417 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 418 return l; 419 } 420 421 static ssize_t lunid_show(struct device *dev, 422 struct device_attribute *attr, char *buf) 423 { 424 struct ctlr_info *h; 425 struct scsi_device *sdev; 426 struct hpsa_scsi_dev_t *hdev; 427 unsigned long flags; 428 unsigned char lunid[8]; 429 430 sdev = to_scsi_device(dev); 431 h = sdev_to_hba(sdev); 432 spin_lock_irqsave(&h->lock, flags); 433 hdev = sdev->hostdata; 434 if (!hdev) { 435 spin_unlock_irqrestore(&h->lock, flags); 436 return -ENODEV; 437 } 438 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 439 spin_unlock_irqrestore(&h->lock, flags); 440 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 441 lunid[0], lunid[1], lunid[2], lunid[3], 442 lunid[4], lunid[5], lunid[6], lunid[7]); 443 } 444 445 static ssize_t unique_id_show(struct device *dev, 446 struct device_attribute *attr, char *buf) 447 { 448 struct ctlr_info *h; 449 struct scsi_device *sdev; 450 struct hpsa_scsi_dev_t *hdev; 451 unsigned long flags; 452 unsigned char sn[16]; 453 454 sdev = to_scsi_device(dev); 455 h = sdev_to_hba(sdev); 456 spin_lock_irqsave(&h->lock, flags); 457 hdev = sdev->hostdata; 458 if (!hdev) { 459 spin_unlock_irqrestore(&h->lock, flags); 460 return -ENODEV; 461 } 462 memcpy(sn, hdev->device_id, sizeof(sn)); 463 spin_unlock_irqrestore(&h->lock, flags); 464 return snprintf(buf, 16 * 2 + 2, 465 "%02X%02X%02X%02X%02X%02X%02X%02X" 466 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 467 sn[0], sn[1], sn[2], sn[3], 468 sn[4], sn[5], sn[6], sn[7], 469 sn[8], sn[9], sn[10], sn[11], 470 sn[12], sn[13], sn[14], sn[15]); 471 } 472 473 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 474 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 475 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 476 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 477 static DEVICE_ATTR(firmware_revision, S_IRUGO, 478 host_show_firmware_revision, NULL); 479 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 480 host_show_commands_outstanding, NULL); 481 static DEVICE_ATTR(transport_mode, S_IRUGO, 482 host_show_transport_mode, NULL); 483 static DEVICE_ATTR(resettable, S_IRUGO, 484 host_show_resettable, NULL); 485 486 static struct device_attribute *hpsa_sdev_attrs[] = { 487 &dev_attr_raid_level, 488 &dev_attr_lunid, 489 &dev_attr_unique_id, 490 NULL, 491 }; 492 493 static struct device_attribute *hpsa_shost_attrs[] = { 494 &dev_attr_rescan, 495 &dev_attr_firmware_revision, 496 &dev_attr_commands_outstanding, 497 &dev_attr_transport_mode, 498 &dev_attr_resettable, 499 NULL, 500 }; 501 502 static struct scsi_host_template hpsa_driver_template = { 503 .module = THIS_MODULE, 504 .name = HPSA, 505 .proc_name = HPSA, 506 .queuecommand = hpsa_scsi_queue_command, 507 .scan_start = hpsa_scan_start, 508 .scan_finished = hpsa_scan_finished, 509 .change_queue_depth = hpsa_change_queue_depth, 510 .this_id = -1, 511 .use_clustering = ENABLE_CLUSTERING, 512 .eh_abort_handler = hpsa_eh_abort_handler, 513 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 514 .ioctl = hpsa_ioctl, 515 .slave_alloc = hpsa_slave_alloc, 516 .slave_destroy = hpsa_slave_destroy, 517 #ifdef CONFIG_COMPAT 518 .compat_ioctl = hpsa_compat_ioctl, 519 #endif 520 .sdev_attrs = hpsa_sdev_attrs, 521 .shost_attrs = hpsa_shost_attrs, 522 .max_sectors = 8192, 523 }; 524 525 526 /* Enqueuing and dequeuing functions for cmdlists. */ 527 static inline void addQ(struct list_head *list, struct CommandList *c) 528 { 529 list_add_tail(&c->list, list); 530 } 531 532 static inline u32 next_command(struct ctlr_info *h, u8 q) 533 { 534 u32 a; 535 struct reply_pool *rq = &h->reply_queue[q]; 536 unsigned long flags; 537 538 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 539 return h->access.command_completed(h, q); 540 541 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 542 a = rq->head[rq->current_entry]; 543 rq->current_entry++; 544 spin_lock_irqsave(&h->lock, flags); 545 h->commands_outstanding--; 546 spin_unlock_irqrestore(&h->lock, flags); 547 } else { 548 a = FIFO_EMPTY; 549 } 550 /* Check for wraparound */ 551 if (rq->current_entry == h->max_commands) { 552 rq->current_entry = 0; 553 rq->wraparound ^= 1; 554 } 555 return a; 556 } 557 558 /* set_performant_mode: Modify the tag for cciss performant 559 * set bit 0 for pull model, bits 3-1 for block fetch 560 * register number 561 */ 562 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c) 563 { 564 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 565 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 566 if (likely(h->msix_vector)) 567 c->Header.ReplyQueue = 568 smp_processor_id() % h->nreply_queues; 569 } 570 } 571 572 static int is_firmware_flash_cmd(u8 *cdb) 573 { 574 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 575 } 576 577 /* 578 * During firmware flash, the heartbeat register may not update as frequently 579 * as it should. So we dial down lockup detection during firmware flash. and 580 * dial it back up when firmware flash completes. 581 */ 582 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 583 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 584 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 585 struct CommandList *c) 586 { 587 if (!is_firmware_flash_cmd(c->Request.CDB)) 588 return; 589 atomic_inc(&h->firmware_flash_in_progress); 590 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 591 } 592 593 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 594 struct CommandList *c) 595 { 596 if (is_firmware_flash_cmd(c->Request.CDB) && 597 atomic_dec_and_test(&h->firmware_flash_in_progress)) 598 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 599 } 600 601 static void enqueue_cmd_and_start_io(struct ctlr_info *h, 602 struct CommandList *c) 603 { 604 unsigned long flags; 605 606 set_performant_mode(h, c); 607 dial_down_lockup_detection_during_fw_flash(h, c); 608 spin_lock_irqsave(&h->lock, flags); 609 addQ(&h->reqQ, c); 610 h->Qdepth++; 611 spin_unlock_irqrestore(&h->lock, flags); 612 start_io(h); 613 } 614 615 static inline void removeQ(struct CommandList *c) 616 { 617 if (WARN_ON(list_empty(&c->list))) 618 return; 619 list_del_init(&c->list); 620 } 621 622 static inline int is_hba_lunid(unsigned char scsi3addr[]) 623 { 624 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 625 } 626 627 static inline int is_scsi_rev_5(struct ctlr_info *h) 628 { 629 if (!h->hba_inquiry_data) 630 return 0; 631 if ((h->hba_inquiry_data[2] & 0x07) == 5) 632 return 1; 633 return 0; 634 } 635 636 static int hpsa_find_target_lun(struct ctlr_info *h, 637 unsigned char scsi3addr[], int bus, int *target, int *lun) 638 { 639 /* finds an unused bus, target, lun for a new physical device 640 * assumes h->devlock is held 641 */ 642 int i, found = 0; 643 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 644 645 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 646 647 for (i = 0; i < h->ndevices; i++) { 648 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 649 __set_bit(h->dev[i]->target, lun_taken); 650 } 651 652 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 653 if (i < HPSA_MAX_DEVICES) { 654 /* *bus = 1; */ 655 *target = i; 656 *lun = 0; 657 found = 1; 658 } 659 return !found; 660 } 661 662 /* Add an entry into h->dev[] array. */ 663 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, 664 struct hpsa_scsi_dev_t *device, 665 struct hpsa_scsi_dev_t *added[], int *nadded) 666 { 667 /* assumes h->devlock is held */ 668 int n = h->ndevices; 669 int i; 670 unsigned char addr1[8], addr2[8]; 671 struct hpsa_scsi_dev_t *sd; 672 673 if (n >= HPSA_MAX_DEVICES) { 674 dev_err(&h->pdev->dev, "too many devices, some will be " 675 "inaccessible.\n"); 676 return -1; 677 } 678 679 /* physical devices do not have lun or target assigned until now. */ 680 if (device->lun != -1) 681 /* Logical device, lun is already assigned. */ 682 goto lun_assigned; 683 684 /* If this device a non-zero lun of a multi-lun device 685 * byte 4 of the 8-byte LUN addr will contain the logical 686 * unit no, zero otherise. 687 */ 688 if (device->scsi3addr[4] == 0) { 689 /* This is not a non-zero lun of a multi-lun device */ 690 if (hpsa_find_target_lun(h, device->scsi3addr, 691 device->bus, &device->target, &device->lun) != 0) 692 return -1; 693 goto lun_assigned; 694 } 695 696 /* This is a non-zero lun of a multi-lun device. 697 * Search through our list and find the device which 698 * has the same 8 byte LUN address, excepting byte 4. 699 * Assign the same bus and target for this new LUN. 700 * Use the logical unit number from the firmware. 701 */ 702 memcpy(addr1, device->scsi3addr, 8); 703 addr1[4] = 0; 704 for (i = 0; i < n; i++) { 705 sd = h->dev[i]; 706 memcpy(addr2, sd->scsi3addr, 8); 707 addr2[4] = 0; 708 /* differ only in byte 4? */ 709 if (memcmp(addr1, addr2, 8) == 0) { 710 device->bus = sd->bus; 711 device->target = sd->target; 712 device->lun = device->scsi3addr[4]; 713 break; 714 } 715 } 716 if (device->lun == -1) { 717 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 718 " suspect firmware bug or unsupported hardware " 719 "configuration.\n"); 720 return -1; 721 } 722 723 lun_assigned: 724 725 h->dev[n] = device; 726 h->ndevices++; 727 added[*nadded] = device; 728 (*nadded)++; 729 730 /* initially, (before registering with scsi layer) we don't 731 * know our hostno and we don't want to print anything first 732 * time anyway (the scsi layer's inquiries will show that info) 733 */ 734 /* if (hostno != -1) */ 735 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", 736 scsi_device_type(device->devtype), hostno, 737 device->bus, device->target, device->lun); 738 return 0; 739 } 740 741 /* Update an entry in h->dev[] array. */ 742 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno, 743 int entry, struct hpsa_scsi_dev_t *new_entry) 744 { 745 /* assumes h->devlock is held */ 746 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 747 748 /* Raid level changed. */ 749 h->dev[entry]->raid_level = new_entry->raid_level; 750 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n", 751 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 752 new_entry->target, new_entry->lun); 753 } 754 755 /* Replace an entry from h->dev[] array. */ 756 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, 757 int entry, struct hpsa_scsi_dev_t *new_entry, 758 struct hpsa_scsi_dev_t *added[], int *nadded, 759 struct hpsa_scsi_dev_t *removed[], int *nremoved) 760 { 761 /* assumes h->devlock is held */ 762 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 763 removed[*nremoved] = h->dev[entry]; 764 (*nremoved)++; 765 766 /* 767 * New physical devices won't have target/lun assigned yet 768 * so we need to preserve the values in the slot we are replacing. 769 */ 770 if (new_entry->target == -1) { 771 new_entry->target = h->dev[entry]->target; 772 new_entry->lun = h->dev[entry]->lun; 773 } 774 775 h->dev[entry] = new_entry; 776 added[*nadded] = new_entry; 777 (*nadded)++; 778 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n", 779 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 780 new_entry->target, new_entry->lun); 781 } 782 783 /* Remove an entry from h->dev[] array. */ 784 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, 785 struct hpsa_scsi_dev_t *removed[], int *nremoved) 786 { 787 /* assumes h->devlock is held */ 788 int i; 789 struct hpsa_scsi_dev_t *sd; 790 791 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 792 793 sd = h->dev[entry]; 794 removed[*nremoved] = h->dev[entry]; 795 (*nremoved)++; 796 797 for (i = entry; i < h->ndevices-1; i++) 798 h->dev[i] = h->dev[i+1]; 799 h->ndevices--; 800 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", 801 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, 802 sd->lun); 803 } 804 805 #define SCSI3ADDR_EQ(a, b) ( \ 806 (a)[7] == (b)[7] && \ 807 (a)[6] == (b)[6] && \ 808 (a)[5] == (b)[5] && \ 809 (a)[4] == (b)[4] && \ 810 (a)[3] == (b)[3] && \ 811 (a)[2] == (b)[2] && \ 812 (a)[1] == (b)[1] && \ 813 (a)[0] == (b)[0]) 814 815 static void fixup_botched_add(struct ctlr_info *h, 816 struct hpsa_scsi_dev_t *added) 817 { 818 /* called when scsi_add_device fails in order to re-adjust 819 * h->dev[] to match the mid layer's view. 820 */ 821 unsigned long flags; 822 int i, j; 823 824 spin_lock_irqsave(&h->lock, flags); 825 for (i = 0; i < h->ndevices; i++) { 826 if (h->dev[i] == added) { 827 for (j = i; j < h->ndevices-1; j++) 828 h->dev[j] = h->dev[j+1]; 829 h->ndevices--; 830 break; 831 } 832 } 833 spin_unlock_irqrestore(&h->lock, flags); 834 kfree(added); 835 } 836 837 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 838 struct hpsa_scsi_dev_t *dev2) 839 { 840 /* we compare everything except lun and target as these 841 * are not yet assigned. Compare parts likely 842 * to differ first 843 */ 844 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 845 sizeof(dev1->scsi3addr)) != 0) 846 return 0; 847 if (memcmp(dev1->device_id, dev2->device_id, 848 sizeof(dev1->device_id)) != 0) 849 return 0; 850 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 851 return 0; 852 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 853 return 0; 854 if (dev1->devtype != dev2->devtype) 855 return 0; 856 if (dev1->bus != dev2->bus) 857 return 0; 858 return 1; 859 } 860 861 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 862 struct hpsa_scsi_dev_t *dev2) 863 { 864 /* Device attributes that can change, but don't mean 865 * that the device is a different device, nor that the OS 866 * needs to be told anything about the change. 867 */ 868 if (dev1->raid_level != dev2->raid_level) 869 return 1; 870 return 0; 871 } 872 873 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 874 * and return needle location in *index. If scsi3addr matches, but not 875 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 876 * location in *index. 877 * In the case of a minor device attribute change, such as RAID level, just 878 * return DEVICE_UPDATED, along with the updated device's location in index. 879 * If needle not found, return DEVICE_NOT_FOUND. 880 */ 881 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 882 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 883 int *index) 884 { 885 int i; 886 #define DEVICE_NOT_FOUND 0 887 #define DEVICE_CHANGED 1 888 #define DEVICE_SAME 2 889 #define DEVICE_UPDATED 3 890 for (i = 0; i < haystack_size; i++) { 891 if (haystack[i] == NULL) /* previously removed. */ 892 continue; 893 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 894 *index = i; 895 if (device_is_the_same(needle, haystack[i])) { 896 if (device_updated(needle, haystack[i])) 897 return DEVICE_UPDATED; 898 return DEVICE_SAME; 899 } else { 900 return DEVICE_CHANGED; 901 } 902 } 903 } 904 *index = -1; 905 return DEVICE_NOT_FOUND; 906 } 907 908 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, 909 struct hpsa_scsi_dev_t *sd[], int nsds) 910 { 911 /* sd contains scsi3 addresses and devtypes, and inquiry 912 * data. This function takes what's in sd to be the current 913 * reality and updates h->dev[] to reflect that reality. 914 */ 915 int i, entry, device_change, changes = 0; 916 struct hpsa_scsi_dev_t *csd; 917 unsigned long flags; 918 struct hpsa_scsi_dev_t **added, **removed; 919 int nadded, nremoved; 920 struct Scsi_Host *sh = NULL; 921 922 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 923 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 924 925 if (!added || !removed) { 926 dev_warn(&h->pdev->dev, "out of memory in " 927 "adjust_hpsa_scsi_table\n"); 928 goto free_and_out; 929 } 930 931 spin_lock_irqsave(&h->devlock, flags); 932 933 /* find any devices in h->dev[] that are not in 934 * sd[] and remove them from h->dev[], and for any 935 * devices which have changed, remove the old device 936 * info and add the new device info. 937 * If minor device attributes change, just update 938 * the existing device structure. 939 */ 940 i = 0; 941 nremoved = 0; 942 nadded = 0; 943 while (i < h->ndevices) { 944 csd = h->dev[i]; 945 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 946 if (device_change == DEVICE_NOT_FOUND) { 947 changes++; 948 hpsa_scsi_remove_entry(h, hostno, i, 949 removed, &nremoved); 950 continue; /* remove ^^^, hence i not incremented */ 951 } else if (device_change == DEVICE_CHANGED) { 952 changes++; 953 hpsa_scsi_replace_entry(h, hostno, i, sd[entry], 954 added, &nadded, removed, &nremoved); 955 /* Set it to NULL to prevent it from being freed 956 * at the bottom of hpsa_update_scsi_devices() 957 */ 958 sd[entry] = NULL; 959 } else if (device_change == DEVICE_UPDATED) { 960 hpsa_scsi_update_entry(h, hostno, i, sd[entry]); 961 } 962 i++; 963 } 964 965 /* Now, make sure every device listed in sd[] is also 966 * listed in h->dev[], adding them if they aren't found 967 */ 968 969 for (i = 0; i < nsds; i++) { 970 if (!sd[i]) /* if already added above. */ 971 continue; 972 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 973 h->ndevices, &entry); 974 if (device_change == DEVICE_NOT_FOUND) { 975 changes++; 976 if (hpsa_scsi_add_entry(h, hostno, sd[i], 977 added, &nadded) != 0) 978 break; 979 sd[i] = NULL; /* prevent from being freed later. */ 980 } else if (device_change == DEVICE_CHANGED) { 981 /* should never happen... */ 982 changes++; 983 dev_warn(&h->pdev->dev, 984 "device unexpectedly changed.\n"); 985 /* but if it does happen, we just ignore that device */ 986 } 987 } 988 spin_unlock_irqrestore(&h->devlock, flags); 989 990 /* Don't notify scsi mid layer of any changes the first time through 991 * (or if there are no changes) scsi_scan_host will do it later the 992 * first time through. 993 */ 994 if (hostno == -1 || !changes) 995 goto free_and_out; 996 997 sh = h->scsi_host; 998 /* Notify scsi mid layer of any removed devices */ 999 for (i = 0; i < nremoved; i++) { 1000 struct scsi_device *sdev = 1001 scsi_device_lookup(sh, removed[i]->bus, 1002 removed[i]->target, removed[i]->lun); 1003 if (sdev != NULL) { 1004 scsi_remove_device(sdev); 1005 scsi_device_put(sdev); 1006 } else { 1007 /* We don't expect to get here. 1008 * future cmds to this device will get selection 1009 * timeout as if the device was gone. 1010 */ 1011 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " 1012 " for removal.", hostno, removed[i]->bus, 1013 removed[i]->target, removed[i]->lun); 1014 } 1015 kfree(removed[i]); 1016 removed[i] = NULL; 1017 } 1018 1019 /* Notify scsi mid layer of any added devices */ 1020 for (i = 0; i < nadded; i++) { 1021 if (scsi_add_device(sh, added[i]->bus, 1022 added[i]->target, added[i]->lun) == 0) 1023 continue; 1024 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " 1025 "device not added.\n", hostno, added[i]->bus, 1026 added[i]->target, added[i]->lun); 1027 /* now we have to remove it from h->dev, 1028 * since it didn't get added to scsi mid layer 1029 */ 1030 fixup_botched_add(h, added[i]); 1031 } 1032 1033 free_and_out: 1034 kfree(added); 1035 kfree(removed); 1036 } 1037 1038 /* 1039 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t * 1040 * Assume's h->devlock is held. 1041 */ 1042 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1043 int bus, int target, int lun) 1044 { 1045 int i; 1046 struct hpsa_scsi_dev_t *sd; 1047 1048 for (i = 0; i < h->ndevices; i++) { 1049 sd = h->dev[i]; 1050 if (sd->bus == bus && sd->target == target && sd->lun == lun) 1051 return sd; 1052 } 1053 return NULL; 1054 } 1055 1056 /* link sdev->hostdata to our per-device structure. */ 1057 static int hpsa_slave_alloc(struct scsi_device *sdev) 1058 { 1059 struct hpsa_scsi_dev_t *sd; 1060 unsigned long flags; 1061 struct ctlr_info *h; 1062 1063 h = sdev_to_hba(sdev); 1064 spin_lock_irqsave(&h->devlock, flags); 1065 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1066 sdev_id(sdev), sdev->lun); 1067 if (sd != NULL) 1068 sdev->hostdata = sd; 1069 spin_unlock_irqrestore(&h->devlock, flags); 1070 return 0; 1071 } 1072 1073 static void hpsa_slave_destroy(struct scsi_device *sdev) 1074 { 1075 /* nothing to do. */ 1076 } 1077 1078 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 1079 { 1080 int i; 1081 1082 if (!h->cmd_sg_list) 1083 return; 1084 for (i = 0; i < h->nr_cmds; i++) { 1085 kfree(h->cmd_sg_list[i]); 1086 h->cmd_sg_list[i] = NULL; 1087 } 1088 kfree(h->cmd_sg_list); 1089 h->cmd_sg_list = NULL; 1090 } 1091 1092 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h) 1093 { 1094 int i; 1095 1096 if (h->chainsize <= 0) 1097 return 0; 1098 1099 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 1100 GFP_KERNEL); 1101 if (!h->cmd_sg_list) 1102 return -ENOMEM; 1103 for (i = 0; i < h->nr_cmds; i++) { 1104 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 1105 h->chainsize, GFP_KERNEL); 1106 if (!h->cmd_sg_list[i]) 1107 goto clean; 1108 } 1109 return 0; 1110 1111 clean: 1112 hpsa_free_sg_chain_blocks(h); 1113 return -ENOMEM; 1114 } 1115 1116 static void hpsa_map_sg_chain_block(struct ctlr_info *h, 1117 struct CommandList *c) 1118 { 1119 struct SGDescriptor *chain_sg, *chain_block; 1120 u64 temp64; 1121 1122 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1123 chain_block = h->cmd_sg_list[c->cmdindex]; 1124 chain_sg->Ext = HPSA_SG_CHAIN; 1125 chain_sg->Len = sizeof(*chain_sg) * 1126 (c->Header.SGTotal - h->max_cmd_sg_entries); 1127 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len, 1128 PCI_DMA_TODEVICE); 1129 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL); 1130 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL); 1131 } 1132 1133 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 1134 struct CommandList *c) 1135 { 1136 struct SGDescriptor *chain_sg; 1137 union u64bit temp64; 1138 1139 if (c->Header.SGTotal <= h->max_cmd_sg_entries) 1140 return; 1141 1142 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1143 temp64.val32.lower = chain_sg->Addr.lower; 1144 temp64.val32.upper = chain_sg->Addr.upper; 1145 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); 1146 } 1147 1148 static void complete_scsi_command(struct CommandList *cp) 1149 { 1150 struct scsi_cmnd *cmd; 1151 struct ctlr_info *h; 1152 struct ErrorInfo *ei; 1153 1154 unsigned char sense_key; 1155 unsigned char asc; /* additional sense code */ 1156 unsigned char ascq; /* additional sense code qualifier */ 1157 unsigned long sense_data_size; 1158 1159 ei = cp->err_info; 1160 cmd = (struct scsi_cmnd *) cp->scsi_cmd; 1161 h = cp->h; 1162 1163 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 1164 if (cp->Header.SGTotal > h->max_cmd_sg_entries) 1165 hpsa_unmap_sg_chain_block(h, cp); 1166 1167 cmd->result = (DID_OK << 16); /* host byte */ 1168 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 1169 cmd->result |= ei->ScsiStatus; 1170 1171 /* copy the sense data whether we need to or not. */ 1172 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 1173 sense_data_size = SCSI_SENSE_BUFFERSIZE; 1174 else 1175 sense_data_size = sizeof(ei->SenseInfo); 1176 if (ei->SenseLen < sense_data_size) 1177 sense_data_size = ei->SenseLen; 1178 1179 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 1180 scsi_set_resid(cmd, ei->ResidualCnt); 1181 1182 if (ei->CommandStatus == 0) { 1183 cmd->scsi_done(cmd); 1184 cmd_free(h, cp); 1185 return; 1186 } 1187 1188 /* an error has occurred */ 1189 switch (ei->CommandStatus) { 1190 1191 case CMD_TARGET_STATUS: 1192 if (ei->ScsiStatus) { 1193 /* Get sense key */ 1194 sense_key = 0xf & ei->SenseInfo[2]; 1195 /* Get additional sense code */ 1196 asc = ei->SenseInfo[12]; 1197 /* Get addition sense code qualifier */ 1198 ascq = ei->SenseInfo[13]; 1199 } 1200 1201 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 1202 if (check_for_unit_attention(h, cp)) { 1203 cmd->result = DID_SOFT_ERROR << 16; 1204 break; 1205 } 1206 if (sense_key == ILLEGAL_REQUEST) { 1207 /* 1208 * SCSI REPORT_LUNS is commonly unsupported on 1209 * Smart Array. Suppress noisy complaint. 1210 */ 1211 if (cp->Request.CDB[0] == REPORT_LUNS) 1212 break; 1213 1214 /* If ASC/ASCQ indicate Logical Unit 1215 * Not Supported condition, 1216 */ 1217 if ((asc == 0x25) && (ascq == 0x0)) { 1218 dev_warn(&h->pdev->dev, "cp %p " 1219 "has check condition\n", cp); 1220 break; 1221 } 1222 } 1223 1224 if (sense_key == NOT_READY) { 1225 /* If Sense is Not Ready, Logical Unit 1226 * Not ready, Manual Intervention 1227 * required 1228 */ 1229 if ((asc == 0x04) && (ascq == 0x03)) { 1230 dev_warn(&h->pdev->dev, "cp %p " 1231 "has check condition: unit " 1232 "not ready, manual " 1233 "intervention required\n", cp); 1234 break; 1235 } 1236 } 1237 if (sense_key == ABORTED_COMMAND) { 1238 /* Aborted command is retryable */ 1239 dev_warn(&h->pdev->dev, "cp %p " 1240 "has check condition: aborted command: " 1241 "ASC: 0x%x, ASCQ: 0x%x\n", 1242 cp, asc, ascq); 1243 cmd->result = DID_SOFT_ERROR << 16; 1244 break; 1245 } 1246 /* Must be some other type of check condition */ 1247 dev_dbg(&h->pdev->dev, "cp %p has check condition: " 1248 "unknown type: " 1249 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1250 "Returning result: 0x%x, " 1251 "cmd=[%02x %02x %02x %02x %02x " 1252 "%02x %02x %02x %02x %02x %02x " 1253 "%02x %02x %02x %02x %02x]\n", 1254 cp, sense_key, asc, ascq, 1255 cmd->result, 1256 cmd->cmnd[0], cmd->cmnd[1], 1257 cmd->cmnd[2], cmd->cmnd[3], 1258 cmd->cmnd[4], cmd->cmnd[5], 1259 cmd->cmnd[6], cmd->cmnd[7], 1260 cmd->cmnd[8], cmd->cmnd[9], 1261 cmd->cmnd[10], cmd->cmnd[11], 1262 cmd->cmnd[12], cmd->cmnd[13], 1263 cmd->cmnd[14], cmd->cmnd[15]); 1264 break; 1265 } 1266 1267 1268 /* Problem was not a check condition 1269 * Pass it up to the upper layers... 1270 */ 1271 if (ei->ScsiStatus) { 1272 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 1273 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1274 "Returning result: 0x%x\n", 1275 cp, ei->ScsiStatus, 1276 sense_key, asc, ascq, 1277 cmd->result); 1278 } else { /* scsi status is zero??? How??? */ 1279 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 1280 "Returning no connection.\n", cp), 1281 1282 /* Ordinarily, this case should never happen, 1283 * but there is a bug in some released firmware 1284 * revisions that allows it to happen if, for 1285 * example, a 4100 backplane loses power and 1286 * the tape drive is in it. We assume that 1287 * it's a fatal error of some kind because we 1288 * can't show that it wasn't. We will make it 1289 * look like selection timeout since that is 1290 * the most common reason for this to occur, 1291 * and it's severe enough. 1292 */ 1293 1294 cmd->result = DID_NO_CONNECT << 16; 1295 } 1296 break; 1297 1298 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1299 break; 1300 case CMD_DATA_OVERRUN: 1301 dev_warn(&h->pdev->dev, "cp %p has" 1302 " completed with data overrun " 1303 "reported\n", cp); 1304 break; 1305 case CMD_INVALID: { 1306 /* print_bytes(cp, sizeof(*cp), 1, 0); 1307 print_cmd(cp); */ 1308 /* We get CMD_INVALID if you address a non-existent device 1309 * instead of a selection timeout (no response). You will 1310 * see this if you yank out a drive, then try to access it. 1311 * This is kind of a shame because it means that any other 1312 * CMD_INVALID (e.g. driver bug) will get interpreted as a 1313 * missing target. */ 1314 cmd->result = DID_NO_CONNECT << 16; 1315 } 1316 break; 1317 case CMD_PROTOCOL_ERR: 1318 dev_warn(&h->pdev->dev, "cp %p has " 1319 "protocol error \n", cp); 1320 break; 1321 case CMD_HARDWARE_ERR: 1322 cmd->result = DID_ERROR << 16; 1323 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp); 1324 break; 1325 case CMD_CONNECTION_LOST: 1326 cmd->result = DID_ERROR << 16; 1327 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); 1328 break; 1329 case CMD_ABORTED: 1330 cmd->result = DID_ABORT << 16; 1331 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", 1332 cp, ei->ScsiStatus); 1333 break; 1334 case CMD_ABORT_FAILED: 1335 cmd->result = DID_ERROR << 16; 1336 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); 1337 break; 1338 case CMD_UNSOLICITED_ABORT: 1339 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 1340 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited " 1341 "abort\n", cp); 1342 break; 1343 case CMD_TIMEOUT: 1344 cmd->result = DID_TIME_OUT << 16; 1345 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); 1346 break; 1347 case CMD_UNABORTABLE: 1348 cmd->result = DID_ERROR << 16; 1349 dev_warn(&h->pdev->dev, "Command unabortable\n"); 1350 break; 1351 default: 1352 cmd->result = DID_ERROR << 16; 1353 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 1354 cp, ei->CommandStatus); 1355 } 1356 cmd->scsi_done(cmd); 1357 cmd_free(h, cp); 1358 } 1359 1360 static void hpsa_pci_unmap(struct pci_dev *pdev, 1361 struct CommandList *c, int sg_used, int data_direction) 1362 { 1363 int i; 1364 union u64bit addr64; 1365 1366 for (i = 0; i < sg_used; i++) { 1367 addr64.val32.lower = c->SG[i].Addr.lower; 1368 addr64.val32.upper = c->SG[i].Addr.upper; 1369 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len, 1370 data_direction); 1371 } 1372 } 1373 1374 static void hpsa_map_one(struct pci_dev *pdev, 1375 struct CommandList *cp, 1376 unsigned char *buf, 1377 size_t buflen, 1378 int data_direction) 1379 { 1380 u64 addr64; 1381 1382 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 1383 cp->Header.SGList = 0; 1384 cp->Header.SGTotal = 0; 1385 return; 1386 } 1387 1388 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction); 1389 cp->SG[0].Addr.lower = 1390 (u32) (addr64 & (u64) 0x00000000FFFFFFFF); 1391 cp->SG[0].Addr.upper = 1392 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF); 1393 cp->SG[0].Len = buflen; 1394 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */ 1395 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */ 1396 } 1397 1398 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 1399 struct CommandList *c) 1400 { 1401 DECLARE_COMPLETION_ONSTACK(wait); 1402 1403 c->waiting = &wait; 1404 enqueue_cmd_and_start_io(h, c); 1405 wait_for_completion(&wait); 1406 } 1407 1408 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h, 1409 struct CommandList *c) 1410 { 1411 unsigned long flags; 1412 1413 /* If controller lockup detected, fake a hardware error. */ 1414 spin_lock_irqsave(&h->lock, flags); 1415 if (unlikely(h->lockup_detected)) { 1416 spin_unlock_irqrestore(&h->lock, flags); 1417 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 1418 } else { 1419 spin_unlock_irqrestore(&h->lock, flags); 1420 hpsa_scsi_do_simple_cmd_core(h, c); 1421 } 1422 } 1423 1424 #define MAX_DRIVER_CMD_RETRIES 25 1425 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 1426 struct CommandList *c, int data_direction) 1427 { 1428 int backoff_time = 10, retry_count = 0; 1429 1430 do { 1431 memset(c->err_info, 0, sizeof(*c->err_info)); 1432 hpsa_scsi_do_simple_cmd_core(h, c); 1433 retry_count++; 1434 if (retry_count > 3) { 1435 msleep(backoff_time); 1436 if (backoff_time < 1000) 1437 backoff_time *= 2; 1438 } 1439 } while ((check_for_unit_attention(h, c) || 1440 check_for_busy(h, c)) && 1441 retry_count <= MAX_DRIVER_CMD_RETRIES); 1442 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 1443 } 1444 1445 static void hpsa_scsi_interpret_error(struct CommandList *cp) 1446 { 1447 struct ErrorInfo *ei; 1448 struct device *d = &cp->h->pdev->dev; 1449 1450 ei = cp->err_info; 1451 switch (ei->CommandStatus) { 1452 case CMD_TARGET_STATUS: 1453 dev_warn(d, "cmd %p has completed with errors\n", cp); 1454 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp, 1455 ei->ScsiStatus); 1456 if (ei->ScsiStatus == 0) 1457 dev_warn(d, "SCSI status is abnormally zero. " 1458 "(probably indicates selection timeout " 1459 "reported incorrectly due to a known " 1460 "firmware bug, circa July, 2001.)\n"); 1461 break; 1462 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1463 dev_info(d, "UNDERRUN\n"); 1464 break; 1465 case CMD_DATA_OVERRUN: 1466 dev_warn(d, "cp %p has completed with data overrun\n", cp); 1467 break; 1468 case CMD_INVALID: { 1469 /* controller unfortunately reports SCSI passthru's 1470 * to non-existent targets as invalid commands. 1471 */ 1472 dev_warn(d, "cp %p is reported invalid (probably means " 1473 "target device no longer present)\n", cp); 1474 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0); 1475 print_cmd(cp); */ 1476 } 1477 break; 1478 case CMD_PROTOCOL_ERR: 1479 dev_warn(d, "cp %p has protocol error \n", cp); 1480 break; 1481 case CMD_HARDWARE_ERR: 1482 /* cmd->result = DID_ERROR << 16; */ 1483 dev_warn(d, "cp %p had hardware error\n", cp); 1484 break; 1485 case CMD_CONNECTION_LOST: 1486 dev_warn(d, "cp %p had connection lost\n", cp); 1487 break; 1488 case CMD_ABORTED: 1489 dev_warn(d, "cp %p was aborted\n", cp); 1490 break; 1491 case CMD_ABORT_FAILED: 1492 dev_warn(d, "cp %p reports abort failed\n", cp); 1493 break; 1494 case CMD_UNSOLICITED_ABORT: 1495 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp); 1496 break; 1497 case CMD_TIMEOUT: 1498 dev_warn(d, "cp %p timed out\n", cp); 1499 break; 1500 case CMD_UNABORTABLE: 1501 dev_warn(d, "Command unabortable\n"); 1502 break; 1503 default: 1504 dev_warn(d, "cp %p returned unknown status %x\n", cp, 1505 ei->CommandStatus); 1506 } 1507 } 1508 1509 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 1510 unsigned char page, unsigned char *buf, 1511 unsigned char bufsize) 1512 { 1513 int rc = IO_OK; 1514 struct CommandList *c; 1515 struct ErrorInfo *ei; 1516 1517 c = cmd_special_alloc(h); 1518 1519 if (c == NULL) { /* trouble... */ 1520 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1521 return -ENOMEM; 1522 } 1523 1524 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD); 1525 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1526 ei = c->err_info; 1527 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 1528 hpsa_scsi_interpret_error(c); 1529 rc = -1; 1530 } 1531 cmd_special_free(h, c); 1532 return rc; 1533 } 1534 1535 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr) 1536 { 1537 int rc = IO_OK; 1538 struct CommandList *c; 1539 struct ErrorInfo *ei; 1540 1541 c = cmd_special_alloc(h); 1542 1543 if (c == NULL) { /* trouble... */ 1544 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1545 return -ENOMEM; 1546 } 1547 1548 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG); 1549 hpsa_scsi_do_simple_cmd_core(h, c); 1550 /* no unmap needed here because no data xfer. */ 1551 1552 ei = c->err_info; 1553 if (ei->CommandStatus != 0) { 1554 hpsa_scsi_interpret_error(c); 1555 rc = -1; 1556 } 1557 cmd_special_free(h, c); 1558 return rc; 1559 } 1560 1561 static void hpsa_get_raid_level(struct ctlr_info *h, 1562 unsigned char *scsi3addr, unsigned char *raid_level) 1563 { 1564 int rc; 1565 unsigned char *buf; 1566 1567 *raid_level = RAID_UNKNOWN; 1568 buf = kzalloc(64, GFP_KERNEL); 1569 if (!buf) 1570 return; 1571 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64); 1572 if (rc == 0) 1573 *raid_level = buf[8]; 1574 if (*raid_level > RAID_UNKNOWN) 1575 *raid_level = RAID_UNKNOWN; 1576 kfree(buf); 1577 return; 1578 } 1579 1580 /* Get the device id from inquiry page 0x83 */ 1581 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 1582 unsigned char *device_id, int buflen) 1583 { 1584 int rc; 1585 unsigned char *buf; 1586 1587 if (buflen > 16) 1588 buflen = 16; 1589 buf = kzalloc(64, GFP_KERNEL); 1590 if (!buf) 1591 return -1; 1592 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64); 1593 if (rc == 0) 1594 memcpy(device_id, &buf[8], buflen); 1595 kfree(buf); 1596 return rc != 0; 1597 } 1598 1599 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 1600 struct ReportLUNdata *buf, int bufsize, 1601 int extended_response) 1602 { 1603 int rc = IO_OK; 1604 struct CommandList *c; 1605 unsigned char scsi3addr[8]; 1606 struct ErrorInfo *ei; 1607 1608 c = cmd_special_alloc(h); 1609 if (c == NULL) { /* trouble... */ 1610 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1611 return -1; 1612 } 1613 /* address the controller */ 1614 memset(scsi3addr, 0, sizeof(scsi3addr)); 1615 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 1616 buf, bufsize, 0, scsi3addr, TYPE_CMD); 1617 if (extended_response) 1618 c->Request.CDB[1] = extended_response; 1619 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1620 ei = c->err_info; 1621 if (ei->CommandStatus != 0 && 1622 ei->CommandStatus != CMD_DATA_UNDERRUN) { 1623 hpsa_scsi_interpret_error(c); 1624 rc = -1; 1625 } 1626 cmd_special_free(h, c); 1627 return rc; 1628 } 1629 1630 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 1631 struct ReportLUNdata *buf, 1632 int bufsize, int extended_response) 1633 { 1634 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); 1635 } 1636 1637 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 1638 struct ReportLUNdata *buf, int bufsize) 1639 { 1640 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 1641 } 1642 1643 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 1644 int bus, int target, int lun) 1645 { 1646 device->bus = bus; 1647 device->target = target; 1648 device->lun = lun; 1649 } 1650 1651 static int hpsa_update_device_info(struct ctlr_info *h, 1652 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 1653 unsigned char *is_OBDR_device) 1654 { 1655 1656 #define OBDR_SIG_OFFSET 43 1657 #define OBDR_TAPE_SIG "$DR-10" 1658 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 1659 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 1660 1661 unsigned char *inq_buff; 1662 unsigned char *obdr_sig; 1663 1664 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 1665 if (!inq_buff) 1666 goto bail_out; 1667 1668 /* Do an inquiry to the device to see what it is. */ 1669 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 1670 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 1671 /* Inquiry failed (msg printed already) */ 1672 dev_err(&h->pdev->dev, 1673 "hpsa_update_device_info: inquiry failed\n"); 1674 goto bail_out; 1675 } 1676 1677 this_device->devtype = (inq_buff[0] & 0x1f); 1678 memcpy(this_device->scsi3addr, scsi3addr, 8); 1679 memcpy(this_device->vendor, &inq_buff[8], 1680 sizeof(this_device->vendor)); 1681 memcpy(this_device->model, &inq_buff[16], 1682 sizeof(this_device->model)); 1683 memset(this_device->device_id, 0, 1684 sizeof(this_device->device_id)); 1685 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 1686 sizeof(this_device->device_id)); 1687 1688 if (this_device->devtype == TYPE_DISK && 1689 is_logical_dev_addr_mode(scsi3addr)) 1690 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 1691 else 1692 this_device->raid_level = RAID_UNKNOWN; 1693 1694 if (is_OBDR_device) { 1695 /* See if this is a One-Button-Disaster-Recovery device 1696 * by looking for "$DR-10" at offset 43 in inquiry data. 1697 */ 1698 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 1699 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 1700 strncmp(obdr_sig, OBDR_TAPE_SIG, 1701 OBDR_SIG_LEN) == 0); 1702 } 1703 1704 kfree(inq_buff); 1705 return 0; 1706 1707 bail_out: 1708 kfree(inq_buff); 1709 return 1; 1710 } 1711 1712 static unsigned char *ext_target_model[] = { 1713 "MSA2012", 1714 "MSA2024", 1715 "MSA2312", 1716 "MSA2324", 1717 "P2000 G3 SAS", 1718 NULL, 1719 }; 1720 1721 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1722 { 1723 int i; 1724 1725 for (i = 0; ext_target_model[i]; i++) 1726 if (strncmp(device->model, ext_target_model[i], 1727 strlen(ext_target_model[i])) == 0) 1728 return 1; 1729 return 0; 1730 } 1731 1732 /* Helper function to assign bus, target, lun mapping of devices. 1733 * Puts non-external target logical volumes on bus 0, external target logical 1734 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. 1735 * Logical drive target and lun are assigned at this time, but 1736 * physical device lun and target assignment are deferred (assigned 1737 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 1738 */ 1739 static void figure_bus_target_lun(struct ctlr_info *h, 1740 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 1741 { 1742 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); 1743 1744 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 1745 /* physical device, target and lun filled in later */ 1746 if (is_hba_lunid(lunaddrbytes)) 1747 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff); 1748 else 1749 /* defer target, lun assignment for physical devices */ 1750 hpsa_set_bus_target_lun(device, 2, -1, -1); 1751 return; 1752 } 1753 /* It's a logical device */ 1754 if (is_ext_target(h, device)) { 1755 /* external target way, put logicals on bus 1 1756 * and match target/lun numbers box 1757 * reports, other smart array, bus 0, target 0, match lunid 1758 */ 1759 hpsa_set_bus_target_lun(device, 1760 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff); 1761 return; 1762 } 1763 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff); 1764 } 1765 1766 /* 1767 * If there is no lun 0 on a target, linux won't find any devices. 1768 * For the external targets (arrays), we have to manually detect the enclosure 1769 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report 1770 * it for some reason. *tmpdevice is the target we're adding, 1771 * this_device is a pointer into the current element of currentsd[] 1772 * that we're building up in update_scsi_devices(), below. 1773 * lunzerobits is a bitmap that tracks which targets already have a 1774 * lun 0 assigned. 1775 * Returns 1 if an enclosure was added, 0 if not. 1776 */ 1777 static int add_ext_target_dev(struct ctlr_info *h, 1778 struct hpsa_scsi_dev_t *tmpdevice, 1779 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes, 1780 unsigned long lunzerobits[], int *n_ext_target_devs) 1781 { 1782 unsigned char scsi3addr[8]; 1783 1784 if (test_bit(tmpdevice->target, lunzerobits)) 1785 return 0; /* There is already a lun 0 on this target. */ 1786 1787 if (!is_logical_dev_addr_mode(lunaddrbytes)) 1788 return 0; /* It's the logical targets that may lack lun 0. */ 1789 1790 if (!is_ext_target(h, tmpdevice)) 1791 return 0; /* Only external target devices have this problem. */ 1792 1793 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */ 1794 return 0; 1795 1796 memset(scsi3addr, 0, 8); 1797 scsi3addr[3] = tmpdevice->target; 1798 if (is_hba_lunid(scsi3addr)) 1799 return 0; /* Don't add the RAID controller here. */ 1800 1801 if (is_scsi_rev_5(h)) 1802 return 0; /* p1210m doesn't need to do this. */ 1803 1804 if (*n_ext_target_devs >= MAX_EXT_TARGETS) { 1805 dev_warn(&h->pdev->dev, "Maximum number of external " 1806 "target devices exceeded. Check your hardware " 1807 "configuration."); 1808 return 0; 1809 } 1810 1811 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL)) 1812 return 0; 1813 (*n_ext_target_devs)++; 1814 hpsa_set_bus_target_lun(this_device, 1815 tmpdevice->bus, tmpdevice->target, 0); 1816 set_bit(tmpdevice->target, lunzerobits); 1817 return 1; 1818 } 1819 1820 /* 1821 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 1822 * logdev. The number of luns in physdev and logdev are returned in 1823 * *nphysicals and *nlogicals, respectively. 1824 * Returns 0 on success, -1 otherwise. 1825 */ 1826 static int hpsa_gather_lun_info(struct ctlr_info *h, 1827 int reportlunsize, 1828 struct ReportLUNdata *physdev, u32 *nphysicals, 1829 struct ReportLUNdata *logdev, u32 *nlogicals) 1830 { 1831 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { 1832 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 1833 return -1; 1834 } 1835 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8; 1836 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 1837 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." 1838 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1839 *nphysicals - HPSA_MAX_PHYS_LUN); 1840 *nphysicals = HPSA_MAX_PHYS_LUN; 1841 } 1842 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) { 1843 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 1844 return -1; 1845 } 1846 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 1847 /* Reject Logicals in excess of our max capability. */ 1848 if (*nlogicals > HPSA_MAX_LUN) { 1849 dev_warn(&h->pdev->dev, 1850 "maximum logical LUNs (%d) exceeded. " 1851 "%d LUNs ignored.\n", HPSA_MAX_LUN, 1852 *nlogicals - HPSA_MAX_LUN); 1853 *nlogicals = HPSA_MAX_LUN; 1854 } 1855 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 1856 dev_warn(&h->pdev->dev, 1857 "maximum logical + physical LUNs (%d) exceeded. " 1858 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1859 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 1860 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 1861 } 1862 return 0; 1863 } 1864 1865 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i, 1866 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list, 1867 struct ReportLUNdata *logdev_list) 1868 { 1869 /* Helper function, figure out where the LUN ID info is coming from 1870 * given index i, lists of physical and logical devices, where in 1871 * the list the raid controller is supposed to appear (first or last) 1872 */ 1873 1874 int logicals_start = nphysicals + (raid_ctlr_position == 0); 1875 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 1876 1877 if (i == raid_ctlr_position) 1878 return RAID_CTLR_LUNID; 1879 1880 if (i < logicals_start) 1881 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0]; 1882 1883 if (i < last_device) 1884 return &logdev_list->LUN[i - nphysicals - 1885 (raid_ctlr_position == 0)][0]; 1886 BUG(); 1887 return NULL; 1888 } 1889 1890 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) 1891 { 1892 /* the idea here is we could get notified 1893 * that some devices have changed, so we do a report 1894 * physical luns and report logical luns cmd, and adjust 1895 * our list of devices accordingly. 1896 * 1897 * The scsi3addr's of devices won't change so long as the 1898 * adapter is not reset. That means we can rescan and 1899 * tell which devices we already know about, vs. new 1900 * devices, vs. disappearing devices. 1901 */ 1902 struct ReportLUNdata *physdev_list = NULL; 1903 struct ReportLUNdata *logdev_list = NULL; 1904 u32 nphysicals = 0; 1905 u32 nlogicals = 0; 1906 u32 ndev_allocated = 0; 1907 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 1908 int ncurrent = 0; 1909 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; 1910 int i, n_ext_target_devs, ndevs_to_allocate; 1911 int raid_ctlr_position; 1912 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 1913 1914 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 1915 physdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1916 logdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1917 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 1918 1919 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) { 1920 dev_err(&h->pdev->dev, "out of memory\n"); 1921 goto out; 1922 } 1923 memset(lunzerobits, 0, sizeof(lunzerobits)); 1924 1925 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals, 1926 logdev_list, &nlogicals)) 1927 goto out; 1928 1929 /* We might see up to the maximum number of logical and physical disks 1930 * plus external target devices, and a device for the local RAID 1931 * controller. 1932 */ 1933 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 1934 1935 /* Allocate the per device structures */ 1936 for (i = 0; i < ndevs_to_allocate; i++) { 1937 if (i >= HPSA_MAX_DEVICES) { 1938 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 1939 " %d devices ignored.\n", HPSA_MAX_DEVICES, 1940 ndevs_to_allocate - HPSA_MAX_DEVICES); 1941 break; 1942 } 1943 1944 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 1945 if (!currentsd[i]) { 1946 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 1947 __FILE__, __LINE__); 1948 goto out; 1949 } 1950 ndev_allocated++; 1951 } 1952 1953 if (unlikely(is_scsi_rev_5(h))) 1954 raid_ctlr_position = 0; 1955 else 1956 raid_ctlr_position = nphysicals + nlogicals; 1957 1958 /* adjust our table of devices */ 1959 n_ext_target_devs = 0; 1960 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 1961 u8 *lunaddrbytes, is_OBDR = 0; 1962 1963 /* Figure out where the LUN ID info is coming from */ 1964 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 1965 i, nphysicals, nlogicals, physdev_list, logdev_list); 1966 /* skip masked physical devices. */ 1967 if (lunaddrbytes[3] & 0xC0 && 1968 i < nphysicals + (raid_ctlr_position == 0)) 1969 continue; 1970 1971 /* Get device type, vendor, model, device id */ 1972 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 1973 &is_OBDR)) 1974 continue; /* skip it if we can't talk to it. */ 1975 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 1976 this_device = currentsd[ncurrent]; 1977 1978 /* 1979 * For external target devices, we have to insert a LUN 0 which 1980 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there 1981 * is nonetheless an enclosure device there. We have to 1982 * present that otherwise linux won't find anything if 1983 * there is no lun 0. 1984 */ 1985 if (add_ext_target_dev(h, tmpdevice, this_device, 1986 lunaddrbytes, lunzerobits, 1987 &n_ext_target_devs)) { 1988 ncurrent++; 1989 this_device = currentsd[ncurrent]; 1990 } 1991 1992 *this_device = *tmpdevice; 1993 1994 switch (this_device->devtype) { 1995 case TYPE_ROM: 1996 /* We don't *really* support actual CD-ROM devices, 1997 * just "One Button Disaster Recovery" tape drive 1998 * which temporarily pretends to be a CD-ROM drive. 1999 * So we check that the device is really an OBDR tape 2000 * device by checking for "$DR-10" in bytes 43-48 of 2001 * the inquiry data. 2002 */ 2003 if (is_OBDR) 2004 ncurrent++; 2005 break; 2006 case TYPE_DISK: 2007 if (i < nphysicals) 2008 break; 2009 ncurrent++; 2010 break; 2011 case TYPE_TAPE: 2012 case TYPE_MEDIUM_CHANGER: 2013 ncurrent++; 2014 break; 2015 case TYPE_RAID: 2016 /* Only present the Smartarray HBA as a RAID controller. 2017 * If it's a RAID controller other than the HBA itself 2018 * (an external RAID controller, MSA500 or similar) 2019 * don't present it. 2020 */ 2021 if (!is_hba_lunid(lunaddrbytes)) 2022 break; 2023 ncurrent++; 2024 break; 2025 default: 2026 break; 2027 } 2028 if (ncurrent >= HPSA_MAX_DEVICES) 2029 break; 2030 } 2031 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); 2032 out: 2033 kfree(tmpdevice); 2034 for (i = 0; i < ndev_allocated; i++) 2035 kfree(currentsd[i]); 2036 kfree(currentsd); 2037 kfree(physdev_list); 2038 kfree(logdev_list); 2039 } 2040 2041 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 2042 * dma mapping and fills in the scatter gather entries of the 2043 * hpsa command, cp. 2044 */ 2045 static int hpsa_scatter_gather(struct ctlr_info *h, 2046 struct CommandList *cp, 2047 struct scsi_cmnd *cmd) 2048 { 2049 unsigned int len; 2050 struct scatterlist *sg; 2051 u64 addr64; 2052 int use_sg, i, sg_index, chained; 2053 struct SGDescriptor *curr_sg; 2054 2055 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 2056 2057 use_sg = scsi_dma_map(cmd); 2058 if (use_sg < 0) 2059 return use_sg; 2060 2061 if (!use_sg) 2062 goto sglist_finished; 2063 2064 curr_sg = cp->SG; 2065 chained = 0; 2066 sg_index = 0; 2067 scsi_for_each_sg(cmd, sg, use_sg, i) { 2068 if (i == h->max_cmd_sg_entries - 1 && 2069 use_sg > h->max_cmd_sg_entries) { 2070 chained = 1; 2071 curr_sg = h->cmd_sg_list[cp->cmdindex]; 2072 sg_index = 0; 2073 } 2074 addr64 = (u64) sg_dma_address(sg); 2075 len = sg_dma_len(sg); 2076 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL); 2077 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL); 2078 curr_sg->Len = len; 2079 curr_sg->Ext = 0; /* we are not chaining */ 2080 curr_sg++; 2081 } 2082 2083 if (use_sg + chained > h->maxSG) 2084 h->maxSG = use_sg + chained; 2085 2086 if (chained) { 2087 cp->Header.SGList = h->max_cmd_sg_entries; 2088 cp->Header.SGTotal = (u16) (use_sg + 1); 2089 hpsa_map_sg_chain_block(h, cp); 2090 return 0; 2091 } 2092 2093 sglist_finished: 2094 2095 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 2096 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */ 2097 return 0; 2098 } 2099 2100 2101 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd, 2102 void (*done)(struct scsi_cmnd *)) 2103 { 2104 struct ctlr_info *h; 2105 struct hpsa_scsi_dev_t *dev; 2106 unsigned char scsi3addr[8]; 2107 struct CommandList *c; 2108 unsigned long flags; 2109 2110 /* Get the ptr to our adapter structure out of cmd->host. */ 2111 h = sdev_to_hba(cmd->device); 2112 dev = cmd->device->hostdata; 2113 if (!dev) { 2114 cmd->result = DID_NO_CONNECT << 16; 2115 done(cmd); 2116 return 0; 2117 } 2118 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 2119 2120 spin_lock_irqsave(&h->lock, flags); 2121 if (unlikely(h->lockup_detected)) { 2122 spin_unlock_irqrestore(&h->lock, flags); 2123 cmd->result = DID_ERROR << 16; 2124 done(cmd); 2125 return 0; 2126 } 2127 spin_unlock_irqrestore(&h->lock, flags); 2128 c = cmd_alloc(h); 2129 if (c == NULL) { /* trouble... */ 2130 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); 2131 return SCSI_MLQUEUE_HOST_BUSY; 2132 } 2133 2134 /* Fill in the command list header */ 2135 2136 cmd->scsi_done = done; /* save this for use by completion code */ 2137 2138 /* save c in case we have to abort it */ 2139 cmd->host_scribble = (unsigned char *) c; 2140 2141 c->cmd_type = CMD_SCSI; 2142 c->scsi_cmd = cmd; 2143 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2144 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 2145 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT); 2146 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT; 2147 2148 /* Fill in the request block... */ 2149 2150 c->Request.Timeout = 0; 2151 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 2152 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 2153 c->Request.CDBLen = cmd->cmd_len; 2154 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 2155 c->Request.Type.Type = TYPE_CMD; 2156 c->Request.Type.Attribute = ATTR_SIMPLE; 2157 switch (cmd->sc_data_direction) { 2158 case DMA_TO_DEVICE: 2159 c->Request.Type.Direction = XFER_WRITE; 2160 break; 2161 case DMA_FROM_DEVICE: 2162 c->Request.Type.Direction = XFER_READ; 2163 break; 2164 case DMA_NONE: 2165 c->Request.Type.Direction = XFER_NONE; 2166 break; 2167 case DMA_BIDIRECTIONAL: 2168 /* This can happen if a buggy application does a scsi passthru 2169 * and sets both inlen and outlen to non-zero. ( see 2170 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 2171 */ 2172 2173 c->Request.Type.Direction = XFER_RSVD; 2174 /* This is technically wrong, and hpsa controllers should 2175 * reject it with CMD_INVALID, which is the most correct 2176 * response, but non-fibre backends appear to let it 2177 * slide by, and give the same results as if this field 2178 * were set correctly. Either way is acceptable for 2179 * our purposes here. 2180 */ 2181 2182 break; 2183 2184 default: 2185 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 2186 cmd->sc_data_direction); 2187 BUG(); 2188 break; 2189 } 2190 2191 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 2192 cmd_free(h, c); 2193 return SCSI_MLQUEUE_HOST_BUSY; 2194 } 2195 enqueue_cmd_and_start_io(h, c); 2196 /* the cmd'll come back via intr handler in complete_scsi_command() */ 2197 return 0; 2198 } 2199 2200 static DEF_SCSI_QCMD(hpsa_scsi_queue_command) 2201 2202 static void hpsa_scan_start(struct Scsi_Host *sh) 2203 { 2204 struct ctlr_info *h = shost_to_hba(sh); 2205 unsigned long flags; 2206 2207 /* wait until any scan already in progress is finished. */ 2208 while (1) { 2209 spin_lock_irqsave(&h->scan_lock, flags); 2210 if (h->scan_finished) 2211 break; 2212 spin_unlock_irqrestore(&h->scan_lock, flags); 2213 wait_event(h->scan_wait_queue, h->scan_finished); 2214 /* Note: We don't need to worry about a race between this 2215 * thread and driver unload because the midlayer will 2216 * have incremented the reference count, so unload won't 2217 * happen if we're in here. 2218 */ 2219 } 2220 h->scan_finished = 0; /* mark scan as in progress */ 2221 spin_unlock_irqrestore(&h->scan_lock, flags); 2222 2223 hpsa_update_scsi_devices(h, h->scsi_host->host_no); 2224 2225 spin_lock_irqsave(&h->scan_lock, flags); 2226 h->scan_finished = 1; /* mark scan as finished. */ 2227 wake_up_all(&h->scan_wait_queue); 2228 spin_unlock_irqrestore(&h->scan_lock, flags); 2229 } 2230 2231 static int hpsa_scan_finished(struct Scsi_Host *sh, 2232 unsigned long elapsed_time) 2233 { 2234 struct ctlr_info *h = shost_to_hba(sh); 2235 unsigned long flags; 2236 int finished; 2237 2238 spin_lock_irqsave(&h->scan_lock, flags); 2239 finished = h->scan_finished; 2240 spin_unlock_irqrestore(&h->scan_lock, flags); 2241 return finished; 2242 } 2243 2244 static int hpsa_change_queue_depth(struct scsi_device *sdev, 2245 int qdepth, int reason) 2246 { 2247 struct ctlr_info *h = sdev_to_hba(sdev); 2248 2249 if (reason != SCSI_QDEPTH_DEFAULT) 2250 return -ENOTSUPP; 2251 2252 if (qdepth < 1) 2253 qdepth = 1; 2254 else 2255 if (qdepth > h->nr_cmds) 2256 qdepth = h->nr_cmds; 2257 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); 2258 return sdev->queue_depth; 2259 } 2260 2261 static void hpsa_unregister_scsi(struct ctlr_info *h) 2262 { 2263 /* we are being forcibly unloaded, and may not refuse. */ 2264 scsi_remove_host(h->scsi_host); 2265 scsi_host_put(h->scsi_host); 2266 h->scsi_host = NULL; 2267 } 2268 2269 static int hpsa_register_scsi(struct ctlr_info *h) 2270 { 2271 struct Scsi_Host *sh; 2272 int error; 2273 2274 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 2275 if (sh == NULL) 2276 goto fail; 2277 2278 sh->io_port = 0; 2279 sh->n_io_port = 0; 2280 sh->this_id = -1; 2281 sh->max_channel = 3; 2282 sh->max_cmd_len = MAX_COMMAND_SIZE; 2283 sh->max_lun = HPSA_MAX_LUN; 2284 sh->max_id = HPSA_MAX_LUN; 2285 sh->can_queue = h->nr_cmds; 2286 sh->cmd_per_lun = h->nr_cmds; 2287 sh->sg_tablesize = h->maxsgentries; 2288 h->scsi_host = sh; 2289 sh->hostdata[0] = (unsigned long) h; 2290 sh->irq = h->intr[h->intr_mode]; 2291 sh->unique_id = sh->irq; 2292 error = scsi_add_host(sh, &h->pdev->dev); 2293 if (error) 2294 goto fail_host_put; 2295 scsi_scan_host(sh); 2296 return 0; 2297 2298 fail_host_put: 2299 dev_err(&h->pdev->dev, "%s: scsi_add_host" 2300 " failed for controller %d\n", __func__, h->ctlr); 2301 scsi_host_put(sh); 2302 return error; 2303 fail: 2304 dev_err(&h->pdev->dev, "%s: scsi_host_alloc" 2305 " failed for controller %d\n", __func__, h->ctlr); 2306 return -ENOMEM; 2307 } 2308 2309 static int wait_for_device_to_become_ready(struct ctlr_info *h, 2310 unsigned char lunaddr[]) 2311 { 2312 int rc = 0; 2313 int count = 0; 2314 int waittime = 1; /* seconds */ 2315 struct CommandList *c; 2316 2317 c = cmd_special_alloc(h); 2318 if (!c) { 2319 dev_warn(&h->pdev->dev, "out of memory in " 2320 "wait_for_device_to_become_ready.\n"); 2321 return IO_ERROR; 2322 } 2323 2324 /* Send test unit ready until device ready, or give up. */ 2325 while (count < HPSA_TUR_RETRY_LIMIT) { 2326 2327 /* Wait for a bit. do this first, because if we send 2328 * the TUR right away, the reset will just abort it. 2329 */ 2330 msleep(1000 * waittime); 2331 count++; 2332 2333 /* Increase wait time with each try, up to a point. */ 2334 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 2335 waittime = waittime * 2; 2336 2337 /* Send the Test Unit Ready */ 2338 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD); 2339 hpsa_scsi_do_simple_cmd_core(h, c); 2340 /* no unmap needed here because no data xfer. */ 2341 2342 if (c->err_info->CommandStatus == CMD_SUCCESS) 2343 break; 2344 2345 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2346 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 2347 (c->err_info->SenseInfo[2] == NO_SENSE || 2348 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 2349 break; 2350 2351 dev_warn(&h->pdev->dev, "waiting %d secs " 2352 "for device to become ready.\n", waittime); 2353 rc = 1; /* device not ready. */ 2354 } 2355 2356 if (rc) 2357 dev_warn(&h->pdev->dev, "giving up on device.\n"); 2358 else 2359 dev_warn(&h->pdev->dev, "device is ready.\n"); 2360 2361 cmd_special_free(h, c); 2362 return rc; 2363 } 2364 2365 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 2366 * complaining. Doing a host- or bus-reset can't do anything good here. 2367 */ 2368 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 2369 { 2370 int rc; 2371 struct ctlr_info *h; 2372 struct hpsa_scsi_dev_t *dev; 2373 2374 /* find the controller to which the command to be aborted was sent */ 2375 h = sdev_to_hba(scsicmd->device); 2376 if (h == NULL) /* paranoia */ 2377 return FAILED; 2378 dev = scsicmd->device->hostdata; 2379 if (!dev) { 2380 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " 2381 "device lookup failed.\n"); 2382 return FAILED; 2383 } 2384 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n", 2385 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2386 /* send a reset to the SCSI LUN which the command was sent to */ 2387 rc = hpsa_send_reset(h, dev->scsi3addr); 2388 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) 2389 return SUCCESS; 2390 2391 dev_warn(&h->pdev->dev, "resetting device failed.\n"); 2392 return FAILED; 2393 } 2394 2395 static void swizzle_abort_tag(u8 *tag) 2396 { 2397 u8 original_tag[8]; 2398 2399 memcpy(original_tag, tag, 8); 2400 tag[0] = original_tag[3]; 2401 tag[1] = original_tag[2]; 2402 tag[2] = original_tag[1]; 2403 tag[3] = original_tag[0]; 2404 tag[4] = original_tag[7]; 2405 tag[5] = original_tag[6]; 2406 tag[6] = original_tag[5]; 2407 tag[7] = original_tag[4]; 2408 } 2409 2410 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 2411 struct CommandList *abort, int swizzle) 2412 { 2413 int rc = IO_OK; 2414 struct CommandList *c; 2415 struct ErrorInfo *ei; 2416 2417 c = cmd_special_alloc(h); 2418 if (c == NULL) { /* trouble... */ 2419 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 2420 return -ENOMEM; 2421 } 2422 2423 fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG); 2424 if (swizzle) 2425 swizzle_abort_tag(&c->Request.CDB[4]); 2426 hpsa_scsi_do_simple_cmd_core(h, c); 2427 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n", 2428 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower); 2429 /* no unmap needed here because no data xfer. */ 2430 2431 ei = c->err_info; 2432 switch (ei->CommandStatus) { 2433 case CMD_SUCCESS: 2434 break; 2435 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 2436 rc = -1; 2437 break; 2438 default: 2439 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 2440 __func__, abort->Header.Tag.upper, 2441 abort->Header.Tag.lower); 2442 hpsa_scsi_interpret_error(c); 2443 rc = -1; 2444 break; 2445 } 2446 cmd_special_free(h, c); 2447 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 2448 abort->Header.Tag.upper, abort->Header.Tag.lower); 2449 return rc; 2450 } 2451 2452 /* 2453 * hpsa_find_cmd_in_queue 2454 * 2455 * Used to determine whether a command (find) is still present 2456 * in queue_head. Optionally excludes the last element of queue_head. 2457 * 2458 * This is used to avoid unnecessary aborts. Commands in h->reqQ have 2459 * not yet been submitted, and so can be aborted by the driver without 2460 * sending an abort to the hardware. 2461 * 2462 * Returns pointer to command if found in queue, NULL otherwise. 2463 */ 2464 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h, 2465 struct scsi_cmnd *find, struct list_head *queue_head) 2466 { 2467 unsigned long flags; 2468 struct CommandList *c = NULL; /* ptr into cmpQ */ 2469 2470 if (!find) 2471 return 0; 2472 spin_lock_irqsave(&h->lock, flags); 2473 list_for_each_entry(c, queue_head, list) { 2474 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */ 2475 continue; 2476 if (c->scsi_cmd == find) { 2477 spin_unlock_irqrestore(&h->lock, flags); 2478 return c; 2479 } 2480 } 2481 spin_unlock_irqrestore(&h->lock, flags); 2482 return NULL; 2483 } 2484 2485 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h, 2486 u8 *tag, struct list_head *queue_head) 2487 { 2488 unsigned long flags; 2489 struct CommandList *c; 2490 2491 spin_lock_irqsave(&h->lock, flags); 2492 list_for_each_entry(c, queue_head, list) { 2493 if (memcmp(&c->Header.Tag, tag, 8) != 0) 2494 continue; 2495 spin_unlock_irqrestore(&h->lock, flags); 2496 return c; 2497 } 2498 spin_unlock_irqrestore(&h->lock, flags); 2499 return NULL; 2500 } 2501 2502 /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to 2503 * tell which kind we're dealing with, so we send the abort both ways. There 2504 * shouldn't be any collisions between swizzled and unswizzled tags due to the 2505 * way we construct our tags but we check anyway in case the assumptions which 2506 * make this true someday become false. 2507 */ 2508 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 2509 unsigned char *scsi3addr, struct CommandList *abort) 2510 { 2511 u8 swizzled_tag[8]; 2512 struct CommandList *c; 2513 int rc = 0, rc2 = 0; 2514 2515 /* we do not expect to find the swizzled tag in our queue, but 2516 * check anyway just to be sure the assumptions which make this 2517 * the case haven't become wrong. 2518 */ 2519 memcpy(swizzled_tag, &abort->Request.CDB[4], 8); 2520 swizzle_abort_tag(swizzled_tag); 2521 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ); 2522 if (c != NULL) { 2523 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n"); 2524 return hpsa_send_abort(h, scsi3addr, abort, 0); 2525 } 2526 rc = hpsa_send_abort(h, scsi3addr, abort, 0); 2527 2528 /* if the command is still in our queue, we can't conclude that it was 2529 * aborted (it might have just completed normally) but in any case 2530 * we don't need to try to abort it another way. 2531 */ 2532 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ); 2533 if (c) 2534 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1); 2535 return rc && rc2; 2536 } 2537 2538 /* Send an abort for the specified command. 2539 * If the device and controller support it, 2540 * send a task abort request. 2541 */ 2542 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 2543 { 2544 2545 int i, rc; 2546 struct ctlr_info *h; 2547 struct hpsa_scsi_dev_t *dev; 2548 struct CommandList *abort; /* pointer to command to be aborted */ 2549 struct CommandList *found; 2550 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 2551 char msg[256]; /* For debug messaging. */ 2552 int ml = 0; 2553 2554 /* Find the controller of the command to be aborted */ 2555 h = sdev_to_hba(sc->device); 2556 if (WARN(h == NULL, 2557 "ABORT REQUEST FAILED, Controller lookup failed.\n")) 2558 return FAILED; 2559 2560 /* Check that controller supports some kind of task abort */ 2561 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 2562 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 2563 return FAILED; 2564 2565 memset(msg, 0, sizeof(msg)); 2566 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ", 2567 h->scsi_host->host_no, sc->device->channel, 2568 sc->device->id, sc->device->lun); 2569 2570 /* Find the device of the command to be aborted */ 2571 dev = sc->device->hostdata; 2572 if (!dev) { 2573 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 2574 msg); 2575 return FAILED; 2576 } 2577 2578 /* Get SCSI command to be aborted */ 2579 abort = (struct CommandList *) sc->host_scribble; 2580 if (abort == NULL) { 2581 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n", 2582 msg); 2583 return FAILED; 2584 } 2585 2586 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", 2587 abort->Header.Tag.upper, abort->Header.Tag.lower); 2588 as = (struct scsi_cmnd *) abort->scsi_cmd; 2589 if (as != NULL) 2590 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ", 2591 as->cmnd[0], as->serial_number); 2592 dev_dbg(&h->pdev->dev, "%s\n", msg); 2593 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n", 2594 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2595 2596 /* Search reqQ to See if command is queued but not submitted, 2597 * if so, complete the command with aborted status and remove 2598 * it from the reqQ. 2599 */ 2600 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ); 2601 if (found) { 2602 found->err_info->CommandStatus = CMD_ABORTED; 2603 finish_cmd(found); 2604 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n", 2605 msg); 2606 return SUCCESS; 2607 } 2608 2609 /* not in reqQ, if also not in cmpQ, must have already completed */ 2610 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ); 2611 if (!found) { 2612 dev_dbg(&h->pdev->dev, "%s Request FAILED (not known to driver).\n", 2613 msg); 2614 return SUCCESS; 2615 } 2616 2617 /* 2618 * Command is in flight, or possibly already completed 2619 * by the firmware (but not to the scsi mid layer) but we can't 2620 * distinguish which. Send the abort down. 2621 */ 2622 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort); 2623 if (rc != 0) { 2624 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg); 2625 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n", 2626 h->scsi_host->host_no, 2627 dev->bus, dev->target, dev->lun); 2628 return FAILED; 2629 } 2630 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg); 2631 2632 /* If the abort(s) above completed and actually aborted the 2633 * command, then the command to be aborted should already be 2634 * completed. If not, wait around a bit more to see if they 2635 * manage to complete normally. 2636 */ 2637 #define ABORT_COMPLETE_WAIT_SECS 30 2638 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) { 2639 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ); 2640 if (!found) 2641 return SUCCESS; 2642 msleep(100); 2643 } 2644 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n", 2645 msg, ABORT_COMPLETE_WAIT_SECS); 2646 return FAILED; 2647 } 2648 2649 2650 /* 2651 * For operations that cannot sleep, a command block is allocated at init, 2652 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 2653 * which ones are free or in use. Lock must be held when calling this. 2654 * cmd_free() is the complement. 2655 */ 2656 static struct CommandList *cmd_alloc(struct ctlr_info *h) 2657 { 2658 struct CommandList *c; 2659 int i; 2660 union u64bit temp64; 2661 dma_addr_t cmd_dma_handle, err_dma_handle; 2662 unsigned long flags; 2663 2664 spin_lock_irqsave(&h->lock, flags); 2665 do { 2666 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 2667 if (i == h->nr_cmds) { 2668 spin_unlock_irqrestore(&h->lock, flags); 2669 return NULL; 2670 } 2671 } while (test_and_set_bit 2672 (i & (BITS_PER_LONG - 1), 2673 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); 2674 h->nr_allocs++; 2675 spin_unlock_irqrestore(&h->lock, flags); 2676 2677 c = h->cmd_pool + i; 2678 memset(c, 0, sizeof(*c)); 2679 cmd_dma_handle = h->cmd_pool_dhandle 2680 + i * sizeof(*c); 2681 c->err_info = h->errinfo_pool + i; 2682 memset(c->err_info, 0, sizeof(*c->err_info)); 2683 err_dma_handle = h->errinfo_pool_dhandle 2684 + i * sizeof(*c->err_info); 2685 2686 c->cmdindex = i; 2687 2688 INIT_LIST_HEAD(&c->list); 2689 c->busaddr = (u32) cmd_dma_handle; 2690 temp64.val = (u64) err_dma_handle; 2691 c->ErrDesc.Addr.lower = temp64.val32.lower; 2692 c->ErrDesc.Addr.upper = temp64.val32.upper; 2693 c->ErrDesc.Len = sizeof(*c->err_info); 2694 2695 c->h = h; 2696 return c; 2697 } 2698 2699 /* For operations that can wait for kmalloc to possibly sleep, 2700 * this routine can be called. Lock need not be held to call 2701 * cmd_special_alloc. cmd_special_free() is the complement. 2702 */ 2703 static struct CommandList *cmd_special_alloc(struct ctlr_info *h) 2704 { 2705 struct CommandList *c; 2706 union u64bit temp64; 2707 dma_addr_t cmd_dma_handle, err_dma_handle; 2708 2709 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); 2710 if (c == NULL) 2711 return NULL; 2712 memset(c, 0, sizeof(*c)); 2713 2714 c->cmdindex = -1; 2715 2716 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info), 2717 &err_dma_handle); 2718 2719 if (c->err_info == NULL) { 2720 pci_free_consistent(h->pdev, 2721 sizeof(*c), c, cmd_dma_handle); 2722 return NULL; 2723 } 2724 memset(c->err_info, 0, sizeof(*c->err_info)); 2725 2726 INIT_LIST_HEAD(&c->list); 2727 c->busaddr = (u32) cmd_dma_handle; 2728 temp64.val = (u64) err_dma_handle; 2729 c->ErrDesc.Addr.lower = temp64.val32.lower; 2730 c->ErrDesc.Addr.upper = temp64.val32.upper; 2731 c->ErrDesc.Len = sizeof(*c->err_info); 2732 2733 c->h = h; 2734 return c; 2735 } 2736 2737 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 2738 { 2739 int i; 2740 unsigned long flags; 2741 2742 i = c - h->cmd_pool; 2743 spin_lock_irqsave(&h->lock, flags); 2744 clear_bit(i & (BITS_PER_LONG - 1), 2745 h->cmd_pool_bits + (i / BITS_PER_LONG)); 2746 h->nr_frees++; 2747 spin_unlock_irqrestore(&h->lock, flags); 2748 } 2749 2750 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) 2751 { 2752 union u64bit temp64; 2753 2754 temp64.val32.lower = c->ErrDesc.Addr.lower; 2755 temp64.val32.upper = c->ErrDesc.Addr.upper; 2756 pci_free_consistent(h->pdev, sizeof(*c->err_info), 2757 c->err_info, (dma_addr_t) temp64.val); 2758 pci_free_consistent(h->pdev, sizeof(*c), 2759 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK)); 2760 } 2761 2762 #ifdef CONFIG_COMPAT 2763 2764 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) 2765 { 2766 IOCTL32_Command_struct __user *arg32 = 2767 (IOCTL32_Command_struct __user *) arg; 2768 IOCTL_Command_struct arg64; 2769 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 2770 int err; 2771 u32 cp; 2772 2773 memset(&arg64, 0, sizeof(arg64)); 2774 err = 0; 2775 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2776 sizeof(arg64.LUN_info)); 2777 err |= copy_from_user(&arg64.Request, &arg32->Request, 2778 sizeof(arg64.Request)); 2779 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2780 sizeof(arg64.error_info)); 2781 err |= get_user(arg64.buf_size, &arg32->buf_size); 2782 err |= get_user(cp, &arg32->buf); 2783 arg64.buf = compat_ptr(cp); 2784 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2785 2786 if (err) 2787 return -EFAULT; 2788 2789 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p); 2790 if (err) 2791 return err; 2792 err |= copy_in_user(&arg32->error_info, &p->error_info, 2793 sizeof(arg32->error_info)); 2794 if (err) 2795 return -EFAULT; 2796 return err; 2797 } 2798 2799 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 2800 int cmd, void *arg) 2801 { 2802 BIG_IOCTL32_Command_struct __user *arg32 = 2803 (BIG_IOCTL32_Command_struct __user *) arg; 2804 BIG_IOCTL_Command_struct arg64; 2805 BIG_IOCTL_Command_struct __user *p = 2806 compat_alloc_user_space(sizeof(arg64)); 2807 int err; 2808 u32 cp; 2809 2810 memset(&arg64, 0, sizeof(arg64)); 2811 err = 0; 2812 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2813 sizeof(arg64.LUN_info)); 2814 err |= copy_from_user(&arg64.Request, &arg32->Request, 2815 sizeof(arg64.Request)); 2816 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2817 sizeof(arg64.error_info)); 2818 err |= get_user(arg64.buf_size, &arg32->buf_size); 2819 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 2820 err |= get_user(cp, &arg32->buf); 2821 arg64.buf = compat_ptr(cp); 2822 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2823 2824 if (err) 2825 return -EFAULT; 2826 2827 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); 2828 if (err) 2829 return err; 2830 err |= copy_in_user(&arg32->error_info, &p->error_info, 2831 sizeof(arg32->error_info)); 2832 if (err) 2833 return -EFAULT; 2834 return err; 2835 } 2836 2837 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg) 2838 { 2839 switch (cmd) { 2840 case CCISS_GETPCIINFO: 2841 case CCISS_GETINTINFO: 2842 case CCISS_SETINTINFO: 2843 case CCISS_GETNODENAME: 2844 case CCISS_SETNODENAME: 2845 case CCISS_GETHEARTBEAT: 2846 case CCISS_GETBUSTYPES: 2847 case CCISS_GETFIRMVER: 2848 case CCISS_GETDRIVVER: 2849 case CCISS_REVALIDVOLS: 2850 case CCISS_DEREGDISK: 2851 case CCISS_REGNEWDISK: 2852 case CCISS_REGNEWD: 2853 case CCISS_RESCANDISK: 2854 case CCISS_GETLUNINFO: 2855 return hpsa_ioctl(dev, cmd, arg); 2856 2857 case CCISS_PASSTHRU32: 2858 return hpsa_ioctl32_passthru(dev, cmd, arg); 2859 case CCISS_BIG_PASSTHRU32: 2860 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 2861 2862 default: 2863 return -ENOIOCTLCMD; 2864 } 2865 } 2866 #endif 2867 2868 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 2869 { 2870 struct hpsa_pci_info pciinfo; 2871 2872 if (!argp) 2873 return -EINVAL; 2874 pciinfo.domain = pci_domain_nr(h->pdev->bus); 2875 pciinfo.bus = h->pdev->bus->number; 2876 pciinfo.dev_fn = h->pdev->devfn; 2877 pciinfo.board_id = h->board_id; 2878 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 2879 return -EFAULT; 2880 return 0; 2881 } 2882 2883 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 2884 { 2885 DriverVer_type DriverVer; 2886 unsigned char vmaj, vmin, vsubmin; 2887 int rc; 2888 2889 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 2890 &vmaj, &vmin, &vsubmin); 2891 if (rc != 3) { 2892 dev_info(&h->pdev->dev, "driver version string '%s' " 2893 "unrecognized.", HPSA_DRIVER_VERSION); 2894 vmaj = 0; 2895 vmin = 0; 2896 vsubmin = 0; 2897 } 2898 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 2899 if (!argp) 2900 return -EINVAL; 2901 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 2902 return -EFAULT; 2903 return 0; 2904 } 2905 2906 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2907 { 2908 IOCTL_Command_struct iocommand; 2909 struct CommandList *c; 2910 char *buff = NULL; 2911 union u64bit temp64; 2912 2913 if (!argp) 2914 return -EINVAL; 2915 if (!capable(CAP_SYS_RAWIO)) 2916 return -EPERM; 2917 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 2918 return -EFAULT; 2919 if ((iocommand.buf_size < 1) && 2920 (iocommand.Request.Type.Direction != XFER_NONE)) { 2921 return -EINVAL; 2922 } 2923 if (iocommand.buf_size > 0) { 2924 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 2925 if (buff == NULL) 2926 return -EFAULT; 2927 if (iocommand.Request.Type.Direction == XFER_WRITE) { 2928 /* Copy the data into the buffer we created */ 2929 if (copy_from_user(buff, iocommand.buf, 2930 iocommand.buf_size)) { 2931 kfree(buff); 2932 return -EFAULT; 2933 } 2934 } else { 2935 memset(buff, 0, iocommand.buf_size); 2936 } 2937 } 2938 c = cmd_special_alloc(h); 2939 if (c == NULL) { 2940 kfree(buff); 2941 return -ENOMEM; 2942 } 2943 /* Fill in the command type */ 2944 c->cmd_type = CMD_IOCTL_PEND; 2945 /* Fill in Command Header */ 2946 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2947 if (iocommand.buf_size > 0) { /* buffer to fill */ 2948 c->Header.SGList = 1; 2949 c->Header.SGTotal = 1; 2950 } else { /* no buffers to fill */ 2951 c->Header.SGList = 0; 2952 c->Header.SGTotal = 0; 2953 } 2954 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 2955 /* use the kernel address the cmd block for tag */ 2956 c->Header.Tag.lower = c->busaddr; 2957 2958 /* Fill in Request block */ 2959 memcpy(&c->Request, &iocommand.Request, 2960 sizeof(c->Request)); 2961 2962 /* Fill in the scatter gather information */ 2963 if (iocommand.buf_size > 0) { 2964 temp64.val = pci_map_single(h->pdev, buff, 2965 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 2966 c->SG[0].Addr.lower = temp64.val32.lower; 2967 c->SG[0].Addr.upper = temp64.val32.upper; 2968 c->SG[0].Len = iocommand.buf_size; 2969 c->SG[0].Ext = 0; /* we are not chaining*/ 2970 } 2971 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 2972 if (iocommand.buf_size > 0) 2973 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 2974 check_ioctl_unit_attention(h, c); 2975 2976 /* Copy the error information out */ 2977 memcpy(&iocommand.error_info, c->err_info, 2978 sizeof(iocommand.error_info)); 2979 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 2980 kfree(buff); 2981 cmd_special_free(h, c); 2982 return -EFAULT; 2983 } 2984 if (iocommand.Request.Type.Direction == XFER_READ && 2985 iocommand.buf_size > 0) { 2986 /* Copy the data out of the buffer we created */ 2987 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 2988 kfree(buff); 2989 cmd_special_free(h, c); 2990 return -EFAULT; 2991 } 2992 } 2993 kfree(buff); 2994 cmd_special_free(h, c); 2995 return 0; 2996 } 2997 2998 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2999 { 3000 BIG_IOCTL_Command_struct *ioc; 3001 struct CommandList *c; 3002 unsigned char **buff = NULL; 3003 int *buff_size = NULL; 3004 union u64bit temp64; 3005 BYTE sg_used = 0; 3006 int status = 0; 3007 int i; 3008 u32 left; 3009 u32 sz; 3010 BYTE __user *data_ptr; 3011 3012 if (!argp) 3013 return -EINVAL; 3014 if (!capable(CAP_SYS_RAWIO)) 3015 return -EPERM; 3016 ioc = (BIG_IOCTL_Command_struct *) 3017 kmalloc(sizeof(*ioc), GFP_KERNEL); 3018 if (!ioc) { 3019 status = -ENOMEM; 3020 goto cleanup1; 3021 } 3022 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 3023 status = -EFAULT; 3024 goto cleanup1; 3025 } 3026 if ((ioc->buf_size < 1) && 3027 (ioc->Request.Type.Direction != XFER_NONE)) { 3028 status = -EINVAL; 3029 goto cleanup1; 3030 } 3031 /* Check kmalloc limits using all SGs */ 3032 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 3033 status = -EINVAL; 3034 goto cleanup1; 3035 } 3036 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 3037 status = -EINVAL; 3038 goto cleanup1; 3039 } 3040 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 3041 if (!buff) { 3042 status = -ENOMEM; 3043 goto cleanup1; 3044 } 3045 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 3046 if (!buff_size) { 3047 status = -ENOMEM; 3048 goto cleanup1; 3049 } 3050 left = ioc->buf_size; 3051 data_ptr = ioc->buf; 3052 while (left) { 3053 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 3054 buff_size[sg_used] = sz; 3055 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 3056 if (buff[sg_used] == NULL) { 3057 status = -ENOMEM; 3058 goto cleanup1; 3059 } 3060 if (ioc->Request.Type.Direction == XFER_WRITE) { 3061 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 3062 status = -ENOMEM; 3063 goto cleanup1; 3064 } 3065 } else 3066 memset(buff[sg_used], 0, sz); 3067 left -= sz; 3068 data_ptr += sz; 3069 sg_used++; 3070 } 3071 c = cmd_special_alloc(h); 3072 if (c == NULL) { 3073 status = -ENOMEM; 3074 goto cleanup1; 3075 } 3076 c->cmd_type = CMD_IOCTL_PEND; 3077 c->Header.ReplyQueue = 0; 3078 c->Header.SGList = c->Header.SGTotal = sg_used; 3079 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 3080 c->Header.Tag.lower = c->busaddr; 3081 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 3082 if (ioc->buf_size > 0) { 3083 int i; 3084 for (i = 0; i < sg_used; i++) { 3085 temp64.val = pci_map_single(h->pdev, buff[i], 3086 buff_size[i], PCI_DMA_BIDIRECTIONAL); 3087 c->SG[i].Addr.lower = temp64.val32.lower; 3088 c->SG[i].Addr.upper = temp64.val32.upper; 3089 c->SG[i].Len = buff_size[i]; 3090 /* we are not chaining */ 3091 c->SG[i].Ext = 0; 3092 } 3093 } 3094 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 3095 if (sg_used) 3096 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 3097 check_ioctl_unit_attention(h, c); 3098 /* Copy the error information out */ 3099 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 3100 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 3101 cmd_special_free(h, c); 3102 status = -EFAULT; 3103 goto cleanup1; 3104 } 3105 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { 3106 /* Copy the data out of the buffer we created */ 3107 BYTE __user *ptr = ioc->buf; 3108 for (i = 0; i < sg_used; i++) { 3109 if (copy_to_user(ptr, buff[i], buff_size[i])) { 3110 cmd_special_free(h, c); 3111 status = -EFAULT; 3112 goto cleanup1; 3113 } 3114 ptr += buff_size[i]; 3115 } 3116 } 3117 cmd_special_free(h, c); 3118 status = 0; 3119 cleanup1: 3120 if (buff) { 3121 for (i = 0; i < sg_used; i++) 3122 kfree(buff[i]); 3123 kfree(buff); 3124 } 3125 kfree(buff_size); 3126 kfree(ioc); 3127 return status; 3128 } 3129 3130 static void check_ioctl_unit_attention(struct ctlr_info *h, 3131 struct CommandList *c) 3132 { 3133 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 3134 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 3135 (void) check_for_unit_attention(h, c); 3136 } 3137 /* 3138 * ioctl 3139 */ 3140 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) 3141 { 3142 struct ctlr_info *h; 3143 void __user *argp = (void __user *)arg; 3144 3145 h = sdev_to_hba(dev); 3146 3147 switch (cmd) { 3148 case CCISS_DEREGDISK: 3149 case CCISS_REGNEWDISK: 3150 case CCISS_REGNEWD: 3151 hpsa_scan_start(h->scsi_host); 3152 return 0; 3153 case CCISS_GETPCIINFO: 3154 return hpsa_getpciinfo_ioctl(h, argp); 3155 case CCISS_GETDRIVVER: 3156 return hpsa_getdrivver_ioctl(h, argp); 3157 case CCISS_PASSTHRU: 3158 return hpsa_passthru_ioctl(h, argp); 3159 case CCISS_BIG_PASSTHRU: 3160 return hpsa_big_passthru_ioctl(h, argp); 3161 default: 3162 return -ENOTTY; 3163 } 3164 } 3165 3166 static int __devinit hpsa_send_host_reset(struct ctlr_info *h, 3167 unsigned char *scsi3addr, u8 reset_type) 3168 { 3169 struct CommandList *c; 3170 3171 c = cmd_alloc(h); 3172 if (!c) 3173 return -ENOMEM; 3174 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 3175 RAID_CTLR_LUNID, TYPE_MSG); 3176 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 3177 c->waiting = NULL; 3178 enqueue_cmd_and_start_io(h, c); 3179 /* Don't wait for completion, the reset won't complete. Don't free 3180 * the command either. This is the last command we will send before 3181 * re-initializing everything, so it doesn't matter and won't leak. 3182 */ 3183 return 0; 3184 } 3185 3186 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 3187 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 3188 int cmd_type) 3189 { 3190 int pci_dir = XFER_NONE; 3191 struct CommandList *a; /* for commands to be aborted */ 3192 3193 c->cmd_type = CMD_IOCTL_PEND; 3194 c->Header.ReplyQueue = 0; 3195 if (buff != NULL && size > 0) { 3196 c->Header.SGList = 1; 3197 c->Header.SGTotal = 1; 3198 } else { 3199 c->Header.SGList = 0; 3200 c->Header.SGTotal = 0; 3201 } 3202 c->Header.Tag.lower = c->busaddr; 3203 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 3204 3205 c->Request.Type.Type = cmd_type; 3206 if (cmd_type == TYPE_CMD) { 3207 switch (cmd) { 3208 case HPSA_INQUIRY: 3209 /* are we trying to read a vital product page */ 3210 if (page_code != 0) { 3211 c->Request.CDB[1] = 0x01; 3212 c->Request.CDB[2] = page_code; 3213 } 3214 c->Request.CDBLen = 6; 3215 c->Request.Type.Attribute = ATTR_SIMPLE; 3216 c->Request.Type.Direction = XFER_READ; 3217 c->Request.Timeout = 0; 3218 c->Request.CDB[0] = HPSA_INQUIRY; 3219 c->Request.CDB[4] = size & 0xFF; 3220 break; 3221 case HPSA_REPORT_LOG: 3222 case HPSA_REPORT_PHYS: 3223 /* Talking to controller so It's a physical command 3224 mode = 00 target = 0. Nothing to write. 3225 */ 3226 c->Request.CDBLen = 12; 3227 c->Request.Type.Attribute = ATTR_SIMPLE; 3228 c->Request.Type.Direction = XFER_READ; 3229 c->Request.Timeout = 0; 3230 c->Request.CDB[0] = cmd; 3231 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 3232 c->Request.CDB[7] = (size >> 16) & 0xFF; 3233 c->Request.CDB[8] = (size >> 8) & 0xFF; 3234 c->Request.CDB[9] = size & 0xFF; 3235 break; 3236 case HPSA_CACHE_FLUSH: 3237 c->Request.CDBLen = 12; 3238 c->Request.Type.Attribute = ATTR_SIMPLE; 3239 c->Request.Type.Direction = XFER_WRITE; 3240 c->Request.Timeout = 0; 3241 c->Request.CDB[0] = BMIC_WRITE; 3242 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 3243 c->Request.CDB[7] = (size >> 8) & 0xFF; 3244 c->Request.CDB[8] = size & 0xFF; 3245 break; 3246 case TEST_UNIT_READY: 3247 c->Request.CDBLen = 6; 3248 c->Request.Type.Attribute = ATTR_SIMPLE; 3249 c->Request.Type.Direction = XFER_NONE; 3250 c->Request.Timeout = 0; 3251 break; 3252 default: 3253 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 3254 BUG(); 3255 return; 3256 } 3257 } else if (cmd_type == TYPE_MSG) { 3258 switch (cmd) { 3259 3260 case HPSA_DEVICE_RESET_MSG: 3261 c->Request.CDBLen = 16; 3262 c->Request.Type.Type = 1; /* It is a MSG not a CMD */ 3263 c->Request.Type.Attribute = ATTR_SIMPLE; 3264 c->Request.Type.Direction = XFER_NONE; 3265 c->Request.Timeout = 0; /* Don't time out */ 3266 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 3267 c->Request.CDB[0] = cmd; 3268 c->Request.CDB[1] = 0x03; /* Reset target above */ 3269 /* If bytes 4-7 are zero, it means reset the */ 3270 /* LunID device */ 3271 c->Request.CDB[4] = 0x00; 3272 c->Request.CDB[5] = 0x00; 3273 c->Request.CDB[6] = 0x00; 3274 c->Request.CDB[7] = 0x00; 3275 break; 3276 case HPSA_ABORT_MSG: 3277 a = buff; /* point to command to be aborted */ 3278 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n", 3279 a->Header.Tag.upper, a->Header.Tag.lower, 3280 c->Header.Tag.upper, c->Header.Tag.lower); 3281 c->Request.CDBLen = 16; 3282 c->Request.Type.Type = TYPE_MSG; 3283 c->Request.Type.Attribute = ATTR_SIMPLE; 3284 c->Request.Type.Direction = XFER_WRITE; 3285 c->Request.Timeout = 0; /* Don't time out */ 3286 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 3287 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 3288 c->Request.CDB[2] = 0x00; /* reserved */ 3289 c->Request.CDB[3] = 0x00; /* reserved */ 3290 /* Tag to abort goes in CDB[4]-CDB[11] */ 3291 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF; 3292 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF; 3293 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF; 3294 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF; 3295 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF; 3296 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF; 3297 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF; 3298 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF; 3299 c->Request.CDB[12] = 0x00; /* reserved */ 3300 c->Request.CDB[13] = 0x00; /* reserved */ 3301 c->Request.CDB[14] = 0x00; /* reserved */ 3302 c->Request.CDB[15] = 0x00; /* reserved */ 3303 break; 3304 default: 3305 dev_warn(&h->pdev->dev, "unknown message type %d\n", 3306 cmd); 3307 BUG(); 3308 } 3309 } else { 3310 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 3311 BUG(); 3312 } 3313 3314 switch (c->Request.Type.Direction) { 3315 case XFER_READ: 3316 pci_dir = PCI_DMA_FROMDEVICE; 3317 break; 3318 case XFER_WRITE: 3319 pci_dir = PCI_DMA_TODEVICE; 3320 break; 3321 case XFER_NONE: 3322 pci_dir = PCI_DMA_NONE; 3323 break; 3324 default: 3325 pci_dir = PCI_DMA_BIDIRECTIONAL; 3326 } 3327 3328 hpsa_map_one(h->pdev, c, buff, size, pci_dir); 3329 3330 return; 3331 } 3332 3333 /* 3334 * Map (physical) PCI mem into (virtual) kernel space 3335 */ 3336 static void __iomem *remap_pci_mem(ulong base, ulong size) 3337 { 3338 ulong page_base = ((ulong) base) & PAGE_MASK; 3339 ulong page_offs = ((ulong) base) - page_base; 3340 void __iomem *page_remapped = ioremap(page_base, page_offs + size); 3341 3342 return page_remapped ? (page_remapped + page_offs) : NULL; 3343 } 3344 3345 /* Takes cmds off the submission queue and sends them to the hardware, 3346 * then puts them on the queue of cmds waiting for completion. 3347 */ 3348 static void start_io(struct ctlr_info *h) 3349 { 3350 struct CommandList *c; 3351 unsigned long flags; 3352 3353 spin_lock_irqsave(&h->lock, flags); 3354 while (!list_empty(&h->reqQ)) { 3355 c = list_entry(h->reqQ.next, struct CommandList, list); 3356 /* can't do anything if fifo is full */ 3357 if ((h->access.fifo_full(h))) { 3358 dev_warn(&h->pdev->dev, "fifo full\n"); 3359 break; 3360 } 3361 3362 /* Get the first entry from the Request Q */ 3363 removeQ(c); 3364 h->Qdepth--; 3365 3366 /* Put job onto the completed Q */ 3367 addQ(&h->cmpQ, c); 3368 3369 /* Must increment commands_outstanding before unlocking 3370 * and submitting to avoid race checking for fifo full 3371 * condition. 3372 */ 3373 h->commands_outstanding++; 3374 if (h->commands_outstanding > h->max_outstanding) 3375 h->max_outstanding = h->commands_outstanding; 3376 3377 /* Tell the controller execute command */ 3378 spin_unlock_irqrestore(&h->lock, flags); 3379 h->access.submit_command(h, c); 3380 spin_lock_irqsave(&h->lock, flags); 3381 } 3382 spin_unlock_irqrestore(&h->lock, flags); 3383 } 3384 3385 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 3386 { 3387 return h->access.command_completed(h, q); 3388 } 3389 3390 static inline bool interrupt_pending(struct ctlr_info *h) 3391 { 3392 return h->access.intr_pending(h); 3393 } 3394 3395 static inline long interrupt_not_for_us(struct ctlr_info *h) 3396 { 3397 return (h->access.intr_pending(h) == 0) || 3398 (h->interrupts_enabled == 0); 3399 } 3400 3401 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 3402 u32 raw_tag) 3403 { 3404 if (unlikely(tag_index >= h->nr_cmds)) { 3405 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 3406 return 1; 3407 } 3408 return 0; 3409 } 3410 3411 static inline void finish_cmd(struct CommandList *c) 3412 { 3413 unsigned long flags; 3414 3415 spin_lock_irqsave(&c->h->lock, flags); 3416 removeQ(c); 3417 spin_unlock_irqrestore(&c->h->lock, flags); 3418 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 3419 if (likely(c->cmd_type == CMD_SCSI)) 3420 complete_scsi_command(c); 3421 else if (c->cmd_type == CMD_IOCTL_PEND) 3422 complete(c->waiting); 3423 } 3424 3425 static inline u32 hpsa_tag_contains_index(u32 tag) 3426 { 3427 return tag & DIRECT_LOOKUP_BIT; 3428 } 3429 3430 static inline u32 hpsa_tag_to_index(u32 tag) 3431 { 3432 return tag >> DIRECT_LOOKUP_SHIFT; 3433 } 3434 3435 3436 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag) 3437 { 3438 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 3439 #define HPSA_SIMPLE_ERROR_BITS 0x03 3440 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 3441 return tag & ~HPSA_SIMPLE_ERROR_BITS; 3442 return tag & ~HPSA_PERF_ERROR_BITS; 3443 } 3444 3445 /* process completion of an indexed ("direct lookup") command */ 3446 static inline void process_indexed_cmd(struct ctlr_info *h, 3447 u32 raw_tag) 3448 { 3449 u32 tag_index; 3450 struct CommandList *c; 3451 3452 tag_index = hpsa_tag_to_index(raw_tag); 3453 if (!bad_tag(h, tag_index, raw_tag)) { 3454 c = h->cmd_pool + tag_index; 3455 finish_cmd(c); 3456 } 3457 } 3458 3459 /* process completion of a non-indexed command */ 3460 static inline void process_nonindexed_cmd(struct ctlr_info *h, 3461 u32 raw_tag) 3462 { 3463 u32 tag; 3464 struct CommandList *c = NULL; 3465 unsigned long flags; 3466 3467 tag = hpsa_tag_discard_error_bits(h, raw_tag); 3468 spin_lock_irqsave(&h->lock, flags); 3469 list_for_each_entry(c, &h->cmpQ, list) { 3470 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) { 3471 spin_unlock_irqrestore(&h->lock, flags); 3472 finish_cmd(c); 3473 return; 3474 } 3475 } 3476 spin_unlock_irqrestore(&h->lock, flags); 3477 bad_tag(h, h->nr_cmds + 1, raw_tag); 3478 } 3479 3480 /* Some controllers, like p400, will give us one interrupt 3481 * after a soft reset, even if we turned interrupts off. 3482 * Only need to check for this in the hpsa_xxx_discard_completions 3483 * functions. 3484 */ 3485 static int ignore_bogus_interrupt(struct ctlr_info *h) 3486 { 3487 if (likely(!reset_devices)) 3488 return 0; 3489 3490 if (likely(h->interrupts_enabled)) 3491 return 0; 3492 3493 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 3494 "(known firmware bug.) Ignoring.\n"); 3495 3496 return 1; 3497 } 3498 3499 /* 3500 * Convert &h->q[x] (passed to interrupt handlers) back to h. 3501 * Relies on (h-q[x] == x) being true for x such that 3502 * 0 <= x < MAX_REPLY_QUEUES. 3503 */ 3504 static struct ctlr_info *queue_to_hba(u8 *queue) 3505 { 3506 return container_of((queue - *queue), struct ctlr_info, q[0]); 3507 } 3508 3509 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 3510 { 3511 struct ctlr_info *h = queue_to_hba(queue); 3512 u8 q = *(u8 *) queue; 3513 u32 raw_tag; 3514 3515 if (ignore_bogus_interrupt(h)) 3516 return IRQ_NONE; 3517 3518 if (interrupt_not_for_us(h)) 3519 return IRQ_NONE; 3520 h->last_intr_timestamp = get_jiffies_64(); 3521 while (interrupt_pending(h)) { 3522 raw_tag = get_next_completion(h, q); 3523 while (raw_tag != FIFO_EMPTY) 3524 raw_tag = next_command(h, q); 3525 } 3526 return IRQ_HANDLED; 3527 } 3528 3529 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 3530 { 3531 struct ctlr_info *h = queue_to_hba(queue); 3532 u32 raw_tag; 3533 u8 q = *(u8 *) queue; 3534 3535 if (ignore_bogus_interrupt(h)) 3536 return IRQ_NONE; 3537 3538 h->last_intr_timestamp = get_jiffies_64(); 3539 raw_tag = get_next_completion(h, q); 3540 while (raw_tag != FIFO_EMPTY) 3541 raw_tag = next_command(h, q); 3542 return IRQ_HANDLED; 3543 } 3544 3545 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 3546 { 3547 struct ctlr_info *h = queue_to_hba((u8 *) queue); 3548 u32 raw_tag; 3549 u8 q = *(u8 *) queue; 3550 3551 if (interrupt_not_for_us(h)) 3552 return IRQ_NONE; 3553 h->last_intr_timestamp = get_jiffies_64(); 3554 while (interrupt_pending(h)) { 3555 raw_tag = get_next_completion(h, q); 3556 while (raw_tag != FIFO_EMPTY) { 3557 if (likely(hpsa_tag_contains_index(raw_tag))) 3558 process_indexed_cmd(h, raw_tag); 3559 else 3560 process_nonindexed_cmd(h, raw_tag); 3561 raw_tag = next_command(h, q); 3562 } 3563 } 3564 return IRQ_HANDLED; 3565 } 3566 3567 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 3568 { 3569 struct ctlr_info *h = queue_to_hba(queue); 3570 u32 raw_tag; 3571 u8 q = *(u8 *) queue; 3572 3573 h->last_intr_timestamp = get_jiffies_64(); 3574 raw_tag = get_next_completion(h, q); 3575 while (raw_tag != FIFO_EMPTY) { 3576 if (likely(hpsa_tag_contains_index(raw_tag))) 3577 process_indexed_cmd(h, raw_tag); 3578 else 3579 process_nonindexed_cmd(h, raw_tag); 3580 raw_tag = next_command(h, q); 3581 } 3582 return IRQ_HANDLED; 3583 } 3584 3585 /* Send a message CDB to the firmware. Careful, this only works 3586 * in simple mode, not performant mode due to the tag lookup. 3587 * We only ever use this immediately after a controller reset. 3588 */ 3589 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 3590 unsigned char type) 3591 { 3592 struct Command { 3593 struct CommandListHeader CommandHeader; 3594 struct RequestBlock Request; 3595 struct ErrDescriptor ErrorDescriptor; 3596 }; 3597 struct Command *cmd; 3598 static const size_t cmd_sz = sizeof(*cmd) + 3599 sizeof(cmd->ErrorDescriptor); 3600 dma_addr_t paddr64; 3601 uint32_t paddr32, tag; 3602 void __iomem *vaddr; 3603 int i, err; 3604 3605 vaddr = pci_ioremap_bar(pdev, 0); 3606 if (vaddr == NULL) 3607 return -ENOMEM; 3608 3609 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 3610 * CCISS commands, so they must be allocated from the lower 4GiB of 3611 * memory. 3612 */ 3613 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3614 if (err) { 3615 iounmap(vaddr); 3616 return -ENOMEM; 3617 } 3618 3619 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 3620 if (cmd == NULL) { 3621 iounmap(vaddr); 3622 return -ENOMEM; 3623 } 3624 3625 /* This must fit, because of the 32-bit consistent DMA mask. Also, 3626 * although there's no guarantee, we assume that the address is at 3627 * least 4-byte aligned (most likely, it's page-aligned). 3628 */ 3629 paddr32 = paddr64; 3630 3631 cmd->CommandHeader.ReplyQueue = 0; 3632 cmd->CommandHeader.SGList = 0; 3633 cmd->CommandHeader.SGTotal = 0; 3634 cmd->CommandHeader.Tag.lower = paddr32; 3635 cmd->CommandHeader.Tag.upper = 0; 3636 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 3637 3638 cmd->Request.CDBLen = 16; 3639 cmd->Request.Type.Type = TYPE_MSG; 3640 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; 3641 cmd->Request.Type.Direction = XFER_NONE; 3642 cmd->Request.Timeout = 0; /* Don't time out */ 3643 cmd->Request.CDB[0] = opcode; 3644 cmd->Request.CDB[1] = type; 3645 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 3646 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd); 3647 cmd->ErrorDescriptor.Addr.upper = 0; 3648 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo); 3649 3650 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 3651 3652 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 3653 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 3654 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32) 3655 break; 3656 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 3657 } 3658 3659 iounmap(vaddr); 3660 3661 /* we leak the DMA buffer here ... no choice since the controller could 3662 * still complete the command. 3663 */ 3664 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 3665 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 3666 opcode, type); 3667 return -ETIMEDOUT; 3668 } 3669 3670 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 3671 3672 if (tag & HPSA_ERROR_BIT) { 3673 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 3674 opcode, type); 3675 return -EIO; 3676 } 3677 3678 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 3679 opcode, type); 3680 return 0; 3681 } 3682 3683 #define hpsa_noop(p) hpsa_message(p, 3, 0) 3684 3685 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 3686 void * __iomem vaddr, u32 use_doorbell) 3687 { 3688 u16 pmcsr; 3689 int pos; 3690 3691 if (use_doorbell) { 3692 /* For everything after the P600, the PCI power state method 3693 * of resetting the controller doesn't work, so we have this 3694 * other way using the doorbell register. 3695 */ 3696 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 3697 writel(use_doorbell, vaddr + SA5_DOORBELL); 3698 } else { /* Try to do it the PCI power state way */ 3699 3700 /* Quoting from the Open CISS Specification: "The Power 3701 * Management Control/Status Register (CSR) controls the power 3702 * state of the device. The normal operating state is D0, 3703 * CSR=00h. The software off state is D3, CSR=03h. To reset 3704 * the controller, place the interface device in D3 then to D0, 3705 * this causes a secondary PCI reset which will reset the 3706 * controller." */ 3707 3708 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 3709 if (pos == 0) { 3710 dev_err(&pdev->dev, 3711 "hpsa_reset_controller: " 3712 "PCI PM not supported\n"); 3713 return -ENODEV; 3714 } 3715 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 3716 /* enter the D3hot power management state */ 3717 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 3718 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3719 pmcsr |= PCI_D3hot; 3720 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3721 3722 msleep(500); 3723 3724 /* enter the D0 power management state */ 3725 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3726 pmcsr |= PCI_D0; 3727 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3728 3729 /* 3730 * The P600 requires a small delay when changing states. 3731 * Otherwise we may think the board did not reset and we bail. 3732 * This for kdump only and is particular to the P600. 3733 */ 3734 msleep(500); 3735 } 3736 return 0; 3737 } 3738 3739 static __devinit void init_driver_version(char *driver_version, int len) 3740 { 3741 memset(driver_version, 0, len); 3742 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 3743 } 3744 3745 static __devinit int write_driver_ver_to_cfgtable( 3746 struct CfgTable __iomem *cfgtable) 3747 { 3748 char *driver_version; 3749 int i, size = sizeof(cfgtable->driver_version); 3750 3751 driver_version = kmalloc(size, GFP_KERNEL); 3752 if (!driver_version) 3753 return -ENOMEM; 3754 3755 init_driver_version(driver_version, size); 3756 for (i = 0; i < size; i++) 3757 writeb(driver_version[i], &cfgtable->driver_version[i]); 3758 kfree(driver_version); 3759 return 0; 3760 } 3761 3762 static __devinit void read_driver_ver_from_cfgtable( 3763 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver) 3764 { 3765 int i; 3766 3767 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 3768 driver_ver[i] = readb(&cfgtable->driver_version[i]); 3769 } 3770 3771 static __devinit int controller_reset_failed( 3772 struct CfgTable __iomem *cfgtable) 3773 { 3774 3775 char *driver_ver, *old_driver_ver; 3776 int rc, size = sizeof(cfgtable->driver_version); 3777 3778 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 3779 if (!old_driver_ver) 3780 return -ENOMEM; 3781 driver_ver = old_driver_ver + size; 3782 3783 /* After a reset, the 32 bytes of "driver version" in the cfgtable 3784 * should have been changed, otherwise we know the reset failed. 3785 */ 3786 init_driver_version(old_driver_ver, size); 3787 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 3788 rc = !memcmp(driver_ver, old_driver_ver, size); 3789 kfree(old_driver_ver); 3790 return rc; 3791 } 3792 /* This does a hard reset of the controller using PCI power management 3793 * states or the using the doorbell register. 3794 */ 3795 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) 3796 { 3797 u64 cfg_offset; 3798 u32 cfg_base_addr; 3799 u64 cfg_base_addr_index; 3800 void __iomem *vaddr; 3801 unsigned long paddr; 3802 u32 misc_fw_support; 3803 int rc; 3804 struct CfgTable __iomem *cfgtable; 3805 u32 use_doorbell; 3806 u32 board_id; 3807 u16 command_register; 3808 3809 /* For controllers as old as the P600, this is very nearly 3810 * the same thing as 3811 * 3812 * pci_save_state(pci_dev); 3813 * pci_set_power_state(pci_dev, PCI_D3hot); 3814 * pci_set_power_state(pci_dev, PCI_D0); 3815 * pci_restore_state(pci_dev); 3816 * 3817 * For controllers newer than the P600, the pci power state 3818 * method of resetting doesn't work so we have another way 3819 * using the doorbell register. 3820 */ 3821 3822 rc = hpsa_lookup_board_id(pdev, &board_id); 3823 if (rc < 0 || !ctlr_is_resettable(board_id)) { 3824 dev_warn(&pdev->dev, "Not resetting device.\n"); 3825 return -ENODEV; 3826 } 3827 3828 /* if controller is soft- but not hard resettable... */ 3829 if (!ctlr_is_hard_resettable(board_id)) 3830 return -ENOTSUPP; /* try soft reset later. */ 3831 3832 /* Save the PCI command register */ 3833 pci_read_config_word(pdev, 4, &command_register); 3834 /* Turn the board off. This is so that later pci_restore_state() 3835 * won't turn the board on before the rest of config space is ready. 3836 */ 3837 pci_disable_device(pdev); 3838 pci_save_state(pdev); 3839 3840 /* find the first memory BAR, so we can find the cfg table */ 3841 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 3842 if (rc) 3843 return rc; 3844 vaddr = remap_pci_mem(paddr, 0x250); 3845 if (!vaddr) 3846 return -ENOMEM; 3847 3848 /* find cfgtable in order to check if reset via doorbell is supported */ 3849 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 3850 &cfg_base_addr_index, &cfg_offset); 3851 if (rc) 3852 goto unmap_vaddr; 3853 cfgtable = remap_pci_mem(pci_resource_start(pdev, 3854 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 3855 if (!cfgtable) { 3856 rc = -ENOMEM; 3857 goto unmap_vaddr; 3858 } 3859 rc = write_driver_ver_to_cfgtable(cfgtable); 3860 if (rc) 3861 goto unmap_vaddr; 3862 3863 /* If reset via doorbell register is supported, use that. 3864 * There are two such methods. Favor the newest method. 3865 */ 3866 misc_fw_support = readl(&cfgtable->misc_fw_support); 3867 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 3868 if (use_doorbell) { 3869 use_doorbell = DOORBELL_CTLR_RESET2; 3870 } else { 3871 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 3872 if (use_doorbell) { 3873 dev_warn(&pdev->dev, "Soft reset not supported. " 3874 "Firmware update is required.\n"); 3875 rc = -ENOTSUPP; /* try soft reset */ 3876 goto unmap_cfgtable; 3877 } 3878 } 3879 3880 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 3881 if (rc) 3882 goto unmap_cfgtable; 3883 3884 pci_restore_state(pdev); 3885 rc = pci_enable_device(pdev); 3886 if (rc) { 3887 dev_warn(&pdev->dev, "failed to enable device.\n"); 3888 goto unmap_cfgtable; 3889 } 3890 pci_write_config_word(pdev, 4, command_register); 3891 3892 /* Some devices (notably the HP Smart Array 5i Controller) 3893 need a little pause here */ 3894 msleep(HPSA_POST_RESET_PAUSE_MSECS); 3895 3896 /* Wait for board to become not ready, then ready. */ 3897 dev_info(&pdev->dev, "Waiting for board to reset.\n"); 3898 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); 3899 if (rc) { 3900 dev_warn(&pdev->dev, 3901 "failed waiting for board to reset." 3902 " Will try soft reset.\n"); 3903 rc = -ENOTSUPP; /* Not expected, but try soft reset later */ 3904 goto unmap_cfgtable; 3905 } 3906 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 3907 if (rc) { 3908 dev_warn(&pdev->dev, 3909 "failed waiting for board to become ready " 3910 "after hard reset\n"); 3911 goto unmap_cfgtable; 3912 } 3913 3914 rc = controller_reset_failed(vaddr); 3915 if (rc < 0) 3916 goto unmap_cfgtable; 3917 if (rc) { 3918 dev_warn(&pdev->dev, "Unable to successfully reset " 3919 "controller. Will try soft reset.\n"); 3920 rc = -ENOTSUPP; 3921 } else { 3922 dev_info(&pdev->dev, "board ready after hard reset.\n"); 3923 } 3924 3925 unmap_cfgtable: 3926 iounmap(cfgtable); 3927 3928 unmap_vaddr: 3929 iounmap(vaddr); 3930 return rc; 3931 } 3932 3933 /* 3934 * We cannot read the structure directly, for portability we must use 3935 * the io functions. 3936 * This is for debug only. 3937 */ 3938 static void print_cfg_table(struct device *dev, struct CfgTable *tb) 3939 { 3940 #ifdef HPSA_DEBUG 3941 int i; 3942 char temp_name[17]; 3943 3944 dev_info(dev, "Controller Configuration information\n"); 3945 dev_info(dev, "------------------------------------\n"); 3946 for (i = 0; i < 4; i++) 3947 temp_name[i] = readb(&(tb->Signature[i])); 3948 temp_name[4] = '\0'; 3949 dev_info(dev, " Signature = %s\n", temp_name); 3950 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 3951 dev_info(dev, " Transport methods supported = 0x%x\n", 3952 readl(&(tb->TransportSupport))); 3953 dev_info(dev, " Transport methods active = 0x%x\n", 3954 readl(&(tb->TransportActive))); 3955 dev_info(dev, " Requested transport Method = 0x%x\n", 3956 readl(&(tb->HostWrite.TransportRequest))); 3957 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 3958 readl(&(tb->HostWrite.CoalIntDelay))); 3959 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 3960 readl(&(tb->HostWrite.CoalIntCount))); 3961 dev_info(dev, " Max outstanding commands = 0x%d\n", 3962 readl(&(tb->CmdsOutMax))); 3963 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 3964 for (i = 0; i < 16; i++) 3965 temp_name[i] = readb(&(tb->ServerName[i])); 3966 temp_name[16] = '\0'; 3967 dev_info(dev, " Server Name = %s\n", temp_name); 3968 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 3969 readl(&(tb->HeartBeat))); 3970 #endif /* HPSA_DEBUG */ 3971 } 3972 3973 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 3974 { 3975 int i, offset, mem_type, bar_type; 3976 3977 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 3978 return 0; 3979 offset = 0; 3980 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 3981 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 3982 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 3983 offset += 4; 3984 else { 3985 mem_type = pci_resource_flags(pdev, i) & 3986 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 3987 switch (mem_type) { 3988 case PCI_BASE_ADDRESS_MEM_TYPE_32: 3989 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 3990 offset += 4; /* 32 bit */ 3991 break; 3992 case PCI_BASE_ADDRESS_MEM_TYPE_64: 3993 offset += 8; 3994 break; 3995 default: /* reserved in PCI 2.2 */ 3996 dev_warn(&pdev->dev, 3997 "base address is invalid\n"); 3998 return -1; 3999 break; 4000 } 4001 } 4002 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 4003 return i + 1; 4004 } 4005 return -1; 4006 } 4007 4008 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 4009 * controllers that are capable. If not, we use IO-APIC mode. 4010 */ 4011 4012 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h) 4013 { 4014 #ifdef CONFIG_PCI_MSI 4015 int err, i; 4016 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 4017 4018 for (i = 0; i < MAX_REPLY_QUEUES; i++) { 4019 hpsa_msix_entries[i].vector = 0; 4020 hpsa_msix_entries[i].entry = i; 4021 } 4022 4023 /* Some boards advertise MSI but don't really support it */ 4024 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 4025 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 4026 goto default_int_mode; 4027 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 4028 dev_info(&h->pdev->dev, "MSIX\n"); 4029 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4030 MAX_REPLY_QUEUES); 4031 if (!err) { 4032 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4033 h->intr[i] = hpsa_msix_entries[i].vector; 4034 h->msix_vector = 1; 4035 return; 4036 } 4037 if (err > 0) { 4038 dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 4039 "available\n", err); 4040 goto default_int_mode; 4041 } else { 4042 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", 4043 err); 4044 goto default_int_mode; 4045 } 4046 } 4047 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 4048 dev_info(&h->pdev->dev, "MSI\n"); 4049 if (!pci_enable_msi(h->pdev)) 4050 h->msi_vector = 1; 4051 else 4052 dev_warn(&h->pdev->dev, "MSI init failed\n"); 4053 } 4054 default_int_mode: 4055 #endif /* CONFIG_PCI_MSI */ 4056 /* if we get here we're going to use the default interrupt mode */ 4057 h->intr[h->intr_mode] = h->pdev->irq; 4058 } 4059 4060 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 4061 { 4062 int i; 4063 u32 subsystem_vendor_id, subsystem_device_id; 4064 4065 subsystem_vendor_id = pdev->subsystem_vendor; 4066 subsystem_device_id = pdev->subsystem_device; 4067 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 4068 subsystem_vendor_id; 4069 4070 for (i = 0; i < ARRAY_SIZE(products); i++) 4071 if (*board_id == products[i].board_id) 4072 return i; 4073 4074 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 4075 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 4076 !hpsa_allow_any) { 4077 dev_warn(&pdev->dev, "unrecognized board ID: " 4078 "0x%08x, ignoring.\n", *board_id); 4079 return -ENODEV; 4080 } 4081 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 4082 } 4083 4084 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 4085 unsigned long *memory_bar) 4086 { 4087 int i; 4088 4089 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 4090 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 4091 /* addressing mode bits already removed */ 4092 *memory_bar = pci_resource_start(pdev, i); 4093 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 4094 *memory_bar); 4095 return 0; 4096 } 4097 dev_warn(&pdev->dev, "no memory BAR found\n"); 4098 return -ENODEV; 4099 } 4100 4101 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, 4102 void __iomem *vaddr, int wait_for_ready) 4103 { 4104 int i, iterations; 4105 u32 scratchpad; 4106 if (wait_for_ready) 4107 iterations = HPSA_BOARD_READY_ITERATIONS; 4108 else 4109 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 4110 4111 for (i = 0; i < iterations; i++) { 4112 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 4113 if (wait_for_ready) { 4114 if (scratchpad == HPSA_FIRMWARE_READY) 4115 return 0; 4116 } else { 4117 if (scratchpad != HPSA_FIRMWARE_READY) 4118 return 0; 4119 } 4120 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 4121 } 4122 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 4123 return -ENODEV; 4124 } 4125 4126 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, 4127 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 4128 u64 *cfg_offset) 4129 { 4130 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 4131 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 4132 *cfg_base_addr &= (u32) 0x0000ffff; 4133 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 4134 if (*cfg_base_addr_index == -1) { 4135 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 4136 return -ENODEV; 4137 } 4138 return 0; 4139 } 4140 4141 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h) 4142 { 4143 u64 cfg_offset; 4144 u32 cfg_base_addr; 4145 u64 cfg_base_addr_index; 4146 u32 trans_offset; 4147 int rc; 4148 4149 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 4150 &cfg_base_addr_index, &cfg_offset); 4151 if (rc) 4152 return rc; 4153 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 4154 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 4155 if (!h->cfgtable) 4156 return -ENOMEM; 4157 rc = write_driver_ver_to_cfgtable(h->cfgtable); 4158 if (rc) 4159 return rc; 4160 /* Find performant mode table. */ 4161 trans_offset = readl(&h->cfgtable->TransMethodOffset); 4162 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 4163 cfg_base_addr_index)+cfg_offset+trans_offset, 4164 sizeof(*h->transtable)); 4165 if (!h->transtable) 4166 return -ENOMEM; 4167 return 0; 4168 } 4169 4170 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 4171 { 4172 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 4173 4174 /* Limit commands in memory limited kdump scenario. */ 4175 if (reset_devices && h->max_commands > 32) 4176 h->max_commands = 32; 4177 4178 if (h->max_commands < 16) { 4179 dev_warn(&h->pdev->dev, "Controller reports " 4180 "max supported commands of %d, an obvious lie. " 4181 "Using 16. Ensure that firmware is up to date.\n", 4182 h->max_commands); 4183 h->max_commands = 16; 4184 } 4185 } 4186 4187 /* Interrogate the hardware for some limits: 4188 * max commands, max SG elements without chaining, and with chaining, 4189 * SG chain block size, etc. 4190 */ 4191 static void __devinit hpsa_find_board_params(struct ctlr_info *h) 4192 { 4193 hpsa_get_max_perf_mode_cmds(h); 4194 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ 4195 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 4196 /* 4197 * Limit in-command s/g elements to 32 save dma'able memory. 4198 * Howvever spec says if 0, use 31 4199 */ 4200 h->max_cmd_sg_entries = 31; 4201 if (h->maxsgentries > 512) { 4202 h->max_cmd_sg_entries = 32; 4203 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1; 4204 h->maxsgentries--; /* save one for chain pointer */ 4205 } else { 4206 h->maxsgentries = 31; /* default to traditional values */ 4207 h->chainsize = 0; 4208 } 4209 4210 /* Find out what task management functions are supported and cache */ 4211 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 4212 } 4213 4214 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 4215 { 4216 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 4217 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 4218 return false; 4219 } 4220 return true; 4221 } 4222 4223 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 4224 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h) 4225 { 4226 #ifdef CONFIG_X86 4227 u32 prefetch; 4228 4229 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 4230 prefetch |= 0x100; 4231 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 4232 #endif 4233 } 4234 4235 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 4236 * in a prefetch beyond physical memory. 4237 */ 4238 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 4239 { 4240 u32 dma_prefetch; 4241 4242 if (h->board_id != 0x3225103C) 4243 return; 4244 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 4245 dma_prefetch |= 0x8000; 4246 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 4247 } 4248 4249 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 4250 { 4251 int i; 4252 u32 doorbell_value; 4253 unsigned long flags; 4254 4255 /* under certain very rare conditions, this can take awhile. 4256 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 4257 * as we enter this code.) 4258 */ 4259 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 4260 spin_lock_irqsave(&h->lock, flags); 4261 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 4262 spin_unlock_irqrestore(&h->lock, flags); 4263 if (!(doorbell_value & CFGTBL_ChangeReq)) 4264 break; 4265 /* delay and try again */ 4266 usleep_range(10000, 20000); 4267 } 4268 } 4269 4270 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h) 4271 { 4272 u32 trans_support; 4273 4274 trans_support = readl(&(h->cfgtable->TransportSupport)); 4275 if (!(trans_support & SIMPLE_MODE)) 4276 return -ENOTSUPP; 4277 4278 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 4279 /* Update the field, and then ring the doorbell */ 4280 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 4281 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 4282 hpsa_wait_for_mode_change_ack(h); 4283 print_cfg_table(&h->pdev->dev, h->cfgtable); 4284 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { 4285 dev_warn(&h->pdev->dev, 4286 "unable to get board into simple mode\n"); 4287 return -ENODEV; 4288 } 4289 h->transMethod = CFGTBL_Trans_Simple; 4290 return 0; 4291 } 4292 4293 static int __devinit hpsa_pci_init(struct ctlr_info *h) 4294 { 4295 int prod_index, err; 4296 4297 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 4298 if (prod_index < 0) 4299 return -ENODEV; 4300 h->product_name = products[prod_index].product_name; 4301 h->access = *(products[prod_index].access); 4302 4303 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 4304 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 4305 4306 err = pci_enable_device(h->pdev); 4307 if (err) { 4308 dev_warn(&h->pdev->dev, "unable to enable PCI device\n"); 4309 return err; 4310 } 4311 4312 /* Enable bus mastering (pci_disable_device may disable this) */ 4313 pci_set_master(h->pdev); 4314 4315 err = pci_request_regions(h->pdev, HPSA); 4316 if (err) { 4317 dev_err(&h->pdev->dev, 4318 "cannot obtain PCI resources, aborting\n"); 4319 return err; 4320 } 4321 hpsa_interrupt_mode(h); 4322 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 4323 if (err) 4324 goto err_out_free_res; 4325 h->vaddr = remap_pci_mem(h->paddr, 0x250); 4326 if (!h->vaddr) { 4327 err = -ENOMEM; 4328 goto err_out_free_res; 4329 } 4330 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 4331 if (err) 4332 goto err_out_free_res; 4333 err = hpsa_find_cfgtables(h); 4334 if (err) 4335 goto err_out_free_res; 4336 hpsa_find_board_params(h); 4337 4338 if (!hpsa_CISS_signature_present(h)) { 4339 err = -ENODEV; 4340 goto err_out_free_res; 4341 } 4342 hpsa_enable_scsi_prefetch(h); 4343 hpsa_p600_dma_prefetch_quirk(h); 4344 err = hpsa_enter_simple_mode(h); 4345 if (err) 4346 goto err_out_free_res; 4347 return 0; 4348 4349 err_out_free_res: 4350 if (h->transtable) 4351 iounmap(h->transtable); 4352 if (h->cfgtable) 4353 iounmap(h->cfgtable); 4354 if (h->vaddr) 4355 iounmap(h->vaddr); 4356 pci_disable_device(h->pdev); 4357 pci_release_regions(h->pdev); 4358 return err; 4359 } 4360 4361 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h) 4362 { 4363 int rc; 4364 4365 #define HBA_INQUIRY_BYTE_COUNT 64 4366 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 4367 if (!h->hba_inquiry_data) 4368 return; 4369 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 4370 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 4371 if (rc != 0) { 4372 kfree(h->hba_inquiry_data); 4373 h->hba_inquiry_data = NULL; 4374 } 4375 } 4376 4377 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev) 4378 { 4379 int rc, i; 4380 4381 if (!reset_devices) 4382 return 0; 4383 4384 /* Reset the controller with a PCI power-cycle or via doorbell */ 4385 rc = hpsa_kdump_hard_reset_controller(pdev); 4386 4387 /* -ENOTSUPP here means we cannot reset the controller 4388 * but it's already (and still) up and running in 4389 * "performant mode". Or, it might be 640x, which can't reset 4390 * due to concerns about shared bbwc between 6402/6404 pair. 4391 */ 4392 if (rc == -ENOTSUPP) 4393 return rc; /* just try to do the kdump anyhow. */ 4394 if (rc) 4395 return -ENODEV; 4396 4397 /* Now try to get the controller to respond to a no-op */ 4398 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); 4399 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 4400 if (hpsa_noop(pdev) == 0) 4401 break; 4402 else 4403 dev_warn(&pdev->dev, "no-op failed%s\n", 4404 (i < 11 ? "; re-trying" : "")); 4405 } 4406 return 0; 4407 } 4408 4409 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h) 4410 { 4411 h->cmd_pool_bits = kzalloc( 4412 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 4413 sizeof(unsigned long), GFP_KERNEL); 4414 h->cmd_pool = pci_alloc_consistent(h->pdev, 4415 h->nr_cmds * sizeof(*h->cmd_pool), 4416 &(h->cmd_pool_dhandle)); 4417 h->errinfo_pool = pci_alloc_consistent(h->pdev, 4418 h->nr_cmds * sizeof(*h->errinfo_pool), 4419 &(h->errinfo_pool_dhandle)); 4420 if ((h->cmd_pool_bits == NULL) 4421 || (h->cmd_pool == NULL) 4422 || (h->errinfo_pool == NULL)) { 4423 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 4424 return -ENOMEM; 4425 } 4426 return 0; 4427 } 4428 4429 static void hpsa_free_cmd_pool(struct ctlr_info *h) 4430 { 4431 kfree(h->cmd_pool_bits); 4432 if (h->cmd_pool) 4433 pci_free_consistent(h->pdev, 4434 h->nr_cmds * sizeof(struct CommandList), 4435 h->cmd_pool, h->cmd_pool_dhandle); 4436 if (h->errinfo_pool) 4437 pci_free_consistent(h->pdev, 4438 h->nr_cmds * sizeof(struct ErrorInfo), 4439 h->errinfo_pool, 4440 h->errinfo_pool_dhandle); 4441 } 4442 4443 static int hpsa_request_irq(struct ctlr_info *h, 4444 irqreturn_t (*msixhandler)(int, void *), 4445 irqreturn_t (*intxhandler)(int, void *)) 4446 { 4447 int rc, i; 4448 4449 /* 4450 * initialize h->q[x] = x so that interrupt handlers know which 4451 * queue to process. 4452 */ 4453 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4454 h->q[i] = (u8) i; 4455 4456 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) { 4457 /* If performant mode and MSI-X, use multiple reply queues */ 4458 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4459 rc = request_irq(h->intr[i], msixhandler, 4460 0, h->devname, 4461 &h->q[i]); 4462 } else { 4463 /* Use single reply pool */ 4464 if (h->msix_vector || h->msi_vector) { 4465 rc = request_irq(h->intr[h->intr_mode], 4466 msixhandler, 0, h->devname, 4467 &h->q[h->intr_mode]); 4468 } else { 4469 rc = request_irq(h->intr[h->intr_mode], 4470 intxhandler, IRQF_SHARED, h->devname, 4471 &h->q[h->intr_mode]); 4472 } 4473 } 4474 if (rc) { 4475 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n", 4476 h->intr[h->intr_mode], h->devname); 4477 return -ENODEV; 4478 } 4479 return 0; 4480 } 4481 4482 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h) 4483 { 4484 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID, 4485 HPSA_RESET_TYPE_CONTROLLER)) { 4486 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); 4487 return -EIO; 4488 } 4489 4490 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 4491 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { 4492 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 4493 return -1; 4494 } 4495 4496 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 4497 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { 4498 dev_warn(&h->pdev->dev, "Board failed to become ready " 4499 "after soft reset.\n"); 4500 return -1; 4501 } 4502 4503 return 0; 4504 } 4505 4506 static void free_irqs(struct ctlr_info *h) 4507 { 4508 int i; 4509 4510 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 4511 /* Single reply queue, only one irq to free */ 4512 i = h->intr_mode; 4513 free_irq(h->intr[i], &h->q[i]); 4514 return; 4515 } 4516 4517 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4518 free_irq(h->intr[i], &h->q[i]); 4519 } 4520 4521 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h) 4522 { 4523 free_irqs(h); 4524 #ifdef CONFIG_PCI_MSI 4525 if (h->msix_vector) { 4526 if (h->pdev->msix_enabled) 4527 pci_disable_msix(h->pdev); 4528 } else if (h->msi_vector) { 4529 if (h->pdev->msi_enabled) 4530 pci_disable_msi(h->pdev); 4531 } 4532 #endif /* CONFIG_PCI_MSI */ 4533 } 4534 4535 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 4536 { 4537 hpsa_free_irqs_and_disable_msix(h); 4538 hpsa_free_sg_chain_blocks(h); 4539 hpsa_free_cmd_pool(h); 4540 kfree(h->blockFetchTable); 4541 pci_free_consistent(h->pdev, h->reply_pool_size, 4542 h->reply_pool, h->reply_pool_dhandle); 4543 if (h->vaddr) 4544 iounmap(h->vaddr); 4545 if (h->transtable) 4546 iounmap(h->transtable); 4547 if (h->cfgtable) 4548 iounmap(h->cfgtable); 4549 pci_release_regions(h->pdev); 4550 kfree(h); 4551 } 4552 4553 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h) 4554 { 4555 assert_spin_locked(&lockup_detector_lock); 4556 if (!hpsa_lockup_detector) 4557 return; 4558 if (h->lockup_detected) 4559 return; /* already stopped the lockup detector */ 4560 list_del(&h->lockup_list); 4561 } 4562 4563 /* Called when controller lockup detected. */ 4564 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) 4565 { 4566 struct CommandList *c = NULL; 4567 4568 assert_spin_locked(&h->lock); 4569 /* Mark all outstanding commands as failed and complete them. */ 4570 while (!list_empty(list)) { 4571 c = list_entry(list->next, struct CommandList, list); 4572 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 4573 finish_cmd(c); 4574 } 4575 } 4576 4577 static void controller_lockup_detected(struct ctlr_info *h) 4578 { 4579 unsigned long flags; 4580 4581 assert_spin_locked(&lockup_detector_lock); 4582 remove_ctlr_from_lockup_detector_list(h); 4583 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4584 spin_lock_irqsave(&h->lock, flags); 4585 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 4586 spin_unlock_irqrestore(&h->lock, flags); 4587 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n", 4588 h->lockup_detected); 4589 pci_disable_device(h->pdev); 4590 spin_lock_irqsave(&h->lock, flags); 4591 fail_all_cmds_on_list(h, &h->cmpQ); 4592 fail_all_cmds_on_list(h, &h->reqQ); 4593 spin_unlock_irqrestore(&h->lock, flags); 4594 } 4595 4596 static void detect_controller_lockup(struct ctlr_info *h) 4597 { 4598 u64 now; 4599 u32 heartbeat; 4600 unsigned long flags; 4601 4602 assert_spin_locked(&lockup_detector_lock); 4603 now = get_jiffies_64(); 4604 /* If we've received an interrupt recently, we're ok. */ 4605 if (time_after64(h->last_intr_timestamp + 4606 (h->heartbeat_sample_interval), now)) 4607 return; 4608 4609 /* 4610 * If we've already checked the heartbeat recently, we're ok. 4611 * This could happen if someone sends us a signal. We 4612 * otherwise don't care about signals in this thread. 4613 */ 4614 if (time_after64(h->last_heartbeat_timestamp + 4615 (h->heartbeat_sample_interval), now)) 4616 return; 4617 4618 /* If heartbeat has not changed since we last looked, we're not ok. */ 4619 spin_lock_irqsave(&h->lock, flags); 4620 heartbeat = readl(&h->cfgtable->HeartBeat); 4621 spin_unlock_irqrestore(&h->lock, flags); 4622 if (h->last_heartbeat == heartbeat) { 4623 controller_lockup_detected(h); 4624 return; 4625 } 4626 4627 /* We're ok. */ 4628 h->last_heartbeat = heartbeat; 4629 h->last_heartbeat_timestamp = now; 4630 } 4631 4632 static int detect_controller_lockup_thread(void *notused) 4633 { 4634 struct ctlr_info *h; 4635 unsigned long flags; 4636 4637 while (1) { 4638 struct list_head *this, *tmp; 4639 4640 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL); 4641 if (kthread_should_stop()) 4642 break; 4643 spin_lock_irqsave(&lockup_detector_lock, flags); 4644 list_for_each_safe(this, tmp, &hpsa_ctlr_list) { 4645 h = list_entry(this, struct ctlr_info, lockup_list); 4646 detect_controller_lockup(h); 4647 } 4648 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4649 } 4650 return 0; 4651 } 4652 4653 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h) 4654 { 4655 unsigned long flags; 4656 4657 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 4658 spin_lock_irqsave(&lockup_detector_lock, flags); 4659 list_add_tail(&h->lockup_list, &hpsa_ctlr_list); 4660 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4661 } 4662 4663 static void start_controller_lockup_detector(struct ctlr_info *h) 4664 { 4665 /* Start the lockup detector thread if not already started */ 4666 if (!hpsa_lockup_detector) { 4667 spin_lock_init(&lockup_detector_lock); 4668 hpsa_lockup_detector = 4669 kthread_run(detect_controller_lockup_thread, 4670 NULL, HPSA); 4671 } 4672 if (!hpsa_lockup_detector) { 4673 dev_warn(&h->pdev->dev, 4674 "Could not start lockup detector thread\n"); 4675 return; 4676 } 4677 add_ctlr_to_lockup_detector_list(h); 4678 } 4679 4680 static void stop_controller_lockup_detector(struct ctlr_info *h) 4681 { 4682 unsigned long flags; 4683 4684 spin_lock_irqsave(&lockup_detector_lock, flags); 4685 remove_ctlr_from_lockup_detector_list(h); 4686 /* If the list of ctlr's to monitor is empty, stop the thread */ 4687 if (list_empty(&hpsa_ctlr_list)) { 4688 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4689 kthread_stop(hpsa_lockup_detector); 4690 spin_lock_irqsave(&lockup_detector_lock, flags); 4691 hpsa_lockup_detector = NULL; 4692 } 4693 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4694 } 4695 4696 static int __devinit hpsa_init_one(struct pci_dev *pdev, 4697 const struct pci_device_id *ent) 4698 { 4699 int dac, rc; 4700 struct ctlr_info *h; 4701 int try_soft_reset = 0; 4702 unsigned long flags; 4703 4704 if (number_of_controllers == 0) 4705 printk(KERN_INFO DRIVER_NAME "\n"); 4706 4707 rc = hpsa_init_reset_devices(pdev); 4708 if (rc) { 4709 if (rc != -ENOTSUPP) 4710 return rc; 4711 /* If the reset fails in a particular way (it has no way to do 4712 * a proper hard reset, so returns -ENOTSUPP) we can try to do 4713 * a soft reset once we get the controller configured up to the 4714 * point that it can accept a command. 4715 */ 4716 try_soft_reset = 1; 4717 rc = 0; 4718 } 4719 4720 reinit_after_soft_reset: 4721 4722 /* Command structures must be aligned on a 32-byte boundary because 4723 * the 5 lower bits of the address are used by the hardware. and by 4724 * the driver. See comments in hpsa.h for more info. 4725 */ 4726 #define COMMANDLIST_ALIGNMENT 32 4727 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 4728 h = kzalloc(sizeof(*h), GFP_KERNEL); 4729 if (!h) 4730 return -ENOMEM; 4731 4732 h->pdev = pdev; 4733 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 4734 INIT_LIST_HEAD(&h->cmpQ); 4735 INIT_LIST_HEAD(&h->reqQ); 4736 spin_lock_init(&h->lock); 4737 spin_lock_init(&h->scan_lock); 4738 rc = hpsa_pci_init(h); 4739 if (rc != 0) 4740 goto clean1; 4741 4742 sprintf(h->devname, HPSA "%d", number_of_controllers); 4743 h->ctlr = number_of_controllers; 4744 number_of_controllers++; 4745 4746 /* configure PCI DMA stuff */ 4747 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 4748 if (rc == 0) { 4749 dac = 1; 4750 } else { 4751 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 4752 if (rc == 0) { 4753 dac = 0; 4754 } else { 4755 dev_err(&pdev->dev, "no suitable DMA available\n"); 4756 goto clean1; 4757 } 4758 } 4759 4760 /* make sure the board interrupts are off */ 4761 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4762 4763 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx)) 4764 goto clean2; 4765 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n", 4766 h->devname, pdev->device, 4767 h->intr[h->intr_mode], dac ? "" : " not"); 4768 if (hpsa_allocate_cmd_pool(h)) 4769 goto clean4; 4770 if (hpsa_allocate_sg_chain_blocks(h)) 4771 goto clean4; 4772 init_waitqueue_head(&h->scan_wait_queue); 4773 h->scan_finished = 1; /* no scan currently in progress */ 4774 4775 pci_set_drvdata(pdev, h); 4776 h->ndevices = 0; 4777 h->scsi_host = NULL; 4778 spin_lock_init(&h->devlock); 4779 hpsa_put_ctlr_into_performant_mode(h); 4780 4781 /* At this point, the controller is ready to take commands. 4782 * Now, if reset_devices and the hard reset didn't work, try 4783 * the soft reset and see if that works. 4784 */ 4785 if (try_soft_reset) { 4786 4787 /* This is kind of gross. We may or may not get a completion 4788 * from the soft reset command, and if we do, then the value 4789 * from the fifo may or may not be valid. So, we wait 10 secs 4790 * after the reset throwing away any completions we get during 4791 * that time. Unregister the interrupt handler and register 4792 * fake ones to scoop up any residual completions. 4793 */ 4794 spin_lock_irqsave(&h->lock, flags); 4795 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4796 spin_unlock_irqrestore(&h->lock, flags); 4797 free_irqs(h); 4798 rc = hpsa_request_irq(h, hpsa_msix_discard_completions, 4799 hpsa_intx_discard_completions); 4800 if (rc) { 4801 dev_warn(&h->pdev->dev, "Failed to request_irq after " 4802 "soft reset.\n"); 4803 goto clean4; 4804 } 4805 4806 rc = hpsa_kdump_soft_reset(h); 4807 if (rc) 4808 /* Neither hard nor soft reset worked, we're hosed. */ 4809 goto clean4; 4810 4811 dev_info(&h->pdev->dev, "Board READY.\n"); 4812 dev_info(&h->pdev->dev, 4813 "Waiting for stale completions to drain.\n"); 4814 h->access.set_intr_mask(h, HPSA_INTR_ON); 4815 msleep(10000); 4816 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4817 4818 rc = controller_reset_failed(h->cfgtable); 4819 if (rc) 4820 dev_info(&h->pdev->dev, 4821 "Soft reset appears to have failed.\n"); 4822 4823 /* since the controller's reset, we have to go back and re-init 4824 * everything. Easiest to just forget what we've done and do it 4825 * all over again. 4826 */ 4827 hpsa_undo_allocations_after_kdump_soft_reset(h); 4828 try_soft_reset = 0; 4829 if (rc) 4830 /* don't go to clean4, we already unallocated */ 4831 return -ENODEV; 4832 4833 goto reinit_after_soft_reset; 4834 } 4835 4836 /* Turn the interrupts on so we can service requests */ 4837 h->access.set_intr_mask(h, HPSA_INTR_ON); 4838 4839 hpsa_hba_inquiry(h); 4840 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ 4841 start_controller_lockup_detector(h); 4842 return 1; 4843 4844 clean4: 4845 hpsa_free_sg_chain_blocks(h); 4846 hpsa_free_cmd_pool(h); 4847 free_irqs(h); 4848 clean2: 4849 clean1: 4850 kfree(h); 4851 return rc; 4852 } 4853 4854 static void hpsa_flush_cache(struct ctlr_info *h) 4855 { 4856 char *flush_buf; 4857 struct CommandList *c; 4858 4859 flush_buf = kzalloc(4, GFP_KERNEL); 4860 if (!flush_buf) 4861 return; 4862 4863 c = cmd_special_alloc(h); 4864 if (!c) { 4865 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 4866 goto out_of_memory; 4867 } 4868 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 4869 RAID_CTLR_LUNID, TYPE_CMD); 4870 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); 4871 if (c->err_info->CommandStatus != 0) 4872 dev_warn(&h->pdev->dev, 4873 "error flushing cache on controller\n"); 4874 cmd_special_free(h, c); 4875 out_of_memory: 4876 kfree(flush_buf); 4877 } 4878 4879 static void hpsa_shutdown(struct pci_dev *pdev) 4880 { 4881 struct ctlr_info *h; 4882 4883 h = pci_get_drvdata(pdev); 4884 /* Turn board interrupts off and send the flush cache command 4885 * sendcmd will turn off interrupt, and send the flush... 4886 * To write all data in the battery backed cache to disks 4887 */ 4888 hpsa_flush_cache(h); 4889 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4890 hpsa_free_irqs_and_disable_msix(h); 4891 } 4892 4893 static void __devexit hpsa_free_device_info(struct ctlr_info *h) 4894 { 4895 int i; 4896 4897 for (i = 0; i < h->ndevices; i++) 4898 kfree(h->dev[i]); 4899 } 4900 4901 static void __devexit hpsa_remove_one(struct pci_dev *pdev) 4902 { 4903 struct ctlr_info *h; 4904 4905 if (pci_get_drvdata(pdev) == NULL) { 4906 dev_err(&pdev->dev, "unable to remove device\n"); 4907 return; 4908 } 4909 h = pci_get_drvdata(pdev); 4910 stop_controller_lockup_detector(h); 4911 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ 4912 hpsa_shutdown(pdev); 4913 iounmap(h->vaddr); 4914 iounmap(h->transtable); 4915 iounmap(h->cfgtable); 4916 hpsa_free_device_info(h); 4917 hpsa_free_sg_chain_blocks(h); 4918 pci_free_consistent(h->pdev, 4919 h->nr_cmds * sizeof(struct CommandList), 4920 h->cmd_pool, h->cmd_pool_dhandle); 4921 pci_free_consistent(h->pdev, 4922 h->nr_cmds * sizeof(struct ErrorInfo), 4923 h->errinfo_pool, h->errinfo_pool_dhandle); 4924 pci_free_consistent(h->pdev, h->reply_pool_size, 4925 h->reply_pool, h->reply_pool_dhandle); 4926 kfree(h->cmd_pool_bits); 4927 kfree(h->blockFetchTable); 4928 kfree(h->hba_inquiry_data); 4929 pci_disable_device(pdev); 4930 pci_release_regions(pdev); 4931 pci_set_drvdata(pdev, NULL); 4932 kfree(h); 4933 } 4934 4935 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 4936 __attribute__((unused)) pm_message_t state) 4937 { 4938 return -ENOSYS; 4939 } 4940 4941 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 4942 { 4943 return -ENOSYS; 4944 } 4945 4946 static struct pci_driver hpsa_pci_driver = { 4947 .name = HPSA, 4948 .probe = hpsa_init_one, 4949 .remove = __devexit_p(hpsa_remove_one), 4950 .id_table = hpsa_pci_device_id, /* id_table */ 4951 .shutdown = hpsa_shutdown, 4952 .suspend = hpsa_suspend, 4953 .resume = hpsa_resume, 4954 }; 4955 4956 /* Fill in bucket_map[], given nsgs (the max number of 4957 * scatter gather elements supported) and bucket[], 4958 * which is an array of 8 integers. The bucket[] array 4959 * contains 8 different DMA transfer sizes (in 16 4960 * byte increments) which the controller uses to fetch 4961 * commands. This function fills in bucket_map[], which 4962 * maps a given number of scatter gather elements to one of 4963 * the 8 DMA transfer sizes. The point of it is to allow the 4964 * controller to only do as much DMA as needed to fetch the 4965 * command, with the DMA transfer size encoded in the lower 4966 * bits of the command address. 4967 */ 4968 static void calc_bucket_map(int bucket[], int num_buckets, 4969 int nsgs, int *bucket_map) 4970 { 4971 int i, j, b, size; 4972 4973 /* even a command with 0 SGs requires 4 blocks */ 4974 #define MINIMUM_TRANSFER_BLOCKS 4 4975 #define NUM_BUCKETS 8 4976 /* Note, bucket_map must have nsgs+1 entries. */ 4977 for (i = 0; i <= nsgs; i++) { 4978 /* Compute size of a command with i SG entries */ 4979 size = i + MINIMUM_TRANSFER_BLOCKS; 4980 b = num_buckets; /* Assume the biggest bucket */ 4981 /* Find the bucket that is just big enough */ 4982 for (j = 0; j < 8; j++) { 4983 if (bucket[j] >= size) { 4984 b = j; 4985 break; 4986 } 4987 } 4988 /* for a command with i SG entries, use bucket b. */ 4989 bucket_map[i] = b; 4990 } 4991 } 4992 4993 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h, 4994 u32 use_short_tags) 4995 { 4996 int i; 4997 unsigned long register_value; 4998 4999 /* This is a bit complicated. There are 8 registers on 5000 * the controller which we write to to tell it 8 different 5001 * sizes of commands which there may be. It's a way of 5002 * reducing the DMA done to fetch each command. Encoded into 5003 * each command's tag are 3 bits which communicate to the controller 5004 * which of the eight sizes that command fits within. The size of 5005 * each command depends on how many scatter gather entries there are. 5006 * Each SG entry requires 16 bytes. The eight registers are programmed 5007 * with the number of 16-byte blocks a command of that size requires. 5008 * The smallest command possible requires 5 such 16 byte blocks. 5009 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 5010 * blocks. Note, this only extends to the SG entries contained 5011 * within the command block, and does not extend to chained blocks 5012 * of SG elements. bft[] contains the eight values we write to 5013 * the registers. They are not evenly distributed, but have more 5014 * sizes for small commands, and fewer sizes for larger commands. 5015 */ 5016 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 5017 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 5018 /* 5 = 1 s/g entry or 4k 5019 * 6 = 2 s/g entry or 8k 5020 * 8 = 4 s/g entry or 16k 5021 * 10 = 6 s/g entry or 24k 5022 */ 5023 5024 /* Controller spec: zero out this buffer. */ 5025 memset(h->reply_pool, 0, h->reply_pool_size); 5026 5027 bft[7] = SG_ENTRIES_IN_CMD + 4; 5028 calc_bucket_map(bft, ARRAY_SIZE(bft), 5029 SG_ENTRIES_IN_CMD, h->blockFetchTable); 5030 for (i = 0; i < 8; i++) 5031 writel(bft[i], &h->transtable->BlockFetch[i]); 5032 5033 /* size of controller ring buffer */ 5034 writel(h->max_commands, &h->transtable->RepQSize); 5035 writel(h->nreply_queues, &h->transtable->RepQCount); 5036 writel(0, &h->transtable->RepQCtrAddrLow32); 5037 writel(0, &h->transtable->RepQCtrAddrHigh32); 5038 5039 for (i = 0; i < h->nreply_queues; i++) { 5040 writel(0, &h->transtable->RepQAddr[i].upper); 5041 writel(h->reply_pool_dhandle + 5042 (h->max_commands * sizeof(u64) * i), 5043 &h->transtable->RepQAddr[i].lower); 5044 } 5045 5046 writel(CFGTBL_Trans_Performant | use_short_tags | 5047 CFGTBL_Trans_enable_directed_msix, 5048 &(h->cfgtable->HostWrite.TransportRequest)); 5049 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 5050 hpsa_wait_for_mode_change_ack(h); 5051 register_value = readl(&(h->cfgtable->TransportActive)); 5052 if (!(register_value & CFGTBL_Trans_Performant)) { 5053 dev_warn(&h->pdev->dev, "unable to get board into" 5054 " performant mode\n"); 5055 return; 5056 } 5057 /* Change the access methods to the performant access methods */ 5058 h->access = SA5_performant_access; 5059 h->transMethod = CFGTBL_Trans_Performant; 5060 } 5061 5062 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 5063 { 5064 u32 trans_support; 5065 int i; 5066 5067 if (hpsa_simple_mode) 5068 return; 5069 5070 trans_support = readl(&(h->cfgtable->TransportSupport)); 5071 if (!(trans_support & PERFORMANT_MODE)) 5072 return; 5073 5074 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1; 5075 hpsa_get_max_perf_mode_cmds(h); 5076 /* Performant mode ring buffer and supporting data structures */ 5077 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues; 5078 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size, 5079 &(h->reply_pool_dhandle)); 5080 5081 for (i = 0; i < h->nreply_queues; i++) { 5082 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i]; 5083 h->reply_queue[i].size = h->max_commands; 5084 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 5085 h->reply_queue[i].current_entry = 0; 5086 } 5087 5088 /* Need a block fetch table for performant mode */ 5089 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 5090 sizeof(u32)), GFP_KERNEL); 5091 5092 if ((h->reply_pool == NULL) 5093 || (h->blockFetchTable == NULL)) 5094 goto clean_up; 5095 5096 hpsa_enter_performant_mode(h, 5097 trans_support & CFGTBL_Trans_use_short_tags); 5098 5099 return; 5100 5101 clean_up: 5102 if (h->reply_pool) 5103 pci_free_consistent(h->pdev, h->reply_pool_size, 5104 h->reply_pool, h->reply_pool_dhandle); 5105 kfree(h->blockFetchTable); 5106 } 5107 5108 /* 5109 * This is it. Register the PCI driver information for the cards we control 5110 * the OS will call our registered routines when it finds one of our cards. 5111 */ 5112 static int __init hpsa_init(void) 5113 { 5114 return pci_register_driver(&hpsa_pci_driver); 5115 } 5116 5117 static void __exit hpsa_cleanup(void) 5118 { 5119 pci_unregister_driver(&hpsa_pci_driver); 5120 } 5121 5122 module_init(hpsa_init); 5123 module_exit(hpsa_cleanup); 5124