1 /* 2 * Copyright (c) 2015 Linaro Ltd. 3 * Copyright (c) 2015 Hisilicon Limited. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 */ 11 12 #ifndef _HISI_SAS_H_ 13 #define _HISI_SAS_H_ 14 15 #include <linux/acpi.h> 16 #include <linux/clk.h> 17 #include <linux/dmapool.h> 18 #include <linux/iopoll.h> 19 #include <linux/mfd/syscon.h> 20 #include <linux/module.h> 21 #include <linux/of_address.h> 22 #include <linux/pci.h> 23 #include <linux/platform_device.h> 24 #include <linux/property.h> 25 #include <linux/regmap.h> 26 #include <scsi/sas_ata.h> 27 #include <scsi/libsas.h> 28 29 #define HISI_SAS_MAX_PHYS 9 30 #define HISI_SAS_MAX_QUEUES 32 31 #define HISI_SAS_QUEUE_SLOTS 512 32 #define HISI_SAS_MAX_ITCT_ENTRIES 1024 33 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 34 #define HISI_SAS_RESET_BIT 0 35 #define HISI_SAS_REJECT_CMD_BIT 1 36 37 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) 38 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) 39 40 #define hisi_sas_status_buf_addr(buf) \ 41 (buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) 42 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf) 43 #define hisi_sas_status_buf_addr_dma(slot) \ 44 hisi_sas_status_buf_addr(slot->buf_dma) 45 46 #define hisi_sas_cmd_hdr_addr(buf) \ 47 (buf + offsetof(struct hisi_sas_slot_buf_table, command_header)) 48 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf) 49 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma) 50 51 #define hisi_sas_sge_addr(buf) \ 52 (buf + offsetof(struct hisi_sas_slot_buf_table, sge_page)) 53 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf) 54 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma) 55 56 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 57 #define HISI_SAS_MAX_SMP_RESP_SZ 1028 58 #define HISI_SAS_MAX_STP_RESP_SZ 28 59 60 #define DEV_IS_EXPANDER(type) \ 61 ((type == SAS_EDGE_EXPANDER_DEVICE) || \ 62 (type == SAS_FANOUT_EXPANDER_DEVICE)) 63 64 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 65 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2 66 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4 67 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 68 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 69 70 struct hisi_hba; 71 72 enum { 73 PORT_TYPE_SAS = (1U << 1), 74 PORT_TYPE_SATA = (1U << 0), 75 }; 76 77 enum dev_status { 78 HISI_SAS_DEV_NORMAL, 79 HISI_SAS_DEV_EH, 80 }; 81 82 enum { 83 HISI_SAS_INT_ABT_CMD = 0, 84 HISI_SAS_INT_ABT_DEV = 1, 85 }; 86 87 enum hisi_sas_dev_type { 88 HISI_SAS_DEV_TYPE_STP = 0, 89 HISI_SAS_DEV_TYPE_SSP, 90 HISI_SAS_DEV_TYPE_SATA, 91 }; 92 93 struct hisi_sas_hw_error { 94 u32 irq_msk; 95 u32 msk; 96 int shift; 97 const char *msg; 98 int reg; 99 const struct hisi_sas_hw_error *sub; 100 }; 101 102 struct hisi_sas_rst { 103 struct hisi_hba *hisi_hba; 104 struct completion *completion; 105 struct work_struct work; 106 bool done; 107 }; 108 109 #define HISI_SAS_RST_WORK_INIT(r, c) \ 110 { .hisi_hba = hisi_hba, \ 111 .completion = &c, \ 112 .work = __WORK_INITIALIZER(r.work, \ 113 hisi_sas_sync_rst_work_handler), \ 114 .done = false, \ 115 } 116 117 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ 118 DECLARE_COMPLETION_ONSTACK(c); \ 119 DECLARE_WORK(w, hisi_sas_sync_rst_work_handler); \ 120 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) 121 122 enum hisi_sas_bit_err_type { 123 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0, 124 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1, 125 }; 126 127 enum hisi_sas_phy_event { 128 HISI_PHYE_PHY_UP = 0U, 129 HISI_PHYE_LINK_RESET, 130 HISI_PHYES_NUM, 131 }; 132 133 struct hisi_sas_phy { 134 struct work_struct works[HISI_PHYES_NUM]; 135 struct hisi_hba *hisi_hba; 136 struct hisi_sas_port *port; 137 struct asd_sas_phy sas_phy; 138 struct sas_identify identify; 139 struct completion *reset_completion; 140 spinlock_t lock; 141 u64 port_id; /* from hw */ 142 u64 frame_rcvd_size; 143 u8 frame_rcvd[32]; 144 u8 phy_attached; 145 u8 in_reset; 146 u8 reserved[2]; 147 u32 phy_type; 148 enum sas_linkrate minimum_linkrate; 149 enum sas_linkrate maximum_linkrate; 150 }; 151 152 struct hisi_sas_port { 153 struct asd_sas_port sas_port; 154 u8 port_attached; 155 u8 id; /* from hw */ 156 }; 157 158 struct hisi_sas_cq { 159 struct hisi_hba *hisi_hba; 160 struct tasklet_struct tasklet; 161 int rd_point; 162 int id; 163 }; 164 165 struct hisi_sas_dq { 166 struct hisi_hba *hisi_hba; 167 struct list_head list; 168 spinlock_t lock; 169 int wr_point; 170 int id; 171 }; 172 173 struct hisi_sas_device { 174 struct hisi_hba *hisi_hba; 175 struct domain_device *sas_device; 176 struct completion *completion; 177 struct hisi_sas_dq *dq; 178 struct list_head list; 179 enum sas_device_type dev_type; 180 int device_id; 181 int sata_idx; 182 u8 dev_status; 183 }; 184 185 struct hisi_sas_tmf_task { 186 int force_phy; 187 int phy_id; 188 u8 tmf; 189 u16 tag_of_task_to_be_managed; 190 }; 191 192 struct hisi_sas_slot { 193 struct list_head entry; 194 struct list_head delivery; 195 struct sas_task *task; 196 struct hisi_sas_port *port; 197 u64 n_elem; 198 int dlvry_queue; 199 int dlvry_queue_slot; 200 int cmplt_queue; 201 int cmplt_queue_slot; 202 int idx; 203 int abort; 204 int ready; 205 void *buf; 206 dma_addr_t buf_dma; 207 void *cmd_hdr; 208 dma_addr_t cmd_hdr_dma; 209 struct work_struct abort_slot; 210 struct timer_list internal_abort_timer; 211 bool is_internal; 212 struct hisi_sas_tmf_task *tmf; 213 }; 214 215 struct hisi_sas_hw { 216 int (*hw_init)(struct hisi_hba *hisi_hba); 217 void (*setup_itct)(struct hisi_hba *hisi_hba, 218 struct hisi_sas_device *device); 219 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx, 220 struct domain_device *device); 221 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 222 void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no); 223 int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq); 224 void (*start_delivery)(struct hisi_sas_dq *dq); 225 void (*prep_ssp)(struct hisi_hba *hisi_hba, 226 struct hisi_sas_slot *slot); 227 void (*prep_smp)(struct hisi_hba *hisi_hba, 228 struct hisi_sas_slot *slot); 229 void (*prep_stp)(struct hisi_hba *hisi_hba, 230 struct hisi_sas_slot *slot); 231 void (*prep_abort)(struct hisi_hba *hisi_hba, 232 struct hisi_sas_slot *slot, 233 int device_id, int abort_flag, int tag_to_abort); 234 int (*slot_complete)(struct hisi_hba *hisi_hba, 235 struct hisi_sas_slot *slot); 236 void (*phys_init)(struct hisi_hba *hisi_hba); 237 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); 238 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 239 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 240 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); 241 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 242 struct sas_phy_linkrates *linkrates); 243 enum sas_linkrate (*phy_get_max_linkrate)(void); 244 void (*clear_itct)(struct hisi_hba *hisi_hba, 245 struct hisi_sas_device *dev); 246 void (*free_device)(struct hisi_sas_device *sas_dev); 247 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 248 void (*dereg_device)(struct hisi_hba *hisi_hba, 249 struct domain_device *device); 250 int (*soft_reset)(struct hisi_hba *hisi_hba); 251 u32 (*get_phys_state)(struct hisi_hba *hisi_hba); 252 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, 253 u8 reg_index, u8 reg_count, u8 *write_data); 254 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 255 int delay_ms, int timeout_ms); 256 int max_command_entries; 257 int complete_hdr_size; 258 struct scsi_host_template *sht; 259 }; 260 261 struct hisi_hba { 262 /* This must be the first element, used by SHOST_TO_SAS_HA */ 263 struct sas_ha_struct *p; 264 265 struct platform_device *platform_dev; 266 struct pci_dev *pci_dev; 267 struct device *dev; 268 269 void __iomem *regs; 270 void __iomem *sgpio_regs; 271 struct regmap *ctrl; 272 u32 ctrl_reset_reg; 273 u32 ctrl_reset_sts_reg; 274 u32 ctrl_clock_ena_reg; 275 u32 refclk_frequency_mhz; 276 u8 sas_addr[SAS_ADDR_SIZE]; 277 278 int n_phy; 279 spinlock_t lock; 280 281 struct timer_list timer; 282 struct workqueue_struct *wq; 283 284 int slot_index_count; 285 int last_slot_index; 286 int last_dev_id; 287 unsigned long *slot_index_tags; 288 unsigned long reject_stp_links_msk; 289 290 /* SCSI/SAS glue */ 291 struct sas_ha_struct sha; 292 struct Scsi_Host *shost; 293 294 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 295 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 296 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 297 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 298 299 int queue_count; 300 301 struct dma_pool *buffer_pool; 302 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 303 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 304 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 305 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 306 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 307 struct hisi_sas_initial_fis *initial_fis; 308 dma_addr_t initial_fis_dma; 309 struct hisi_sas_itct *itct; 310 dma_addr_t itct_dma; 311 struct hisi_sas_iost *iost; 312 dma_addr_t iost_dma; 313 struct hisi_sas_breakpoint *breakpoint; 314 dma_addr_t breakpoint_dma; 315 struct hisi_sas_breakpoint *sata_breakpoint; 316 dma_addr_t sata_breakpoint_dma; 317 struct hisi_sas_slot *slot_info; 318 unsigned long flags; 319 const struct hisi_sas_hw *hw; /* Low level hw interface */ 320 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; 321 struct work_struct rst_work; 322 }; 323 324 /* Generic HW DMA host memory structures */ 325 /* Delivery queue header */ 326 struct hisi_sas_cmd_hdr { 327 /* dw0 */ 328 __le32 dw0; 329 330 /* dw1 */ 331 __le32 dw1; 332 333 /* dw2 */ 334 __le32 dw2; 335 336 /* dw3 */ 337 __le32 transfer_tags; 338 339 /* dw4 */ 340 __le32 data_transfer_len; 341 342 /* dw5 */ 343 __le32 first_burst_num; 344 345 /* dw6 */ 346 __le32 sg_len; 347 348 /* dw7 */ 349 __le32 dw7; 350 351 /* dw8-9 */ 352 __le64 cmd_table_addr; 353 354 /* dw10-11 */ 355 __le64 sts_buffer_addr; 356 357 /* dw12-13 */ 358 __le64 prd_table_addr; 359 360 /* dw14-15 */ 361 __le64 dif_prd_table_addr; 362 }; 363 364 struct hisi_sas_itct { 365 __le64 qw0; 366 __le64 sas_addr; 367 __le64 qw2; 368 __le64 qw3; 369 __le64 qw4_15[12]; 370 }; 371 372 struct hisi_sas_iost { 373 __le64 qw0; 374 __le64 qw1; 375 __le64 qw2; 376 __le64 qw3; 377 }; 378 379 struct hisi_sas_err_record { 380 u32 data[4]; 381 }; 382 383 struct hisi_sas_initial_fis { 384 struct hisi_sas_err_record err_record; 385 struct dev_to_host_fis fis; 386 u32 rsvd[3]; 387 }; 388 389 struct hisi_sas_breakpoint { 390 u8 data[128]; 391 }; 392 393 struct hisi_sas_sata_breakpoint { 394 struct hisi_sas_breakpoint tag[32]; 395 }; 396 397 struct hisi_sas_sge { 398 __le64 addr; 399 __le32 page_ctrl_0; 400 __le32 page_ctrl_1; 401 __le32 data_len; 402 __le32 data_off; 403 }; 404 405 struct hisi_sas_command_table_smp { 406 u8 bytes[44]; 407 }; 408 409 struct hisi_sas_command_table_stp { 410 struct host_to_dev_fis command_fis; 411 u8 dummy[12]; 412 u8 atapi_cdb[ATAPI_CDB_LEN]; 413 }; 414 415 #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE 416 struct hisi_sas_sge_page { 417 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 418 } __aligned(16); 419 420 struct hisi_sas_command_table_ssp { 421 struct ssp_frame_hdr hdr; 422 union { 423 struct { 424 struct ssp_command_iu task; 425 u32 prot[7]; 426 }; 427 struct ssp_tmf_iu ssp_task; 428 struct xfer_rdy_iu xfer_rdy; 429 struct ssp_response_iu ssp_res; 430 } u; 431 }; 432 433 union hisi_sas_command_table { 434 struct hisi_sas_command_table_ssp ssp; 435 struct hisi_sas_command_table_smp smp; 436 struct hisi_sas_command_table_stp stp; 437 } __aligned(16); 438 439 struct hisi_sas_status_buffer { 440 struct hisi_sas_err_record err; 441 u8 iu[1024]; 442 } __aligned(16); 443 444 struct hisi_sas_slot_buf_table { 445 struct hisi_sas_status_buffer status_buffer; 446 union hisi_sas_command_table command_header; 447 struct hisi_sas_sge_page sge_page; 448 }; 449 450 extern struct scsi_transport_template *hisi_sas_stt; 451 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); 452 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost); 453 extern void hisi_sas_free(struct hisi_hba *hisi_hba); 454 extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, 455 int direction); 456 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 457 extern void hisi_sas_sata_done(struct sas_task *task, 458 struct hisi_sas_slot *slot); 459 extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag); 460 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); 461 extern int hisi_sas_probe(struct platform_device *pdev, 462 const struct hisi_sas_hw *ops); 463 extern int hisi_sas_remove(struct platform_device *pdev); 464 465 extern int hisi_sas_slave_configure(struct scsi_device *sdev); 466 extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time); 467 extern void hisi_sas_scan_start(struct Scsi_Host *shost); 468 extern struct device_attribute *host_attrs[]; 469 extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type); 470 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); 471 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 472 struct sas_task *task, 473 struct hisi_sas_slot *slot); 474 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); 475 extern void hisi_sas_rst_work_handler(struct work_struct *work); 476 extern void hisi_sas_sync_rst_work_handler(struct work_struct *work); 477 extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba); 478 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, 479 enum hisi_sas_phy_event event); 480 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba); 481 extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max); 482 #endif 483