1 /* 2 * dc395x.c 3 * 4 * Device Driver for Tekram DC395(U/UW/F), DC315(U) 5 * PCI SCSI Bus Master Host Adapter 6 * (SCSI chip set used Tekram ASIC TRM-S1040) 7 * 8 * Authors: 9 * C.L. Huang <ching@tekram.com.tw> 10 * Erich Chen <erich@tekram.com.tw> 11 * (C) Copyright 1995-1999 Tekram Technology Co., Ltd. 12 * 13 * Kurt Garloff <garloff@suse.de> 14 * (C) 1999-2000 Kurt Garloff 15 * 16 * Oliver Neukum <oliver@neukum.name> 17 * Ali Akcaagac <aliakc@web.de> 18 * Jamie Lenehan <lenehan@twibble.org> 19 * (C) 2003 20 * 21 * License: GNU GPL 22 * 23 ************************************************************************* 24 * 25 * Redistribution and use in source and binary forms, with or without 26 * modification, are permitted provided that the following conditions 27 * are met: 28 * 1. Redistributions of source code must retain the above copyright 29 * notice, this list of conditions and the following disclaimer. 30 * 2. Redistributions in binary form must reproduce the above copyright 31 * notice, this list of conditions and the following disclaimer in the 32 * documentation and/or other materials provided with the distribution. 33 * 3. The name of the author may not be used to endorse or promote products 34 * derived from this software without specific prior written permission. 35 * 36 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 37 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 38 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 39 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 41 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 42 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 43 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 44 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 45 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 46 * 47 ************************************************************************ 48 */ 49 #include <linux/module.h> 50 #include <linux/moduleparam.h> 51 #include <linux/delay.h> 52 #include <linux/ctype.h> 53 #include <linux/blkdev.h> 54 #include <linux/interrupt.h> 55 #include <linux/init.h> 56 #include <linux/spinlock.h> 57 #include <linux/pci.h> 58 #include <linux/list.h> 59 #include <linux/vmalloc.h> 60 #include <linux/slab.h> 61 #include <asm/io.h> 62 63 #include <scsi/scsi.h> 64 #include <scsi/scsi_cmnd.h> 65 #include <scsi/scsi_device.h> 66 #include <scsi/scsi_host.h> 67 #include <scsi/scsi_transport_spi.h> 68 69 #include "dc395x.h" 70 71 #define DC395X_NAME "dc395x" 72 #define DC395X_BANNER "Tekram DC395(U/UW/F), DC315(U) - ASIC TRM-S1040" 73 #define DC395X_VERSION "v2.05, 2004/03/08" 74 75 /*--------------------------------------------------------------------------- 76 Features 77 ---------------------------------------------------------------------------*/ 78 /* 79 * Set to disable parts of the driver 80 */ 81 /*#define DC395x_NO_DISCONNECT*/ 82 /*#define DC395x_NO_TAGQ*/ 83 /*#define DC395x_NO_SYNC*/ 84 /*#define DC395x_NO_WIDE*/ 85 86 #ifndef PCI_VENDOR_ID_TEKRAM 87 #define PCI_VENDOR_ID_TEKRAM 0x1DE1 /* Vendor ID */ 88 #endif 89 #ifndef PCI_DEVICE_ID_TEKRAM_TRMS1040 90 #define PCI_DEVICE_ID_TEKRAM_TRMS1040 0x0391 /* Device ID */ 91 #endif 92 93 94 #define DC395x_LOCK_IO(dev,flags) spin_lock_irqsave(((struct Scsi_Host *)dev)->host_lock, flags) 95 #define DC395x_UNLOCK_IO(dev,flags) spin_unlock_irqrestore(((struct Scsi_Host *)dev)->host_lock, flags) 96 97 #define DC395x_read8(acb,address) (u8)(inb(acb->io_port_base + (address))) 98 #define DC395x_read16(acb,address) (u16)(inw(acb->io_port_base + (address))) 99 #define DC395x_read32(acb,address) (u32)(inl(acb->io_port_base + (address))) 100 #define DC395x_write8(acb,address,value) outb((value), acb->io_port_base + (address)) 101 #define DC395x_write16(acb,address,value) outw((value), acb->io_port_base + (address)) 102 #define DC395x_write32(acb,address,value) outl((value), acb->io_port_base + (address)) 103 104 #define TAG_NONE 255 105 106 /* 107 * srb->segement_x is the hw sg list. It is always allocated as a 108 * DC395x_MAX_SG_LISTENTRY entries in a linear block which does not 109 * cross a page boundy. 110 */ 111 #define SEGMENTX_LEN (sizeof(struct SGentry)*DC395x_MAX_SG_LISTENTRY) 112 113 114 struct SGentry { 115 u32 address; /* bus! address */ 116 u32 length; 117 }; 118 119 /* The SEEPROM structure for TRM_S1040 */ 120 struct NVRamTarget { 121 u8 cfg0; /* Target configuration byte 0 */ 122 u8 period; /* Target period */ 123 u8 cfg2; /* Target configuration byte 2 */ 124 u8 cfg3; /* Target configuration byte 3 */ 125 }; 126 127 struct NvRamType { 128 u8 sub_vendor_id[2]; /* 0,1 Sub Vendor ID */ 129 u8 sub_sys_id[2]; /* 2,3 Sub System ID */ 130 u8 sub_class; /* 4 Sub Class */ 131 u8 vendor_id[2]; /* 5,6 Vendor ID */ 132 u8 device_id[2]; /* 7,8 Device ID */ 133 u8 reserved; /* 9 Reserved */ 134 struct NVRamTarget target[DC395x_MAX_SCSI_ID]; 135 /** 10,11,12,13 136 ** 14,15,16,17 137 ** .... 138 ** .... 139 ** 70,71,72,73 140 */ 141 u8 scsi_id; /* 74 Host Adapter SCSI ID */ 142 u8 channel_cfg; /* 75 Channel configuration */ 143 u8 delay_time; /* 76 Power on delay time */ 144 u8 max_tag; /* 77 Maximum tags */ 145 u8 reserved0; /* 78 */ 146 u8 boot_target; /* 79 */ 147 u8 boot_lun; /* 80 */ 148 u8 reserved1; /* 81 */ 149 u16 reserved2[22]; /* 82,..125 */ 150 u16 cksum; /* 126,127 */ 151 }; 152 153 struct ScsiReqBlk { 154 struct list_head list; /* next/prev ptrs for srb lists */ 155 struct DeviceCtlBlk *dcb; 156 struct scsi_cmnd *cmd; 157 158 struct SGentry *segment_x; /* Linear array of hw sg entries (up to 64 entries) */ 159 dma_addr_t sg_bus_addr; /* Bus address of sg list (ie, of segment_x) */ 160 161 u8 sg_count; /* No of HW sg entries for this request */ 162 u8 sg_index; /* Index of HW sg entry for this request */ 163 size_t total_xfer_length; /* Total number of bytes remaining to be transferred */ 164 size_t request_length; /* Total number of bytes in this request */ 165 /* 166 * The sense buffer handling function, request_sense, uses 167 * the first hw sg entry (segment_x[0]) and the transfer 168 * length (total_xfer_length). While doing this it stores the 169 * original values into the last sg hw list 170 * (srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1] and the 171 * total_xfer_length in xferred. These values are restored in 172 * pci_unmap_srb_sense. This is the only place xferred is used. 173 */ 174 size_t xferred; /* Saved copy of total_xfer_length */ 175 176 u16 state; 177 178 u8 msgin_buf[6]; 179 u8 msgout_buf[6]; 180 181 u8 adapter_status; 182 u8 target_status; 183 u8 msg_count; 184 u8 end_message; 185 186 u8 tag_number; 187 u8 status; 188 u8 retry_count; 189 u8 flag; 190 191 u8 scsi_phase; 192 }; 193 194 struct DeviceCtlBlk { 195 struct list_head list; /* next/prev ptrs for the dcb list */ 196 struct AdapterCtlBlk *acb; 197 struct list_head srb_going_list; /* head of going srb list */ 198 struct list_head srb_waiting_list; /* head of waiting srb list */ 199 200 struct ScsiReqBlk *active_srb; 201 u32 tag_mask; 202 203 u16 max_command; 204 205 u8 target_id; /* SCSI Target ID (SCSI Only) */ 206 u8 target_lun; /* SCSI Log. Unit (SCSI Only) */ 207 u8 identify_msg; 208 u8 dev_mode; 209 210 u8 inquiry7; /* To store Inquiry flags */ 211 u8 sync_mode; /* 0:async mode */ 212 u8 min_nego_period; /* for nego. */ 213 u8 sync_period; /* for reg. */ 214 215 u8 sync_offset; /* for reg. and nego.(low nibble) */ 216 u8 flag; 217 u8 dev_type; 218 u8 init_tcq_flag; 219 }; 220 221 struct AdapterCtlBlk { 222 struct Scsi_Host *scsi_host; 223 224 unsigned long io_port_base; 225 unsigned long io_port_len; 226 227 struct list_head dcb_list; /* head of going dcb list */ 228 struct DeviceCtlBlk *dcb_run_robin; 229 struct DeviceCtlBlk *active_dcb; 230 231 struct list_head srb_free_list; /* head of free srb list */ 232 struct ScsiReqBlk *tmp_srb; 233 struct timer_list waiting_timer; 234 struct timer_list selto_timer; 235 236 unsigned long last_reset; 237 238 u16 srb_count; 239 240 u8 sel_timeout; 241 242 unsigned int irq_level; 243 u8 tag_max_num; 244 u8 acb_flag; 245 u8 gmode2; 246 247 u8 config; 248 u8 lun_chk; 249 u8 scan_devices; 250 u8 hostid_bit; 251 252 u8 dcb_map[DC395x_MAX_SCSI_ID]; 253 struct DeviceCtlBlk *children[DC395x_MAX_SCSI_ID][32]; 254 255 struct pci_dev *dev; 256 257 u8 msg_len; 258 259 struct ScsiReqBlk srb_array[DC395x_MAX_SRB_CNT]; 260 struct ScsiReqBlk srb; 261 262 struct NvRamType eeprom; /* eeprom settings for this adapter */ 263 }; 264 265 266 /*--------------------------------------------------------------------------- 267 Forward declarations 268 ---------------------------------------------------------------------------*/ 269 static void data_out_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 270 u16 *pscsi_status); 271 static void data_in_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 272 u16 *pscsi_status); 273 static void command_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 274 u16 *pscsi_status); 275 static void status_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 276 u16 *pscsi_status); 277 static void msgout_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 278 u16 *pscsi_status); 279 static void msgin_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 280 u16 *pscsi_status); 281 static void data_out_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 282 u16 *pscsi_status); 283 static void data_in_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 284 u16 *pscsi_status); 285 static void command_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 286 u16 *pscsi_status); 287 static void status_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 288 u16 *pscsi_status); 289 static void msgout_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 290 u16 *pscsi_status); 291 static void msgin_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 292 u16 *pscsi_status); 293 static void nop0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 294 u16 *pscsi_status); 295 static void nop1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 296 u16 *pscsi_status); 297 static void set_basic_config(struct AdapterCtlBlk *acb); 298 static void cleanup_after_transfer(struct AdapterCtlBlk *acb, 299 struct ScsiReqBlk *srb); 300 static void reset_scsi_bus(struct AdapterCtlBlk *acb); 301 static void data_io_transfer(struct AdapterCtlBlk *acb, 302 struct ScsiReqBlk *srb, u16 io_dir); 303 static void disconnect(struct AdapterCtlBlk *acb); 304 static void reselect(struct AdapterCtlBlk *acb); 305 static u8 start_scsi(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb, 306 struct ScsiReqBlk *srb); 307 static inline void enable_msgout_abort(struct AdapterCtlBlk *acb, 308 struct ScsiReqBlk *srb); 309 static void build_srb(struct scsi_cmnd *cmd, struct DeviceCtlBlk *dcb, 310 struct ScsiReqBlk *srb); 311 static void doing_srb_done(struct AdapterCtlBlk *acb, u8 did_code, 312 struct scsi_cmnd *cmd, u8 force); 313 static void scsi_reset_detect(struct AdapterCtlBlk *acb); 314 static void pci_unmap_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb); 315 static void pci_unmap_srb_sense(struct AdapterCtlBlk *acb, 316 struct ScsiReqBlk *srb); 317 static void srb_done(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb, 318 struct ScsiReqBlk *srb); 319 static void request_sense(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb, 320 struct ScsiReqBlk *srb); 321 static void set_xfer_rate(struct AdapterCtlBlk *acb, 322 struct DeviceCtlBlk *dcb); 323 static void waiting_timeout(struct timer_list *t); 324 325 326 /*--------------------------------------------------------------------------- 327 Static Data 328 ---------------------------------------------------------------------------*/ 329 static u16 current_sync_offset = 0; 330 331 static void *dc395x_scsi_phase0[] = { 332 data_out_phase0,/* phase:0 */ 333 data_in_phase0, /* phase:1 */ 334 command_phase0, /* phase:2 */ 335 status_phase0, /* phase:3 */ 336 nop0, /* phase:4 PH_BUS_FREE .. initial phase */ 337 nop0, /* phase:5 PH_BUS_FREE .. initial phase */ 338 msgout_phase0, /* phase:6 */ 339 msgin_phase0, /* phase:7 */ 340 }; 341 342 static void *dc395x_scsi_phase1[] = { 343 data_out_phase1,/* phase:0 */ 344 data_in_phase1, /* phase:1 */ 345 command_phase1, /* phase:2 */ 346 status_phase1, /* phase:3 */ 347 nop1, /* phase:4 PH_BUS_FREE .. initial phase */ 348 nop1, /* phase:5 PH_BUS_FREE .. initial phase */ 349 msgout_phase1, /* phase:6 */ 350 msgin_phase1, /* phase:7 */ 351 }; 352 353 /* 354 *Fast20: 000 50ns, 20.0 MHz 355 * 001 75ns, 13.3 MHz 356 * 010 100ns, 10.0 MHz 357 * 011 125ns, 8.0 MHz 358 * 100 150ns, 6.6 MHz 359 * 101 175ns, 5.7 MHz 360 * 110 200ns, 5.0 MHz 361 * 111 250ns, 4.0 MHz 362 * 363 *Fast40(LVDS): 000 25ns, 40.0 MHz 364 * 001 50ns, 20.0 MHz 365 * 010 75ns, 13.3 MHz 366 * 011 100ns, 10.0 MHz 367 * 100 125ns, 8.0 MHz 368 * 101 150ns, 6.6 MHz 369 * 110 175ns, 5.7 MHz 370 * 111 200ns, 5.0 MHz 371 */ 372 /*static u8 clock_period[] = {12,19,25,31,37,44,50,62};*/ 373 374 /* real period:48ns,76ns,100ns,124ns,148ns,176ns,200ns,248ns */ 375 static u8 clock_period[] = { 12, 18, 25, 31, 37, 43, 50, 62 }; 376 377 378 /*--------------------------------------------------------------------------- 379 Configuration 380 ---------------------------------------------------------------------------*/ 381 /* 382 * Module/boot parameters currently effect *all* instances of the 383 * card in the system. 384 */ 385 386 /* 387 * Command line parameters are stored in a structure below. 388 * These are the index's into the structure for the various 389 * command line options. 390 */ 391 #define CFG_ADAPTER_ID 0 392 #define CFG_MAX_SPEED 1 393 #define CFG_DEV_MODE 2 394 #define CFG_ADAPTER_MODE 3 395 #define CFG_TAGS 4 396 #define CFG_RESET_DELAY 5 397 398 #define CFG_NUM 6 /* number of configuration items */ 399 400 401 /* 402 * Value used to indicate that a command line override 403 * hasn't been used to modify the value. 404 */ 405 #define CFG_PARAM_UNSET -1 406 407 408 /* 409 * Hold command line parameters. 410 */ 411 struct ParameterData { 412 int value; /* value of this setting */ 413 int min; /* minimum value */ 414 int max; /* maximum value */ 415 int def; /* default value */ 416 int safe; /* safe value */ 417 }; 418 static struct ParameterData cfg_data[] = { 419 { /* adapter id */ 420 CFG_PARAM_UNSET, 421 0, 422 15, 423 7, 424 7 425 }, 426 { /* max speed */ 427 CFG_PARAM_UNSET, 428 0, 429 7, 430 1, /* 13.3Mhz */ 431 4, /* 6.7Hmz */ 432 }, 433 { /* dev mode */ 434 CFG_PARAM_UNSET, 435 0, 436 0x3f, 437 NTC_DO_PARITY_CHK | NTC_DO_DISCONNECT | NTC_DO_SYNC_NEGO | 438 NTC_DO_WIDE_NEGO | NTC_DO_TAG_QUEUEING | 439 NTC_DO_SEND_START, 440 NTC_DO_PARITY_CHK | NTC_DO_SEND_START 441 }, 442 { /* adapter mode */ 443 CFG_PARAM_UNSET, 444 0, 445 0x2f, 446 NAC_SCANLUN | 447 NAC_GT2DRIVES | NAC_GREATER_1G | NAC_POWERON_SCSI_RESET 448 /*| NAC_ACTIVE_NEG*/, 449 NAC_GT2DRIVES | NAC_GREATER_1G | NAC_POWERON_SCSI_RESET | 0x08 450 }, 451 { /* tags */ 452 CFG_PARAM_UNSET, 453 0, 454 5, 455 3, /* 16 tags (??) */ 456 2, 457 }, 458 { /* reset delay */ 459 CFG_PARAM_UNSET, 460 0, 461 180, 462 1, /* 1 second */ 463 10, /* 10 seconds */ 464 } 465 }; 466 467 468 /* 469 * Safe settings. If set to zero the BIOS/default values with 470 * command line overrides will be used. If set to 1 then safe and 471 * slow settings will be used. 472 */ 473 static bool use_safe_settings = 0; 474 module_param_named(safe, use_safe_settings, bool, 0); 475 MODULE_PARM_DESC(safe, "Use safe and slow settings only. Default: false"); 476 477 478 module_param_named(adapter_id, cfg_data[CFG_ADAPTER_ID].value, int, 0); 479 MODULE_PARM_DESC(adapter_id, "Adapter SCSI ID. Default 7 (0-15)"); 480 481 module_param_named(max_speed, cfg_data[CFG_MAX_SPEED].value, int, 0); 482 MODULE_PARM_DESC(max_speed, "Maximum bus speed. Default 1 (0-7) Speeds: 0=20, 1=13.3, 2=10, 3=8, 4=6.7, 5=5.8, 6=5, 7=4 Mhz"); 483 484 module_param_named(dev_mode, cfg_data[CFG_DEV_MODE].value, int, 0); 485 MODULE_PARM_DESC(dev_mode, "Device mode."); 486 487 module_param_named(adapter_mode, cfg_data[CFG_ADAPTER_MODE].value, int, 0); 488 MODULE_PARM_DESC(adapter_mode, "Adapter mode."); 489 490 module_param_named(tags, cfg_data[CFG_TAGS].value, int, 0); 491 MODULE_PARM_DESC(tags, "Number of tags (1<<x). Default 3 (0-5)"); 492 493 module_param_named(reset_delay, cfg_data[CFG_RESET_DELAY].value, int, 0); 494 MODULE_PARM_DESC(reset_delay, "Reset delay in seconds. Default 1 (0-180)"); 495 496 497 /** 498 * set_safe_settings - if the use_safe_settings option is set then 499 * set all values to the safe and slow values. 500 **/ 501 static void set_safe_settings(void) 502 { 503 if (use_safe_settings) 504 { 505 int i; 506 507 for (i = 0; i < CFG_NUM; i++) 508 { 509 cfg_data[i].value = cfg_data[i].safe; 510 } 511 } 512 } 513 514 515 /** 516 * fix_settings - reset any boot parameters which are out of range 517 * back to the default values. 518 **/ 519 static void fix_settings(void) 520 { 521 int i; 522 523 for (i = 0; i < CFG_NUM; i++) 524 { 525 if (cfg_data[i].value < cfg_data[i].min 526 || cfg_data[i].value > cfg_data[i].max) 527 cfg_data[i].value = cfg_data[i].def; 528 } 529 } 530 531 532 533 /* 534 * Mapping from the eeprom delay index value (index into this array) 535 * to the number of actual seconds that the delay should be for. 536 */ 537 static char eeprom_index_to_delay_map[] = 538 { 1, 3, 5, 10, 16, 30, 60, 120 }; 539 540 541 /** 542 * eeprom_index_to_delay - Take the eeprom delay setting and convert it 543 * into a number of seconds. 544 * 545 * @eeprom: The eeprom structure in which we find the delay index to map. 546 **/ 547 static void eeprom_index_to_delay(struct NvRamType *eeprom) 548 { 549 eeprom->delay_time = eeprom_index_to_delay_map[eeprom->delay_time]; 550 } 551 552 553 /** 554 * delay_to_eeprom_index - Take a delay in seconds and return the 555 * closest eeprom index which will delay for at least that amount of 556 * seconds. 557 * 558 * @delay: The delay, in seconds, to find the eeprom index for. 559 **/ 560 static int delay_to_eeprom_index(int delay) 561 { 562 u8 idx = 0; 563 while (idx < 7 && eeprom_index_to_delay_map[idx] < delay) 564 idx++; 565 return idx; 566 } 567 568 569 /** 570 * eeprom_override - Override the eeprom settings, in the provided 571 * eeprom structure, with values that have been set on the command 572 * line. 573 * 574 * @eeprom: The eeprom data to override with command line options. 575 **/ 576 static void eeprom_override(struct NvRamType *eeprom) 577 { 578 u8 id; 579 580 /* Adapter Settings */ 581 if (cfg_data[CFG_ADAPTER_ID].value != CFG_PARAM_UNSET) 582 eeprom->scsi_id = (u8)cfg_data[CFG_ADAPTER_ID].value; 583 584 if (cfg_data[CFG_ADAPTER_MODE].value != CFG_PARAM_UNSET) 585 eeprom->channel_cfg = (u8)cfg_data[CFG_ADAPTER_MODE].value; 586 587 if (cfg_data[CFG_RESET_DELAY].value != CFG_PARAM_UNSET) 588 eeprom->delay_time = delay_to_eeprom_index( 589 cfg_data[CFG_RESET_DELAY].value); 590 591 if (cfg_data[CFG_TAGS].value != CFG_PARAM_UNSET) 592 eeprom->max_tag = (u8)cfg_data[CFG_TAGS].value; 593 594 /* Device Settings */ 595 for (id = 0; id < DC395x_MAX_SCSI_ID; id++) { 596 if (cfg_data[CFG_DEV_MODE].value != CFG_PARAM_UNSET) 597 eeprom->target[id].cfg0 = 598 (u8)cfg_data[CFG_DEV_MODE].value; 599 600 if (cfg_data[CFG_MAX_SPEED].value != CFG_PARAM_UNSET) 601 eeprom->target[id].period = 602 (u8)cfg_data[CFG_MAX_SPEED].value; 603 604 } 605 } 606 607 608 /*--------------------------------------------------------------------------- 609 ---------------------------------------------------------------------------*/ 610 611 static unsigned int list_size(struct list_head *head) 612 { 613 unsigned int count = 0; 614 struct list_head *pos; 615 list_for_each(pos, head) 616 count++; 617 return count; 618 } 619 620 621 static struct DeviceCtlBlk *dcb_get_next(struct list_head *head, 622 struct DeviceCtlBlk *pos) 623 { 624 int use_next = 0; 625 struct DeviceCtlBlk* next = NULL; 626 struct DeviceCtlBlk* i; 627 628 if (list_empty(head)) 629 return NULL; 630 631 /* find supplied dcb and then select the next one */ 632 list_for_each_entry(i, head, list) 633 if (use_next) { 634 next = i; 635 break; 636 } else if (i == pos) { 637 use_next = 1; 638 } 639 /* if no next one take the head one (ie, wraparound) */ 640 if (!next) 641 list_for_each_entry(i, head, list) { 642 next = i; 643 break; 644 } 645 646 return next; 647 } 648 649 650 static void free_tag(struct DeviceCtlBlk *dcb, struct ScsiReqBlk *srb) 651 { 652 if (srb->tag_number < 255) { 653 dcb->tag_mask &= ~(1 << srb->tag_number); /* free tag mask */ 654 srb->tag_number = 255; 655 } 656 } 657 658 659 /* Find cmd in SRB list */ 660 static inline struct ScsiReqBlk *find_cmd(struct scsi_cmnd *cmd, 661 struct list_head *head) 662 { 663 struct ScsiReqBlk *i; 664 list_for_each_entry(i, head, list) 665 if (i->cmd == cmd) 666 return i; 667 return NULL; 668 } 669 670 /* Sets the timer to wake us up */ 671 static void waiting_set_timer(struct AdapterCtlBlk *acb, unsigned long to) 672 { 673 if (timer_pending(&acb->waiting_timer)) 674 return; 675 if (time_before(jiffies + to, acb->last_reset - HZ / 2)) 676 acb->waiting_timer.expires = 677 acb->last_reset - HZ / 2 + 1; 678 else 679 acb->waiting_timer.expires = jiffies + to + 1; 680 add_timer(&acb->waiting_timer); 681 } 682 683 684 /* Send the next command from the waiting list to the bus */ 685 static void waiting_process_next(struct AdapterCtlBlk *acb) 686 { 687 struct DeviceCtlBlk *start = NULL; 688 struct DeviceCtlBlk *pos; 689 struct DeviceCtlBlk *dcb; 690 struct ScsiReqBlk *srb; 691 struct list_head *dcb_list_head = &acb->dcb_list; 692 693 if (acb->active_dcb 694 || (acb->acb_flag & (RESET_DETECT + RESET_DONE + RESET_DEV))) 695 return; 696 697 if (timer_pending(&acb->waiting_timer)) 698 timer_delete(&acb->waiting_timer); 699 700 if (list_empty(dcb_list_head)) 701 return; 702 703 /* 704 * Find the starting dcb. Need to find it again in the list 705 * since the list may have changed since we set the ptr to it 706 */ 707 list_for_each_entry(dcb, dcb_list_head, list) 708 if (dcb == acb->dcb_run_robin) { 709 start = dcb; 710 break; 711 } 712 if (!start) { 713 /* This can happen! */ 714 start = list_entry(dcb_list_head->next, typeof(*start), list); 715 acb->dcb_run_robin = start; 716 } 717 718 719 /* 720 * Loop over the dcb, but we start somewhere (potentially) in 721 * the middle of the loop so we need to manully do this. 722 */ 723 pos = start; 724 do { 725 struct list_head *waiting_list_head = &pos->srb_waiting_list; 726 727 /* Make sure, the next another device gets scheduled ... */ 728 acb->dcb_run_robin = dcb_get_next(dcb_list_head, 729 acb->dcb_run_robin); 730 731 if (list_empty(waiting_list_head) || 732 pos->max_command <= list_size(&pos->srb_going_list)) { 733 /* move to next dcb */ 734 pos = dcb_get_next(dcb_list_head, pos); 735 } else { 736 srb = list_entry(waiting_list_head->next, 737 struct ScsiReqBlk, list); 738 739 /* Try to send to the bus */ 740 if (!start_scsi(acb, pos, srb)) 741 list_move(&srb->list, &pos->srb_going_list); 742 else 743 waiting_set_timer(acb, HZ/50); 744 break; 745 } 746 } while (pos != start); 747 } 748 749 750 /* Wake up waiting queue */ 751 static void waiting_timeout(struct timer_list *t) 752 { 753 unsigned long flags; 754 struct AdapterCtlBlk *acb = timer_container_of(acb, t, waiting_timer); 755 DC395x_LOCK_IO(acb->scsi_host, flags); 756 waiting_process_next(acb); 757 DC395x_UNLOCK_IO(acb->scsi_host, flags); 758 } 759 760 761 /* Get the DCB for a given ID/LUN combination */ 762 static struct DeviceCtlBlk *find_dcb(struct AdapterCtlBlk *acb, u8 id, u8 lun) 763 { 764 return acb->children[id][lun]; 765 } 766 767 768 /* Send SCSI Request Block (srb) to adapter (acb) */ 769 static void send_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb) 770 { 771 struct DeviceCtlBlk *dcb = srb->dcb; 772 773 if (dcb->max_command <= list_size(&dcb->srb_going_list) || 774 acb->active_dcb || 775 (acb->acb_flag & (RESET_DETECT + RESET_DONE + RESET_DEV))) { 776 list_add_tail(&srb->list, &dcb->srb_waiting_list); 777 waiting_process_next(acb); 778 return; 779 } 780 781 if (!start_scsi(acb, dcb, srb)) { 782 list_add_tail(&srb->list, &dcb->srb_going_list); 783 } else { 784 list_add(&srb->list, &dcb->srb_waiting_list); 785 waiting_set_timer(acb, HZ / 50); 786 } 787 } 788 789 /* Prepare SRB for being sent to Device DCB w/ command *cmd */ 790 static void build_srb(struct scsi_cmnd *cmd, struct DeviceCtlBlk *dcb, 791 struct ScsiReqBlk *srb) 792 { 793 int nseg; 794 enum dma_data_direction dir = cmd->sc_data_direction; 795 796 srb->dcb = dcb; 797 srb->cmd = cmd; 798 srb->sg_count = 0; 799 srb->total_xfer_length = 0; 800 srb->sg_bus_addr = 0; 801 srb->sg_index = 0; 802 srb->adapter_status = 0; 803 srb->target_status = 0; 804 srb->msg_count = 0; 805 srb->status = 0; 806 srb->flag = 0; 807 srb->state = 0; 808 srb->retry_count = 0; 809 srb->tag_number = TAG_NONE; 810 srb->scsi_phase = PH_BUS_FREE; /* initial phase */ 811 srb->end_message = 0; 812 813 nseg = scsi_dma_map(cmd); 814 BUG_ON(nseg < 0); 815 816 if (!(dir == DMA_NONE || !nseg)) { 817 int i; 818 u32 reqlen = scsi_bufflen(cmd); 819 struct scatterlist *sg; 820 struct SGentry *sgp = srb->segment_x; 821 822 srb->sg_count = nseg; 823 824 scsi_for_each_sg(cmd, sg, srb->sg_count, i) { 825 u32 busaddr = (u32)sg_dma_address(sg); 826 u32 seglen = (u32)sg->length; 827 sgp[i].address = busaddr; 828 sgp[i].length = seglen; 829 srb->total_xfer_length += seglen; 830 } 831 sgp += srb->sg_count - 1; 832 833 /* 834 * adjust last page if too big as it is allocated 835 * on even page boundaries 836 */ 837 if (srb->total_xfer_length > reqlen) { 838 sgp->length -= (srb->total_xfer_length - reqlen); 839 srb->total_xfer_length = reqlen; 840 } 841 842 /* Fixup for WIDE padding - make sure length is even */ 843 if (dcb->sync_period & WIDE_SYNC && 844 srb->total_xfer_length % 2) { 845 srb->total_xfer_length++; 846 sgp->length++; 847 } 848 849 srb->sg_bus_addr = dma_map_single(&dcb->acb->dev->dev, 850 srb->segment_x, SEGMENTX_LEN, DMA_TO_DEVICE); 851 852 } 853 854 srb->request_length = srb->total_xfer_length; 855 } 856 857 858 /** 859 * dc395x_queue_command_lck - queue scsi command passed from the mid 860 * layer, invoke 'done' on completion 861 * 862 * @cmd: pointer to scsi command object 863 * 864 * Returns 1 if the adapter (host) is busy, else returns 0. One 865 * reason for an adapter to be busy is that the number 866 * of outstanding queued commands is already equal to 867 * struct Scsi_Host::can_queue . 868 * 869 * Required: if struct Scsi_Host::can_queue is ever non-zero 870 * then this function is required. 871 * 872 * Locks: struct Scsi_Host::host_lock held on entry (with "irqsave") 873 * and is expected to be held on return. 874 * 875 */ 876 static int dc395x_queue_command_lck(struct scsi_cmnd *cmd) 877 { 878 void (*done)(struct scsi_cmnd *) = scsi_done; 879 struct DeviceCtlBlk *dcb; 880 struct ScsiReqBlk *srb; 881 struct AdapterCtlBlk *acb = 882 (struct AdapterCtlBlk *)cmd->device->host->hostdata; 883 884 /* Assume BAD_TARGET; will be cleared later */ 885 set_host_byte(cmd, DID_BAD_TARGET); 886 887 /* ignore invalid targets */ 888 if (cmd->device->id >= acb->scsi_host->max_id || 889 cmd->device->lun >= acb->scsi_host->max_lun || 890 cmd->device->lun > 31) 891 goto complete; 892 893 /* does the specified lun on the specified device exist */ 894 if (!(acb->dcb_map[cmd->device->id] & (1 << cmd->device->lun))) 895 goto complete; 896 897 /* do we have a DCB for the device */ 898 dcb = find_dcb(acb, cmd->device->id, cmd->device->lun); 899 if (!dcb) 900 goto complete; 901 902 set_host_byte(cmd, DID_OK); 903 set_status_byte(cmd, SAM_STAT_GOOD); 904 905 srb = list_first_entry_or_null(&acb->srb_free_list, 906 struct ScsiReqBlk, list); 907 908 if (!srb) { 909 /* should never happen */ 910 return 1; 911 } 912 list_del(&srb->list); 913 914 build_srb(cmd, dcb, srb); 915 916 if (!list_empty(&dcb->srb_waiting_list)) { 917 /* append to waiting queue */ 918 list_add_tail(&srb->list, &dcb->srb_waiting_list); 919 waiting_process_next(acb); 920 } else { 921 /* process immediately */ 922 send_srb(acb, srb); 923 } 924 return 0; 925 926 complete: 927 /* 928 * Complete the command immediatey, and then return 0 to 929 * indicate that we have handled the command. This is usually 930 * done when the commad is for things like non existent 931 * devices. 932 */ 933 done(cmd); 934 return 0; 935 } 936 937 static DEF_SCSI_QCMD(dc395x_queue_command) 938 939 static inline void clear_fifo(struct AdapterCtlBlk *acb, char *txt) 940 { 941 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_CLRFIFO); 942 } 943 944 945 static void reset_dev_param(struct AdapterCtlBlk *acb) 946 { 947 struct DeviceCtlBlk *dcb; 948 struct NvRamType *eeprom = &acb->eeprom; 949 950 list_for_each_entry(dcb, &acb->dcb_list, list) { 951 u8 period_index; 952 953 dcb->sync_mode &= ~(SYNC_NEGO_DONE + WIDE_NEGO_DONE); 954 dcb->sync_period = 0; 955 dcb->sync_offset = 0; 956 957 dcb->dev_mode = eeprom->target[dcb->target_id].cfg0; 958 period_index = eeprom->target[dcb->target_id].period & 0x07; 959 dcb->min_nego_period = clock_period[period_index]; 960 if (!(dcb->dev_mode & NTC_DO_WIDE_NEGO) 961 || !(acb->config & HCC_WIDE_CARD)) 962 dcb->sync_mode &= ~WIDE_NEGO_ENABLE; 963 } 964 } 965 966 967 /* 968 * perform a hard reset on the SCSI bus 969 * @cmd - some command for this host (for fetching hooks) 970 * Returns: SUCCESS (0x2002) on success, else FAILED (0x2003). 971 */ 972 static int __dc395x_eh_bus_reset(struct scsi_cmnd *cmd) 973 { 974 struct AdapterCtlBlk *acb = 975 (struct AdapterCtlBlk *)cmd->device->host->hostdata; 976 977 if (timer_pending(&acb->waiting_timer)) 978 timer_delete(&acb->waiting_timer); 979 980 /* 981 * disable interrupt 982 */ 983 DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0x00); 984 DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x00); 985 DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE); 986 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE); 987 988 reset_scsi_bus(acb); 989 udelay(500); 990 991 /* We may be in serious trouble. Wait some seconds */ 992 acb->last_reset = 993 jiffies + 3 * HZ / 2 + 994 HZ * acb->eeprom.delay_time; 995 996 /* 997 * re-enable interrupt 998 */ 999 /* Clear SCSI FIFO */ 1000 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO); 1001 clear_fifo(acb, "eh_bus_reset"); 1002 /* Delete pending IRQ */ 1003 DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS); 1004 set_basic_config(acb); 1005 1006 reset_dev_param(acb); 1007 doing_srb_done(acb, DID_RESET, cmd, 0); 1008 acb->active_dcb = NULL; 1009 acb->acb_flag = 0; /* RESET_DETECT, RESET_DONE ,RESET_DEV */ 1010 waiting_process_next(acb); 1011 1012 return SUCCESS; 1013 } 1014 1015 static int dc395x_eh_bus_reset(struct scsi_cmnd *cmd) 1016 { 1017 int rc; 1018 1019 spin_lock_irq(cmd->device->host->host_lock); 1020 rc = __dc395x_eh_bus_reset(cmd); 1021 spin_unlock_irq(cmd->device->host->host_lock); 1022 1023 return rc; 1024 } 1025 1026 /* 1027 * abort an errant SCSI command 1028 * @cmd - command to be aborted 1029 * Returns: SUCCESS (0x2002) on success, else FAILED (0x2003). 1030 */ 1031 static int dc395x_eh_abort(struct scsi_cmnd *cmd) 1032 { 1033 /* 1034 * Look into our command queues: If it has not been sent already, 1035 * we remove it and return success. Otherwise fail. 1036 */ 1037 struct AdapterCtlBlk *acb = 1038 (struct AdapterCtlBlk *)cmd->device->host->hostdata; 1039 struct DeviceCtlBlk *dcb; 1040 struct ScsiReqBlk *srb; 1041 1042 dcb = find_dcb(acb, cmd->device->id, cmd->device->lun); 1043 if (!dcb) 1044 return FAILED; 1045 1046 srb = find_cmd(cmd, &dcb->srb_waiting_list); 1047 if (srb) { 1048 list_del(&srb->list); 1049 pci_unmap_srb_sense(acb, srb); 1050 pci_unmap_srb(acb, srb); 1051 free_tag(dcb, srb); 1052 list_add_tail(&srb->list, &acb->srb_free_list); 1053 set_host_byte(cmd, DID_ABORT); 1054 return SUCCESS; 1055 } 1056 srb = find_cmd(cmd, &dcb->srb_going_list); 1057 if (srb) { 1058 /* XXX: Should abort the command here */ 1059 } 1060 return FAILED; 1061 } 1062 1063 1064 /* SDTR */ 1065 static void build_sdtr(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb, 1066 struct ScsiReqBlk *srb) 1067 { 1068 u8 *ptr = srb->msgout_buf + srb->msg_count; 1069 if (srb->msg_count > 1) { 1070 return; 1071 } 1072 if (!(dcb->dev_mode & NTC_DO_SYNC_NEGO)) { 1073 dcb->sync_offset = 0; 1074 dcb->min_nego_period = 200 >> 2; 1075 } else if (dcb->sync_offset == 0) 1076 dcb->sync_offset = SYNC_NEGO_OFFSET; 1077 1078 srb->msg_count += spi_populate_sync_msg(ptr, dcb->min_nego_period, 1079 dcb->sync_offset); 1080 srb->state |= SRB_DO_SYNC_NEGO; 1081 } 1082 1083 1084 /* WDTR */ 1085 static void build_wdtr(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb, 1086 struct ScsiReqBlk *srb) 1087 { 1088 u8 wide = ((dcb->dev_mode & NTC_DO_WIDE_NEGO) & 1089 (acb->config & HCC_WIDE_CARD)) ? 1 : 0; 1090 u8 *ptr = srb->msgout_buf + srb->msg_count; 1091 if (srb->msg_count > 1) 1092 return; 1093 1094 srb->msg_count += spi_populate_width_msg(ptr, wide); 1095 srb->state |= SRB_DO_WIDE_NEGO; 1096 } 1097 1098 1099 #if 0 1100 /* Timer to work around chip flaw: When selecting and the bus is 1101 * busy, we sometimes miss a Selection timeout IRQ */ 1102 void selection_timeout_missed(unsigned long ptr); 1103 /* Sets the timer to wake us up */ 1104 static void selto_timer(struct AdapterCtlBlk *acb) 1105 { 1106 if (timer_pending(&acb->selto_timer)) 1107 return; 1108 acb->selto_timer.function = selection_timeout_missed; 1109 acb->selto_timer.data = (unsigned long) acb; 1110 if (time_before 1111 (jiffies + HZ, acb->last_reset + HZ / 2)) 1112 acb->selto_timer.expires = 1113 acb->last_reset + HZ / 2 + 1; 1114 else 1115 acb->selto_timer.expires = jiffies + HZ + 1; 1116 add_timer(&acb->selto_timer); 1117 } 1118 1119 1120 void selection_timeout_missed(unsigned long ptr) 1121 { 1122 unsigned long flags; 1123 struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)ptr; 1124 struct ScsiReqBlk *srb; 1125 if (!acb->active_dcb || !acb->active_dcb->active_srb) 1126 return; 1127 1128 DC395x_LOCK_IO(acb->scsi_host, flags); 1129 srb = acb->active_dcb->active_srb; 1130 disconnect(acb); 1131 DC395x_UNLOCK_IO(acb->scsi_host, flags); 1132 } 1133 #endif 1134 1135 1136 static u8 start_scsi(struct AdapterCtlBlk* acb, struct DeviceCtlBlk* dcb, 1137 struct ScsiReqBlk* srb) 1138 { 1139 u16 __maybe_unused s_stat2, return_code; 1140 u8 s_stat, scsicommand, i, identify_message; 1141 u8 *ptr; 1142 1143 srb->tag_number = TAG_NONE; /* acb->tag_max_num: had error read in eeprom */ 1144 1145 s_stat = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL); 1146 s_stat2 = 0; 1147 s_stat2 = DC395x_read16(acb, TRM_S1040_SCSI_STATUS); 1148 #if 1 1149 if (s_stat & 0x20 /* s_stat2 & 0x02000 */ ) { 1150 /* 1151 * Try anyway? 1152 * 1153 * We could, BUT: Sometimes the TRM_S1040 misses to produce a Selection 1154 * Timeout, a Disconnect or a Reselection IRQ, so we would be screwed! 1155 * (This is likely to be a bug in the hardware. Obviously, most people 1156 * only have one initiator per SCSI bus.) 1157 * Instead let this fail and have the timer make sure the command is 1158 * tried again after a short time 1159 */ 1160 /*selto_timer (acb); */ 1161 return 1; 1162 } 1163 #endif 1164 if (acb->active_dcb) 1165 return 1; 1166 1167 if (DC395x_read16(acb, TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) 1168 return 1; 1169 1170 /* Allow starting of SCSI commands half a second before we allow the mid-level 1171 * to queue them again after a reset */ 1172 if (time_before(jiffies, acb->last_reset - HZ / 2)) 1173 return 1; 1174 1175 /* Flush FIFO */ 1176 clear_fifo(acb, "start_scsi"); 1177 DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id); 1178 DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id); 1179 DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period); 1180 DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset); 1181 srb->scsi_phase = PH_BUS_FREE; /* initial phase */ 1182 1183 identify_message = dcb->identify_msg; 1184 /*DC395x_TRM_write8(TRM_S1040_SCSI_IDMSG, identify_message); */ 1185 /* Don't allow disconnection for AUTO_REQSENSE: Cont.All.Cond.! */ 1186 if (srb->flag & AUTO_REQSENSE) 1187 identify_message &= 0xBF; 1188 1189 if (((srb->cmd->cmnd[0] == INQUIRY) 1190 || (srb->cmd->cmnd[0] == REQUEST_SENSE) 1191 || (srb->flag & AUTO_REQSENSE)) 1192 && (((dcb->sync_mode & WIDE_NEGO_ENABLE) 1193 && !(dcb->sync_mode & WIDE_NEGO_DONE)) 1194 || ((dcb->sync_mode & SYNC_NEGO_ENABLE) 1195 && !(dcb->sync_mode & SYNC_NEGO_DONE))) 1196 && (dcb->target_lun == 0)) { 1197 srb->msgout_buf[0] = identify_message; 1198 srb->msg_count = 1; 1199 scsicommand = SCMD_SEL_ATNSTOP; 1200 srb->state = SRB_MSGOUT; 1201 #ifndef SYNC_FIRST 1202 if (dcb->sync_mode & WIDE_NEGO_ENABLE 1203 && dcb->inquiry7 & SCSI_INQ_WBUS16) { 1204 build_wdtr(acb, dcb, srb); 1205 goto no_cmd; 1206 } 1207 #endif 1208 if (dcb->sync_mode & SYNC_NEGO_ENABLE 1209 && dcb->inquiry7 & SCSI_INQ_SYNC) { 1210 build_sdtr(acb, dcb, srb); 1211 goto no_cmd; 1212 } 1213 if (dcb->sync_mode & WIDE_NEGO_ENABLE 1214 && dcb->inquiry7 & SCSI_INQ_WBUS16) { 1215 build_wdtr(acb, dcb, srb); 1216 goto no_cmd; 1217 } 1218 srb->msg_count = 0; 1219 } 1220 /* Send identify message */ 1221 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, identify_message); 1222 1223 scsicommand = SCMD_SEL_ATN; 1224 srb->state = SRB_START_; 1225 #ifndef DC395x_NO_TAGQ 1226 if ((dcb->sync_mode & EN_TAG_QUEUEING) 1227 && (identify_message & 0xC0)) { 1228 /* Send Tag message */ 1229 u32 tag_mask = 1; 1230 u8 tag_number = 0; 1231 while (tag_mask & dcb->tag_mask 1232 && tag_number < dcb->max_command) { 1233 tag_mask = tag_mask << 1; 1234 tag_number++; 1235 } 1236 if (tag_number >= dcb->max_command) { 1237 srb->state = SRB_READY; 1238 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, 1239 DO_HWRESELECT); 1240 return 1; 1241 } 1242 /* Send Tag id */ 1243 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, SIMPLE_QUEUE_TAG); 1244 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, tag_number); 1245 dcb->tag_mask |= tag_mask; 1246 srb->tag_number = tag_number; 1247 scsicommand = SCMD_SEL_ATN3; 1248 srb->state = SRB_START_; 1249 } 1250 #endif 1251 /*polling:*/ 1252 /* Send CDB ..command block ......... */ 1253 if (srb->flag & AUTO_REQSENSE) { 1254 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, REQUEST_SENSE); 1255 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, (dcb->target_lun << 5)); 1256 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0); 1257 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0); 1258 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, SCSI_SENSE_BUFFERSIZE); 1259 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0); 1260 } else { 1261 ptr = (u8 *)srb->cmd->cmnd; 1262 for (i = 0; i < srb->cmd->cmd_len; i++) 1263 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr++); 1264 } 1265 no_cmd: 1266 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, 1267 DO_HWRESELECT | DO_DATALATCH); 1268 if (DC395x_read16(acb, TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) { 1269 /* 1270 * If start_scsi return 1: 1271 * we caught an interrupt (must be reset or reselection ... ) 1272 * : Let's process it first! 1273 */ 1274 srb->state = SRB_READY; 1275 free_tag(dcb, srb); 1276 srb->msg_count = 0; 1277 return_code = 1; 1278 /* This IRQ should NOT get lost, as we did not acknowledge it */ 1279 } else { 1280 /* 1281 * If start_scsi returns 0: 1282 * we know that the SCSI processor is free 1283 */ 1284 srb->scsi_phase = PH_BUS_FREE; /* initial phase */ 1285 dcb->active_srb = srb; 1286 acb->active_dcb = dcb; 1287 return_code = 0; 1288 /* it's important for atn stop */ 1289 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, 1290 DO_DATALATCH | DO_HWRESELECT); 1291 /* SCSI command */ 1292 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, scsicommand); 1293 } 1294 return return_code; 1295 } 1296 1297 1298 #define DC395x_ENABLE_MSGOUT \ 1299 DC395x_write16 (acb, TRM_S1040_SCSI_CONTROL, DO_SETATN); \ 1300 srb->state |= SRB_MSGOUT 1301 1302 1303 /* abort command */ 1304 static inline void enable_msgout_abort(struct AdapterCtlBlk *acb, 1305 struct ScsiReqBlk *srb) 1306 { 1307 srb->msgout_buf[0] = ABORT; 1308 srb->msg_count = 1; 1309 DC395x_ENABLE_MSGOUT; 1310 srb->state &= ~SRB_MSGIN; 1311 srb->state |= SRB_MSGOUT; 1312 } 1313 1314 1315 /** 1316 * dc395x_handle_interrupt - Handle an interrupt that has been confirmed to 1317 * have been triggered for this card. 1318 * 1319 * @acb: a pointer to the adpter control block 1320 * @scsi_status: the status return when we checked the card 1321 **/ 1322 static void dc395x_handle_interrupt(struct AdapterCtlBlk *acb, 1323 u16 scsi_status) 1324 { 1325 struct DeviceCtlBlk *dcb; 1326 struct ScsiReqBlk *srb; 1327 u16 phase; 1328 u8 scsi_intstatus; 1329 unsigned long flags; 1330 void (*dc395x_statev)(struct AdapterCtlBlk *, struct ScsiReqBlk *, 1331 u16 *); 1332 1333 DC395x_LOCK_IO(acb->scsi_host, flags); 1334 1335 /* This acknowledges the IRQ */ 1336 scsi_intstatus = DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS); 1337 1338 if (timer_pending(&acb->selto_timer)) 1339 timer_delete(&acb->selto_timer); 1340 1341 if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) { 1342 disconnect(acb); /* bus free interrupt */ 1343 goto out_unlock; 1344 } 1345 if (scsi_intstatus & INT_RESELECTED) { 1346 reselect(acb); 1347 goto out_unlock; 1348 } 1349 if (scsi_intstatus & INT_SELECT) 1350 goto out_unlock; 1351 1352 if (scsi_intstatus & INT_SCSIRESET) { 1353 scsi_reset_detect(acb); 1354 goto out_unlock; 1355 } 1356 if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) { 1357 dcb = acb->active_dcb; 1358 if (!dcb) 1359 goto out_unlock; 1360 1361 srb = dcb->active_srb; 1362 if (dcb->flag & ABORT_DEV_) 1363 enable_msgout_abort(acb, srb); 1364 1365 /* software sequential machine */ 1366 phase = (u16)srb->scsi_phase; 1367 1368 /* 1369 * 62037 or 62137 1370 * call dc395x_scsi_phase0[]... "phase entry" 1371 * handle every phase before start transfer 1372 */ 1373 /* data_out_phase0, phase:0 */ 1374 /* data_in_phase0, phase:1 */ 1375 /* command_phase0, phase:2 */ 1376 /* status_phase0, phase:3 */ 1377 /* nop0, phase:4 PH_BUS_FREE .. initial phase */ 1378 /* nop0, phase:5 PH_BUS_FREE .. initial phase */ 1379 /* msgout_phase0, phase:6 */ 1380 /* msgin_phase0, phase:7 */ 1381 dc395x_statev = dc395x_scsi_phase0[phase]; 1382 dc395x_statev(acb, srb, &scsi_status); 1383 1384 /* 1385 * if there were any exception occurred scsi_status 1386 * will be modify to bus free phase new scsi_status 1387 * transfer out from ... previous dc395x_statev 1388 */ 1389 srb->scsi_phase = scsi_status & PHASEMASK; 1390 phase = (u16)scsi_status & PHASEMASK; 1391 1392 /* 1393 * call dc395x_scsi_phase1[]... "phase entry" handle 1394 * every phase to do transfer 1395 */ 1396 /* data_out_phase1, phase:0 */ 1397 /* data_in_phase1, phase:1 */ 1398 /* command_phase1, phase:2 */ 1399 /* status_phase1, phase:3 */ 1400 /* nop1, phase:4 PH_BUS_FREE .. initial phase */ 1401 /* nop1, phase:5 PH_BUS_FREE .. initial phase */ 1402 /* msgout_phase1, phase:6 */ 1403 /* msgin_phase1, phase:7 */ 1404 dc395x_statev = dc395x_scsi_phase1[phase]; 1405 dc395x_statev(acb, srb, &scsi_status); 1406 } 1407 out_unlock: 1408 DC395x_UNLOCK_IO(acb->scsi_host, flags); 1409 } 1410 1411 1412 static irqreturn_t dc395x_interrupt(int irq, void *dev_id) 1413 { 1414 struct AdapterCtlBlk *acb = dev_id; 1415 u16 scsi_status; 1416 u8 dma_status; 1417 irqreturn_t handled = IRQ_NONE; 1418 1419 /* 1420 * Check for pending interrupt 1421 */ 1422 scsi_status = DC395x_read16(acb, TRM_S1040_SCSI_STATUS); 1423 dma_status = DC395x_read8(acb, TRM_S1040_DMA_STATUS); 1424 if (scsi_status & SCSIINTERRUPT) { 1425 /* interrupt pending - let's process it! */ 1426 dc395x_handle_interrupt(acb, scsi_status); 1427 handled = IRQ_HANDLED; 1428 } 1429 else if (dma_status & 0x20) { 1430 /* Error from the DMA engine */ 1431 #if 0 1432 if (acb->active_dcb) { 1433 acb->active_dcb-> flag |= ABORT_DEV_; 1434 if (acb->active_dcb->active_srb) 1435 enable_msgout_abort(acb, acb->active_dcb->active_srb); 1436 } 1437 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, ABORTXFER | CLRXFIFO); 1438 #else 1439 acb = NULL; 1440 #endif 1441 handled = IRQ_HANDLED; 1442 } 1443 1444 return handled; 1445 } 1446 1447 1448 static void msgout_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 1449 u16 *pscsi_status) 1450 { 1451 if (srb->state & (SRB_UNEXPECT_RESEL + SRB_ABORT_SENT)) 1452 *pscsi_status = PH_BUS_FREE; /*.. initial phase */ 1453 1454 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 1455 srb->state &= ~SRB_MSGOUT; 1456 } 1457 1458 1459 static void msgout_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 1460 u16 *pscsi_status) 1461 { 1462 u16 i; 1463 u8 *ptr; 1464 1465 clear_fifo(acb, "msgout_phase1"); 1466 if (!(srb->state & SRB_MSGOUT)) 1467 srb->state |= SRB_MSGOUT; 1468 1469 if (!srb->msg_count) { 1470 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, NOP); 1471 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); 1472 /* it's important for atn stop */ 1473 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT); 1474 return; 1475 } 1476 ptr = (u8 *)srb->msgout_buf; 1477 for (i = 0; i < srb->msg_count; i++) 1478 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr++); 1479 srb->msg_count = 0; 1480 if (srb->msgout_buf[0] == ABORT_TASK_SET) 1481 srb->state = SRB_ABORT_SENT; 1482 1483 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT); 1484 } 1485 1486 1487 static void command_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 1488 u16 *pscsi_status) 1489 { 1490 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); 1491 } 1492 1493 1494 static void command_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 1495 u16 *pscsi_status) 1496 { 1497 struct DeviceCtlBlk *dcb; 1498 u8 *ptr; 1499 u16 i; 1500 1501 clear_fifo(acb, "command_phase1"); 1502 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_CLRATN); 1503 if (!(srb->flag & AUTO_REQSENSE)) { 1504 ptr = (u8 *)srb->cmd->cmnd; 1505 for (i = 0; i < srb->cmd->cmd_len; i++) { 1506 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr); 1507 ptr++; 1508 } 1509 } else { 1510 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, REQUEST_SENSE); 1511 dcb = acb->active_dcb; 1512 /* target id */ 1513 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, (dcb->target_lun << 5)); 1514 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0); 1515 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0); 1516 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, SCSI_SENSE_BUFFERSIZE); 1517 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0); 1518 } 1519 srb->state |= SRB_COMMAND; 1520 /* it's important for atn stop */ 1521 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); 1522 /* SCSI command */ 1523 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT); 1524 } 1525 1526 1527 /* 1528 * Compute the next Scatter Gather list index and adjust its length 1529 * and address if necessary 1530 */ 1531 static void sg_update_list(struct ScsiReqBlk *srb, u32 left) 1532 { 1533 u8 idx; 1534 u32 xferred = srb->total_xfer_length - left; /* bytes transferred */ 1535 struct SGentry *psge = srb->segment_x + srb->sg_index; 1536 1537 if (xferred == 0) { 1538 /* nothing to update since we did not transfer any data */ 1539 return; 1540 } 1541 1542 srb->total_xfer_length = left; /* update remaining count */ 1543 for (idx = srb->sg_index; idx < srb->sg_count; idx++) { 1544 if (xferred >= psge->length) { 1545 /* Complete SG entries done */ 1546 xferred -= psge->length; 1547 } else { 1548 /* Partial SG entry done */ 1549 dma_sync_single_for_cpu(&srb->dcb->acb->dev->dev, 1550 srb->sg_bus_addr, SEGMENTX_LEN, 1551 DMA_TO_DEVICE); 1552 psge->length -= xferred; 1553 psge->address += xferred; 1554 srb->sg_index = idx; 1555 dma_sync_single_for_device(&srb->dcb->acb->dev->dev, 1556 srb->sg_bus_addr, SEGMENTX_LEN, 1557 DMA_TO_DEVICE); 1558 break; 1559 } 1560 psge++; 1561 } 1562 } 1563 1564 1565 /* 1566 * We have transferred a single byte (PIO mode?) and need to update 1567 * the count of bytes remaining (total_xfer_length) and update the sg 1568 * entry to either point to next byte in the current sg entry, or of 1569 * already at the end to point to the start of the next sg entry 1570 */ 1571 static void sg_subtract_one(struct ScsiReqBlk *srb) 1572 { 1573 sg_update_list(srb, srb->total_xfer_length - 1); 1574 } 1575 1576 1577 /* 1578 * cleanup_after_transfer 1579 * 1580 * Makes sure, DMA and SCSI engine are empty, after the transfer has finished 1581 * KG: Currently called from StatusPhase1 () 1582 * Should probably also be called from other places 1583 * Best might be to call it in DataXXPhase0, if new phase will differ 1584 */ 1585 static void cleanup_after_transfer(struct AdapterCtlBlk *acb, 1586 struct ScsiReqBlk *srb) 1587 { 1588 /*DC395x_write8 (TRM_S1040_DMA_STATUS, FORCEDMACOMP); */ 1589 if (DC395x_read16(acb, TRM_S1040_DMA_COMMAND) & 0x0001) { /* read */ 1590 if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40)) 1591 clear_fifo(acb, "cleanup/in"); 1592 if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80)) 1593 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO); 1594 } else { /* write */ 1595 if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80)) 1596 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO); 1597 if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40)) 1598 clear_fifo(acb, "cleanup/out"); 1599 } 1600 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); 1601 } 1602 1603 1604 /* 1605 * Those no of bytes will be transferred w/ PIO through the SCSI FIFO 1606 * Seems to be needed for unknown reasons; could be a hardware bug :-( 1607 */ 1608 #define DC395x_LASTPIO 4 1609 1610 1611 static void data_out_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 1612 u16 *pscsi_status) 1613 { 1614 struct DeviceCtlBlk *dcb = srb->dcb; 1615 u16 scsi_status = *pscsi_status; 1616 u32 d_left_counter = 0; 1617 1618 /* 1619 * KG: We need to drain the buffers before we draw any conclusions! 1620 * This means telling the DMA to push the rest into SCSI, telling 1621 * SCSI to push the rest to the bus. 1622 * However, the device might have been the one to stop us (phase 1623 * change), and the data in transit just needs to be accounted so 1624 * it can be retransmitted.) 1625 */ 1626 /* 1627 * KG: Stop DMA engine pushing more data into the SCSI FIFO 1628 * If we need more data, the DMA SG list will be freshly set up, anyway 1629 */ 1630 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, STOPDMAXFER | CLRXFIFO); 1631 1632 if (!(srb->state & SRB_XFERPAD)) { 1633 if (scsi_status & PARITYERROR) 1634 srb->status |= PARITY_ERROR; 1635 1636 /* 1637 * KG: Right, we can't just rely on the SCSI_COUNTER, because this 1638 * is the no of bytes it got from the DMA engine not the no it 1639 * transferred successfully to the device. (And the difference could 1640 * be as much as the FIFO size, I guess ...) 1641 */ 1642 if (!(scsi_status & SCSIXFERDONE)) { 1643 /* 1644 * when data transfer from DMA FIFO to SCSI FIFO 1645 * if there was some data left in SCSI FIFO 1646 */ 1647 d_left_counter = 1648 (u32)(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 1649 0x1F); 1650 if (dcb->sync_period & WIDE_SYNC) 1651 d_left_counter <<= 1; 1652 1653 } 1654 /* 1655 * calculate all the residue data that not yet tranfered 1656 * SCSI transfer counter + left in SCSI FIFO data 1657 * 1658 * .....TRM_S1040_SCSI_COUNTER (24bits) 1659 * The counter always decrement by one for every SCSI byte transfer. 1660 * .....TRM_S1040_SCSI_FIFOCNT ( 5bits) 1661 * The counter is SCSI FIFO offset counter (in units of bytes or! words) 1662 */ 1663 if (srb->total_xfer_length > DC395x_LASTPIO) 1664 d_left_counter += 1665 DC395x_read32(acb, TRM_S1040_SCSI_COUNTER); 1666 1667 /* Is this a good idea? */ 1668 /*clear_fifo(acb, "DOP1"); */ 1669 /* KG: What is this supposed to be useful for? WIDE padding stuff? */ 1670 if (d_left_counter == 1 && dcb->sync_period & WIDE_SYNC 1671 && scsi_bufflen(srb->cmd) % 2) { 1672 d_left_counter = 0; 1673 } 1674 /* 1675 * KG: Oops again. Same thinko as above: The SCSI might have been 1676 * faster than the DMA engine, so that it ran out of data. 1677 * In that case, we have to do just nothing! 1678 * But: Why the interrupt: No phase change. No XFERCNT_2_ZERO. Or? 1679 */ 1680 /* 1681 * KG: This is nonsense: We have been WRITING data to the bus 1682 * If the SCSI engine has no bytes left, how should the DMA engine? 1683 */ 1684 if (d_left_counter == 0) { 1685 srb->total_xfer_length = 0; 1686 } else { 1687 /* 1688 * if transfer not yet complete 1689 * there were some data residue in SCSI FIFO or 1690 * SCSI transfer counter not empty 1691 */ 1692 long oldxferred = 1693 srb->total_xfer_length - d_left_counter; 1694 const int diff = 1695 (dcb->sync_period & WIDE_SYNC) ? 2 : 1; 1696 sg_update_list(srb, d_left_counter); 1697 /* KG: Most ugly hack! Apparently, this works around a chip bug */ 1698 if ((srb->segment_x[srb->sg_index].length == 1699 diff && scsi_sg_count(srb->cmd)) 1700 || ((oldxferred & ~PAGE_MASK) == 1701 (PAGE_SIZE - diff)) 1702 ) { 1703 d_left_counter = 1704 srb->total_xfer_length - diff; 1705 sg_update_list(srb, d_left_counter); 1706 /*srb->total_xfer_length -= diff; */ 1707 /*srb->virt_addr += diff; */ 1708 /*if (srb->cmd->use_sg) */ 1709 /* srb->sg_index++; */ 1710 } 1711 } 1712 } 1713 if ((*pscsi_status & PHASEMASK) != PH_DATA_OUT) 1714 cleanup_after_transfer(acb, srb); 1715 } 1716 1717 1718 static void data_out_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 1719 u16 *pscsi_status) 1720 { 1721 clear_fifo(acb, "data_out_phase1"); 1722 /* do prepare before transfer when data out phase */ 1723 data_io_transfer(acb, srb, XFERDATAOUT); 1724 } 1725 1726 static void data_in_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 1727 u16 *pscsi_status) 1728 { 1729 u16 scsi_status = *pscsi_status; 1730 1731 1732 /* 1733 * KG: DataIn is much more tricky than DataOut. When the device is finished 1734 * and switches to another phase, the SCSI engine should be finished too. 1735 * But: There might still be bytes left in its FIFO to be fetched by the DMA 1736 * engine and transferred to memory. 1737 * We should wait for the FIFOs to be emptied by that (is there any way to 1738 * enforce this?) and then stop the DMA engine, because it might think, that 1739 * there are more bytes to follow. Yes, the device might disconnect prior to 1740 * having all bytes transferred! 1741 * Also we should make sure that all data from the DMA engine buffer's really 1742 * made its way to the system memory! Some documentation on this would not 1743 * seem to be a bad idea, actually. 1744 */ 1745 if (!(srb->state & SRB_XFERPAD)) { 1746 u32 d_left_counter; 1747 unsigned int sc, fc; 1748 1749 if (scsi_status & PARITYERROR) { 1750 srb->status |= PARITY_ERROR; 1751 } 1752 /* 1753 * KG: We should wait for the DMA FIFO to be empty ... 1754 * but: it would be better to wait first for the SCSI FIFO and then the 1755 * the DMA FIFO to become empty? How do we know, that the device not already 1756 * sent data to the FIFO in a MsgIn phase, eg.? 1757 */ 1758 if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80)) { 1759 #if 0 1760 int ctr = 6000000; 1761 /*DC395x_write8 (TRM_S1040_DMA_CONTROL, STOPDMAXFER); */ 1762 /*DC395x_write32 (TRM_S1040_SCSI_COUNTER, 7); */ 1763 /*DC395x_write8 (TRM_S1040_SCSI_COMMAND, SCMD_DMA_IN); */ 1764 while (! 1765 (DC395x_read16(acb, TRM_S1040_DMA_FIFOSTAT) & 1766 0x80) && --ctr); 1767 /*DC395x_write32 (TRM_S1040_SCSI_COUNTER, 0); */ 1768 #endif 1769 } 1770 /* Now: Check remainig data: The SCSI counters should tell us ... */ 1771 sc = DC395x_read32(acb, TRM_S1040_SCSI_COUNTER); 1772 fc = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT); 1773 d_left_counter = sc + ((fc & 0x1f) 1774 << ((srb->dcb->sync_period & WIDE_SYNC) ? 1 : 1775 0)); 1776 #if DC395x_LASTPIO 1777 /* KG: Less than or equal to 4 bytes can not be transferred via DMA, it seems. */ 1778 if (d_left_counter 1779 && srb->total_xfer_length <= DC395x_LASTPIO) { 1780 size_t left_io = srb->total_xfer_length; 1781 1782 /*u32 addr = (srb->segment_x[srb->sg_index].address); */ 1783 /*sg_update_list (srb, d_left_counter); */ 1784 if (srb->dcb->sync_period & WIDE_SYNC) 1785 DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 1786 CFG2_WIDEFIFO); 1787 while (left_io) { 1788 unsigned char *virt, *base = NULL; 1789 unsigned long flags = 0; 1790 size_t len = left_io; 1791 size_t offset = srb->request_length - left_io; 1792 1793 local_irq_save(flags); 1794 /* Assumption: it's inside one page as it's at most 4 bytes and 1795 I just assume it's on a 4-byte boundary */ 1796 base = scsi_kmap_atomic_sg(scsi_sglist(srb->cmd), 1797 srb->sg_count, &offset, &len); 1798 virt = base + offset; 1799 1800 left_io -= len; 1801 1802 while (len) { 1803 u8 byte; 1804 byte = DC395x_read8(acb, TRM_S1040_SCSI_FIFO); 1805 *virt++ = byte; 1806 1807 d_left_counter--; 1808 sg_subtract_one(srb); 1809 1810 len--; 1811 1812 fc = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT); 1813 1814 if (fc == 0x40) { 1815 left_io = 0; 1816 break; 1817 } 1818 } 1819 1820 WARN_ON((fc != 0x40) == !d_left_counter); 1821 1822 if (fc == 0x40 && (srb->dcb->sync_period & WIDE_SYNC)) { 1823 /* Read the last byte ... */ 1824 if (srb->total_xfer_length > 0) { 1825 u8 byte = DC395x_read8(acb, TRM_S1040_SCSI_FIFO); 1826 1827 *virt++ = byte; 1828 srb->total_xfer_length--; 1829 } 1830 1831 DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0); 1832 } 1833 1834 scsi_kunmap_atomic_sg(base); 1835 local_irq_restore(flags); 1836 } 1837 /*srb->total_xfer_length = 0; */ 1838 } 1839 #endif /* DC395x_LASTPIO */ 1840 1841 #if 0 1842 /* 1843 * KG: This was in DATAOUT. Does it also belong here? 1844 * Nobody seems to know what counter and fifo_cnt count exactly ... 1845 */ 1846 if (!(scsi_status & SCSIXFERDONE)) { 1847 /* 1848 * when data transfer from DMA FIFO to SCSI FIFO 1849 * if there was some data left in SCSI FIFO 1850 */ 1851 d_left_counter = 1852 (u32)(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 1853 0x1F); 1854 if (srb->dcb->sync_period & WIDE_SYNC) 1855 d_left_counter <<= 1; 1856 /* 1857 * if WIDE scsi SCSI FIFOCNT unit is word !!! 1858 * so need to *= 2 1859 * KG: Seems to be correct ... 1860 */ 1861 } 1862 #endif 1863 /* KG: This should not be needed any more! */ 1864 if (d_left_counter == 0 1865 || (scsi_status & SCSIXFERCNT_2_ZERO)) { 1866 #if 0 1867 int ctr = 6000000; 1868 u8 TempDMAstatus; 1869 do { 1870 TempDMAstatus = 1871 DC395x_read8(acb, TRM_S1040_DMA_STATUS); 1872 } while (!(TempDMAstatus & DMAXFERCOMP) && --ctr); 1873 srb->total_xfer_length = 0; 1874 #endif 1875 srb->total_xfer_length = d_left_counter; 1876 } else { /* phase changed */ 1877 /* 1878 * parsing the case: 1879 * when a transfer not yet complete 1880 * but be disconnected by target 1881 * if transfer not yet complete 1882 * there were some data residue in SCSI FIFO or 1883 * SCSI transfer counter not empty 1884 */ 1885 sg_update_list(srb, d_left_counter); 1886 } 1887 } 1888 /* KG: The target may decide to disconnect: Empty FIFO before! */ 1889 if ((*pscsi_status & PHASEMASK) != PH_DATA_IN) 1890 cleanup_after_transfer(acb, srb); 1891 } 1892 1893 1894 static void data_in_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 1895 u16 *pscsi_status) 1896 { 1897 data_io_transfer(acb, srb, XFERDATAIN); 1898 } 1899 1900 1901 static void data_io_transfer(struct AdapterCtlBlk *acb, 1902 struct ScsiReqBlk *srb, u16 io_dir) 1903 { 1904 struct DeviceCtlBlk *dcb = srb->dcb; 1905 u8 bval; 1906 1907 if (srb->sg_index >= srb->sg_count) { 1908 /* can't happen? out of bounds error */ 1909 return; 1910 } 1911 1912 if (srb->total_xfer_length > DC395x_LASTPIO) { 1913 u8 dma_status = DC395x_read8(acb, TRM_S1040_DMA_STATUS); 1914 /* 1915 * KG: What should we do: Use SCSI Cmd 0x90/0x92? 1916 * Maybe, even ABORTXFER would be appropriate 1917 */ 1918 if (dma_status & XFERPENDING) { 1919 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO); 1920 } 1921 /* clear_fifo(acb, "IO"); */ 1922 /* 1923 * load what physical address of Scatter/Gather list table 1924 * want to be transfer 1925 */ 1926 srb->state |= SRB_DATA_XFER; 1927 DC395x_write32(acb, TRM_S1040_DMA_XHIGHADDR, 0); 1928 if (scsi_sg_count(srb->cmd)) { /* with S/G */ 1929 io_dir |= DMACMD_SG; 1930 DC395x_write32(acb, TRM_S1040_DMA_XLOWADDR, 1931 srb->sg_bus_addr + 1932 sizeof(struct SGentry) * 1933 srb->sg_index); 1934 /* load how many bytes in the sg list table */ 1935 DC395x_write32(acb, TRM_S1040_DMA_XCNT, 1936 ((u32)(srb->sg_count - 1937 srb->sg_index) << 3)); 1938 } else { /* without S/G */ 1939 io_dir &= ~DMACMD_SG; 1940 DC395x_write32(acb, TRM_S1040_DMA_XLOWADDR, 1941 srb->segment_x[0].address); 1942 DC395x_write32(acb, TRM_S1040_DMA_XCNT, 1943 srb->segment_x[0].length); 1944 } 1945 /* load total transfer length (24bits) max value 16Mbyte */ 1946 DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1947 srb->total_xfer_length); 1948 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 1949 if (io_dir & DMACMD_DIR) { /* read */ 1950 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, 1951 SCMD_DMA_IN); 1952 DC395x_write16(acb, TRM_S1040_DMA_COMMAND, io_dir); 1953 } else { 1954 DC395x_write16(acb, TRM_S1040_DMA_COMMAND, io_dir); 1955 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, 1956 SCMD_DMA_OUT); 1957 } 1958 1959 } 1960 #if DC395x_LASTPIO 1961 else if (srb->total_xfer_length > 0) { /* The last four bytes: Do PIO */ 1962 /* 1963 * load what physical address of Scatter/Gather list table 1964 * want to be transfer 1965 */ 1966 srb->state |= SRB_DATA_XFER; 1967 /* load total transfer length (24bits) max value 16Mbyte */ 1968 DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1969 srb->total_xfer_length); 1970 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 1971 if (io_dir & DMACMD_DIR) { /* read */ 1972 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, 1973 SCMD_FIFO_IN); 1974 } else { /* write */ 1975 int ln = srb->total_xfer_length; 1976 size_t left_io = srb->total_xfer_length; 1977 1978 if (srb->dcb->sync_period & WIDE_SYNC) 1979 DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 1980 CFG2_WIDEFIFO); 1981 1982 while (left_io) { 1983 unsigned char *virt, *base = NULL; 1984 unsigned long flags = 0; 1985 size_t len = left_io; 1986 size_t offset = srb->request_length - left_io; 1987 1988 local_irq_save(flags); 1989 /* Again, max 4 bytes */ 1990 base = scsi_kmap_atomic_sg(scsi_sglist(srb->cmd), 1991 srb->sg_count, &offset, &len); 1992 virt = base + offset; 1993 1994 left_io -= len; 1995 1996 while (len--) { 1997 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *virt++); 1998 1999 sg_subtract_one(srb); 2000 } 2001 2002 scsi_kunmap_atomic_sg(base); 2003 local_irq_restore(flags); 2004 } 2005 if (srb->dcb->sync_period & WIDE_SYNC) { 2006 if (ln % 2) { 2007 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0); 2008 } 2009 DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0); 2010 } 2011 /*DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, ln); */ 2012 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, 2013 SCMD_FIFO_OUT); 2014 } 2015 } 2016 #endif /* DC395x_LASTPIO */ 2017 else { /* xfer pad */ 2018 if (srb->sg_count) { 2019 srb->adapter_status = H_OVER_UNDER_RUN; 2020 srb->status |= OVER_RUN; 2021 } 2022 /* 2023 * KG: despite the fact that we are using 16 bits I/O ops 2024 * the SCSI FIFO is only 8 bits according to the docs 2025 * (we can set bit 1 in 0x8f to serialize FIFO access ...) 2026 */ 2027 if (dcb->sync_period & WIDE_SYNC) { 2028 DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 2); 2029 DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 2030 CFG2_WIDEFIFO); 2031 if (io_dir & DMACMD_DIR) { 2032 DC395x_read8(acb, TRM_S1040_SCSI_FIFO); 2033 DC395x_read8(acb, TRM_S1040_SCSI_FIFO); 2034 } else { 2035 /* Danger, Robinson: If you find KGs 2036 * scattered over the wide disk, the driver 2037 * or chip is to blame :-( */ 2038 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'K'); 2039 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'G'); 2040 } 2041 DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0); 2042 } else { 2043 DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1); 2044 /* Danger, Robinson: If you find a collection of Ks on your disk 2045 * something broke :-( */ 2046 if (io_dir & DMACMD_DIR) 2047 DC395x_read8(acb, TRM_S1040_SCSI_FIFO); 2048 else 2049 DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'K'); 2050 } 2051 srb->state |= SRB_XFERPAD; 2052 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 2053 /* SCSI command */ 2054 bval = (io_dir & DMACMD_DIR) ? SCMD_FIFO_IN : SCMD_FIFO_OUT; 2055 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, bval); 2056 } 2057 } 2058 2059 2060 static void status_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 2061 u16 *pscsi_status) 2062 { 2063 srb->target_status = DC395x_read8(acb, TRM_S1040_SCSI_FIFO); 2064 srb->end_message = DC395x_read8(acb, TRM_S1040_SCSI_FIFO); /* get message */ 2065 srb->state = SRB_COMPLETED; 2066 *pscsi_status = PH_BUS_FREE; /*.. initial phase */ 2067 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 2068 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT); 2069 } 2070 2071 2072 static void status_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 2073 u16 *pscsi_status) 2074 { 2075 srb->state = SRB_STATUS; 2076 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 2077 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_COMP); 2078 } 2079 2080 2081 /* Check if the message is complete */ 2082 static inline u8 msgin_completed(u8 * msgbuf, u32 len) 2083 { 2084 if (*msgbuf == EXTENDED_MESSAGE) { 2085 if (len < 2) 2086 return 0; 2087 if (len < msgbuf[1] + 2) 2088 return 0; 2089 } else if (*msgbuf >= 0x20 && *msgbuf <= 0x2f) /* two byte messages */ 2090 if (len < 2) 2091 return 0; 2092 return 1; 2093 } 2094 2095 /* reject_msg */ 2096 static inline void msgin_reject(struct AdapterCtlBlk *acb, 2097 struct ScsiReqBlk *srb) 2098 { 2099 srb->msgout_buf[0] = MESSAGE_REJECT; 2100 srb->msg_count = 1; 2101 DC395x_ENABLE_MSGOUT; 2102 srb->state &= ~SRB_MSGIN; 2103 srb->state |= SRB_MSGOUT; 2104 } 2105 2106 2107 static struct ScsiReqBlk *msgin_qtag(struct AdapterCtlBlk *acb, 2108 struct DeviceCtlBlk *dcb, u8 tag) 2109 { 2110 struct ScsiReqBlk *srb = NULL; 2111 struct ScsiReqBlk *i; 2112 2113 if (list_empty(&dcb->srb_going_list)) 2114 goto mingx0; 2115 list_for_each_entry(i, &dcb->srb_going_list, list) { 2116 if (i->tag_number == tag) { 2117 srb = i; 2118 break; 2119 } 2120 } 2121 if (!srb) 2122 goto mingx0; 2123 2124 if (dcb->flag & ABORT_DEV_) { 2125 /*srb->state = SRB_ABORT_SENT; */ 2126 enable_msgout_abort(acb, srb); 2127 } 2128 2129 if (!(srb->state & SRB_DISCONNECT)) 2130 goto mingx0; 2131 2132 memcpy(srb->msgin_buf, dcb->active_srb->msgin_buf, acb->msg_len); 2133 srb->state |= dcb->active_srb->state; 2134 srb->state |= SRB_DATA_XFER; 2135 dcb->active_srb = srb; 2136 /* How can we make the DORS happy? */ 2137 return srb; 2138 2139 mingx0: 2140 srb = acb->tmp_srb; 2141 srb->state = SRB_UNEXPECT_RESEL; 2142 dcb->active_srb = srb; 2143 srb->msgout_buf[0] = ABORT_TASK; 2144 srb->msg_count = 1; 2145 DC395x_ENABLE_MSGOUT; 2146 return srb; 2147 } 2148 2149 2150 static inline void reprogram_regs(struct AdapterCtlBlk *acb, 2151 struct DeviceCtlBlk *dcb) 2152 { 2153 DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id); 2154 DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period); 2155 DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset); 2156 set_xfer_rate(acb, dcb); 2157 } 2158 2159 2160 /* set async transfer mode */ 2161 static void msgin_set_async(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb) 2162 { 2163 struct DeviceCtlBlk *dcb = srb->dcb; 2164 2165 dcb->sync_mode &= ~(SYNC_NEGO_ENABLE); 2166 dcb->sync_mode |= SYNC_NEGO_DONE; 2167 /*dcb->sync_period &= 0; */ 2168 dcb->sync_offset = 0; 2169 dcb->min_nego_period = 200 >> 2; /* 200ns <=> 5 MHz */ 2170 srb->state &= ~SRB_DO_SYNC_NEGO; 2171 reprogram_regs(acb, dcb); 2172 if ((dcb->sync_mode & WIDE_NEGO_ENABLE) 2173 && !(dcb->sync_mode & WIDE_NEGO_DONE)) { 2174 build_wdtr(acb, dcb, srb); 2175 DC395x_ENABLE_MSGOUT; 2176 } 2177 } 2178 2179 2180 /* set sync transfer mode */ 2181 static void msgin_set_sync(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb) 2182 { 2183 struct DeviceCtlBlk *dcb = srb->dcb; 2184 u8 bval; 2185 int fact; 2186 2187 if (srb->msgin_buf[4] > 15) 2188 srb->msgin_buf[4] = 15; 2189 if (!(dcb->dev_mode & NTC_DO_SYNC_NEGO)) 2190 dcb->sync_offset = 0; 2191 else if (dcb->sync_offset == 0) 2192 dcb->sync_offset = srb->msgin_buf[4]; 2193 if (srb->msgin_buf[4] > dcb->sync_offset) 2194 srb->msgin_buf[4] = dcb->sync_offset; 2195 else 2196 dcb->sync_offset = srb->msgin_buf[4]; 2197 bval = 0; 2198 while (bval < 7 && (srb->msgin_buf[3] > clock_period[bval] 2199 || dcb->min_nego_period > 2200 clock_period[bval])) 2201 bval++; 2202 2203 srb->msgin_buf[3] = clock_period[bval]; 2204 dcb->sync_period &= 0xf0; 2205 dcb->sync_period |= ALT_SYNC | bval; 2206 dcb->min_nego_period = srb->msgin_buf[3]; 2207 2208 if (dcb->sync_period & WIDE_SYNC) 2209 fact = 500; 2210 else 2211 fact = 250; 2212 2213 if (!(srb->state & SRB_DO_SYNC_NEGO)) { 2214 /* Reply with corrected SDTR Message */ 2215 2216 memcpy(srb->msgout_buf, srb->msgin_buf, 5); 2217 srb->msg_count = 5; 2218 DC395x_ENABLE_MSGOUT; 2219 dcb->sync_mode |= SYNC_NEGO_DONE; 2220 } else { 2221 if ((dcb->sync_mode & WIDE_NEGO_ENABLE) 2222 && !(dcb->sync_mode & WIDE_NEGO_DONE)) { 2223 build_wdtr(acb, dcb, srb); 2224 DC395x_ENABLE_MSGOUT; 2225 } 2226 } 2227 srb->state &= ~SRB_DO_SYNC_NEGO; 2228 dcb->sync_mode |= SYNC_NEGO_DONE | SYNC_NEGO_ENABLE; 2229 2230 reprogram_regs(acb, dcb); 2231 } 2232 2233 2234 static inline void msgin_set_nowide(struct AdapterCtlBlk *acb, 2235 struct ScsiReqBlk *srb) 2236 { 2237 struct DeviceCtlBlk *dcb = srb->dcb; 2238 2239 dcb->sync_period &= ~WIDE_SYNC; 2240 dcb->sync_mode &= ~(WIDE_NEGO_ENABLE); 2241 dcb->sync_mode |= WIDE_NEGO_DONE; 2242 srb->state &= ~SRB_DO_WIDE_NEGO; 2243 reprogram_regs(acb, dcb); 2244 if ((dcb->sync_mode & SYNC_NEGO_ENABLE) 2245 && !(dcb->sync_mode & SYNC_NEGO_DONE)) { 2246 build_sdtr(acb, dcb, srb); 2247 DC395x_ENABLE_MSGOUT; 2248 } 2249 } 2250 2251 static void msgin_set_wide(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb) 2252 { 2253 struct DeviceCtlBlk *dcb = srb->dcb; 2254 u8 wide = (dcb->dev_mode & NTC_DO_WIDE_NEGO 2255 && acb->config & HCC_WIDE_CARD) ? 1 : 0; 2256 2257 if (srb->msgin_buf[3] > wide) 2258 srb->msgin_buf[3] = wide; 2259 /* Completed */ 2260 if (!(srb->state & SRB_DO_WIDE_NEGO)) { 2261 memcpy(srb->msgout_buf, srb->msgin_buf, 4); 2262 srb->msg_count = 4; 2263 srb->state |= SRB_DO_WIDE_NEGO; 2264 DC395x_ENABLE_MSGOUT; 2265 } 2266 2267 dcb->sync_mode |= (WIDE_NEGO_ENABLE | WIDE_NEGO_DONE); 2268 if (srb->msgin_buf[3] > 0) 2269 dcb->sync_period |= WIDE_SYNC; 2270 else 2271 dcb->sync_period &= ~WIDE_SYNC; 2272 srb->state &= ~SRB_DO_WIDE_NEGO; 2273 /*dcb->sync_mode &= ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE); */ 2274 reprogram_regs(acb, dcb); 2275 if ((dcb->sync_mode & SYNC_NEGO_ENABLE) 2276 && !(dcb->sync_mode & SYNC_NEGO_DONE)) { 2277 build_sdtr(acb, dcb, srb); 2278 DC395x_ENABLE_MSGOUT; 2279 } 2280 } 2281 2282 2283 /* 2284 * extended message codes: 2285 * 2286 * code description 2287 * 2288 * 02h Reserved 2289 * 00h MODIFY DATA POINTER 2290 * 01h SYNCHRONOUS DATA TRANSFER REQUEST 2291 * 03h WIDE DATA TRANSFER REQUEST 2292 * 04h - 7Fh Reserved 2293 * 80h - FFh Vendor specific 2294 */ 2295 static void msgin_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 2296 u16 *pscsi_status) 2297 { 2298 struct DeviceCtlBlk *dcb = acb->active_dcb; 2299 2300 srb->msgin_buf[acb->msg_len++] = DC395x_read8(acb, TRM_S1040_SCSI_FIFO); 2301 if (msgin_completed(srb->msgin_buf, acb->msg_len)) { 2302 /* Now eval the msg */ 2303 switch (srb->msgin_buf[0]) { 2304 case DISCONNECT: 2305 srb->state = SRB_DISCONNECT; 2306 break; 2307 2308 case SIMPLE_QUEUE_TAG: 2309 case HEAD_OF_QUEUE_TAG: 2310 case ORDERED_QUEUE_TAG: 2311 srb = 2312 msgin_qtag(acb, dcb, 2313 srb->msgin_buf[1]); 2314 break; 2315 2316 case MESSAGE_REJECT: 2317 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, 2318 DO_CLRATN | DO_DATALATCH); 2319 /* A sync nego message was rejected ! */ 2320 if (srb->state & SRB_DO_SYNC_NEGO) { 2321 msgin_set_async(acb, srb); 2322 break; 2323 } 2324 /* A wide nego message was rejected ! */ 2325 if (srb->state & SRB_DO_WIDE_NEGO) { 2326 msgin_set_nowide(acb, srb); 2327 break; 2328 } 2329 enable_msgout_abort(acb, srb); 2330 /*srb->state |= SRB_ABORT_SENT */ 2331 break; 2332 2333 case EXTENDED_MESSAGE: 2334 /* SDTR */ 2335 if (srb->msgin_buf[1] == 3 2336 && srb->msgin_buf[2] == EXTENDED_SDTR) { 2337 msgin_set_sync(acb, srb); 2338 break; 2339 } 2340 /* WDTR */ 2341 if (srb->msgin_buf[1] == 2 2342 && srb->msgin_buf[2] == EXTENDED_WDTR 2343 && srb->msgin_buf[3] <= 2) { /* sanity check ... */ 2344 msgin_set_wide(acb, srb); 2345 break; 2346 } 2347 msgin_reject(acb, srb); 2348 break; 2349 2350 case IGNORE_WIDE_RESIDUE: 2351 /* Discard wide residual */ 2352 break; 2353 2354 case COMMAND_COMPLETE: 2355 /* nothing has to be done */ 2356 break; 2357 2358 case SAVE_POINTERS: 2359 /* 2360 * SAVE POINTER may be ignored as we have the struct 2361 * ScsiReqBlk* associated with the scsi command. 2362 */ 2363 break; 2364 2365 case RESTORE_POINTERS: 2366 break; 2367 2368 case ABORT: 2369 dcb->flag |= ABORT_DEV_; 2370 enable_msgout_abort(acb, srb); 2371 break; 2372 2373 default: 2374 /* reject unknown messages */ 2375 if (srb->msgin_buf[0] & IDENTIFY_BASE) { 2376 srb->msg_count = 1; 2377 srb->msgout_buf[0] = dcb->identify_msg; 2378 DC395x_ENABLE_MSGOUT; 2379 srb->state |= SRB_MSGOUT; 2380 /*break; */ 2381 } 2382 msgin_reject(acb, srb); 2383 } 2384 2385 /* Clear counter and MsgIn state */ 2386 srb->state &= ~SRB_MSGIN; 2387 acb->msg_len = 0; 2388 } 2389 *pscsi_status = PH_BUS_FREE; 2390 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important ... you know! */ 2391 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT); 2392 } 2393 2394 2395 static void msgin_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 2396 u16 *pscsi_status) 2397 { 2398 clear_fifo(acb, "msgin_phase1"); 2399 DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1); 2400 if (!(srb->state & SRB_MSGIN)) { 2401 srb->state &= ~SRB_DISCONNECT; 2402 srb->state |= SRB_MSGIN; 2403 } 2404 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 2405 /* SCSI command */ 2406 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_IN); 2407 } 2408 2409 2410 static void nop0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 2411 u16 *pscsi_status) 2412 { 2413 } 2414 2415 2416 static void nop1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb, 2417 u16 *pscsi_status) 2418 { 2419 } 2420 2421 2422 static void set_xfer_rate(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb) 2423 { 2424 struct DeviceCtlBlk *i; 2425 2426 /* set all lun device's period, offset */ 2427 if (dcb->identify_msg & 0x07) 2428 return; 2429 2430 if (acb->scan_devices) { 2431 current_sync_offset = dcb->sync_offset; 2432 return; 2433 } 2434 2435 list_for_each_entry(i, &acb->dcb_list, list) 2436 if (i->target_id == dcb->target_id) { 2437 i->sync_period = dcb->sync_period; 2438 i->sync_offset = dcb->sync_offset; 2439 i->sync_mode = dcb->sync_mode; 2440 i->min_nego_period = dcb->min_nego_period; 2441 } 2442 } 2443 2444 2445 static void disconnect(struct AdapterCtlBlk *acb) 2446 { 2447 struct DeviceCtlBlk *dcb = acb->active_dcb; 2448 struct ScsiReqBlk *srb; 2449 2450 if (!dcb) { 2451 udelay(500); 2452 /* Suspend queue for a while */ 2453 acb->last_reset = 2454 jiffies + HZ / 2 + 2455 HZ * acb->eeprom.delay_time; 2456 clear_fifo(acb, "disconnectEx"); 2457 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT); 2458 return; 2459 } 2460 srb = dcb->active_srb; 2461 acb->active_dcb = NULL; 2462 2463 srb->scsi_phase = PH_BUS_FREE; /* initial phase */ 2464 clear_fifo(acb, "disconnect"); 2465 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT); 2466 if (srb->state & SRB_UNEXPECT_RESEL) { 2467 srb->state = 0; 2468 waiting_process_next(acb); 2469 } else if (srb->state & SRB_ABORT_SENT) { 2470 dcb->flag &= ~ABORT_DEV_; 2471 acb->last_reset = jiffies + HZ / 2 + 1; 2472 doing_srb_done(acb, DID_ABORT, srb->cmd, 1); 2473 waiting_process_next(acb); 2474 } else { 2475 if ((srb->state & (SRB_START_ + SRB_MSGOUT)) 2476 || !(srb-> 2477 state & (SRB_DISCONNECT | SRB_COMPLETED))) { 2478 /* 2479 * Selection time out 2480 * SRB_START_ || SRB_MSGOUT || (!SRB_DISCONNECT && !SRB_COMPLETED) 2481 */ 2482 /* Unexp. Disc / Sel Timeout */ 2483 if (srb->state != SRB_START_ 2484 && srb->state != SRB_MSGOUT) { 2485 srb->state = SRB_READY; 2486 srb->target_status = SCSI_STAT_SEL_TIMEOUT; 2487 goto disc1; 2488 } else { 2489 /* Normal selection timeout */ 2490 if (srb->retry_count++ > DC395x_MAX_RETRIES 2491 || acb->scan_devices) { 2492 srb->target_status = 2493 SCSI_STAT_SEL_TIMEOUT; 2494 goto disc1; 2495 } 2496 free_tag(dcb, srb); 2497 list_move(&srb->list, &dcb->srb_waiting_list); 2498 waiting_set_timer(acb, HZ / 20); 2499 } 2500 } else if (srb->state & SRB_DISCONNECT) { 2501 u8 bval = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL); 2502 /* 2503 * SRB_DISCONNECT (This is what we expect!) 2504 */ 2505 if (bval & 0x40) { 2506 /* It could come from another initiator, therefore don't do much ! */ 2507 } else 2508 waiting_process_next(acb); 2509 } else if (srb->state & SRB_COMPLETED) { 2510 disc1: 2511 /* 2512 ** SRB_COMPLETED 2513 */ 2514 free_tag(dcb, srb); 2515 dcb->active_srb = NULL; 2516 srb->state = SRB_FREE; 2517 srb_done(acb, dcb, srb); 2518 } 2519 } 2520 } 2521 2522 2523 static void reselect(struct AdapterCtlBlk *acb) 2524 { 2525 struct DeviceCtlBlk *dcb = acb->active_dcb; 2526 struct ScsiReqBlk *srb = NULL; 2527 u16 rsel_tar_lun_id; 2528 u8 id, lun; 2529 2530 clear_fifo(acb, "reselect"); 2531 /*DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT | DO_DATALATCH); */ 2532 /* Read Reselected Target ID and LUN */ 2533 rsel_tar_lun_id = DC395x_read16(acb, TRM_S1040_SCSI_TARGETID); 2534 if (dcb) { /* Arbitration lost but Reselection win */ 2535 srb = dcb->active_srb; 2536 if (!srb) { 2537 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 2538 return; 2539 } 2540 /* Why the if ? */ 2541 if (!acb->scan_devices) { 2542 /*srb->state |= SRB_DISCONNECT; */ 2543 2544 srb->state = SRB_READY; 2545 free_tag(dcb, srb); 2546 list_move(&srb->list, &dcb->srb_waiting_list); 2547 waiting_set_timer(acb, HZ / 20); 2548 2549 /* return; */ 2550 } 2551 } 2552 /* Read Reselected Target Id and LUN */ 2553 id = rsel_tar_lun_id & 0xff; 2554 lun = (rsel_tar_lun_id >> 8) & 7; 2555 dcb = find_dcb(acb, id, lun); 2556 if (!dcb) { 2557 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 2558 return; 2559 } 2560 acb->active_dcb = dcb; 2561 2562 if (dcb->sync_mode & EN_TAG_QUEUEING) { 2563 srb = acb->tmp_srb; 2564 dcb->active_srb = srb; 2565 } else { 2566 /* There can be only one! */ 2567 srb = dcb->active_srb; 2568 if (!srb || !(srb->state & SRB_DISCONNECT)) { 2569 /* 2570 * abort command 2571 */ 2572 srb = acb->tmp_srb; 2573 srb->state = SRB_UNEXPECT_RESEL; 2574 dcb->active_srb = srb; 2575 enable_msgout_abort(acb, srb); 2576 } else { 2577 if (dcb->flag & ABORT_DEV_) { 2578 /*srb->state = SRB_ABORT_SENT; */ 2579 enable_msgout_abort(acb, srb); 2580 } else 2581 srb->state = SRB_DATA_XFER; 2582 2583 } 2584 } 2585 srb->scsi_phase = PH_BUS_FREE; /* initial phase */ 2586 2587 /* Program HA ID, target ID, period and offset */ 2588 DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id); /* host ID */ 2589 DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id); /* target ID */ 2590 DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset); /* offset */ 2591 DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period); /* sync period, wide */ 2592 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */ 2593 /* SCSI command */ 2594 DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT); 2595 } 2596 2597 2598 static inline u8 tagq_blacklist(char *name) 2599 { 2600 #ifndef DC395x_NO_TAGQ 2601 #if 0 2602 u8 i; 2603 for (i = 0; i < BADDEVCNT; i++) 2604 if (memcmp(name, DC395x_baddevname1[i], 28) == 0) 2605 return 1; 2606 #endif 2607 return 0; 2608 #else 2609 return 1; 2610 #endif 2611 } 2612 2613 2614 static void disc_tagq_set(struct DeviceCtlBlk *dcb, struct ScsiInqData *ptr) 2615 { 2616 /* Check for SCSI format (ANSI and Response data format) */ 2617 if ((ptr->Vers & 0x07) >= 2 || (ptr->RDF & 0x0F) == 2) { 2618 if ((ptr->Flags & SCSI_INQ_CMDQUEUE) 2619 && (dcb->dev_mode & NTC_DO_TAG_QUEUEING) && 2620 /*(dcb->dev_mode & NTC_DO_DISCONNECT) */ 2621 /* ((dcb->dev_type == TYPE_DISK) 2622 || (dcb->dev_type == TYPE_MOD)) && */ 2623 !tagq_blacklist(((char *)ptr) + 8)) { 2624 if (dcb->max_command == 1) 2625 dcb->max_command = 2626 dcb->acb->tag_max_num; 2627 dcb->sync_mode |= EN_TAG_QUEUEING; 2628 /*dcb->tag_mask = 0; */ 2629 } else 2630 dcb->max_command = 1; 2631 } 2632 } 2633 2634 2635 static void add_dev(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb, 2636 struct ScsiInqData *ptr) 2637 { 2638 u8 bval1 = ptr->DevType & SCSI_DEVTYPE; 2639 dcb->dev_type = bval1; 2640 /* if (bval1 == TYPE_DISK || bval1 == TYPE_MOD) */ 2641 disc_tagq_set(dcb, ptr); 2642 } 2643 2644 2645 /* unmap mapped pci regions from SRB */ 2646 static void pci_unmap_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb) 2647 { 2648 struct scsi_cmnd *cmd = srb->cmd; 2649 enum dma_data_direction dir = cmd->sc_data_direction; 2650 2651 if (scsi_sg_count(cmd) && dir != DMA_NONE) { 2652 /* unmap DC395x SG list */ 2653 dma_unmap_single(&acb->dev->dev, srb->sg_bus_addr, SEGMENTX_LEN, 2654 DMA_TO_DEVICE); 2655 /* unmap the sg segments */ 2656 scsi_dma_unmap(cmd); 2657 } 2658 } 2659 2660 2661 /* unmap mapped pci sense buffer from SRB */ 2662 static void pci_unmap_srb_sense(struct AdapterCtlBlk *acb, 2663 struct ScsiReqBlk *srb) 2664 { 2665 if (!(srb->flag & AUTO_REQSENSE)) 2666 return; 2667 /* Unmap sense buffer */ 2668 dma_unmap_single(&acb->dev->dev, srb->segment_x[0].address, 2669 srb->segment_x[0].length, DMA_FROM_DEVICE); 2670 /* Restore SG stuff */ 2671 srb->total_xfer_length = srb->xferred; 2672 srb->segment_x[0].address = 2673 srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address; 2674 srb->segment_x[0].length = 2675 srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length; 2676 } 2677 2678 2679 /* 2680 * Complete execution of a SCSI command 2681 * Signal completion to the generic SCSI driver 2682 */ 2683 static void srb_done(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb, 2684 struct ScsiReqBlk *srb) 2685 { 2686 u8 tempcnt, status; 2687 struct scsi_cmnd *cmd = srb->cmd; 2688 enum dma_data_direction dir = cmd->sc_data_direction; 2689 int ckc_only = 1; 2690 2691 status = srb->target_status; 2692 set_host_byte(cmd, DID_OK); 2693 set_status_byte(cmd, SAM_STAT_GOOD); 2694 if (srb->flag & AUTO_REQSENSE) { 2695 pci_unmap_srb_sense(acb, srb); 2696 /* 2697 ** target status.......................... 2698 */ 2699 srb->flag &= ~AUTO_REQSENSE; 2700 srb->adapter_status = 0; 2701 srb->target_status = SAM_STAT_CHECK_CONDITION; 2702 2703 if (status == SAM_STAT_CHECK_CONDITION) { 2704 set_host_byte(cmd, DID_BAD_TARGET); 2705 goto ckc_e; 2706 } 2707 2708 set_status_byte(cmd, SAM_STAT_CHECK_CONDITION); 2709 2710 goto ckc_e; 2711 } 2712 2713 /*************************************************************/ 2714 if (status) { 2715 /* 2716 * target status.......................... 2717 */ 2718 if (status == SAM_STAT_CHECK_CONDITION) { 2719 request_sense(acb, dcb, srb); 2720 return; 2721 } else if (status == SAM_STAT_TASK_SET_FULL) { 2722 tempcnt = (u8)list_size(&dcb->srb_going_list); 2723 if (tempcnt > 1) 2724 tempcnt--; 2725 dcb->max_command = tempcnt; 2726 free_tag(dcb, srb); 2727 list_move(&srb->list, &dcb->srb_waiting_list); 2728 waiting_set_timer(acb, HZ / 20); 2729 srb->adapter_status = 0; 2730 srb->target_status = 0; 2731 return; 2732 } else if (status == SCSI_STAT_SEL_TIMEOUT) { 2733 srb->adapter_status = H_SEL_TIMEOUT; 2734 srb->target_status = 0; 2735 set_host_byte(cmd, DID_NO_CONNECT); 2736 } else { 2737 srb->adapter_status = 0; 2738 set_host_byte(cmd, DID_ERROR); 2739 set_status_byte(cmd, status); 2740 } 2741 } else { 2742 /* 2743 ** process initiator status.......................... 2744 */ 2745 status = srb->adapter_status; 2746 if (status & H_OVER_UNDER_RUN) { 2747 srb->target_status = 0; 2748 scsi_msg_to_host_byte(cmd, srb->end_message); 2749 } else if (srb->status & PARITY_ERROR) { 2750 set_host_byte(cmd, DID_PARITY); 2751 } else { /* No error */ 2752 2753 srb->adapter_status = 0; 2754 srb->target_status = 0; 2755 } 2756 } 2757 2758 ckc_only = 0; 2759 /* Check Error Conditions */ 2760 ckc_e: 2761 2762 pci_unmap_srb(acb, srb); 2763 2764 if (cmd->cmnd[0] == INQUIRY) { 2765 unsigned char *base = NULL; 2766 struct ScsiInqData *ptr; 2767 unsigned long flags = 0; 2768 struct scatterlist* sg = scsi_sglist(cmd); 2769 size_t offset = 0, len = sizeof(struct ScsiInqData); 2770 2771 local_irq_save(flags); 2772 base = scsi_kmap_atomic_sg(sg, scsi_sg_count(cmd), &offset, &len); 2773 ptr = (struct ScsiInqData *)(base + offset); 2774 2775 if (!ckc_only && get_host_byte(cmd) == DID_OK 2776 && cmd->cmnd[2] == 0 && scsi_bufflen(cmd) >= 8 2777 && dir != DMA_NONE && ptr && (ptr->Vers & 0x07) >= 2) 2778 dcb->inquiry7 = ptr->Flags; 2779 2780 /*if( srb->cmd->cmnd[0] == INQUIRY && */ 2781 /* (host_byte(cmd->result) == DID_OK || status_byte(cmd->result) & CHECK_CONDITION) ) */ 2782 if ((get_host_byte(cmd) == DID_OK) || 2783 (get_status_byte(cmd) == SAM_STAT_CHECK_CONDITION)) { 2784 if (!dcb->init_tcq_flag) { 2785 add_dev(acb, dcb, ptr); 2786 dcb->init_tcq_flag = 1; 2787 } 2788 } 2789 2790 scsi_kunmap_atomic_sg(base); 2791 local_irq_restore(flags); 2792 } 2793 2794 /* Here is the info for Doug Gilbert's sg3 ... */ 2795 scsi_set_resid(cmd, srb->total_xfer_length); 2796 2797 if (srb != acb->tmp_srb) { 2798 /* Add to free list */ 2799 list_move_tail(&srb->list, &acb->srb_free_list); 2800 } 2801 2802 scsi_done(cmd); 2803 waiting_process_next(acb); 2804 } 2805 2806 2807 /* abort all cmds in our queues */ 2808 static void doing_srb_done(struct AdapterCtlBlk *acb, u8 did_flag, 2809 struct scsi_cmnd *cmd, u8 force) 2810 { 2811 struct DeviceCtlBlk *dcb; 2812 2813 list_for_each_entry(dcb, &acb->dcb_list, list) { 2814 struct ScsiReqBlk *srb; 2815 struct ScsiReqBlk *tmp; 2816 struct scsi_cmnd *p; 2817 2818 list_for_each_entry_safe(srb, tmp, &dcb->srb_going_list, list) { 2819 p = srb->cmd; 2820 printk("G:%p(%02i-%i) ", p, 2821 p->device->id, (u8)p->device->lun); 2822 list_del(&srb->list); 2823 free_tag(dcb, srb); 2824 list_add_tail(&srb->list, &acb->srb_free_list); 2825 set_host_byte(p, did_flag); 2826 set_status_byte(p, SAM_STAT_GOOD); 2827 pci_unmap_srb_sense(acb, srb); 2828 pci_unmap_srb(acb, srb); 2829 if (force) { 2830 /* For new EH, we normally don't need to give commands back, 2831 * as they all complete or all time out */ 2832 scsi_done(p); 2833 } 2834 } 2835 2836 /* Waiting queue */ 2837 list_for_each_entry_safe(srb, tmp, &dcb->srb_waiting_list, list) { 2838 p = srb->cmd; 2839 2840 printk("W:%p<%02i-%i>", p, p->device->id, 2841 (u8)p->device->lun); 2842 list_move_tail(&srb->list, &acb->srb_free_list); 2843 set_host_byte(p, did_flag); 2844 set_status_byte(p, SAM_STAT_GOOD); 2845 pci_unmap_srb_sense(acb, srb); 2846 pci_unmap_srb(acb, srb); 2847 if (force) { 2848 /* For new EH, we normally don't need to give commands back, 2849 * as they all complete or all time out */ 2850 scsi_done(cmd); 2851 } 2852 } 2853 dcb->flag &= ~ABORT_DEV_; 2854 } 2855 } 2856 2857 2858 static void reset_scsi_bus(struct AdapterCtlBlk *acb) 2859 { 2860 acb->acb_flag |= RESET_DEV; /* RESET_DETECT, RESET_DONE, RESET_DEV */ 2861 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_RSTSCSI); 2862 2863 while (!(DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET)) 2864 /* nothing */; 2865 } 2866 2867 2868 static void set_basic_config(struct AdapterCtlBlk *acb) 2869 { 2870 u8 bval; 2871 u16 wval; 2872 DC395x_write8(acb, TRM_S1040_SCSI_TIMEOUT, acb->sel_timeout); 2873 if (acb->config & HCC_PARITY) 2874 bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK; 2875 else 2876 bval = PHASELATCH | INITIATOR | BLOCKRST; 2877 2878 DC395x_write8(acb, TRM_S1040_SCSI_CONFIG0, bval); 2879 2880 /* program configuration 1: Act_Neg (+ Act_Neg_Enh? + Fast_Filter? + DataDis?) */ 2881 DC395x_write8(acb, TRM_S1040_SCSI_CONFIG1, 0x03); /* was 0x13: default */ 2882 /* program Host ID */ 2883 DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id); 2884 /* set ansynchronous transfer */ 2885 DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, 0x00); 2886 /* Turn LED control off */ 2887 wval = DC395x_read16(acb, TRM_S1040_GEN_CONTROL) & 0x7F; 2888 DC395x_write16(acb, TRM_S1040_GEN_CONTROL, wval); 2889 /* DMA config */ 2890 wval = DC395x_read16(acb, TRM_S1040_DMA_CONFIG) & ~DMA_FIFO_CTRL; 2891 wval |= 2892 DMA_FIFO_HALF_HALF | DMA_ENHANCE /*| DMA_MEM_MULTI_READ */ ; 2893 DC395x_write16(acb, TRM_S1040_DMA_CONFIG, wval); 2894 /* Clear pending interrupt status */ 2895 DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS); 2896 /* Enable SCSI interrupt */ 2897 DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x7F); 2898 DC395x_write8(acb, TRM_S1040_DMA_INTEN, EN_SCSIINTR | EN_DMAXFERERROR 2899 /*| EN_DMAXFERABORT | EN_DMAXFERCOMP | EN_FORCEDMACOMP */ 2900 ); 2901 } 2902 2903 2904 static void scsi_reset_detect(struct AdapterCtlBlk *acb) 2905 { 2906 /* delay half a second */ 2907 if (timer_pending(&acb->waiting_timer)) 2908 timer_delete(&acb->waiting_timer); 2909 2910 DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE); 2911 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE); 2912 /*DC395x_write8(acb, TRM_S1040_DMA_CONTROL,STOPDMAXFER); */ 2913 udelay(500); 2914 /* Maybe we locked up the bus? Then lets wait even longer ... */ 2915 acb->last_reset = 2916 jiffies + 5 * HZ / 2 + 2917 HZ * acb->eeprom.delay_time; 2918 2919 clear_fifo(acb, "scsi_reset_detect"); 2920 set_basic_config(acb); 2921 /*1.25 */ 2922 /*DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT); */ 2923 2924 if (acb->acb_flag & RESET_DEV) { /* RESET_DETECT, RESET_DONE, RESET_DEV */ 2925 acb->acb_flag |= RESET_DONE; 2926 } else { 2927 acb->acb_flag |= RESET_DETECT; 2928 reset_dev_param(acb); 2929 doing_srb_done(acb, DID_RESET, NULL, 1); 2930 /*DC395x_RecoverSRB( acb ); */ 2931 acb->active_dcb = NULL; 2932 acb->acb_flag = 0; 2933 waiting_process_next(acb); 2934 } 2935 } 2936 2937 2938 static void request_sense(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb, 2939 struct ScsiReqBlk *srb) 2940 { 2941 struct scsi_cmnd *cmd = srb->cmd; 2942 2943 srb->flag |= AUTO_REQSENSE; 2944 srb->adapter_status = 0; 2945 srb->target_status = 0; 2946 2947 /* KG: Can this prevent crap sense data ? */ 2948 memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2949 2950 /* Save some data */ 2951 srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address = 2952 srb->segment_x[0].address; 2953 srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length = 2954 srb->segment_x[0].length; 2955 srb->xferred = srb->total_xfer_length; 2956 /* srb->segment_x : a one entry of S/G list table */ 2957 srb->total_xfer_length = SCSI_SENSE_BUFFERSIZE; 2958 srb->segment_x[0].length = SCSI_SENSE_BUFFERSIZE; 2959 /* Map sense buffer */ 2960 srb->segment_x[0].address = dma_map_single(&acb->dev->dev, 2961 cmd->sense_buffer, SCSI_SENSE_BUFFERSIZE, 2962 DMA_FROM_DEVICE); 2963 srb->sg_count = 1; 2964 srb->sg_index = 0; 2965 2966 if (start_scsi(acb, dcb, srb)) { /* Should only happen, if sb. else grabs the bus */ 2967 list_move(&srb->list, &dcb->srb_waiting_list); 2968 waiting_set_timer(acb, HZ / 100); 2969 } 2970 } 2971 2972 2973 /** 2974 * device_alloc - Allocate a new device instance. This create the 2975 * devices instance and sets up all the data items. The adapter 2976 * instance is required to obtain confiuration information for this 2977 * device. This does *not* add this device to the adapters device 2978 * list. 2979 * 2980 * @acb: The adapter to obtain configuration information from. 2981 * @target: The target for the new device. 2982 * @lun: The lun for the new device. 2983 * 2984 * Return the new device if successful or NULL on failure. 2985 **/ 2986 static struct DeviceCtlBlk *device_alloc(struct AdapterCtlBlk *acb, 2987 u8 target, u8 lun) 2988 { 2989 struct NvRamType *eeprom = &acb->eeprom; 2990 u8 period_index = eeprom->target[target].period & 0x07; 2991 struct DeviceCtlBlk *dcb; 2992 2993 dcb = kmalloc(sizeof(struct DeviceCtlBlk), GFP_ATOMIC); 2994 if (!dcb) 2995 return NULL; 2996 dcb->acb = NULL; 2997 INIT_LIST_HEAD(&dcb->srb_going_list); 2998 INIT_LIST_HEAD(&dcb->srb_waiting_list); 2999 dcb->active_srb = NULL; 3000 dcb->tag_mask = 0; 3001 dcb->max_command = 1; 3002 dcb->target_id = target; 3003 dcb->target_lun = lun; 3004 dcb->dev_mode = eeprom->target[target].cfg0; 3005 #ifndef DC395x_NO_DISCONNECT 3006 dcb->identify_msg = 3007 IDENTIFY(dcb->dev_mode & NTC_DO_DISCONNECT, lun); 3008 #else 3009 dcb->identify_msg = IDENTIFY(0, lun); 3010 #endif 3011 dcb->inquiry7 = 0; 3012 dcb->sync_mode = 0; 3013 dcb->min_nego_period = clock_period[period_index]; 3014 dcb->sync_period = 0; 3015 dcb->sync_offset = 0; 3016 dcb->flag = 0; 3017 3018 #ifndef DC395x_NO_WIDE 3019 if ((dcb->dev_mode & NTC_DO_WIDE_NEGO) 3020 && (acb->config & HCC_WIDE_CARD)) 3021 dcb->sync_mode |= WIDE_NEGO_ENABLE; 3022 #endif 3023 #ifndef DC395x_NO_SYNC 3024 if (dcb->dev_mode & NTC_DO_SYNC_NEGO) 3025 if (!(lun) || current_sync_offset) 3026 dcb->sync_mode |= SYNC_NEGO_ENABLE; 3027 #endif 3028 if (dcb->target_lun != 0) { 3029 /* Copy settings */ 3030 struct DeviceCtlBlk *p = NULL, *iter; 3031 3032 list_for_each_entry(iter, &acb->dcb_list, list) 3033 if (iter->target_id == dcb->target_id) { 3034 p = iter; 3035 break; 3036 } 3037 3038 if (!p) { 3039 kfree(dcb); 3040 return NULL; 3041 } 3042 3043 dcb->sync_mode = p->sync_mode; 3044 dcb->sync_period = p->sync_period; 3045 dcb->min_nego_period = p->min_nego_period; 3046 dcb->sync_offset = p->sync_offset; 3047 dcb->inquiry7 = p->inquiry7; 3048 } 3049 return dcb; 3050 } 3051 3052 3053 /** 3054 * adapter_add_device - Adds the device instance to the adaptor instance. 3055 * 3056 * @acb: The adapter device to be updated 3057 * @dcb: A newly created and initialised device instance to add. 3058 **/ 3059 static void adapter_add_device(struct AdapterCtlBlk *acb, 3060 struct DeviceCtlBlk *dcb) 3061 { 3062 /* backpointer to adapter */ 3063 dcb->acb = acb; 3064 3065 /* set run_robin to this device if it is currently empty */ 3066 if (list_empty(&acb->dcb_list)) 3067 acb->dcb_run_robin = dcb; 3068 3069 /* add device to list */ 3070 list_add_tail(&dcb->list, &acb->dcb_list); 3071 3072 /* update device maps */ 3073 acb->dcb_map[dcb->target_id] |= (1 << dcb->target_lun); 3074 acb->children[dcb->target_id][dcb->target_lun] = dcb; 3075 } 3076 3077 3078 /** 3079 * adapter_remove_device - Removes the device instance from the adaptor 3080 * instance. The device instance is not check in any way or freed by this. 3081 * The caller is expected to take care of that. This will simply remove the 3082 * device from the adapters data strcutures. 3083 * 3084 * @acb: The adapter device to be updated 3085 * @dcb: A device that has previously been added to the adapter. 3086 **/ 3087 static void adapter_remove_device(struct AdapterCtlBlk *acb, 3088 struct DeviceCtlBlk *dcb) 3089 { 3090 struct DeviceCtlBlk *i; 3091 struct DeviceCtlBlk *tmp; 3092 3093 /* fix up any pointers to this device that we have in the adapter */ 3094 if (acb->active_dcb == dcb) 3095 acb->active_dcb = NULL; 3096 if (acb->dcb_run_robin == dcb) 3097 acb->dcb_run_robin = dcb_get_next(&acb->dcb_list, dcb); 3098 3099 /* unlink from list */ 3100 list_for_each_entry_safe(i, tmp, &acb->dcb_list, list) 3101 if (dcb == i) { 3102 list_del(&i->list); 3103 break; 3104 } 3105 3106 /* clear map and children */ 3107 acb->dcb_map[dcb->target_id] &= ~(1 << dcb->target_lun); 3108 acb->children[dcb->target_id][dcb->target_lun] = NULL; 3109 dcb->acb = NULL; 3110 } 3111 3112 3113 /** 3114 * adapter_remove_and_free_device - Removes a single device from the adapter 3115 * and then frees the device information. 3116 * 3117 * @acb: The adapter device to be updated 3118 * @dcb: A device that has previously been added to the adapter. 3119 */ 3120 static void adapter_remove_and_free_device(struct AdapterCtlBlk *acb, 3121 struct DeviceCtlBlk *dcb) 3122 { 3123 if (list_size(&dcb->srb_going_list) > 1) { 3124 return; 3125 } 3126 adapter_remove_device(acb, dcb); 3127 kfree(dcb); 3128 } 3129 3130 3131 /** 3132 * adapter_remove_and_free_all_devices - Removes and frees all of the 3133 * devices associated with the specified adapter. 3134 * 3135 * @acb: The adapter from which all devices should be removed. 3136 **/ 3137 static void adapter_remove_and_free_all_devices(struct AdapterCtlBlk* acb) 3138 { 3139 struct DeviceCtlBlk *dcb; 3140 struct DeviceCtlBlk *tmp; 3141 3142 list_for_each_entry_safe(dcb, tmp, &acb->dcb_list, list) 3143 adapter_remove_and_free_device(acb, dcb); 3144 } 3145 3146 3147 /** 3148 * dc395x_sdev_init - Called by the scsi mid layer to tell us about a new 3149 * scsi device that we need to deal with. We allocate a new device and then 3150 * insert that device into the adapters device list. 3151 * 3152 * @scsi_device: The new scsi device that we need to handle. 3153 **/ 3154 static int dc395x_sdev_init(struct scsi_device *scsi_device) 3155 { 3156 struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)scsi_device->host->hostdata; 3157 struct DeviceCtlBlk *dcb; 3158 3159 dcb = device_alloc(acb, scsi_device->id, scsi_device->lun); 3160 if (!dcb) 3161 return -ENOMEM; 3162 adapter_add_device(acb, dcb); 3163 3164 return 0; 3165 } 3166 3167 3168 /** 3169 * dc395x_sdev_destroy - Called by the scsi mid layer to tell us about a 3170 * device that is going away. 3171 * 3172 * @scsi_device: The new scsi device that we need to handle. 3173 **/ 3174 static void dc395x_sdev_destroy(struct scsi_device *scsi_device) 3175 { 3176 struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)scsi_device->host->hostdata; 3177 struct DeviceCtlBlk *dcb = find_dcb(acb, scsi_device->id, scsi_device->lun); 3178 if (dcb) 3179 adapter_remove_and_free_device(acb, dcb); 3180 } 3181 3182 3183 3184 3185 /** 3186 * trms1040_wait_30us: wait for 30 us 3187 * 3188 * Waits for 30us (using the chip by the looks of it..) 3189 * 3190 * @io_port: base I/O address 3191 **/ 3192 static void trms1040_wait_30us(unsigned long io_port) 3193 { 3194 /* ScsiPortStallExecution(30); wait 30 us */ 3195 outb(5, io_port + TRM_S1040_GEN_TIMER); 3196 while (!(inb(io_port + TRM_S1040_GEN_STATUS) & GTIMEOUT)) 3197 /* nothing */ ; 3198 } 3199 3200 3201 /** 3202 * trms1040_write_cmd - write the secified command and address to 3203 * chip 3204 * 3205 * @io_port: base I/O address 3206 * @cmd: SB + op code (command) to send 3207 * @addr: address to send 3208 **/ 3209 static void trms1040_write_cmd(unsigned long io_port, u8 cmd, u8 addr) 3210 { 3211 int i; 3212 u8 send_data; 3213 3214 /* program SB + OP code */ 3215 for (i = 0; i < 3; i++, cmd <<= 1) { 3216 send_data = NVR_SELECT; 3217 if (cmd & 0x04) /* Start from bit 2 */ 3218 send_data |= NVR_BITOUT; 3219 3220 outb(send_data, io_port + TRM_S1040_GEN_NVRAM); 3221 trms1040_wait_30us(io_port); 3222 outb((send_data | NVR_CLOCK), 3223 io_port + TRM_S1040_GEN_NVRAM); 3224 trms1040_wait_30us(io_port); 3225 } 3226 3227 /* send address */ 3228 for (i = 0; i < 7; i++, addr <<= 1) { 3229 send_data = NVR_SELECT; 3230 if (addr & 0x40) /* Start from bit 6 */ 3231 send_data |= NVR_BITOUT; 3232 3233 outb(send_data, io_port + TRM_S1040_GEN_NVRAM); 3234 trms1040_wait_30us(io_port); 3235 outb((send_data | NVR_CLOCK), 3236 io_port + TRM_S1040_GEN_NVRAM); 3237 trms1040_wait_30us(io_port); 3238 } 3239 outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM); 3240 trms1040_wait_30us(io_port); 3241 } 3242 3243 3244 /** 3245 * trms1040_set_data - store a single byte in the eeprom 3246 * 3247 * Called from write all to write a single byte into the SSEEPROM 3248 * Which is done one bit at a time. 3249 * 3250 * @io_port: base I/O address 3251 * @addr: offset into EEPROM 3252 * @byte: bytes to write 3253 **/ 3254 static void trms1040_set_data(unsigned long io_port, u8 addr, u8 byte) 3255 { 3256 int i; 3257 u8 send_data; 3258 3259 /* Send write command & address */ 3260 trms1040_write_cmd(io_port, 0x05, addr); 3261 3262 /* Write data */ 3263 for (i = 0; i < 8; i++, byte <<= 1) { 3264 send_data = NVR_SELECT; 3265 if (byte & 0x80) /* Start from bit 7 */ 3266 send_data |= NVR_BITOUT; 3267 3268 outb(send_data, io_port + TRM_S1040_GEN_NVRAM); 3269 trms1040_wait_30us(io_port); 3270 outb((send_data | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM); 3271 trms1040_wait_30us(io_port); 3272 } 3273 outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM); 3274 trms1040_wait_30us(io_port); 3275 3276 /* Disable chip select */ 3277 outb(0, io_port + TRM_S1040_GEN_NVRAM); 3278 trms1040_wait_30us(io_port); 3279 3280 outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM); 3281 trms1040_wait_30us(io_port); 3282 3283 /* Wait for write ready */ 3284 while (1) { 3285 outb((NVR_SELECT | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM); 3286 trms1040_wait_30us(io_port); 3287 3288 outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM); 3289 trms1040_wait_30us(io_port); 3290 3291 if (inb(io_port + TRM_S1040_GEN_NVRAM) & NVR_BITIN) 3292 break; 3293 } 3294 3295 /* Disable chip select */ 3296 outb(0, io_port + TRM_S1040_GEN_NVRAM); 3297 } 3298 3299 3300 /** 3301 * trms1040_write_all - write 128 bytes to the eeprom 3302 * 3303 * Write the supplied 128 bytes to the chips SEEPROM 3304 * 3305 * @eeprom: the data to write 3306 * @io_port: the base io port 3307 **/ 3308 static void trms1040_write_all(struct NvRamType *eeprom, unsigned long io_port) 3309 { 3310 u8 *b_eeprom = (u8 *)eeprom; 3311 u8 addr; 3312 3313 /* Enable SEEPROM */ 3314 outb((inb(io_port + TRM_S1040_GEN_CONTROL) | EN_EEPROM), 3315 io_port + TRM_S1040_GEN_CONTROL); 3316 3317 /* write enable */ 3318 trms1040_write_cmd(io_port, 0x04, 0xFF); 3319 outb(0, io_port + TRM_S1040_GEN_NVRAM); 3320 trms1040_wait_30us(io_port); 3321 3322 /* write */ 3323 for (addr = 0; addr < 128; addr++, b_eeprom++) 3324 trms1040_set_data(io_port, addr, *b_eeprom); 3325 3326 /* write disable */ 3327 trms1040_write_cmd(io_port, 0x04, 0x00); 3328 outb(0, io_port + TRM_S1040_GEN_NVRAM); 3329 trms1040_wait_30us(io_port); 3330 3331 /* Disable SEEPROM */ 3332 outb((inb(io_port + TRM_S1040_GEN_CONTROL) & ~EN_EEPROM), 3333 io_port + TRM_S1040_GEN_CONTROL); 3334 } 3335 3336 3337 /** 3338 * trms1040_get_data - get a single byte from the eeprom 3339 * 3340 * Called from read all to read a single byte into the SSEEPROM 3341 * Which is done one bit at a time. 3342 * 3343 * @io_port: base I/O address 3344 * @addr: offset into SEEPROM 3345 * 3346 * Returns the byte read. 3347 **/ 3348 static u8 trms1040_get_data(unsigned long io_port, u8 addr) 3349 { 3350 int i; 3351 u8 read_byte; 3352 u8 result = 0; 3353 3354 /* Send read command & address */ 3355 trms1040_write_cmd(io_port, 0x06, addr); 3356 3357 /* read data */ 3358 for (i = 0; i < 8; i++) { 3359 outb((NVR_SELECT | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM); 3360 trms1040_wait_30us(io_port); 3361 outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM); 3362 3363 /* Get data bit while falling edge */ 3364 read_byte = inb(io_port + TRM_S1040_GEN_NVRAM); 3365 result <<= 1; 3366 if (read_byte & NVR_BITIN) 3367 result |= 1; 3368 3369 trms1040_wait_30us(io_port); 3370 } 3371 3372 /* Disable chip select */ 3373 outb(0, io_port + TRM_S1040_GEN_NVRAM); 3374 return result; 3375 } 3376 3377 3378 /** 3379 * trms1040_read_all - read all bytes from the eeprom 3380 * 3381 * Read the 128 bytes from the SEEPROM. 3382 * 3383 * @eeprom: where to store the data 3384 * @io_port: the base io port 3385 **/ 3386 static void trms1040_read_all(struct NvRamType *eeprom, unsigned long io_port) 3387 { 3388 u8 *b_eeprom = (u8 *)eeprom; 3389 u8 addr; 3390 3391 /* Enable SEEPROM */ 3392 outb((inb(io_port + TRM_S1040_GEN_CONTROL) | EN_EEPROM), 3393 io_port + TRM_S1040_GEN_CONTROL); 3394 3395 /* read details */ 3396 for (addr = 0; addr < 128; addr++, b_eeprom++) 3397 *b_eeprom = trms1040_get_data(io_port, addr); 3398 3399 /* Disable SEEPROM */ 3400 outb((inb(io_port + TRM_S1040_GEN_CONTROL) & ~EN_EEPROM), 3401 io_port + TRM_S1040_GEN_CONTROL); 3402 } 3403 3404 3405 3406 /** 3407 * check_eeprom - get and check contents of the eeprom 3408 * 3409 * Read seeprom 128 bytes into the memory provider in eeprom. 3410 * Checks the checksum and if it's not correct it uses a set of default 3411 * values. 3412 * 3413 * @eeprom: caller allocated strcuture to read the eeprom data into 3414 * @io_port: io port to read from 3415 **/ 3416 static void check_eeprom(struct NvRamType *eeprom, unsigned long io_port) 3417 { 3418 u16 *w_eeprom = (u16 *)eeprom; 3419 u16 w_addr; 3420 u16 cksum; 3421 u32 d_addr; 3422 u32 *d_eeprom; 3423 3424 trms1040_read_all(eeprom, io_port); /* read eeprom */ 3425 3426 cksum = 0; 3427 for (w_addr = 0, w_eeprom = (u16 *)eeprom; w_addr < 64; 3428 w_addr++, w_eeprom++) 3429 cksum += *w_eeprom; 3430 if (cksum != 0x1234) { 3431 /* 3432 * Checksum is wrong. 3433 * Load a set of defaults into the eeprom buffer 3434 */ 3435 eeprom->sub_vendor_id[0] = (u8)PCI_VENDOR_ID_TEKRAM; 3436 eeprom->sub_vendor_id[1] = (u8)(PCI_VENDOR_ID_TEKRAM >> 8); 3437 eeprom->sub_sys_id[0] = (u8)PCI_DEVICE_ID_TEKRAM_TRMS1040; 3438 eeprom->sub_sys_id[1] = 3439 (u8)(PCI_DEVICE_ID_TEKRAM_TRMS1040 >> 8); 3440 eeprom->sub_class = 0x00; 3441 eeprom->vendor_id[0] = (u8)PCI_VENDOR_ID_TEKRAM; 3442 eeprom->vendor_id[1] = (u8)(PCI_VENDOR_ID_TEKRAM >> 8); 3443 eeprom->device_id[0] = (u8)PCI_DEVICE_ID_TEKRAM_TRMS1040; 3444 eeprom->device_id[1] = 3445 (u8)(PCI_DEVICE_ID_TEKRAM_TRMS1040 >> 8); 3446 eeprom->reserved = 0x00; 3447 3448 for (d_addr = 0, d_eeprom = (u32 *)eeprom->target; 3449 d_addr < 16; d_addr++, d_eeprom++) 3450 *d_eeprom = 0x00000077; /* cfg3,cfg2,period,cfg0 */ 3451 3452 *d_eeprom++ = 0x04000F07; /* max_tag,delay_time,channel_cfg,scsi_id */ 3453 *d_eeprom++ = 0x00000015; /* reserved1,boot_lun,boot_target,reserved0 */ 3454 for (d_addr = 0; d_addr < 12; d_addr++, d_eeprom++) 3455 *d_eeprom = 0x00; 3456 3457 /* Now load defaults (maybe set by boot/module params) */ 3458 set_safe_settings(); 3459 fix_settings(); 3460 eeprom_override(eeprom); 3461 3462 eeprom->cksum = 0x00; 3463 for (w_addr = 0, cksum = 0, w_eeprom = (u16 *)eeprom; 3464 w_addr < 63; w_addr++, w_eeprom++) 3465 cksum += *w_eeprom; 3466 3467 *w_eeprom = 0x1234 - cksum; 3468 trms1040_write_all(eeprom, io_port); 3469 eeprom->delay_time = cfg_data[CFG_RESET_DELAY].value; 3470 } else { 3471 set_safe_settings(); 3472 eeprom_index_to_delay(eeprom); 3473 eeprom_override(eeprom); 3474 } 3475 } 3476 3477 3478 /** 3479 * print_eeprom_settings - output the eeprom settings 3480 * to the kernel log so people can see what they were. 3481 * 3482 * @eeprom: The eeprom data strucutre to show details for. 3483 **/ 3484 static void print_eeprom_settings(struct NvRamType *eeprom) 3485 { 3486 } 3487 3488 3489 /* Free SG tables */ 3490 static void adapter_sg_tables_free(struct AdapterCtlBlk *acb) 3491 { 3492 int i; 3493 const unsigned srbs_per_page = PAGE_SIZE/SEGMENTX_LEN; 3494 3495 for (i = 0; i < DC395x_MAX_SRB_CNT; i += srbs_per_page) 3496 kfree(acb->srb_array[i].segment_x); 3497 } 3498 3499 3500 /* 3501 * Allocate SG tables; as we have to pci_map them, an SG list (struct SGentry*) 3502 * should never cross a page boundary */ 3503 static int adapter_sg_tables_alloc(struct AdapterCtlBlk *acb) 3504 { 3505 const unsigned mem_needed = (DC395x_MAX_SRB_CNT+1) 3506 *SEGMENTX_LEN; 3507 int pages = (mem_needed+(PAGE_SIZE-1))/PAGE_SIZE; 3508 const unsigned srbs_per_page = PAGE_SIZE/SEGMENTX_LEN; 3509 int srb_idx = 0; 3510 unsigned i = 0; 3511 struct SGentry *ptr; 3512 3513 for (i = 0; i < DC395x_MAX_SRB_CNT; i++) 3514 acb->srb_array[i].segment_x = NULL; 3515 3516 while (pages--) { 3517 ptr = kmalloc(PAGE_SIZE, GFP_KERNEL); 3518 if (!ptr) { 3519 adapter_sg_tables_free(acb); 3520 return 1; 3521 } 3522 i = 0; 3523 while (i < srbs_per_page && srb_idx < DC395x_MAX_SRB_CNT) 3524 acb->srb_array[srb_idx++].segment_x = 3525 ptr + (i++ * DC395x_MAX_SG_LISTENTRY); 3526 } 3527 if (i < srbs_per_page) 3528 acb->srb.segment_x = 3529 ptr + (i * DC395x_MAX_SG_LISTENTRY); 3530 return 0; 3531 } 3532 3533 3534 3535 /** 3536 * adapter_print_config - print adapter connection and termination 3537 * config 3538 * 3539 * The io port in the adapter needs to have been set before calling 3540 * this function. 3541 * 3542 * @acb: The adapter to print the information for. 3543 **/ 3544 static void adapter_print_config(struct AdapterCtlBlk *acb) 3545 { 3546 u8 bval; 3547 3548 bval = DC395x_read8(acb, TRM_S1040_GEN_STATUS); 3549 if (!(bval & CON5068)) 3550 printk("ext%s ", !(bval & EXT68HIGH) ? "68" : "50"); 3551 if (!(bval & CON68)) 3552 printk("int68%s ", !(bval & INT68HIGH) ? "" : "(50)"); 3553 if (!(bval & CON50)) 3554 printk("int50 "); 3555 if ((bval & (CON5068 | CON50 | CON68)) == 3556 0 /*(CON5068 | CON50 | CON68) */ ) 3557 printk(" Oops! (All 3?) "); 3558 bval = DC395x_read8(acb, TRM_S1040_GEN_CONTROL); 3559 printk(" Termination: "); 3560 if (bval & DIS_TERM) 3561 printk("Disabled\n"); 3562 else { 3563 if (bval & AUTOTERM) 3564 printk("Auto "); 3565 if (bval & LOW8TERM) 3566 printk("Low "); 3567 if (bval & UP8TERM) 3568 printk("High "); 3569 printk("\n"); 3570 } 3571 } 3572 3573 3574 /** 3575 * adapter_init_params - Initialize the various parameters in the 3576 * adapter structure. Note that the pointer to the scsi_host is set 3577 * early (when this instance is created) and the io_port and irq 3578 * values are set later after they have been reserved. This just gets 3579 * everything set to a good starting position. 3580 * 3581 * The eeprom structure in the adapter needs to have been set before 3582 * calling this function. 3583 * 3584 * @acb: The adapter to initialize. 3585 **/ 3586 static void adapter_init_params(struct AdapterCtlBlk *acb) 3587 { 3588 struct NvRamType *eeprom = &acb->eeprom; 3589 int i; 3590 3591 /* NOTE: acb->scsi_host is set at scsi_host/acb creation time */ 3592 /* NOTE: acb->io_port_base is set at port registration time */ 3593 /* NOTE: acb->io_port_len is set at port registration time */ 3594 3595 INIT_LIST_HEAD(&acb->dcb_list); 3596 acb->dcb_run_robin = NULL; 3597 acb->active_dcb = NULL; 3598 3599 INIT_LIST_HEAD(&acb->srb_free_list); 3600 /* temp SRB for Q tag used or abort command used */ 3601 acb->tmp_srb = &acb->srb; 3602 timer_setup(&acb->waiting_timer, waiting_timeout, 0); 3603 timer_setup(&acb->selto_timer, NULL, 0); 3604 3605 acb->srb_count = DC395x_MAX_SRB_CNT; 3606 3607 acb->sel_timeout = DC395x_SEL_TIMEOUT; /* timeout=250ms */ 3608 /* NOTE: acb->irq_level is set at IRQ registration time */ 3609 3610 acb->tag_max_num = 1 << eeprom->max_tag; 3611 if (acb->tag_max_num > 30) 3612 acb->tag_max_num = 30; 3613 3614 acb->acb_flag = 0; /* RESET_DETECT, RESET_DONE, RESET_DEV */ 3615 acb->gmode2 = eeprom->channel_cfg; 3616 acb->config = 0; /* NOTE: actually set in adapter_init_chip */ 3617 3618 if (eeprom->channel_cfg & NAC_SCANLUN) 3619 acb->lun_chk = 1; 3620 acb->scan_devices = 1; 3621 3622 acb->scsi_host->this_id = eeprom->scsi_id; 3623 acb->hostid_bit = (1 << acb->scsi_host->this_id); 3624 3625 for (i = 0; i < DC395x_MAX_SCSI_ID; i++) 3626 acb->dcb_map[i] = 0; 3627 3628 acb->msg_len = 0; 3629 3630 /* link static array of srbs into the srb free list */ 3631 for (i = 0; i < acb->srb_count - 1; i++) 3632 list_add_tail(&acb->srb_array[i].list, &acb->srb_free_list); 3633 } 3634 3635 3636 /** 3637 * adapter_init_scsi_host - Initialize the scsi host instance based on 3638 * values that we have already stored in the adapter instance. There's 3639 * some mention that a lot of these are deprecated, so we won't use 3640 * them (we'll use the ones in the adapter instance) but we'll fill 3641 * them in in case something else needs them. 3642 * 3643 * The eeprom structure, irq and io ports in the adapter need to have 3644 * been set before calling this function. 3645 * 3646 * @host: The scsi host instance to fill in the values for. 3647 **/ 3648 static void adapter_init_scsi_host(struct Scsi_Host *host) 3649 { 3650 struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)host->hostdata; 3651 struct NvRamType *eeprom = &acb->eeprom; 3652 3653 host->max_cmd_len = 24; 3654 host->can_queue = DC395x_MAX_CMD_QUEUE; 3655 host->cmd_per_lun = DC395x_MAX_CMD_PER_LUN; 3656 host->this_id = (int)eeprom->scsi_id; 3657 host->io_port = acb->io_port_base; 3658 host->n_io_port = acb->io_port_len; 3659 host->dma_channel = -1; 3660 host->unique_id = acb->io_port_base; 3661 host->irq = acb->irq_level; 3662 acb->last_reset = jiffies; 3663 3664 host->max_id = 16; 3665 if (host->max_id - 1 == eeprom->scsi_id) 3666 host->max_id--; 3667 3668 if (eeprom->channel_cfg & NAC_SCANLUN) 3669 host->max_lun = 8; 3670 else 3671 host->max_lun = 1; 3672 } 3673 3674 3675 /** 3676 * adapter_init_chip - Get the chip into a know state and figure out 3677 * some of the settings that apply to this adapter. 3678 * 3679 * The io port in the adapter needs to have been set before calling 3680 * this function. The config will be configured correctly on return. 3681 * 3682 * @acb: The adapter which we are to init. 3683 **/ 3684 static void adapter_init_chip(struct AdapterCtlBlk *acb) 3685 { 3686 struct NvRamType *eeprom = &acb->eeprom; 3687 3688 /* Mask all the interrupt */ 3689 DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0x00); 3690 DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x00); 3691 3692 /* Reset SCSI module */ 3693 DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE); 3694 3695 /* Reset PCI/DMA module */ 3696 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE); 3697 udelay(20); 3698 3699 /* program configuration 0 */ 3700 acb->config = HCC_AUTOTERM | HCC_PARITY; 3701 if (DC395x_read8(acb, TRM_S1040_GEN_STATUS) & WIDESCSI) 3702 acb->config |= HCC_WIDE_CARD; 3703 3704 if (eeprom->channel_cfg & NAC_POWERON_SCSI_RESET) 3705 acb->config |= HCC_SCSI_RESET; 3706 3707 if (acb->config & HCC_SCSI_RESET) { 3708 DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTSCSI); 3709 3710 /*while (!( DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET )); */ 3711 /*spin_unlock_irq (&io_request_lock); */ 3712 udelay(500); 3713 3714 acb->last_reset = 3715 jiffies + HZ / 2 + 3716 HZ * acb->eeprom.delay_time; 3717 3718 /*spin_lock_irq (&io_request_lock); */ 3719 } 3720 } 3721 3722 3723 /** 3724 * adapter_init - Grab the resource for the card, setup the adapter 3725 * information, set the card into a known state, create the various 3726 * tables etc etc. This basically gets all adapter information all up 3727 * to date, initialised and gets the chip in sync with it. 3728 * 3729 * @acb: The adapter which we are to init. 3730 * @io_port: The base I/O port 3731 * @io_port_len: The I/O port size 3732 * @irq: IRQ 3733 * 3734 * Returns 0 if the initialization succeeds, any other value on 3735 * failure. 3736 **/ 3737 static int adapter_init(struct AdapterCtlBlk *acb, unsigned long io_port, 3738 u32 io_port_len, unsigned int irq) 3739 { 3740 if (!request_region(io_port, io_port_len, DC395X_NAME)) { 3741 goto failed; 3742 } 3743 /* store port base to indicate we have registered it */ 3744 acb->io_port_base = io_port; 3745 acb->io_port_len = io_port_len; 3746 3747 if (request_irq(irq, dc395x_interrupt, IRQF_SHARED, DC395X_NAME, acb)) { 3748 /* release the region we just claimed */ 3749 goto failed; 3750 } 3751 /* store irq to indicate we have registered it */ 3752 acb->irq_level = irq; 3753 3754 /* get eeprom configuration information and command line settings etc */ 3755 check_eeprom(&acb->eeprom, io_port); 3756 print_eeprom_settings(&acb->eeprom); 3757 3758 /* setup adapter control block */ 3759 adapter_init_params(acb); 3760 3761 /* display card connectors/termination settings */ 3762 adapter_print_config(acb); 3763 3764 if (adapter_sg_tables_alloc(acb)) { 3765 goto failed; 3766 } 3767 adapter_init_scsi_host(acb->scsi_host); 3768 adapter_init_chip(acb); 3769 set_basic_config(acb); 3770 3771 return 0; 3772 3773 failed: 3774 if (acb->irq_level) 3775 free_irq(acb->irq_level, acb); 3776 if (acb->io_port_base) 3777 release_region(acb->io_port_base, acb->io_port_len); 3778 adapter_sg_tables_free(acb); 3779 3780 return 1; 3781 } 3782 3783 3784 /** 3785 * adapter_uninit_chip - cleanly shut down the scsi controller chip, 3786 * stopping all operations and disabling interrupt generation on the 3787 * card. 3788 * 3789 * @acb: The adapter which we are to shutdown. 3790 **/ 3791 static void adapter_uninit_chip(struct AdapterCtlBlk *acb) 3792 { 3793 /* disable interrupts */ 3794 DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0); 3795 DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0); 3796 3797 /* reset the scsi bus */ 3798 if (acb->config & HCC_SCSI_RESET) 3799 reset_scsi_bus(acb); 3800 3801 /* clear any pending interrupt state */ 3802 DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS); 3803 } 3804 3805 3806 3807 /** 3808 * adapter_uninit - Shut down the chip and release any resources that 3809 * we had allocated. Once this returns the adapter should not be used 3810 * anymore. 3811 * 3812 * @acb: The adapter which we are to un-initialize. 3813 **/ 3814 static void adapter_uninit(struct AdapterCtlBlk *acb) 3815 { 3816 unsigned long flags; 3817 DC395x_LOCK_IO(acb->scsi_host, flags); 3818 3819 /* remove timers */ 3820 if (timer_pending(&acb->waiting_timer)) 3821 timer_delete(&acb->waiting_timer); 3822 if (timer_pending(&acb->selto_timer)) 3823 timer_delete(&acb->selto_timer); 3824 3825 adapter_uninit_chip(acb); 3826 adapter_remove_and_free_all_devices(acb); 3827 DC395x_UNLOCK_IO(acb->scsi_host, flags); 3828 3829 if (acb->irq_level) 3830 free_irq(acb->irq_level, acb); 3831 if (acb->io_port_base) 3832 release_region(acb->io_port_base, acb->io_port_len); 3833 3834 adapter_sg_tables_free(acb); 3835 } 3836 3837 3838 #undef YESNO 3839 #define YESNO(YN) \ 3840 if (YN) seq_printf(m, " Yes ");\ 3841 else seq_printf(m, " No ") 3842 3843 static int dc395x_show_info(struct seq_file *m, struct Scsi_Host *host) 3844 { 3845 struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)host->hostdata; 3846 int spd, spd1; 3847 struct DeviceCtlBlk *dcb; 3848 unsigned long flags; 3849 int dev; 3850 3851 seq_puts(m, DC395X_BANNER " PCI SCSI Host Adapter\n" 3852 " Driver Version " DC395X_VERSION "\n"); 3853 3854 DC395x_LOCK_IO(acb->scsi_host, flags); 3855 3856 seq_printf(m, "SCSI Host Nr %i, ", host->host_no); 3857 seq_printf(m, "DC395U/UW/F DC315/U %s\n", 3858 (acb->config & HCC_WIDE_CARD) ? "Wide" : ""); 3859 seq_printf(m, "io_port_base 0x%04lx, ", acb->io_port_base); 3860 seq_printf(m, "irq_level 0x%04x, ", acb->irq_level); 3861 seq_printf(m, " SelTimeout %ims\n", (1638 * acb->sel_timeout) / 1000); 3862 3863 seq_printf(m, "MaxID %i, MaxLUN %llu, ", host->max_id, host->max_lun); 3864 seq_printf(m, "AdapterID %i\n", host->this_id); 3865 3866 seq_printf(m, "tag_max_num %i", acb->tag_max_num); 3867 /*seq_printf(m, ", DMA_Status %i\n", DC395x_read8(acb, TRM_S1040_DMA_STATUS)); */ 3868 seq_printf(m, ", FilterCfg 0x%02x", 3869 DC395x_read8(acb, TRM_S1040_SCSI_CONFIG1)); 3870 seq_printf(m, ", DelayReset %is\n", acb->eeprom.delay_time); 3871 /*seq_printf(m, "\n"); */ 3872 3873 seq_printf(m, "Nr of DCBs: %i\n", list_size(&acb->dcb_list)); 3874 seq_printf(m, "Map of attached LUNs: %8ph\n", &acb->dcb_map[0]); 3875 seq_printf(m, " %8ph\n", &acb->dcb_map[8]); 3876 3877 seq_puts(m, 3878 "Un ID LUN Prty Sync Wide DsCn SndS TagQ nego_period SyncFreq SyncOffs MaxCmd\n"); 3879 3880 dev = 0; 3881 list_for_each_entry(dcb, &acb->dcb_list, list) { 3882 int nego_period; 3883 seq_printf(m, "%02i %02i %02i ", dev, dcb->target_id, 3884 dcb->target_lun); 3885 YESNO(dcb->dev_mode & NTC_DO_PARITY_CHK); 3886 YESNO(dcb->sync_offset); 3887 YESNO(dcb->sync_period & WIDE_SYNC); 3888 YESNO(dcb->dev_mode & NTC_DO_DISCONNECT); 3889 YESNO(dcb->dev_mode & NTC_DO_SEND_START); 3890 YESNO(dcb->sync_mode & EN_TAG_QUEUEING); 3891 nego_period = clock_period[dcb->sync_period & 0x07] << 2; 3892 if (dcb->sync_offset) 3893 seq_printf(m, " %03i ns ", nego_period); 3894 else 3895 seq_printf(m, " (%03i ns)", (dcb->min_nego_period << 2)); 3896 3897 if (dcb->sync_offset & 0x0f) { 3898 spd = 1000 / (nego_period); 3899 spd1 = 1000 % (nego_period); 3900 spd1 = (spd1 * 10 + nego_period / 2) / (nego_period); 3901 seq_printf(m, " %2i.%1i M %02i ", spd, spd1, 3902 (dcb->sync_offset & 0x0f)); 3903 } else 3904 seq_puts(m, " "); 3905 3906 /* Add more info ... */ 3907 seq_printf(m, " %02i\n", dcb->max_command); 3908 dev++; 3909 } 3910 3911 if (timer_pending(&acb->waiting_timer)) 3912 seq_puts(m, "Waiting queue timer running\n"); 3913 else 3914 seq_putc(m, '\n'); 3915 3916 list_for_each_entry(dcb, &acb->dcb_list, list) { 3917 struct ScsiReqBlk *srb; 3918 if (!list_empty(&dcb->srb_waiting_list)) 3919 seq_printf(m, "DCB (%02i-%i): Waiting: %i:", 3920 dcb->target_id, dcb->target_lun, 3921 list_size(&dcb->srb_waiting_list)); 3922 list_for_each_entry(srb, &dcb->srb_waiting_list, list) 3923 seq_printf(m, " %p", srb->cmd); 3924 if (!list_empty(&dcb->srb_going_list)) 3925 seq_printf(m, "\nDCB (%02i-%i): Going : %i:", 3926 dcb->target_id, dcb->target_lun, 3927 list_size(&dcb->srb_going_list)); 3928 list_for_each_entry(srb, &dcb->srb_going_list, list) 3929 seq_printf(m, " %p", srb->cmd); 3930 if (!list_empty(&dcb->srb_waiting_list) || !list_empty(&dcb->srb_going_list)) 3931 seq_putc(m, '\n'); 3932 } 3933 3934 DC395x_UNLOCK_IO(acb->scsi_host, flags); 3935 return 0; 3936 } 3937 3938 3939 static const struct scsi_host_template dc395x_driver_template = { 3940 .module = THIS_MODULE, 3941 .proc_name = DC395X_NAME, 3942 .show_info = dc395x_show_info, 3943 .name = DC395X_BANNER " " DC395X_VERSION, 3944 .queuecommand = dc395x_queue_command, 3945 .sdev_init = dc395x_sdev_init, 3946 .sdev_destroy = dc395x_sdev_destroy, 3947 .can_queue = DC395x_MAX_CAN_QUEUE, 3948 .this_id = 7, 3949 .sg_tablesize = DC395x_MAX_SG_TABLESIZE, 3950 .cmd_per_lun = DC395x_MAX_CMD_PER_LUN, 3951 .eh_abort_handler = dc395x_eh_abort, 3952 .eh_bus_reset_handler = dc395x_eh_bus_reset, 3953 .dma_boundary = PAGE_SIZE - 1, 3954 }; 3955 3956 3957 /** 3958 * dc395x_init_one - Initialise a single instance of the adapter. 3959 * 3960 * The PCI layer will call this once for each instance of the adapter 3961 * that it finds in the system. The pci_dev strcuture indicates which 3962 * instance we are being called from. 3963 * 3964 * @dev: The PCI device to initialize. 3965 * @id: Looks like a pointer to the entry in our pci device table 3966 * that was actually matched by the PCI subsystem. 3967 * 3968 * Returns 0 on success, or an error code (-ve) on failure. 3969 **/ 3970 static int dc395x_init_one(struct pci_dev *dev, const struct pci_device_id *id) 3971 { 3972 struct Scsi_Host *scsi_host = NULL; 3973 struct AdapterCtlBlk *acb = NULL; 3974 unsigned long io_port_base; 3975 unsigned int io_port_len; 3976 unsigned int irq; 3977 3978 if (pci_enable_device(dev)) 3979 return -ENODEV; 3980 3981 io_port_base = pci_resource_start(dev, 0) & PCI_BASE_ADDRESS_IO_MASK; 3982 io_port_len = pci_resource_len(dev, 0); 3983 irq = dev->irq; 3984 3985 /* allocate scsi host information (includes out adapter) */ 3986 scsi_host = scsi_host_alloc(&dc395x_driver_template, 3987 sizeof(struct AdapterCtlBlk)); 3988 if (!scsi_host) 3989 goto fail; 3990 3991 acb = (struct AdapterCtlBlk*)scsi_host->hostdata; 3992 acb->scsi_host = scsi_host; 3993 acb->dev = dev; 3994 3995 /* initialise the adapter and everything we need */ 3996 if (adapter_init(acb, io_port_base, io_port_len, irq)) { 3997 acb = NULL; 3998 goto fail; 3999 } 4000 4001 pci_set_master(dev); 4002 4003 /* get the scsi mid level to scan for new devices on the bus */ 4004 if (scsi_add_host(scsi_host, &dev->dev)) 4005 goto fail; 4006 4007 pci_set_drvdata(dev, scsi_host); 4008 scsi_scan_host(scsi_host); 4009 4010 return 0; 4011 4012 fail: 4013 if (acb != NULL) 4014 adapter_uninit(acb); 4015 if (scsi_host != NULL) 4016 scsi_host_put(scsi_host); 4017 pci_disable_device(dev); 4018 return -ENODEV; 4019 } 4020 4021 4022 /** 4023 * dc395x_remove_one - Called to remove a single instance of the 4024 * adapter. 4025 * 4026 * @dev: The PCI device to initialize. 4027 **/ 4028 static void dc395x_remove_one(struct pci_dev *dev) 4029 { 4030 struct Scsi_Host *scsi_host = pci_get_drvdata(dev); 4031 struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)(scsi_host->hostdata); 4032 4033 scsi_remove_host(scsi_host); 4034 adapter_uninit(acb); 4035 pci_disable_device(dev); 4036 scsi_host_put(scsi_host); 4037 } 4038 4039 4040 static const struct pci_device_id dc395x_pci_table[] = { 4041 { 4042 .vendor = PCI_VENDOR_ID_TEKRAM, 4043 .device = PCI_DEVICE_ID_TEKRAM_TRMS1040, 4044 .subvendor = PCI_ANY_ID, 4045 .subdevice = PCI_ANY_ID, 4046 }, 4047 {} /* Terminating entry */ 4048 }; 4049 MODULE_DEVICE_TABLE(pci, dc395x_pci_table); 4050 4051 4052 static struct pci_driver dc395x_driver = { 4053 .name = DC395X_NAME, 4054 .id_table = dc395x_pci_table, 4055 .probe = dc395x_init_one, 4056 .remove = dc395x_remove_one, 4057 }; 4058 module_pci_driver(dc395x_driver); 4059 4060 MODULE_AUTHOR("C.L. Huang / Erich Chen / Kurt Garloff"); 4061 MODULE_DESCRIPTION("SCSI host adapter driver for Tekram TRM-S1040 based adapters: Tekram DC395 and DC315 series"); 4062 MODULE_LICENSE("GPL"); 4063