xref: /linux/drivers/scsi/cxlflash/main.h (revision bc88ac47d5cb11c7dd9896781f793fae519d53fa)
1c21e0bbfSMatthew R. Ochs /*
2c21e0bbfSMatthew R. Ochs  * CXL Flash Device Driver
3c21e0bbfSMatthew R. Ochs  *
4c21e0bbfSMatthew R. Ochs  * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5c21e0bbfSMatthew R. Ochs  *             Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6c21e0bbfSMatthew R. Ochs  *
7c21e0bbfSMatthew R. Ochs  * Copyright (C) 2015 IBM Corporation
8c21e0bbfSMatthew R. Ochs  *
9c21e0bbfSMatthew R. Ochs  * This program is free software; you can redistribute it and/or
10c21e0bbfSMatthew R. Ochs  * modify it under the terms of the GNU General Public License
11c21e0bbfSMatthew R. Ochs  * as published by the Free Software Foundation; either version
12c21e0bbfSMatthew R. Ochs  * 2 of the License, or (at your option) any later version.
13c21e0bbfSMatthew R. Ochs  */
14c21e0bbfSMatthew R. Ochs 
15c21e0bbfSMatthew R. Ochs #ifndef _CXLFLASH_MAIN_H
16c21e0bbfSMatthew R. Ochs #define _CXLFLASH_MAIN_H
17c21e0bbfSMatthew R. Ochs 
18c21e0bbfSMatthew R. Ochs #include <linux/list.h>
19c21e0bbfSMatthew R. Ochs #include <linux/types.h>
20c21e0bbfSMatthew R. Ochs #include <scsi/scsi.h>
21c21e0bbfSMatthew R. Ochs #include <scsi/scsi_device.h>
22c21e0bbfSMatthew R. Ochs 
23c21e0bbfSMatthew R. Ochs #define CXLFLASH_NAME		"cxlflash"
24c21e0bbfSMatthew R. Ochs #define CXLFLASH_ADAPTER_NAME	"IBM POWER CXL Flash Adapter"
25a834a36bSUma Krishnan #define CXLFLASH_MAX_ADAPTERS	32
26c21e0bbfSMatthew R. Ochs 
27c21e0bbfSMatthew R. Ochs #define PCI_DEVICE_ID_IBM_CORSA		0x04F0
28a2746fb1SManoj Kumar #define PCI_DEVICE_ID_IBM_FLASH_GT	0x0600
2994344520SMatthew R. Ochs #define PCI_DEVICE_ID_IBM_BRIARD	0x0624
30c21e0bbfSMatthew R. Ochs 
31c21e0bbfSMatthew R. Ochs /* Since there is only one target, make it 0 */
32c21e0bbfSMatthew R. Ochs #define CXLFLASH_TARGET		0
33c21e0bbfSMatthew R. Ochs #define CXLFLASH_MAX_CDB_LEN	16
34c21e0bbfSMatthew R. Ochs 
35c21e0bbfSMatthew R. Ochs /* Really only one target per bus since the Texan is directly attached */
36c21e0bbfSMatthew R. Ochs #define CXLFLASH_MAX_NUM_TARGETS_PER_BUS	1
37c21e0bbfSMatthew R. Ochs #define CXLFLASH_MAX_NUM_LUNS_PER_TARGET	65536
38c21e0bbfSMatthew R. Ochs 
39c21e0bbfSMatthew R. Ochs #define CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT	(120 * HZ)
40c21e0bbfSMatthew R. Ochs 
41c21e0bbfSMatthew R. Ochs /* FC defines */
42c21e0bbfSMatthew R. Ochs #define FC_MTIP_CMDCONFIG 0x010
43c21e0bbfSMatthew R. Ochs #define FC_MTIP_STATUS 0x018
449cf43a36SMatthew R. Ochs #define FC_MAX_NUM_LUNS 0x080 /* Max LUNs host can provision for port */
459cf43a36SMatthew R. Ochs #define FC_CUR_NUM_LUNS 0x088 /* Cur number LUNs provisioned for port */
469cf43a36SMatthew R. Ochs #define FC_MAX_CAP_PORT 0x090 /* Max capacity all LUNs for port (4K blocks) */
479cf43a36SMatthew R. Ochs #define FC_CUR_CAP_PORT 0x098 /* Cur capacity all LUNs for port (4K blocks) */
48c21e0bbfSMatthew R. Ochs 
49c21e0bbfSMatthew R. Ochs #define FC_PNAME 0x300
50c21e0bbfSMatthew R. Ochs #define FC_CONFIG 0x320
51c21e0bbfSMatthew R. Ochs #define FC_CONFIG2 0x328
52c21e0bbfSMatthew R. Ochs #define FC_STATUS 0x330
53c21e0bbfSMatthew R. Ochs #define FC_ERROR 0x380
54c21e0bbfSMatthew R. Ochs #define FC_ERRCAP 0x388
55c21e0bbfSMatthew R. Ochs #define FC_ERRMSK 0x390
56c21e0bbfSMatthew R. Ochs #define FC_CNT_CRCERR 0x538
57c21e0bbfSMatthew R. Ochs #define FC_CRC_THRESH 0x580
58c21e0bbfSMatthew R. Ochs 
59c21e0bbfSMatthew R. Ochs #define FC_MTIP_CMDCONFIG_ONLINE	0x20ULL
60c21e0bbfSMatthew R. Ochs #define FC_MTIP_CMDCONFIG_OFFLINE	0x40ULL
61c21e0bbfSMatthew R. Ochs 
62c21e0bbfSMatthew R. Ochs #define FC_MTIP_STATUS_MASK		0x30ULL
63c21e0bbfSMatthew R. Ochs #define FC_MTIP_STATUS_ONLINE		0x20ULL
64c21e0bbfSMatthew R. Ochs #define FC_MTIP_STATUS_OFFLINE		0x10ULL
65c21e0bbfSMatthew R. Ochs 
66c21e0bbfSMatthew R. Ochs /* TIMEOUT and RETRY definitions */
67c21e0bbfSMatthew R. Ochs 
68c21e0bbfSMatthew R. Ochs /* AFU command timeout values */
69c21e0bbfSMatthew R. Ochs #define MC_AFU_SYNC_TIMEOUT	5	/* 5 secs */
709cf43a36SMatthew R. Ochs #define MC_LUN_PROV_TIMEOUT	5	/* 5 secs */
71*bc88ac47SMatthew R. Ochs #define MC_AFU_DEBUG_TIMEOUT	5	/* 5 secs */
72c21e0bbfSMatthew R. Ochs 
73c21e0bbfSMatthew R. Ochs /* AFU command room retry limit */
74c21e0bbfSMatthew R. Ochs #define MC_ROOM_RETRY_CNT	10
75c21e0bbfSMatthew R. Ochs 
76c21e0bbfSMatthew R. Ochs /* FC CRC clear periodic timer */
77c21e0bbfSMatthew R. Ochs #define MC_CRC_THRESH 100	/* threshold in 5 mins */
78c21e0bbfSMatthew R. Ochs 
79c21e0bbfSMatthew R. Ochs #define FC_PORT_STATUS_RETRY_CNT 100	/* 100 100ms retries = 10 seconds */
80c21e0bbfSMatthew R. Ochs #define FC_PORT_STATUS_RETRY_INTERVAL_US 100000	/* microseconds */
81c21e0bbfSMatthew R. Ochs 
82c21e0bbfSMatthew R. Ochs /* VPD defines */
83c21e0bbfSMatthew R. Ochs #define CXLFLASH_VPD_LEN	256
84c21e0bbfSMatthew R. Ochs #define WWPN_LEN	16
85c21e0bbfSMatthew R. Ochs #define WWPN_BUF_LEN	(WWPN_LEN + 1)
86c21e0bbfSMatthew R. Ochs 
87c21e0bbfSMatthew R. Ochs enum undo_level {
889526f360SManoj N. Kumar 	UNDO_NOOP = 0,
89c21e0bbfSMatthew R. Ochs 	FREE_IRQ,
90c21e0bbfSMatthew R. Ochs 	UNMAP_ONE,
91c21e0bbfSMatthew R. Ochs 	UNMAP_TWO,
929526f360SManoj N. Kumar 	UNMAP_THREE
93c21e0bbfSMatthew R. Ochs };
94c21e0bbfSMatthew R. Ochs 
95c21e0bbfSMatthew R. Ochs struct dev_dependent_vals {
96c21e0bbfSMatthew R. Ochs 	u64 max_sectors;
9796e1b660SUma Krishnan 	u64 flags;
98704c4b0dSUma Krishnan #define CXLFLASH_NOTIFY_SHUTDOWN   0x0000000000000001ULL
99c21e0bbfSMatthew R. Ochs };
100c21e0bbfSMatthew R. Ochs 
101c21e0bbfSMatthew R. Ochs struct asyc_intr_info {
102c21e0bbfSMatthew R. Ochs 	u64 status;
103c21e0bbfSMatthew R. Ochs 	char *desc;
104c21e0bbfSMatthew R. Ochs 	u8 port;
105c21e0bbfSMatthew R. Ochs 	u8 action;
106c21e0bbfSMatthew R. Ochs #define CLR_FC_ERROR	0x01
107c21e0bbfSMatthew R. Ochs #define LINK_RESET	0x02
108ef51074aSMatthew R. Ochs #define SCAN_HOST	0x04
109c21e0bbfSMatthew R. Ochs };
110c21e0bbfSMatthew R. Ochs 
111c21e0bbfSMatthew R. Ochs #endif /* _CXLFLASH_MAIN_H */
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