1 /* 2 * CXL Flash Device Driver 3 * 4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation 5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation 6 * 7 * Copyright (C) 2015 IBM Corporation 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 12 * 2 of the License, or (at your option) any later version. 13 */ 14 15 #ifndef _CXLFLASH_COMMON_H 16 #define _CXLFLASH_COMMON_H 17 18 #include <linux/irq_poll.h> 19 #include <linux/list.h> 20 #include <linux/rwsem.h> 21 #include <linux/types.h> 22 #include <scsi/scsi.h> 23 #include <scsi/scsi_cmnd.h> 24 #include <scsi/scsi_device.h> 25 26 extern const struct file_operations cxlflash_cxl_fops; 27 28 #define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */ 29 #define MAX_FC_PORTS CXLFLASH_MAX_FC_PORTS /* max ports per AFU */ 30 #define LEGACY_FC_PORTS 2 /* legacy ports per AFU */ 31 32 #define CHAN2PORTBANK(_x) ((_x) >> ilog2(CXLFLASH_NUM_FC_PORTS_PER_BANK)) 33 #define CHAN2BANKPORT(_x) ((_x) & (CXLFLASH_NUM_FC_PORTS_PER_BANK - 1)) 34 35 #define CHAN2PORTMASK(_x) (1 << (_x)) /* channel to port mask */ 36 #define PORTMASK2CHAN(_x) (ilog2((_x))) /* port mask to channel */ 37 #define PORTNUM2CHAN(_x) ((_x) - 1) /* port number to channel */ 38 39 #define CXLFLASH_BLOCK_SIZE 4096 /* 4K blocks */ 40 #define CXLFLASH_MAX_XFER_SIZE 16777216 /* 16MB transfer */ 41 #define CXLFLASH_MAX_SECTORS (CXLFLASH_MAX_XFER_SIZE/512) /* SCSI wants 42 max_sectors 43 in units of 44 512 byte 45 sectors 46 */ 47 48 #define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry)) 49 50 /* AFU command retry limit */ 51 #define MC_RETRY_CNT 5 /* sufficient for SCSI check and 52 certain AFU errors */ 53 54 /* Command management definitions */ 55 #define CXLFLASH_MAX_CMDS 256 56 #define CXLFLASH_MAX_CMDS_PER_LUN CXLFLASH_MAX_CMDS 57 58 /* RRQ for master issued cmds */ 59 #define NUM_RRQ_ENTRY CXLFLASH_MAX_CMDS 60 61 /* SQ for master issued cmds */ 62 #define NUM_SQ_ENTRY CXLFLASH_MAX_CMDS 63 64 65 static inline void check_sizes(void) 66 { 67 BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_FC_PORTS_PER_BANK); 68 BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_MAX_CMDS); 69 } 70 71 /* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */ 72 #define CMD_BUFSIZE SIZE_4K 73 74 enum cxlflash_lr_state { 75 LINK_RESET_INVALID, 76 LINK_RESET_REQUIRED, 77 LINK_RESET_COMPLETE 78 }; 79 80 enum cxlflash_init_state { 81 INIT_STATE_NONE, 82 INIT_STATE_PCI, 83 INIT_STATE_AFU, 84 INIT_STATE_SCSI 85 }; 86 87 enum cxlflash_state { 88 STATE_PROBING, /* Initial state during probe */ 89 STATE_PROBED, /* Temporary state, probe completed but EEH occurred */ 90 STATE_NORMAL, /* Normal running state, everything good */ 91 STATE_RESET, /* Reset state, trying to reset/recover */ 92 STATE_FAILTERM /* Failed/terminating state, error out users/threads */ 93 }; 94 95 /* 96 * Each context has its own set of resource handles that is visible 97 * only from that context. 98 */ 99 100 struct cxlflash_cfg { 101 struct afu *afu; 102 struct cxl_context *mcctx; 103 104 struct pci_dev *dev; 105 struct pci_device_id *dev_id; 106 struct Scsi_Host *host; 107 int num_fc_ports; 108 109 ulong cxlflash_regs_pci; 110 111 struct work_struct work_q; 112 enum cxlflash_init_state init_state; 113 enum cxlflash_lr_state lr_state; 114 int lr_port; 115 atomic_t scan_host_needed; 116 117 struct cxl_afu *cxl_afu; 118 119 atomic_t recovery_threads; 120 struct mutex ctx_recovery_mutex; 121 struct mutex ctx_tbl_list_mutex; 122 struct rw_semaphore ioctl_rwsem; 123 struct ctx_info *ctx_tbl[MAX_CONTEXT]; 124 struct list_head ctx_err_recovery; /* contexts w/ recovery pending */ 125 struct file_operations cxl_fops; 126 127 /* Parameters that are LUN table related */ 128 int last_lun_index[MAX_FC_PORTS]; 129 int promote_lun_index; 130 struct list_head lluns; /* list of llun_info structs */ 131 132 wait_queue_head_t tmf_waitq; 133 spinlock_t tmf_slock; 134 bool tmf_active; 135 wait_queue_head_t reset_waitq; 136 enum cxlflash_state state; 137 }; 138 139 struct afu_cmd { 140 struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */ 141 struct sisl_ioasa sa; /* IOASA must follow IOARCB */ 142 struct afu *parent; 143 struct scsi_cmnd *scp; 144 struct completion cevent; 145 struct list_head queue; 146 147 u8 cmd_tmf:1; 148 149 /* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned. 150 * However for performance reasons the IOARCB/IOASA should be 151 * cache line aligned. 152 */ 153 } __aligned(cache_line_size()); 154 155 static inline struct afu_cmd *sc_to_afuc(struct scsi_cmnd *sc) 156 { 157 return PTR_ALIGN(scsi_cmd_priv(sc), __alignof__(struct afu_cmd)); 158 } 159 160 static inline struct afu_cmd *sc_to_afucz(struct scsi_cmnd *sc) 161 { 162 struct afu_cmd *afuc = sc_to_afuc(sc); 163 164 memset(afuc, 0, sizeof(*afuc)); 165 return afuc; 166 } 167 168 struct afu { 169 /* Stuff requiring alignment go first. */ 170 struct sisl_ioarcb sq[NUM_SQ_ENTRY]; /* 16K SQ */ 171 u64 rrq_entry[NUM_RRQ_ENTRY]; /* 2K RRQ */ 172 173 /* Beware of alignment till here. Preferably introduce new 174 * fields after this point 175 */ 176 177 int (*send_cmd)(struct afu *, struct afu_cmd *); 178 void (*context_reset)(struct afu_cmd *); 179 180 /* AFU HW */ 181 struct cxl_ioctl_start_work work; 182 struct cxlflash_afu_map __iomem *afu_map; /* entire MMIO map */ 183 struct sisl_host_map __iomem *host_map; /* MC host map */ 184 struct sisl_ctrl_map __iomem *ctrl_map; /* MC control map */ 185 186 ctx_hndl_t ctx_hndl; /* master's context handle */ 187 188 atomic_t hsq_credits; 189 spinlock_t hsq_slock; 190 struct sisl_ioarcb *hsq_start; 191 struct sisl_ioarcb *hsq_end; 192 struct sisl_ioarcb *hsq_curr; 193 spinlock_t hrrq_slock; 194 u64 *hrrq_start; 195 u64 *hrrq_end; 196 u64 *hrrq_curr; 197 bool toggle; 198 atomic_t cmds_active; /* Number of currently active AFU commands */ 199 s64 room; 200 spinlock_t rrin_slock; /* Lock to rrin queuing and cmd_room updates */ 201 u64 hb; 202 u32 internal_lun; /* User-desired LUN mode for this AFU */ 203 204 char version[16]; 205 u64 interface_version; 206 207 u32 irqpoll_weight; 208 struct irq_poll irqpoll; 209 struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */ 210 211 }; 212 213 static inline bool afu_is_irqpoll_enabled(struct afu *afu) 214 { 215 return !!afu->irqpoll_weight; 216 } 217 218 static inline bool afu_is_cmd_mode(struct afu *afu, u64 cmd_mode) 219 { 220 u64 afu_cap = afu->interface_version >> SISL_INTVER_CAP_SHIFT; 221 222 return afu_cap & cmd_mode; 223 } 224 225 static inline bool afu_is_sq_cmd_mode(struct afu *afu) 226 { 227 return afu_is_cmd_mode(afu, SISL_INTVER_CAP_SQ_CMD_MODE); 228 } 229 230 static inline bool afu_is_ioarrin_cmd_mode(struct afu *afu) 231 { 232 return afu_is_cmd_mode(afu, SISL_INTVER_CAP_IOARRIN_CMD_MODE); 233 } 234 235 static inline u64 lun_to_lunid(u64 lun) 236 { 237 __be64 lun_id; 238 239 int_to_scsilun(lun, (struct scsi_lun *)&lun_id); 240 return be64_to_cpu(lun_id); 241 } 242 243 static inline struct fc_port_bank __iomem *get_fc_port_bank( 244 struct cxlflash_cfg *cfg, int i) 245 { 246 struct afu *afu = cfg->afu; 247 248 return &afu->afu_map->global.bank[CHAN2PORTBANK(i)]; 249 } 250 251 static inline __be64 __iomem *get_fc_port_regs(struct cxlflash_cfg *cfg, int i) 252 { 253 struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i); 254 255 return &fcpb->fc_port_regs[CHAN2BANKPORT(i)][0]; 256 } 257 258 static inline __be64 __iomem *get_fc_port_luns(struct cxlflash_cfg *cfg, int i) 259 { 260 struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i); 261 262 return &fcpb->fc_port_luns[CHAN2BANKPORT(i)][0]; 263 } 264 265 int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8); 266 void cxlflash_list_init(void); 267 void cxlflash_term_global_luns(void); 268 void cxlflash_free_errpage(void); 269 int cxlflash_ioctl(struct scsi_device *, int, void __user *); 270 void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *); 271 int cxlflash_mark_contexts_error(struct cxlflash_cfg *); 272 void cxlflash_term_local_luns(struct cxlflash_cfg *); 273 void cxlflash_restore_luntable(struct cxlflash_cfg *); 274 275 #endif /* ifndef _CXLFLASH_COMMON_H */ 276