xref: /linux/drivers/scsi/bfa/bfa.h (revision cdd30ebb1b9f36159d66f088b61aee264e649d7a)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4  * Copyright (c) 2014- QLogic Corporation.
5  * All rights reserved
6  * www.qlogic.com
7  *
8  * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
9  */
10 #ifndef __BFA_H__
11 #define __BFA_H__
12 
13 #include "bfad_drv.h"
14 #include "bfa_cs.h"
15 #include "bfa_plog.h"
16 #include "bfa_defs_svc.h"
17 #include "bfi.h"
18 #include "bfa_ioc.h"
19 
20 struct bfa_s;
21 
22 typedef void (*bfa_isr_func_t) (struct bfa_s *bfa, struct bfi_msg_s *m);
23 
24 /*
25  * Interrupt message handlers
26  */
27 void bfa_isr_unhandled(struct bfa_s *bfa, struct bfi_msg_s *m);
28 
29 /*
30  * Request and response queue related defines
31  */
32 #define BFA_REQQ_NELEMS_MIN	(4)
33 #define BFA_RSPQ_NELEMS_MIN	(4)
34 
35 #define bfa_reqq_pi(__bfa, __reqq)	((__bfa)->iocfc.req_cq_pi[__reqq])
36 #define bfa_reqq_ci(__bfa, __reqq)					\
37 	(*(u32 *)((__bfa)->iocfc.req_cq_shadow_ci[__reqq].kva))
38 
39 #define bfa_reqq_full(__bfa, __reqq)				\
40 	(((bfa_reqq_pi(__bfa, __reqq) + 1) &			\
41 	  ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) ==	\
42 	 bfa_reqq_ci(__bfa, __reqq))
43 
44 #define bfa_reqq_next(__bfa, __reqq)					\
45 	(bfa_reqq_full(__bfa, __reqq) ? NULL :				\
46 	 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \
47 		   + bfa_reqq_pi((__bfa), (__reqq)))))
48 
49 #define bfa_reqq_produce(__bfa, __reqq, __mh)  do {			\
50 		(__mh).mtag.h2i.qid     = (__bfa)->iocfc.hw_qid[__reqq];\
51 		(__bfa)->iocfc.req_cq_pi[__reqq]++;			\
52 		(__bfa)->iocfc.req_cq_pi[__reqq] &=			\
53 			((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \
54 		writel((__bfa)->iocfc.req_cq_pi[__reqq],		\
55 			(__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]);	\
56 		} while (0)
57 
58 #define bfa_rspq_pi(__bfa, __rspq)					\
59 	(*(u32 *)((__bfa)->iocfc.rsp_cq_shadow_pi[__rspq].kva))
60 
61 #define bfa_rspq_ci(__bfa, __rspq)	((__bfa)->iocfc.rsp_cq_ci[__rspq])
62 #define bfa_rspq_elem(__bfa, __rspq, __ci)				\
63 	(&((struct bfi_msg_s *)((__bfa)->iocfc.rsp_cq_ba[__rspq].kva))[__ci])
64 
65 #define CQ_INCR(__index, __size) do {			\
66 	(__index)++;					\
67 	(__index) &= ((__size) - 1);			\
68 } while (0)
69 
70 /*
71  * Circular queue usage assignments
72  */
73 enum {
74 	BFA_REQQ_IOC	= 0,	/*  all low-priority IOC msgs	*/
75 	BFA_REQQ_FCXP	= 0,	/*  all FCXP messages		*/
76 	BFA_REQQ_LPS	= 0,	/*  all lport service msgs	*/
77 	BFA_REQQ_PORT	= 0,	/*  all port messages		*/
78 	BFA_REQQ_FLASH	= 0,	/*  for flash module		*/
79 	BFA_REQQ_DIAG	= 0,	/*  for diag module		*/
80 	BFA_REQQ_RPORT	= 0,	/*  all port messages		*/
81 	BFA_REQQ_SBOOT	= 0,	/*  all san boot messages	*/
82 	BFA_REQQ_QOS_LO	= 1,	/*  all low priority IO	*/
83 	BFA_REQQ_QOS_MD	= 2,	/*  all medium priority IO	*/
84 	BFA_REQQ_QOS_HI	= 3,	/*  all high priority IO	*/
85 };
86 
87 static inline void
88 bfa_reqq_winit(struct bfa_reqq_wait_s *wqe, void (*qresume) (void *cbarg),
89 	       void *cbarg)
90 {
91 	wqe->qresume = qresume;
92 	wqe->cbarg = cbarg;
93 }
94 
95 #define bfa_reqq(__bfa, __reqq)	(&(__bfa)->reqq_waitq[__reqq])
96 
97 /*
98  * static inline void
99  * bfa_reqq_wait(struct bfa_s *bfa, int reqq, struct bfa_reqq_wait_s *wqe)
100  */
101 #define bfa_reqq_wait(__bfa, __reqq, __wqe) do {			\
102 									\
103 		struct list_head *waitq = bfa_reqq(__bfa, __reqq);      \
104 									\
105 		WARN_ON(((__reqq) >= BFI_IOC_MAX_CQS));			\
106 		WARN_ON(!((__wqe)->qresume && (__wqe)->cbarg));		\
107 									\
108 		list_add_tail(&(__wqe)->qe, waitq);      \
109 	} while (0)
110 
111 #define bfa_reqq_wcancel(__wqe)	list_del(&(__wqe)->qe)
112 
113 #define bfa_cb_queue(__bfa, __hcb_qe, __cbfn, __cbarg) do {	\
114 		(__hcb_qe)->cbfn  = (__cbfn);      \
115 		(__hcb_qe)->cbarg = (__cbarg);      \
116 		(__hcb_qe)->pre_rmv = BFA_FALSE;		\
117 		list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);      \
118 	} while (0)
119 
120 #define bfa_cb_dequeue(__hcb_qe)	list_del(&(__hcb_qe)->qe)
121 
122 #define bfa_cb_queue_once(__bfa, __hcb_qe, __cbfn, __cbarg) do {	\
123 		(__hcb_qe)->cbfn  = (__cbfn);      \
124 		(__hcb_qe)->cbarg = (__cbarg);      \
125 		if (!(__hcb_qe)->once) {      \
126 			list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);      \
127 			(__hcb_qe)->once = BFA_TRUE;			\
128 		}							\
129 	} while (0)
130 
131 #define bfa_cb_queue_status(__bfa, __hcb_qe, __status) do {		\
132 		(__hcb_qe)->fw_status = (__status);			\
133 		list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);	\
134 } while (0)
135 
136 #define bfa_cb_queue_done(__hcb_qe) do {	\
137 		(__hcb_qe)->once = BFA_FALSE;	\
138 	} while (0)
139 
140 
141 extern char     bfa_version[];
142 
143 struct bfa_iocfc_regs_s {
144 	void __iomem	*intr_status;
145 	void __iomem	*intr_mask;
146 	void __iomem	*cpe_q_pi[BFI_IOC_MAX_CQS];
147 	void __iomem	*cpe_q_ci[BFI_IOC_MAX_CQS];
148 	void __iomem	*cpe_q_ctrl[BFI_IOC_MAX_CQS];
149 	void __iomem	*rme_q_ci[BFI_IOC_MAX_CQS];
150 	void __iomem	*rme_q_pi[BFI_IOC_MAX_CQS];
151 	void __iomem	*rme_q_ctrl[BFI_IOC_MAX_CQS];
152 };
153 
154 /*
155  * MSIX vector handlers
156  */
157 #define BFA_MSIX_MAX_VECTORS	22
158 typedef void (*bfa_msix_handler_t)(struct bfa_s *bfa, int vec);
159 struct bfa_msix_s {
160 	int	nvecs;
161 	bfa_msix_handler_t handler[BFA_MSIX_MAX_VECTORS];
162 };
163 
164 /*
165  * Chip specific interfaces
166  */
167 struct bfa_hwif_s {
168 	void (*hw_reginit)(struct bfa_s *bfa);
169 	void (*hw_reqq_ack)(struct bfa_s *bfa, int reqq);
170 	void (*hw_rspq_ack)(struct bfa_s *bfa, int rspq, u32 ci);
171 	void (*hw_msix_init)(struct bfa_s *bfa, int nvecs);
172 	void (*hw_msix_ctrl_install)(struct bfa_s *bfa);
173 	void (*hw_msix_queue_install)(struct bfa_s *bfa);
174 	void (*hw_msix_uninstall)(struct bfa_s *bfa);
175 	void (*hw_isr_mode_set)(struct bfa_s *bfa, bfa_boolean_t msix);
176 	void (*hw_msix_getvecs)(struct bfa_s *bfa, u32 *vecmap,
177 				u32 *nvecs, u32 *maxvec);
178 	void (*hw_msix_get_rme_range) (struct bfa_s *bfa, u32 *start,
179 				       u32 *end);
180 	int	cpe_vec_q0;
181 	int	rme_vec_q0;
182 };
183 typedef void (*bfa_cb_iocfc_t) (void *cbarg, enum bfa_status status);
184 
185 struct bfa_faa_cbfn_s {
186 	bfa_cb_iocfc_t	faa_cbfn;
187 	void		*faa_cbarg;
188 };
189 
190 #define BFA_FAA_ENABLED		1
191 #define BFA_FAA_DISABLED	2
192 
193 /*
194  *	FAA attributes
195  */
196 struct bfa_faa_attr_s {
197 	wwn_t	faa;
198 	u8	faa_state;
199 	u8	pwwn_source;
200 	u8	rsvd[6];
201 };
202 
203 struct bfa_faa_args_s {
204 	struct bfa_faa_attr_s	*faa_attr;
205 	struct bfa_faa_cbfn_s	faa_cb;
206 	u8			faa_state;
207 	bfa_boolean_t		busy;
208 };
209 
210 /*
211  * IOCFC state machine definitions/declarations
212  */
213 enum iocfc_event {
214 	IOCFC_E_INIT		= 1,	/* IOCFC init request		*/
215 	IOCFC_E_START		= 2,	/* IOCFC mod start request	*/
216 	IOCFC_E_STOP		= 3,	/* IOCFC stop request		*/
217 	IOCFC_E_ENABLE		= 4,	/* IOCFC enable request		*/
218 	IOCFC_E_DISABLE		= 5,	/* IOCFC disable request	*/
219 	IOCFC_E_IOC_ENABLED	= 6,	/* IOC enabled message		*/
220 	IOCFC_E_IOC_DISABLED	= 7,	/* IOC disabled message		*/
221 	IOCFC_E_IOC_FAILED	= 8,	/* failure notice by IOC sm	*/
222 	IOCFC_E_DCONF_DONE	= 9,	/* dconf read/write done	*/
223 	IOCFC_E_CFG_DONE	= 10,	/* IOCFC config complete	*/
224 };
225 
226 struct bfa_iocfc_s;
227 typedef void (*bfa_iocfs_fsm_t)(struct bfa_iocfc_s *, enum iocfc_event);
228 
229 struct bfa_iocfc_s {
230 	bfa_iocfs_fsm_t		fsm;
231 	struct bfa_s		*bfa;
232 	struct bfa_iocfc_cfg_s	cfg;
233 	u32		req_cq_pi[BFI_IOC_MAX_CQS];
234 	u32		rsp_cq_ci[BFI_IOC_MAX_CQS];
235 	u8		hw_qid[BFI_IOC_MAX_CQS];
236 	struct bfa_cb_qe_s	init_hcb_qe;
237 	struct bfa_cb_qe_s	stop_hcb_qe;
238 	struct bfa_cb_qe_s	dis_hcb_qe;
239 	struct bfa_cb_qe_s	en_hcb_qe;
240 	struct bfa_cb_qe_s	stats_hcb_qe;
241 	bfa_boolean_t		submod_enabled;
242 	bfa_boolean_t		cb_reqd;	/* Driver call back reqd */
243 	bfa_status_t		op_status;	/* Status of bfa iocfc op */
244 
245 	struct bfa_dma_s	cfg_info;
246 	struct bfi_iocfc_cfg_s *cfginfo;
247 	struct bfa_dma_s	cfgrsp_dma;
248 	struct bfi_iocfc_cfgrsp_s *cfgrsp;
249 	struct bfa_dma_s	req_cq_ba[BFI_IOC_MAX_CQS];
250 	struct bfa_dma_s	req_cq_shadow_ci[BFI_IOC_MAX_CQS];
251 	struct bfa_dma_s	rsp_cq_ba[BFI_IOC_MAX_CQS];
252 	struct bfa_dma_s	rsp_cq_shadow_pi[BFI_IOC_MAX_CQS];
253 	struct bfa_iocfc_regs_s	bfa_regs;	/*  BFA device registers */
254 	struct bfa_hwif_s	hwif;
255 	bfa_cb_iocfc_t		updateq_cbfn; /*  bios callback function */
256 	void			*updateq_cbarg;	/*  bios callback arg */
257 	u32	intr_mask;
258 	struct bfa_faa_args_s	faa_args;
259 	struct bfa_mem_dma_s	ioc_dma;
260 	struct bfa_mem_dma_s	iocfc_dma;
261 	struct bfa_mem_dma_s	reqq_dma[BFI_IOC_MAX_CQS];
262 	struct bfa_mem_dma_s	rspq_dma[BFI_IOC_MAX_CQS];
263 	struct bfa_mem_kva_s	kva_seg;
264 };
265 
266 #define BFA_MEM_IOC_DMA(_bfa)		(&((_bfa)->iocfc.ioc_dma))
267 #define BFA_MEM_IOCFC_DMA(_bfa)		(&((_bfa)->iocfc.iocfc_dma))
268 #define BFA_MEM_REQQ_DMA(_bfa, _qno)	(&((_bfa)->iocfc.reqq_dma[(_qno)]))
269 #define BFA_MEM_RSPQ_DMA(_bfa, _qno)	(&((_bfa)->iocfc.rspq_dma[(_qno)]))
270 #define BFA_MEM_IOCFC_KVA(_bfa)		(&((_bfa)->iocfc.kva_seg))
271 
272 #define bfa_fn_lpu(__bfa)	\
273 	bfi_fn_lpu(bfa_ioc_pcifn(&(__bfa)->ioc), bfa_ioc_portid(&(__bfa)->ioc))
274 #define bfa_msix_init(__bfa, __nvecs)					\
275 	((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs))
276 #define bfa_msix_ctrl_install(__bfa)					\
277 	((__bfa)->iocfc.hwif.hw_msix_ctrl_install(__bfa))
278 #define bfa_msix_queue_install(__bfa)					\
279 	((__bfa)->iocfc.hwif.hw_msix_queue_install(__bfa))
280 #define bfa_msix_uninstall(__bfa)					\
281 	((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa))
282 #define bfa_isr_rspq_ack(__bfa, __queue, __ci)				\
283 	((__bfa)->iocfc.hwif.hw_rspq_ack(__bfa, __queue, __ci))
284 #define bfa_isr_reqq_ack(__bfa, __queue) do {				\
285 	if ((__bfa)->iocfc.hwif.hw_reqq_ack)				\
286 		(__bfa)->iocfc.hwif.hw_reqq_ack(__bfa, __queue);	\
287 } while (0)
288 #define bfa_isr_mode_set(__bfa, __msix) do {				\
289 	if ((__bfa)->iocfc.hwif.hw_isr_mode_set)			\
290 		(__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix);	\
291 } while (0)
292 #define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec)		\
293 	((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap,		\
294 					__nvecs, __maxvec))
295 #define bfa_msix_get_rme_range(__bfa, __start, __end)			\
296 	((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end))
297 #define bfa_msix(__bfa, __vec)						\
298 	((__bfa)->msix.handler[__vec](__bfa, __vec))
299 
300 /*
301  * FC specific IOC functions.
302  */
303 void bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg,
304 			struct bfa_meminfo_s *meminfo,
305 			struct bfa_s *bfa);
306 void bfa_iocfc_attach(struct bfa_s *bfa, void *bfad,
307 		      struct bfa_iocfc_cfg_s *cfg,
308 		      struct bfa_pcidev_s *pcidev);
309 void bfa_iocfc_init(struct bfa_s *bfa);
310 void bfa_iocfc_start(struct bfa_s *bfa);
311 void bfa_iocfc_stop(struct bfa_s *bfa);
312 void bfa_iocfc_isr(void *bfa, struct bfi_mbmsg_s *msg);
313 void bfa_iocfc_set_snsbase(struct bfa_s *bfa, int seg_no, u64 snsbase_pa);
314 bfa_boolean_t bfa_iocfc_is_operational(struct bfa_s *bfa);
315 void bfa_iocfc_reset_queues(struct bfa_s *bfa);
316 
317 void bfa_msix_all(struct bfa_s *bfa, int vec);
318 void bfa_msix_reqq(struct bfa_s *bfa, int vec);
319 void bfa_msix_rspq(struct bfa_s *bfa, int vec);
320 void bfa_msix_lpu_err(struct bfa_s *bfa, int vec);
321 
322 void bfa_hwcb_reginit(struct bfa_s *bfa);
323 void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
324 void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs);
325 void bfa_hwcb_msix_ctrl_install(struct bfa_s *bfa);
326 void bfa_hwcb_msix_queue_install(struct bfa_s *bfa);
327 void bfa_hwcb_msix_uninstall(struct bfa_s *bfa);
328 void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
329 void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,
330 			   u32 *maxvec);
331 void bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start,
332 				 u32 *end);
333 void bfa_hwct_reginit(struct bfa_s *bfa);
334 void bfa_hwct2_reginit(struct bfa_s *bfa);
335 void bfa_hwct_reqq_ack(struct bfa_s *bfa, int rspq);
336 void bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
337 void bfa_hwct2_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
338 void bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs);
339 void bfa_hwct_msix_ctrl_install(struct bfa_s *bfa);
340 void bfa_hwct_msix_queue_install(struct bfa_s *bfa);
341 void bfa_hwct_msix_uninstall(struct bfa_s *bfa);
342 void bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
343 void bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,
344 			   u32 *maxvec);
345 void bfa_hwct_msix_get_rme_range(struct bfa_s *bfa, u32 *start,
346 				 u32 *end);
347 void bfa_iocfc_get_bootwwns(struct bfa_s *bfa, u8 *nwwns, wwn_t *wwns);
348 int bfa_iocfc_get_pbc_vports(struct bfa_s *bfa,
349 				struct bfi_pbc_vport_s *pbc_vport);
350 
351 
352 /*
353  *----------------------------------------------------------------------
354  *		BFA public interfaces
355  *----------------------------------------------------------------------
356  */
357 #define bfa_stats(_mod, _stats)	((_mod)->stats._stats++)
358 #define bfa_ioc_get_stats(__bfa, __ioc_stats)		\
359 	bfa_ioc_fetch_stats(&(__bfa)->ioc, __ioc_stats)
360 #define bfa_ioc_clear_stats(__bfa)		\
361 	bfa_ioc_clr_stats(&(__bfa)->ioc)
362 #define bfa_get_nports(__bfa)			\
363 	bfa_ioc_get_nports(&(__bfa)->ioc)
364 #define bfa_get_adapter_manufacturer(__bfa, __manufacturer)		\
365 	bfa_ioc_get_adapter_manufacturer(&(__bfa)->ioc, __manufacturer)
366 #define bfa_get_adapter_model(__bfa, __model)			\
367 	bfa_ioc_get_adapter_model(&(__bfa)->ioc, __model)
368 #define bfa_get_adapter_serial_num(__bfa, __serial_num)			\
369 	bfa_ioc_get_adapter_serial_num(&(__bfa)->ioc, __serial_num)
370 #define bfa_get_adapter_fw_ver(__bfa, __fw_ver)			\
371 	bfa_ioc_get_adapter_fw_ver(&(__bfa)->ioc, __fw_ver)
372 #define bfa_get_adapter_optrom_ver(__bfa, __optrom_ver)			\
373 	bfa_ioc_get_adapter_optrom_ver(&(__bfa)->ioc, __optrom_ver)
374 #define bfa_get_pci_chip_rev(__bfa, __chip_rev)			\
375 	bfa_ioc_get_pci_chip_rev(&(__bfa)->ioc, __chip_rev)
376 #define bfa_get_ioc_state(__bfa)		\
377 	bfa_ioc_get_state(&(__bfa)->ioc)
378 #define bfa_get_type(__bfa)			\
379 	bfa_ioc_get_type(&(__bfa)->ioc)
380 #define bfa_get_mac(__bfa)			\
381 	bfa_ioc_get_mac(&(__bfa)->ioc)
382 #define bfa_get_mfg_mac(__bfa)			\
383 	bfa_ioc_get_mfg_mac(&(__bfa)->ioc)
384 #define bfa_get_fw_clock_res(__bfa)		\
385 	((__bfa)->iocfc.cfgrsp->fwcfg.fw_tick_res)
386 
387 /*
388  * lun mask macros return NULL when min cfg is enabled and there is
389  * no memory allocated for lunmask.
390  */
391 #define bfa_get_lun_mask(__bfa)					\
392 	((&(__bfa)->modules.dconf_mod)->min_cfg) ? NULL :	\
393 	 (&(BFA_DCONF_MOD(__bfa)->dconf->lun_mask))
394 
395 #define bfa_get_lun_mask_list(_bfa)				\
396 	((&(_bfa)->modules.dconf_mod)->min_cfg) ? NULL :	\
397 	 (bfa_get_lun_mask(_bfa)->lun_list)
398 
399 #define bfa_get_lun_mask_status(_bfa)				\
400 	(((&(_bfa)->modules.dconf_mod)->min_cfg)		\
401 	 ? BFA_LUNMASK_MINCFG : ((bfa_get_lun_mask(_bfa))->status))
402 
403 void bfa_cfg_get_default(struct bfa_iocfc_cfg_s *cfg);
404 void bfa_cfg_get_meminfo(struct bfa_iocfc_cfg_s *cfg,
405 			struct bfa_meminfo_s *meminfo,
406 			struct bfa_s *bfa);
407 void bfa_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg,
408 		struct bfa_meminfo_s *meminfo,
409 		struct bfa_pcidev_s *pcidev);
410 void bfa_detach(struct bfa_s *bfa);
411 void bfa_cb_init(void *bfad, bfa_status_t status);
412 void bfa_cb_updateq(void *bfad, bfa_status_t status);
413 
414 bfa_boolean_t bfa_intx(struct bfa_s *bfa);
415 void bfa_isr_enable(struct bfa_s *bfa);
416 void bfa_isr_disable(struct bfa_s *bfa);
417 
418 void bfa_comp_deq(struct bfa_s *bfa, struct list_head *comp_q);
419 void bfa_comp_process(struct bfa_s *bfa, struct list_head *comp_q);
420 void bfa_comp_free(struct bfa_s *bfa, struct list_head *comp_q);
421 
422 typedef void (*bfa_cb_ioc_t) (void *cbarg, enum bfa_status status);
423 void bfa_iocfc_get_attr(struct bfa_s *bfa, struct bfa_iocfc_attr_s *attr);
424 
425 
426 bfa_status_t bfa_iocfc_israttr_set(struct bfa_s *bfa,
427 				   struct bfa_iocfc_intr_attr_s *attr);
428 
429 void bfa_iocfc_enable(struct bfa_s *bfa);
430 void bfa_iocfc_disable(struct bfa_s *bfa);
431 #define bfa_timer_start(_bfa, _timer, _timercb, _arg, _timeout)		\
432 	bfa_timer_begin(&(_bfa)->timer_mod, _timer, _timercb, _arg, _timeout)
433 
434 struct bfa_cb_pending_q_s {
435 	struct bfa_cb_qe_s	hcb_qe;
436 	void			*data;  /* Driver buffer */
437 };
438 
439 /* Common macros to operate on pending stats/attr apis */
440 #define bfa_pending_q_init(__qe, __cbfn, __cbarg, __data) do {	\
441 	bfa_q_qe_init(&((__qe)->hcb_qe.qe));			\
442 	(__qe)->hcb_qe.cbfn = (__cbfn);				\
443 	(__qe)->hcb_qe.cbarg = (__cbarg);			\
444 	(__qe)->hcb_qe.pre_rmv = BFA_TRUE;			\
445 	(__qe)->data = (__data);				\
446 } while (0)
447 
448 #define bfa_pending_q_init_status(__qe, __cbfn, __cbarg, __data) do {	\
449 	bfa_q_qe_init(&((__qe)->hcb_qe.qe));			\
450 	(__qe)->hcb_qe.cbfn_status = (__cbfn);			\
451 	(__qe)->hcb_qe.cbarg = (__cbarg);			\
452 	(__qe)->hcb_qe.pre_rmv = BFA_TRUE;			\
453 	(__qe)->data = (__data);				\
454 } while (0)
455 
456 #endif /* __BFA_H__ */
457