1 /* 2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 3 * All rights reserved 4 * www.brocade.com 5 * 6 * Linux driver for Brocade Fibre Channel Host Bus Adapter. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License (GPL) Version 2 as 10 * published by the Free Software Foundation 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 */ 17 #ifndef __BFA_H__ 18 #define __BFA_H__ 19 20 #include "bfa_os_inc.h" 21 #include "bfa_cs.h" 22 #include "bfa_plog.h" 23 #include "bfa_defs_svc.h" 24 #include "bfi.h" 25 #include "bfa_ioc.h" 26 27 struct bfa_s; 28 29 typedef void (*bfa_isr_func_t) (struct bfa_s *bfa, struct bfi_msg_s *m); 30 typedef void (*bfa_cb_cbfn_t) (void *cbarg, bfa_boolean_t complete); 31 32 /** 33 * Interrupt message handlers 34 */ 35 void bfa_isr_unhandled(struct bfa_s *bfa, struct bfi_msg_s *m); 36 void bfa_isr_bind(enum bfi_mclass mc, bfa_isr_func_t isr_func); 37 38 /** 39 * Request and response queue related defines 40 */ 41 #define BFA_REQQ_NELEMS_MIN (4) 42 #define BFA_RSPQ_NELEMS_MIN (4) 43 44 #define bfa_reqq_pi(__bfa, __reqq) ((__bfa)->iocfc.req_cq_pi[__reqq]) 45 #define bfa_reqq_ci(__bfa, __reqq) \ 46 (*(u32 *)((__bfa)->iocfc.req_cq_shadow_ci[__reqq].kva)) 47 48 #define bfa_reqq_full(__bfa, __reqq) \ 49 (((bfa_reqq_pi(__bfa, __reqq) + 1) & \ 50 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) == \ 51 bfa_reqq_ci(__bfa, __reqq)) 52 53 #define bfa_reqq_next(__bfa, __reqq) \ 54 (bfa_reqq_full(__bfa, __reqq) ? NULL : \ 55 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \ 56 + bfa_reqq_pi((__bfa), (__reqq))))) 57 58 #define bfa_reqq_produce(__bfa, __reqq) do { \ 59 (__bfa)->iocfc.req_cq_pi[__reqq]++; \ 60 (__bfa)->iocfc.req_cq_pi[__reqq] &= \ 61 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \ 62 bfa_reg_write((__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq], \ 63 (__bfa)->iocfc.req_cq_pi[__reqq]); \ 64 mmiowb(); \ 65 } while (0) 66 67 #define bfa_rspq_pi(__bfa, __rspq) \ 68 (*(u32 *)((__bfa)->iocfc.rsp_cq_shadow_pi[__rspq].kva)) 69 70 #define bfa_rspq_ci(__bfa, __rspq) ((__bfa)->iocfc.rsp_cq_ci[__rspq]) 71 #define bfa_rspq_elem(__bfa, __rspq, __ci) \ 72 (&((struct bfi_msg_s *)((__bfa)->iocfc.rsp_cq_ba[__rspq].kva))[__ci]) 73 74 #define CQ_INCR(__index, __size) do { \ 75 (__index)++; \ 76 (__index) &= ((__size) - 1); \ 77 } while (0) 78 79 /** 80 * Queue element to wait for room in request queue. FIFO order is 81 * maintained when fullfilling requests. 82 */ 83 struct bfa_reqq_wait_s { 84 struct list_head qe; 85 void (*qresume) (void *cbarg); 86 void *cbarg; 87 }; 88 89 /** 90 * Circular queue usage assignments 91 */ 92 enum { 93 BFA_REQQ_IOC = 0, /* all low-priority IOC msgs */ 94 BFA_REQQ_FCXP = 0, /* all FCXP messages */ 95 BFA_REQQ_LPS = 0, /* all lport service msgs */ 96 BFA_REQQ_PORT = 0, /* all port messages */ 97 BFA_REQQ_FLASH = 0, /* for flash module */ 98 BFA_REQQ_DIAG = 0, /* for diag module */ 99 BFA_REQQ_RPORT = 0, /* all port messages */ 100 BFA_REQQ_SBOOT = 0, /* all san boot messages */ 101 BFA_REQQ_QOS_LO = 1, /* all low priority IO */ 102 BFA_REQQ_QOS_MD = 2, /* all medium priority IO */ 103 BFA_REQQ_QOS_HI = 3, /* all high priority IO */ 104 }; 105 106 static inline void 107 bfa_reqq_winit(struct bfa_reqq_wait_s *wqe, void (*qresume) (void *cbarg), 108 void *cbarg) 109 { 110 wqe->qresume = qresume; 111 wqe->cbarg = cbarg; 112 } 113 114 #define bfa_reqq(__bfa, __reqq) (&(__bfa)->reqq_waitq[__reqq]) 115 116 /** 117 * static inline void 118 * bfa_reqq_wait(struct bfa_s *bfa, int reqq, struct bfa_reqq_wait_s *wqe) 119 */ 120 #define bfa_reqq_wait(__bfa, __reqq, __wqe) do { \ 121 \ 122 struct list_head *waitq = bfa_reqq(__bfa, __reqq); \ 123 \ 124 bfa_assert(((__reqq) < BFI_IOC_MAX_CQS)); \ 125 bfa_assert((__wqe)->qresume && (__wqe)->cbarg); \ 126 \ 127 list_add_tail(&(__wqe)->qe, waitq); \ 128 } while (0) 129 130 #define bfa_reqq_wcancel(__wqe) list_del(&(__wqe)->qe) 131 132 133 /** 134 * Generic BFA callback element. 135 */ 136 struct bfa_cb_qe_s { 137 struct list_head qe; 138 bfa_cb_cbfn_t cbfn; 139 bfa_boolean_t once; 140 u32 rsvd; 141 void *cbarg; 142 }; 143 144 #define bfa_cb_queue(__bfa, __hcb_qe, __cbfn, __cbarg) do { \ 145 (__hcb_qe)->cbfn = (__cbfn); \ 146 (__hcb_qe)->cbarg = (__cbarg); \ 147 list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q); \ 148 } while (0) 149 150 #define bfa_cb_dequeue(__hcb_qe) list_del(&(__hcb_qe)->qe) 151 152 #define bfa_cb_queue_once(__bfa, __hcb_qe, __cbfn, __cbarg) do { \ 153 (__hcb_qe)->cbfn = (__cbfn); \ 154 (__hcb_qe)->cbarg = (__cbarg); \ 155 if (!(__hcb_qe)->once) { \ 156 list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q); \ 157 (__hcb_qe)->once = BFA_TRUE; \ 158 } \ 159 } while (0) 160 161 #define bfa_cb_queue_done(__hcb_qe) do { \ 162 (__hcb_qe)->once = BFA_FALSE; \ 163 } while (0) 164 165 166 /** 167 * PCI devices supported by the current BFA 168 */ 169 struct bfa_pciid_s { 170 u16 device_id; 171 u16 vendor_id; 172 }; 173 174 extern char bfa_version[]; 175 176 /** 177 * BFA memory resources 178 */ 179 enum bfa_mem_type { 180 BFA_MEM_TYPE_KVA = 1, /* Kernel Virtual Memory *(non-dma-able) */ 181 BFA_MEM_TYPE_DMA = 2, /* DMA-able memory */ 182 BFA_MEM_TYPE_MAX = BFA_MEM_TYPE_DMA, 183 }; 184 185 struct bfa_mem_elem_s { 186 enum bfa_mem_type mem_type; /* see enum bfa_mem_type */ 187 u32 mem_len; /* Total Length in Bytes */ 188 u8 *kva; /* kernel virtual address */ 189 u64 dma; /* dma address if DMA memory */ 190 u8 *kva_curp; /* kva allocation cursor */ 191 u64 dma_curp; /* dma allocation cursor */ 192 }; 193 194 struct bfa_meminfo_s { 195 struct bfa_mem_elem_s meminfo[BFA_MEM_TYPE_MAX]; 196 }; 197 #define bfa_meminfo_kva(_m) \ 198 ((_m)->meminfo[BFA_MEM_TYPE_KVA - 1].kva_curp) 199 #define bfa_meminfo_dma_virt(_m) \ 200 ((_m)->meminfo[BFA_MEM_TYPE_DMA - 1].kva_curp) 201 #define bfa_meminfo_dma_phys(_m) \ 202 ((_m)->meminfo[BFA_MEM_TYPE_DMA - 1].dma_curp) 203 204 struct bfa_iocfc_regs_s { 205 bfa_os_addr_t intr_status; 206 bfa_os_addr_t intr_mask; 207 bfa_os_addr_t cpe_q_pi[BFI_IOC_MAX_CQS]; 208 bfa_os_addr_t cpe_q_ci[BFI_IOC_MAX_CQS]; 209 bfa_os_addr_t cpe_q_depth[BFI_IOC_MAX_CQS]; 210 bfa_os_addr_t cpe_q_ctrl[BFI_IOC_MAX_CQS]; 211 bfa_os_addr_t rme_q_ci[BFI_IOC_MAX_CQS]; 212 bfa_os_addr_t rme_q_pi[BFI_IOC_MAX_CQS]; 213 bfa_os_addr_t rme_q_depth[BFI_IOC_MAX_CQS]; 214 bfa_os_addr_t rme_q_ctrl[BFI_IOC_MAX_CQS]; 215 }; 216 217 /** 218 * MSIX vector handlers 219 */ 220 #define BFA_MSIX_MAX_VECTORS 22 221 typedef void (*bfa_msix_handler_t)(struct bfa_s *bfa, int vec); 222 struct bfa_msix_s { 223 int nvecs; 224 bfa_msix_handler_t handler[BFA_MSIX_MAX_VECTORS]; 225 }; 226 227 /** 228 * Chip specific interfaces 229 */ 230 struct bfa_hwif_s { 231 void (*hw_reginit)(struct bfa_s *bfa); 232 void (*hw_reqq_ack)(struct bfa_s *bfa, int reqq); 233 void (*hw_rspq_ack)(struct bfa_s *bfa, int rspq); 234 void (*hw_msix_init)(struct bfa_s *bfa, int nvecs); 235 void (*hw_msix_install)(struct bfa_s *bfa); 236 void (*hw_msix_uninstall)(struct bfa_s *bfa); 237 void (*hw_isr_mode_set)(struct bfa_s *bfa, bfa_boolean_t msix); 238 void (*hw_msix_getvecs)(struct bfa_s *bfa, u32 *vecmap, 239 u32 *nvecs, u32 *maxvec); 240 void (*hw_msix_get_rme_range) (struct bfa_s *bfa, u32 *start, 241 u32 *end); 242 }; 243 typedef void (*bfa_cb_iocfc_t) (void *cbarg, enum bfa_status status); 244 245 struct bfa_iocfc_s { 246 struct bfa_s *bfa; 247 struct bfa_iocfc_cfg_s cfg; 248 int action; 249 u32 req_cq_pi[BFI_IOC_MAX_CQS]; 250 u32 rsp_cq_ci[BFI_IOC_MAX_CQS]; 251 struct bfa_cb_qe_s init_hcb_qe; 252 struct bfa_cb_qe_s stop_hcb_qe; 253 struct bfa_cb_qe_s dis_hcb_qe; 254 struct bfa_cb_qe_s stats_hcb_qe; 255 bfa_boolean_t cfgdone; 256 257 struct bfa_dma_s cfg_info; 258 struct bfi_iocfc_cfg_s *cfginfo; 259 struct bfa_dma_s cfgrsp_dma; 260 struct bfi_iocfc_cfgrsp_s *cfgrsp; 261 struct bfi_iocfc_cfg_reply_s *cfg_reply; 262 struct bfa_dma_s req_cq_ba[BFI_IOC_MAX_CQS]; 263 struct bfa_dma_s req_cq_shadow_ci[BFI_IOC_MAX_CQS]; 264 struct bfa_dma_s rsp_cq_ba[BFI_IOC_MAX_CQS]; 265 struct bfa_dma_s rsp_cq_shadow_pi[BFI_IOC_MAX_CQS]; 266 struct bfa_iocfc_regs_s bfa_regs; /* BFA device registers */ 267 struct bfa_hwif_s hwif; 268 bfa_cb_iocfc_t updateq_cbfn; /* bios callback function */ 269 void *updateq_cbarg; /* bios callback arg */ 270 u32 intr_mask; 271 }; 272 273 #define bfa_lpuid(__bfa) \ 274 bfa_ioc_portid(&(__bfa)->ioc) 275 #define bfa_msix_init(__bfa, __nvecs) \ 276 ((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs)) 277 #define bfa_msix_install(__bfa) \ 278 ((__bfa)->iocfc.hwif.hw_msix_install(__bfa)) 279 #define bfa_msix_uninstall(__bfa) \ 280 ((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa)) 281 #define bfa_isr_mode_set(__bfa, __msix) \ 282 ((__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix)) 283 #define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec) \ 284 ((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap, \ 285 __nvecs, __maxvec)) 286 #define bfa_msix_get_rme_range(__bfa, __start, __end) \ 287 ((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end)) 288 #define bfa_msix(__bfa, __vec) \ 289 ((__bfa)->msix.handler[__vec](__bfa, __vec)) 290 291 /* 292 * FC specific IOC functions. 293 */ 294 void bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg, u32 *km_len, 295 u32 *dm_len); 296 void bfa_iocfc_attach(struct bfa_s *bfa, void *bfad, 297 struct bfa_iocfc_cfg_s *cfg, 298 struct bfa_meminfo_s *meminfo, 299 struct bfa_pcidev_s *pcidev); 300 void bfa_iocfc_detach(struct bfa_s *bfa); 301 void bfa_iocfc_init(struct bfa_s *bfa); 302 void bfa_iocfc_start(struct bfa_s *bfa); 303 void bfa_iocfc_stop(struct bfa_s *bfa); 304 void bfa_iocfc_isr(void *bfa, struct bfi_mbmsg_s *msg); 305 void bfa_iocfc_set_snsbase(struct bfa_s *bfa, u64 snsbase_pa); 306 bfa_boolean_t bfa_iocfc_is_operational(struct bfa_s *bfa); 307 void bfa_iocfc_reset_queues(struct bfa_s *bfa); 308 309 void bfa_msix_all(struct bfa_s *bfa, int vec); 310 void bfa_msix_reqq(struct bfa_s *bfa, int vec); 311 void bfa_msix_rspq(struct bfa_s *bfa, int vec); 312 void bfa_msix_lpu_err(struct bfa_s *bfa, int vec); 313 314 void bfa_hwcb_reginit(struct bfa_s *bfa); 315 void bfa_hwcb_reqq_ack(struct bfa_s *bfa, int rspq); 316 void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq); 317 void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs); 318 void bfa_hwcb_msix_install(struct bfa_s *bfa); 319 void bfa_hwcb_msix_uninstall(struct bfa_s *bfa); 320 void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix); 321 void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs, 322 u32 *maxvec); 323 void bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start, 324 u32 *end); 325 void bfa_hwct_reginit(struct bfa_s *bfa); 326 void bfa_hwct_reqq_ack(struct bfa_s *bfa, int rspq); 327 void bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq); 328 void bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs); 329 void bfa_hwct_msix_install(struct bfa_s *bfa); 330 void bfa_hwct_msix_uninstall(struct bfa_s *bfa); 331 void bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix); 332 void bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs, 333 u32 *maxvec); 334 void bfa_hwct_msix_get_rme_range(struct bfa_s *bfa, u32 *start, 335 u32 *end); 336 void bfa_com_port_attach(struct bfa_s *bfa, struct bfa_meminfo_s *mi); 337 void bfa_iocfc_get_bootwwns(struct bfa_s *bfa, u8 *nwwns, wwn_t *wwns); 338 wwn_t bfa_iocfc_get_pwwn(struct bfa_s *bfa); 339 wwn_t bfa_iocfc_get_nwwn(struct bfa_s *bfa); 340 void bfa_iocfc_get_pbc_boot_cfg(struct bfa_s *bfa, 341 struct bfa_boot_pbc_s *pbcfg); 342 int bfa_iocfc_get_pbc_vports(struct bfa_s *bfa, 343 struct bfi_pbc_vport_s *pbc_vport); 344 345 346 /** 347 *---------------------------------------------------------------------- 348 * BFA public interfaces 349 *---------------------------------------------------------------------- 350 */ 351 #define bfa_stats(_mod, _stats) ((_mod)->stats._stats++) 352 #define bfa_ioc_get_stats(__bfa, __ioc_stats) \ 353 bfa_ioc_fetch_stats(&(__bfa)->ioc, __ioc_stats) 354 #define bfa_ioc_clear_stats(__bfa) \ 355 bfa_ioc_clr_stats(&(__bfa)->ioc) 356 #define bfa_get_nports(__bfa) \ 357 bfa_ioc_get_nports(&(__bfa)->ioc) 358 #define bfa_get_adapter_manufacturer(__bfa, __manufacturer) \ 359 bfa_ioc_get_adapter_manufacturer(&(__bfa)->ioc, __manufacturer) 360 #define bfa_get_adapter_model(__bfa, __model) \ 361 bfa_ioc_get_adapter_model(&(__bfa)->ioc, __model) 362 #define bfa_get_adapter_serial_num(__bfa, __serial_num) \ 363 bfa_ioc_get_adapter_serial_num(&(__bfa)->ioc, __serial_num) 364 #define bfa_get_adapter_fw_ver(__bfa, __fw_ver) \ 365 bfa_ioc_get_adapter_fw_ver(&(__bfa)->ioc, __fw_ver) 366 #define bfa_get_adapter_optrom_ver(__bfa, __optrom_ver) \ 367 bfa_ioc_get_adapter_optrom_ver(&(__bfa)->ioc, __optrom_ver) 368 #define bfa_get_pci_chip_rev(__bfa, __chip_rev) \ 369 bfa_ioc_get_pci_chip_rev(&(__bfa)->ioc, __chip_rev) 370 #define bfa_get_ioc_state(__bfa) \ 371 bfa_ioc_get_state(&(__bfa)->ioc) 372 #define bfa_get_type(__bfa) \ 373 bfa_ioc_get_type(&(__bfa)->ioc) 374 #define bfa_get_mac(__bfa) \ 375 bfa_ioc_get_mac(&(__bfa)->ioc) 376 #define bfa_get_mfg_mac(__bfa) \ 377 bfa_ioc_get_mfg_mac(&(__bfa)->ioc) 378 #define bfa_get_fw_clock_res(__bfa) \ 379 ((__bfa)->iocfc.cfgrsp->fwcfg.fw_tick_res) 380 381 void bfa_get_pciids(struct bfa_pciid_s **pciids, int *npciids); 382 void bfa_cfg_get_default(struct bfa_iocfc_cfg_s *cfg); 383 void bfa_cfg_get_min(struct bfa_iocfc_cfg_s *cfg); 384 void bfa_cfg_get_meminfo(struct bfa_iocfc_cfg_s *cfg, 385 struct bfa_meminfo_s *meminfo); 386 void bfa_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg, 387 struct bfa_meminfo_s *meminfo, 388 struct bfa_pcidev_s *pcidev); 389 void bfa_init_trc(struct bfa_s *bfa, struct bfa_trc_mod_s *trcmod); 390 void bfa_init_plog(struct bfa_s *bfa, struct bfa_plog_s *plog); 391 void bfa_detach(struct bfa_s *bfa); 392 void bfa_init(struct bfa_s *bfa); 393 void bfa_start(struct bfa_s *bfa); 394 void bfa_stop(struct bfa_s *bfa); 395 void bfa_attach_fcs(struct bfa_s *bfa); 396 void bfa_cb_init(void *bfad, bfa_status_t status); 397 void bfa_cb_updateq(void *bfad, bfa_status_t status); 398 399 bfa_boolean_t bfa_intx(struct bfa_s *bfa); 400 void bfa_intx_disable(struct bfa_s *bfa); 401 void bfa_intx_enable(struct bfa_s *bfa); 402 void bfa_isr_enable(struct bfa_s *bfa); 403 void bfa_isr_disable(struct bfa_s *bfa); 404 405 void bfa_comp_deq(struct bfa_s *bfa, struct list_head *comp_q); 406 void bfa_comp_process(struct bfa_s *bfa, struct list_head *comp_q); 407 void bfa_comp_free(struct bfa_s *bfa, struct list_head *comp_q); 408 409 typedef void (*bfa_cb_ioc_t) (void *cbarg, enum bfa_status status); 410 void bfa_iocfc_get_attr(struct bfa_s *bfa, struct bfa_iocfc_attr_s *attr); 411 void bfa_get_attr(struct bfa_s *bfa, struct bfa_ioc_attr_s *ioc_attr); 412 413 void bfa_adapter_get_attr(struct bfa_s *bfa, 414 struct bfa_adapter_attr_s *ad_attr); 415 u64 bfa_adapter_get_id(struct bfa_s *bfa); 416 417 bfa_status_t bfa_iocfc_israttr_set(struct bfa_s *bfa, 418 struct bfa_iocfc_intr_attr_s *attr); 419 420 void bfa_iocfc_enable(struct bfa_s *bfa); 421 void bfa_iocfc_disable(struct bfa_s *bfa); 422 void bfa_chip_reset(struct bfa_s *bfa); 423 void bfa_timer_tick(struct bfa_s *bfa); 424 #define bfa_timer_start(_bfa, _timer, _timercb, _arg, _timeout) \ 425 bfa_timer_begin(&(_bfa)->timer_mod, _timer, _timercb, _arg, _timeout) 426 427 /* 428 * BFA debug API functions 429 */ 430 bfa_status_t bfa_debug_fwtrc(struct bfa_s *bfa, void *trcdata, int *trclen); 431 bfa_status_t bfa_debug_fwsave(struct bfa_s *bfa, void *trcdata, int *trclen); 432 bfa_status_t bfa_debug_fwcore(struct bfa_s *bfa, void *buf, 433 u32 *offset, int *buflen); 434 void bfa_debug_fwsave_clear(struct bfa_s *bfa); 435 bfa_status_t bfa_fw_stats_get(struct bfa_s *bfa, void *data); 436 bfa_status_t bfa_fw_stats_clear(struct bfa_s *bfa); 437 438 #endif /* __BFA_H__ */ 439