xref: /linux/drivers/scsi/aic7xxx/aic79xx_osm.h (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 /*
2  * Adaptec AIC79xx device driver for Linux.
3  *
4  * Copyright (c) 2000-2001 Adaptec Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14  *    substantially similar to the "NO WARRANTY" disclaimer below
15  *    ("Disclaimer") and any redistribution must be conditioned upon
16  *    including a substantially similar Disclaimer requirement for further
17  *    binary redistribution.
18  * 3. Neither the names of the above-listed copyright holders nor the names
19  *    of any contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  * Alternatively, this software may be distributed under the terms of the
23  * GNU General Public License ("GPL") version 2 as published by the Free
24  * Software Foundation.
25  *
26  * NO WARRANTY
27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGES.
38  *
39  * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm.h#166 $
40  *
41  */
42 #ifndef _AIC79XX_LINUX_H_
43 #define _AIC79XX_LINUX_H_
44 
45 #include <linux/types.h>
46 #include <linux/blkdev.h>
47 #include <linux/delay.h>
48 #include <linux/ioport.h>
49 #include <linux/pci.h>
50 #include <linux/interrupt.h>
51 #include <linux/module.h>
52 #include <linux/slab.h>
53 #include <asm/byteorder.h>
54 #include <asm/io.h>
55 
56 #include <scsi/scsi.h>
57 #include <scsi/scsi_cmnd.h>
58 #include <scsi/scsi_eh.h>
59 #include <scsi/scsi_device.h>
60 #include <scsi/scsi_host.h>
61 #include <scsi/scsi_tcq.h>
62 #include <scsi/scsi_transport.h>
63 #include <scsi/scsi_transport_spi.h>
64 
65 /* Core SCSI definitions */
66 #define AIC_LIB_PREFIX ahd
67 
68 #include "cam.h"
69 #include "queue.h"
70 #include "scsi_message.h"
71 #include "scsi_iu.h"
72 #include "aiclib.h"
73 
74 /*********************************** Debugging ********************************/
75 #ifdef CONFIG_AIC79XX_DEBUG_ENABLE
76 #ifdef CONFIG_AIC79XX_DEBUG_MASK
77 #define AHD_DEBUG 1
78 #define AHD_DEBUG_OPTS CONFIG_AIC79XX_DEBUG_MASK
79 #else
80 /*
81  * Compile in debugging code, but do not enable any printfs.
82  */
83 #define AHD_DEBUG 1
84 #define AHD_DEBUG_OPTS 0
85 #endif
86 /* No debugging code. */
87 #endif
88 
89 /********************************** Misc Macros *******************************/
90 #define	powerof2(x)	((((x)-1)&(x))==0)
91 
92 /************************* Forward Declarations *******************************/
93 struct ahd_softc;
94 typedef struct pci_dev *ahd_dev_softc_t;
95 typedef struct scsi_cmnd      *ahd_io_ctx_t;
96 
97 /******************************* Byte Order ***********************************/
98 #define ahd_htobe16(x)	cpu_to_be16(x)
99 #define ahd_htobe32(x)	cpu_to_be32(x)
100 #define ahd_htobe64(x)	cpu_to_be64(x)
101 #define ahd_htole16(x)	cpu_to_le16(x)
102 #define ahd_htole32(x)	cpu_to_le32(x)
103 #define ahd_htole64(x)	cpu_to_le64(x)
104 
105 #define ahd_be16toh(x)	be16_to_cpu(x)
106 #define ahd_be32toh(x)	be32_to_cpu(x)
107 #define ahd_be64toh(x)	be64_to_cpu(x)
108 #define ahd_le16toh(x)	le16_to_cpu(x)
109 #define ahd_le32toh(x)	le32_to_cpu(x)
110 #define ahd_le64toh(x)	le64_to_cpu(x)
111 
112 /************************* Configuration Data *********************************/
113 extern uint32_t aic79xx_allow_memio;
114 extern struct scsi_host_template aic79xx_driver_template;
115 
116 /***************************** Bus Space/DMA **********************************/
117 
118 typedef uint32_t bus_size_t;
119 
120 typedef enum {
121 	BUS_SPACE_MEMIO,
122 	BUS_SPACE_PIO
123 } bus_space_tag_t;
124 
125 typedef union {
126 	u_long		  ioport;
127 	volatile uint8_t __iomem *maddr;
128 } bus_space_handle_t;
129 
130 typedef struct bus_dma_segment
131 {
132 	dma_addr_t	ds_addr;
133 	bus_size_t	ds_len;
134 } bus_dma_segment_t;
135 
136 struct ahd_linux_dma_tag
137 {
138 	bus_size_t	alignment;
139 	bus_size_t	boundary;
140 	bus_size_t	maxsize;
141 };
142 typedef struct ahd_linux_dma_tag* bus_dma_tag_t;
143 
144 typedef dma_addr_t bus_dmamap_t;
145 
146 typedef int bus_dma_filter_t(void*, dma_addr_t);
147 typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
148 
149 #define BUS_DMA_WAITOK		0x0
150 #define BUS_DMA_NOWAIT		0x1
151 #define BUS_DMA_ALLOCNOW	0x2
152 #define BUS_DMA_LOAD_SEGS	0x4	/*
153 					 * Argument is an S/G list not
154 					 * a single buffer.
155 					 */
156 
157 #define BUS_SPACE_MAXADDR	0xFFFFFFFF
158 #define BUS_SPACE_MAXADDR_32BIT	0xFFFFFFFF
159 #define BUS_SPACE_MAXSIZE_32BIT	0xFFFFFFFF
160 
161 int	ahd_dma_tag_create(struct ahd_softc *, bus_dma_tag_t /*parent*/,
162 			   bus_size_t /*alignment*/, bus_size_t /*boundary*/,
163 			   dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
164 			   bus_dma_filter_t*/*filter*/, void */*filterarg*/,
165 			   bus_size_t /*maxsize*/, int /*nsegments*/,
166 			   bus_size_t /*maxsegsz*/, int /*flags*/,
167 			   bus_dma_tag_t */*dma_tagp*/);
168 
169 void	ahd_dma_tag_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/);
170 
171 int	ahd_dmamem_alloc(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
172 			 void** /*vaddr*/, int /*flags*/,
173 			 bus_dmamap_t* /*mapp*/);
174 
175 void	ahd_dmamem_free(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
176 			void* /*vaddr*/, bus_dmamap_t /*map*/);
177 
178 void	ahd_dmamap_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/,
179 			   bus_dmamap_t /*map*/);
180 
181 int	ahd_dmamap_load(struct ahd_softc *ahd, bus_dma_tag_t /*dmat*/,
182 			bus_dmamap_t /*map*/, void * /*buf*/,
183 			bus_size_t /*buflen*/, bus_dmamap_callback_t *,
184 			void */*callback_arg*/, int /*flags*/);
185 
186 int	ahd_dmamap_unload(struct ahd_softc *, bus_dma_tag_t, bus_dmamap_t);
187 
188 /*
189  * Operations performed by ahd_dmamap_sync().
190  */
191 #define BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
192 #define BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
193 #define BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
194 #define BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
195 
196 /*
197  * XXX
198  * ahd_dmamap_sync is only used on buffers allocated with
199  * the dma_alloc_coherent() API.  Although I'm not sure how
200  * this works on architectures with a write buffer, Linux does
201  * not have an API to sync "coherent" memory.  Perhaps we need
202  * to do an mb()?
203  */
204 #define ahd_dmamap_sync(ahd, dma_tag, dmamap, offset, len, op)
205 
206 /********************************** Includes **********************************/
207 #ifdef CONFIG_AIC79XX_REG_PRETTY_PRINT
208 #define AIC_DEBUG_REGISTERS 1
209 #else
210 #define AIC_DEBUG_REGISTERS 0
211 #endif
212 #include "aic79xx.h"
213 
214 /***************************** SMP support ************************************/
215 #include <linux/spinlock.h>
216 
217 #define AIC79XX_DRIVER_VERSION "3.0"
218 
219 /*************************** Device Data Structures ***************************/
220 /*
221  * A per probed device structure used to deal with some error recovery
222  * scenarios that the Linux mid-layer code just doesn't know how to
223  * handle.  The structure allocated for a device only becomes persistent
224  * after a successfully completed inquiry command to the target when
225  * that inquiry data indicates a lun is present.
226  */
227 
228 typedef enum {
229 	AHD_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
230 	AHD_DEV_Q_BASIC		 = 0x10, /* Allow basic device queuing */
231 	AHD_DEV_Q_TAGGED	 = 0x20, /* Allow full SCSI2 command queueing */
232 	AHD_DEV_PERIODIC_OTAG	 = 0x40, /* Send OTAG to prevent starvation */
233 } ahd_linux_dev_flags;
234 
235 struct ahd_linux_device {
236 	TAILQ_ENTRY(ahd_linux_device) links;
237 
238 	/*
239 	 * The number of transactions currently
240 	 * queued to the device.
241 	 */
242 	int			active;
243 
244 	/*
245 	 * The currently allowed number of
246 	 * transactions that can be queued to
247 	 * the device.  Must be signed for
248 	 * conversion from tagged to untagged
249 	 * mode where the device may have more
250 	 * than one outstanding active transaction.
251 	 */
252 	int			openings;
253 
254 	/*
255 	 * A positive count indicates that this
256 	 * device's queue is halted.
257 	 */
258 	u_int			qfrozen;
259 
260 	/*
261 	 * Cumulative command counter.
262 	 */
263 	u_long			commands_issued;
264 
265 	/*
266 	 * The number of tagged transactions when
267 	 * running at our current opening level
268 	 * that have been successfully received by
269 	 * this device since the last QUEUE FULL.
270 	 */
271 	u_int			tag_success_count;
272 #define AHD_TAG_SUCCESS_INTERVAL 50
273 
274 	ahd_linux_dev_flags	flags;
275 
276 	/*
277 	 * Per device timer.
278 	 */
279 	struct timer_list	timer;
280 
281 	/*
282 	 * The high limit for the tags variable.
283 	 */
284 	u_int			maxtags;
285 
286 	/*
287 	 * The computed number of tags outstanding
288 	 * at the time of the last QUEUE FULL event.
289 	 */
290 	u_int			tags_on_last_queuefull;
291 
292 	/*
293 	 * How many times we have seen a queue full
294 	 * with the same number of tags.  This is used
295 	 * to stop our adaptive queue depth algorithm
296 	 * on devices with a fixed number of tags.
297 	 */
298 	u_int			last_queuefull_same_count;
299 #define AHD_LOCK_TAGS_COUNT 50
300 
301 	/*
302 	 * How many transactions have been queued
303 	 * without the device going idle.  We use
304 	 * this statistic to determine when to issue
305 	 * an ordered tag to prevent transaction
306 	 * starvation.  This statistic is only updated
307 	 * if the AHD_DEV_PERIODIC_OTAG flag is set
308 	 * on this device.
309 	 */
310 	u_int			commands_since_idle_or_otag;
311 #define AHD_OTAG_THRESH	500
312 };
313 
314 /********************* Definitions Required by the Core ***********************/
315 /*
316  * Number of SG segments we require.  So long as the S/G segments for
317  * a particular transaction are allocated in a physically contiguous
318  * manner and are allocated below 4GB, the number of S/G segments is
319  * unrestricted.
320  */
321 #define	AHD_NSEG 128
322 
323 /*
324  * Per-SCB OSM storage.
325  */
326 struct scb_platform_data {
327 	struct ahd_linux_device	*dev;
328 	dma_addr_t		 buf_busaddr;
329 	uint32_t		 xfer_len;
330 	uint32_t		 sense_resid;	/* Auto-Sense residual */
331 };
332 
333 /*
334  * Define a structure used for each host adapter.  All members are
335  * aligned on a boundary >= the size of the member to honor the
336  * alignment restrictions of the various platforms supported by
337  * this driver.
338  */
339 struct ahd_platform_data {
340 	/*
341 	 * Fields accessed from interrupt context.
342 	 */
343 	struct scsi_target *starget[AHD_NUM_TARGETS];
344 
345 	spinlock_t		 spin_lock;
346 	struct completion	*eh_done;
347 	struct Scsi_Host	*host;		/* pointer to scsi host */
348 #define AHD_LINUX_NOIRQ	((uint32_t)~0)
349 	uint32_t		 irq;		/* IRQ for this adapter */
350 	uint32_t		 bios_address;
351 	resource_size_t		 mem_busaddr;	/* Mem Base Addr */
352 };
353 
354 void ahd_delay(long);
355 
356 /***************************** Low Level I/O **********************************/
357 uint8_t ahd_inb(struct ahd_softc * ahd, long port);
358 void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
359 void ahd_outw_atomic(struct ahd_softc * ahd,
360 				     long port, uint16_t val);
361 void ahd_outsb(struct ahd_softc * ahd, long port,
362 			       uint8_t *, int count);
363 void ahd_insb(struct ahd_softc * ahd, long port,
364 			       uint8_t *, int count);
365 
366 /**************************** Initialization **********************************/
367 int		ahd_linux_register_host(struct ahd_softc *,
368 					struct scsi_host_template *);
369 
370 /******************************** Locking *************************************/
371 static inline void
372 ahd_lockinit(struct ahd_softc *ahd)
373 {
374 	spin_lock_init(&ahd->platform_data->spin_lock);
375 }
376 
377 static inline void
378 ahd_lock(struct ahd_softc *ahd, unsigned long *flags)
379 {
380 	spin_lock_irqsave(&ahd->platform_data->spin_lock, *flags);
381 }
382 
383 static inline void
384 ahd_unlock(struct ahd_softc *ahd, unsigned long *flags)
385 {
386 	spin_unlock_irqrestore(&ahd->platform_data->spin_lock, *flags);
387 }
388 
389 /******************************* PCI Definitions ******************************/
390 /*
391  * PCIM_xxx: mask to locate subfield in register
392  * PCIR_xxx: config register offset
393  * PCIC_xxx: device class
394  * PCIS_xxx: device subclass
395  * PCIP_xxx: device programming interface
396  * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
397  * PCID_xxx: device ID
398  */
399 #define PCIR_DEVVENDOR		0x00
400 #define PCIR_VENDOR		0x00
401 #define PCIR_DEVICE		0x02
402 #define PCIR_COMMAND		0x04
403 #define PCIM_CMD_PORTEN		0x0001
404 #define PCIM_CMD_MEMEN		0x0002
405 #define PCIM_CMD_BUSMASTEREN	0x0004
406 #define PCIM_CMD_MWRICEN	0x0010
407 #define PCIM_CMD_PERRESPEN	0x0040
408 #define	PCIM_CMD_SERRESPEN	0x0100
409 #define PCIR_STATUS		0x06
410 #define PCIR_REVID		0x08
411 #define PCIR_PROGIF		0x09
412 #define PCIR_SUBCLASS		0x0a
413 #define PCIR_CLASS		0x0b
414 #define PCIR_CACHELNSZ		0x0c
415 #define PCIR_LATTIMER		0x0d
416 #define PCIR_HEADERTYPE		0x0e
417 #define PCIM_MFDEV		0x80
418 #define PCIR_BIST		0x0f
419 #define PCIR_CAP_PTR		0x34
420 
421 /* config registers for header type 0 devices */
422 #define PCIR_MAPS	0x10
423 #define PCIR_SUBVEND_0	0x2c
424 #define PCIR_SUBDEV_0	0x2e
425 
426 /****************************** PCI-X definitions *****************************/
427 #define PCIXR_COMMAND	0x96
428 #define PCIXR_DEVADDR	0x98
429 #define PCIXM_DEVADDR_FNUM	0x0003	/* Function Number */
430 #define PCIXM_DEVADDR_DNUM	0x00F8	/* Device Number */
431 #define PCIXM_DEVADDR_BNUM	0xFF00	/* Bus Number */
432 #define PCIXR_STATUS	0x9A
433 #define PCIXM_STATUS_64BIT	0x0001	/* Active 64bit connection to device. */
434 #define PCIXM_STATUS_133CAP	0x0002	/* Device is 133MHz capable */
435 #define PCIXM_STATUS_SCDISC	0x0004	/* Split Completion Discarded */
436 #define PCIXM_STATUS_UNEXPSC	0x0008	/* Unexpected Split Completion */
437 #define PCIXM_STATUS_CMPLEXDEV	0x0010	/* Device Complexity (set == bridge) */
438 #define PCIXM_STATUS_MAXMRDBC	0x0060	/* Maximum Burst Read Count */
439 #define PCIXM_STATUS_MAXSPLITS	0x0380	/* Maximum Split Transactions */
440 #define PCIXM_STATUS_MAXCRDS	0x1C00	/* Maximum Cumulative Read Size */
441 #define PCIXM_STATUS_RCVDSCEM	0x2000	/* Received a Split Comp w/Error msg */
442 
443 typedef enum
444 {
445 	AHD_POWER_STATE_D0,
446 	AHD_POWER_STATE_D1,
447 	AHD_POWER_STATE_D2,
448 	AHD_POWER_STATE_D3
449 } ahd_power_state;
450 
451 void ahd_power_state_change(struct ahd_softc *ahd,
452 			    ahd_power_state new_state);
453 
454 /******************************* PCI Routines *********************************/
455 int			 ahd_linux_pci_init(void);
456 void			 ahd_linux_pci_exit(void);
457 int			 ahd_pci_map_registers(struct ahd_softc *ahd);
458 int			 ahd_pci_map_int(struct ahd_softc *ahd);
459 
460 uint32_t		 ahd_pci_read_config(ahd_dev_softc_t pci,
461 					     int reg, int width);
462 void			 ahd_pci_write_config(ahd_dev_softc_t pci,
463 					  int reg, uint32_t value,
464 					  int width);
465 
466 static inline int ahd_get_pci_function(ahd_dev_softc_t);
467 static inline int
468 ahd_get_pci_function(ahd_dev_softc_t pci)
469 {
470 	return (PCI_FUNC(pci->devfn));
471 }
472 
473 static inline int ahd_get_pci_slot(ahd_dev_softc_t);
474 static inline int
475 ahd_get_pci_slot(ahd_dev_softc_t pci)
476 {
477 	return (PCI_SLOT(pci->devfn));
478 }
479 
480 static inline int ahd_get_pci_bus(ahd_dev_softc_t);
481 static inline int
482 ahd_get_pci_bus(ahd_dev_softc_t pci)
483 {
484 	return (pci->bus->number);
485 }
486 
487 static inline void ahd_flush_device_writes(struct ahd_softc *);
488 static inline void
489 ahd_flush_device_writes(struct ahd_softc *ahd)
490 {
491 	/* XXX Is this sufficient for all architectures??? */
492 	ahd_inb(ahd, INTSTAT);
493 }
494 
495 /**************************** Proc FS Support *********************************/
496 int	ahd_proc_write_seeprom(struct Scsi_Host *, char *, int);
497 int	ahd_linux_show_info(struct seq_file *,struct Scsi_Host *);
498 
499 /*********************** Transaction Access Wrappers **************************/
500 
501 static inline
502 void ahd_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
503 {
504 	cmd->result &= ~(CAM_STATUS_MASK << 16);
505 	cmd->result |= status << 16;
506 }
507 
508 static inline
509 void ahd_set_transaction_status(struct scb *scb, uint32_t status)
510 {
511 	ahd_cmd_set_transaction_status(scb->io_ctx,status);
512 }
513 
514 static inline
515 void ahd_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
516 {
517 	cmd->result &= ~0xFFFF;
518 	cmd->result |= status;
519 }
520 
521 static inline
522 void ahd_set_scsi_status(struct scb *scb, uint32_t status)
523 {
524 	ahd_cmd_set_scsi_status(scb->io_ctx, status);
525 }
526 
527 static inline
528 uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd)
529 {
530 	return ((cmd->result >> 16) & CAM_STATUS_MASK);
531 }
532 
533 static inline
534 uint32_t ahd_get_transaction_status(struct scb *scb)
535 {
536 	return (ahd_cmd_get_transaction_status(scb->io_ctx));
537 }
538 
539 static inline
540 uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd)
541 {
542 	return (cmd->result & 0xFFFF);
543 }
544 
545 static inline
546 uint32_t ahd_get_scsi_status(struct scb *scb)
547 {
548 	return (ahd_cmd_get_scsi_status(scb->io_ctx));
549 }
550 
551 static inline
552 void ahd_set_transaction_tag(struct scb *scb, int enabled, u_int type)
553 {
554 	/*
555 	 * Nothing to do for linux as the incoming transaction
556 	 * has no concept of tag/non tagged, etc.
557 	 */
558 }
559 
560 static inline
561 u_long ahd_get_transfer_length(struct scb *scb)
562 {
563 	return (scb->platform_data->xfer_len);
564 }
565 
566 static inline
567 int ahd_get_transfer_dir(struct scb *scb)
568 {
569 	return (scb->io_ctx->sc_data_direction);
570 }
571 
572 static inline
573 void ahd_set_residual(struct scb *scb, u_long resid)
574 {
575 	scsi_set_resid(scb->io_ctx, resid);
576 }
577 
578 static inline
579 void ahd_set_sense_residual(struct scb *scb, u_long resid)
580 {
581 	scb->platform_data->sense_resid = resid;
582 }
583 
584 static inline
585 u_long ahd_get_residual(struct scb *scb)
586 {
587 	return scsi_get_resid(scb->io_ctx);
588 }
589 
590 static inline
591 u_long ahd_get_sense_residual(struct scb *scb)
592 {
593 	return (scb->platform_data->sense_resid);
594 }
595 
596 static inline
597 int ahd_perform_autosense(struct scb *scb)
598 {
599 	/*
600 	 * We always perform autosense in Linux.
601 	 * On other platforms this is set on a
602 	 * per-transaction basis.
603 	 */
604 	return (1);
605 }
606 
607 static inline uint32_t
608 ahd_get_sense_bufsize(struct ahd_softc *ahd, struct scb *scb)
609 {
610 	return (sizeof(struct scsi_sense_data));
611 }
612 
613 static inline void
614 ahd_notify_xfer_settings_change(struct ahd_softc *ahd,
615 				struct ahd_devinfo *devinfo)
616 {
617 	/* Nothing to do here for linux */
618 }
619 
620 static inline void
621 ahd_platform_scb_free(struct ahd_softc *ahd, struct scb *scb)
622 {
623 	ahd->flags &= ~AHD_RESOURCE_SHORTAGE;
624 }
625 
626 int	ahd_platform_alloc(struct ahd_softc *ahd, void *platform_arg);
627 void	ahd_platform_free(struct ahd_softc *ahd);
628 void	ahd_platform_init(struct ahd_softc *ahd);
629 void	ahd_platform_freeze_devq(struct ahd_softc *ahd, struct scb *scb);
630 
631 static inline void
632 ahd_freeze_scb(struct scb *scb)
633 {
634 	if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
635 		scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
636 		scb->platform_data->dev->qfrozen++;
637 	}
638 }
639 
640 void	ahd_platform_set_tags(struct ahd_softc *ahd, struct scsi_device *sdev,
641 			      struct ahd_devinfo *devinfo, ahd_queue_alg);
642 int	ahd_platform_abort_scbs(struct ahd_softc *ahd, int target,
643 				char channel, int lun, u_int tag,
644 				role_t role, uint32_t status);
645 irqreturn_t
646 	ahd_linux_isr(int irq, void *dev_id);
647 void	ahd_done(struct ahd_softc*, struct scb*);
648 void	ahd_send_async(struct ahd_softc *, char channel,
649 		       u_int target, u_int lun, ac_code);
650 void	ahd_print_path(struct ahd_softc *, struct scb *);
651 
652 #ifdef CONFIG_PCI
653 #define AHD_PCI_CONFIG 1
654 #else
655 #define AHD_PCI_CONFIG 0
656 #endif
657 #define bootverbose aic79xx_verbose
658 extern uint32_t aic79xx_verbose;
659 
660 #endif /* _AIC79XX_LINUX_H_ */
661