11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * Core definitions and data structures shareable across OS platforms. 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (c) 1994-2002 Justin T. Gibbs. 51da177e4SLinus Torvalds * Copyright (c) 2000-2002 Adaptec Inc. 61da177e4SLinus Torvalds * All rights reserved. 71da177e4SLinus Torvalds * 81da177e4SLinus Torvalds * Redistribution and use in source and binary forms, with or without 91da177e4SLinus Torvalds * modification, are permitted provided that the following conditions 101da177e4SLinus Torvalds * are met: 111da177e4SLinus Torvalds * 1. Redistributions of source code must retain the above copyright 121da177e4SLinus Torvalds * notice, this list of conditions, and the following disclaimer, 131da177e4SLinus Torvalds * without modification. 141da177e4SLinus Torvalds * 2. Redistributions in binary form must reproduce at minimum a disclaimer 151da177e4SLinus Torvalds * substantially similar to the "NO WARRANTY" disclaimer below 161da177e4SLinus Torvalds * ("Disclaimer") and any redistribution must be conditioned upon 171da177e4SLinus Torvalds * including a substantially similar Disclaimer requirement for further 181da177e4SLinus Torvalds * binary redistribution. 191da177e4SLinus Torvalds * 3. Neither the names of the above-listed copyright holders nor the names 201da177e4SLinus Torvalds * of any contributors may be used to endorse or promote products derived 211da177e4SLinus Torvalds * from this software without specific prior written permission. 221da177e4SLinus Torvalds * 231da177e4SLinus Torvalds * Alternatively, this software may be distributed under the terms of the 241da177e4SLinus Torvalds * GNU General Public License ("GPL") version 2 as published by the Free 251da177e4SLinus Torvalds * Software Foundation. 261da177e4SLinus Torvalds * 271da177e4SLinus Torvalds * NO WARRANTY 281da177e4SLinus Torvalds * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 291da177e4SLinus Torvalds * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 301da177e4SLinus Torvalds * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 311da177e4SLinus Torvalds * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 321da177e4SLinus Torvalds * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 331da177e4SLinus Torvalds * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 341da177e4SLinus Torvalds * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 351da177e4SLinus Torvalds * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 361da177e4SLinus Torvalds * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 371da177e4SLinus Torvalds * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 381da177e4SLinus Torvalds * POSSIBILITY OF SUCH DAMAGES. 391da177e4SLinus Torvalds * 403fb08612SHannes Reinecke * $Id: //depot/aic7xxx/aic7xxx/aic79xx.h#109 $ 411da177e4SLinus Torvalds * 421da177e4SLinus Torvalds * $FreeBSD$ 431da177e4SLinus Torvalds */ 441da177e4SLinus Torvalds 451da177e4SLinus Torvalds #ifndef _AIC79XX_H_ 461da177e4SLinus Torvalds #define _AIC79XX_H_ 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds /* Register Definitions */ 491da177e4SLinus Torvalds #include "aic79xx_reg.h" 501da177e4SLinus Torvalds 511da177e4SLinus Torvalds /************************* Forward Declarations *******************************/ 521da177e4SLinus Torvalds struct ahd_platform_data; 531da177e4SLinus Torvalds struct scb_platform_data; 541da177e4SLinus Torvalds 551da177e4SLinus Torvalds /****************************** Useful Macros *********************************/ 561da177e4SLinus Torvalds #ifndef TRUE 571da177e4SLinus Torvalds #define TRUE 1 581da177e4SLinus Torvalds #endif 591da177e4SLinus Torvalds #ifndef FALSE 601da177e4SLinus Torvalds #define FALSE 0 611da177e4SLinus Torvalds #endif 621da177e4SLinus Torvalds 631da177e4SLinus Torvalds #define ALL_CHANNELS '\0' 641da177e4SLinus Torvalds #define ALL_TARGETS_MASK 0xFFFF 651da177e4SLinus Torvalds #define INITIATOR_WILDCARD (~0) 661da177e4SLinus Torvalds #define SCB_LIST_NULL 0xFF00 671da177e4SLinus Torvalds #define SCB_LIST_NULL_LE (ahd_htole16(SCB_LIST_NULL)) 6811668bb6SHannes Reinecke #define QOUTFIFO_ENTRY_VALID 0x80 691da177e4SLinus Torvalds #define SCBID_IS_NULL(scbid) (((scbid) & 0xFF00 ) == SCB_LIST_NULL) 701da177e4SLinus Torvalds 711da177e4SLinus Torvalds #define SCSIID_TARGET(ahd, scsiid) \ 721da177e4SLinus Torvalds (((scsiid) & TID) >> TID_SHIFT) 731da177e4SLinus Torvalds #define SCSIID_OUR_ID(scsiid) \ 741da177e4SLinus Torvalds ((scsiid) & OID) 751da177e4SLinus Torvalds #define SCSIID_CHANNEL(ahd, scsiid) ('A') 761da177e4SLinus Torvalds #define SCB_IS_SCSIBUS_B(ahd, scb) (0) 771da177e4SLinus Torvalds #define SCB_GET_OUR_ID(scb) \ 781da177e4SLinus Torvalds SCSIID_OUR_ID((scb)->hscb->scsiid) 791da177e4SLinus Torvalds #define SCB_GET_TARGET(ahd, scb) \ 801da177e4SLinus Torvalds SCSIID_TARGET((ahd), (scb)->hscb->scsiid) 811da177e4SLinus Torvalds #define SCB_GET_CHANNEL(ahd, scb) \ 821da177e4SLinus Torvalds SCSIID_CHANNEL(ahd, (scb)->hscb->scsiid) 831da177e4SLinus Torvalds #define SCB_GET_LUN(scb) \ 841da177e4SLinus Torvalds ((scb)->hscb->lun) 851da177e4SLinus Torvalds #define SCB_GET_TARGET_OFFSET(ahd, scb) \ 861da177e4SLinus Torvalds SCB_GET_TARGET(ahd, scb) 871da177e4SLinus Torvalds #define SCB_GET_TARGET_MASK(ahd, scb) \ 881da177e4SLinus Torvalds (0x01 << (SCB_GET_TARGET_OFFSET(ahd, scb))) 891da177e4SLinus Torvalds #ifdef AHD_DEBUG 901da177e4SLinus Torvalds #define SCB_IS_SILENT(scb) \ 911da177e4SLinus Torvalds ((ahd_debug & AHD_SHOW_MASKED_ERRORS) == 0 \ 921da177e4SLinus Torvalds && (((scb)->flags & SCB_SILENT) != 0)) 931da177e4SLinus Torvalds #else 941da177e4SLinus Torvalds #define SCB_IS_SILENT(scb) \ 951da177e4SLinus Torvalds (((scb)->flags & SCB_SILENT) != 0) 961da177e4SLinus Torvalds #endif 971da177e4SLinus Torvalds /* 981da177e4SLinus Torvalds * TCLs have the following format: TTTTLLLLLLLL 991da177e4SLinus Torvalds */ 1001da177e4SLinus Torvalds #define TCL_TARGET_OFFSET(tcl) \ 1011da177e4SLinus Torvalds ((((tcl) >> 4) & TID) >> 4) 1021da177e4SLinus Torvalds #define TCL_LUN(tcl) \ 1031da177e4SLinus Torvalds (tcl & (AHD_NUM_LUNS - 1)) 1041da177e4SLinus Torvalds #define BUILD_TCL(scsiid, lun) \ 1051da177e4SLinus Torvalds ((lun) | (((scsiid) & TID) << 4)) 1061da177e4SLinus Torvalds #define BUILD_TCL_RAW(target, channel, lun) \ 1071da177e4SLinus Torvalds ((lun) | ((target) << 8)) 1081da177e4SLinus Torvalds 1091da177e4SLinus Torvalds #define SCB_GET_TAG(scb) \ 1101da177e4SLinus Torvalds ahd_le16toh(scb->hscb->tag) 1111da177e4SLinus Torvalds 1121da177e4SLinus Torvalds #ifndef AHD_TARGET_MODE 1131da177e4SLinus Torvalds #undef AHD_TMODE_ENABLE 1141da177e4SLinus Torvalds #define AHD_TMODE_ENABLE 0 1151da177e4SLinus Torvalds #endif 1161da177e4SLinus Torvalds 1171da177e4SLinus Torvalds #define AHD_BUILD_COL_IDX(target, lun) \ 1181da177e4SLinus Torvalds (((lun) << 4) | target) 1191da177e4SLinus Torvalds 1201da177e4SLinus Torvalds #define AHD_GET_SCB_COL_IDX(ahd, scb) \ 1211da177e4SLinus Torvalds ((SCB_GET_LUN(scb) << 4) | SCB_GET_TARGET(ahd, scb)) 1221da177e4SLinus Torvalds 1231da177e4SLinus Torvalds #define AHD_SET_SCB_COL_IDX(scb, col_idx) \ 1241da177e4SLinus Torvalds do { \ 1251da177e4SLinus Torvalds (scb)->hscb->scsiid = ((col_idx) << TID_SHIFT) & TID; \ 1261da177e4SLinus Torvalds (scb)->hscb->lun = ((col_idx) >> 4) & (AHD_NUM_LUNS_NONPKT-1); \ 1271da177e4SLinus Torvalds } while (0) 1281da177e4SLinus Torvalds 1291da177e4SLinus Torvalds #define AHD_COPY_SCB_COL_IDX(dst, src) \ 1301da177e4SLinus Torvalds do { \ 1311da177e4SLinus Torvalds dst->hscb->scsiid = src->hscb->scsiid; \ 1321da177e4SLinus Torvalds dst->hscb->lun = src->hscb->lun; \ 1331da177e4SLinus Torvalds } while (0) 1341da177e4SLinus Torvalds 1351da177e4SLinus Torvalds #define AHD_NEVER_COL_IDX 0xFFFF 1361da177e4SLinus Torvalds 1371da177e4SLinus Torvalds /**************************** Driver Constants ********************************/ 1381da177e4SLinus Torvalds /* 1391da177e4SLinus Torvalds * The maximum number of supported targets. 1401da177e4SLinus Torvalds */ 1411da177e4SLinus Torvalds #define AHD_NUM_TARGETS 16 1421da177e4SLinus Torvalds 1431da177e4SLinus Torvalds /* 1441da177e4SLinus Torvalds * The maximum number of supported luns. 1451da177e4SLinus Torvalds * The identify message only supports 64 luns in non-packetized transfers. 1461da177e4SLinus Torvalds * You can have 2^64 luns when information unit transfers are enabled, 1471da177e4SLinus Torvalds * but until we see a need to support that many, we support 256. 1481da177e4SLinus Torvalds */ 1491da177e4SLinus Torvalds #define AHD_NUM_LUNS_NONPKT 64 1501da177e4SLinus Torvalds #define AHD_NUM_LUNS 256 1511da177e4SLinus Torvalds 1521da177e4SLinus Torvalds /* 1531da177e4SLinus Torvalds * The maximum transfer per S/G segment. 1541da177e4SLinus Torvalds */ 1551da177e4SLinus Torvalds #define AHD_MAXTRANSFER_SIZE 0x00ffffff /* limited by 24bit counter */ 1561da177e4SLinus Torvalds 1571da177e4SLinus Torvalds /* 1581da177e4SLinus Torvalds * The maximum amount of SCB storage in hardware on a controller. 1591da177e4SLinus Torvalds * This value represents an upper bound. Due to software design, 1601da177e4SLinus Torvalds * we may not be able to use this number. 1611da177e4SLinus Torvalds */ 1621da177e4SLinus Torvalds #define AHD_SCB_MAX 512 1631da177e4SLinus Torvalds 1641da177e4SLinus Torvalds /* 1651da177e4SLinus Torvalds * The maximum number of concurrent transactions supported per driver instance. 1661da177e4SLinus Torvalds * Sequencer Control Blocks (SCBs) store per-transaction information. 1671da177e4SLinus Torvalds */ 1681da177e4SLinus Torvalds #define AHD_MAX_QUEUE AHD_SCB_MAX 1691da177e4SLinus Torvalds 1701da177e4SLinus Torvalds /* 1711da177e4SLinus Torvalds * Define the size of our QIN and QOUT FIFOs. They must be a power of 2 1721da177e4SLinus Torvalds * in size and accommodate as many transactions as can be queued concurrently. 1731da177e4SLinus Torvalds */ 1741da177e4SLinus Torvalds #define AHD_QIN_SIZE AHD_MAX_QUEUE 1751da177e4SLinus Torvalds #define AHD_QOUT_SIZE AHD_MAX_QUEUE 1761da177e4SLinus Torvalds 1771da177e4SLinus Torvalds #define AHD_QIN_WRAP(x) ((x) & (AHD_QIN_SIZE-1)) 1781da177e4SLinus Torvalds /* 1791da177e4SLinus Torvalds * The maximum amount of SCB storage we allocate in host memory. 1801da177e4SLinus Torvalds */ 1811da177e4SLinus Torvalds #define AHD_SCB_MAX_ALLOC AHD_MAX_QUEUE 1821da177e4SLinus Torvalds 1831da177e4SLinus Torvalds /* 1841da177e4SLinus Torvalds * Ring Buffer of incoming target commands. 1851da177e4SLinus Torvalds * We allocate 256 to simplify the logic in the sequencer 1861da177e4SLinus Torvalds * by using the natural wrap point of an 8bit counter. 1871da177e4SLinus Torvalds */ 1881da177e4SLinus Torvalds #define AHD_TMODE_CMDS 256 1891da177e4SLinus Torvalds 1901da177e4SLinus Torvalds /* Reset line assertion time in us */ 1911da177e4SLinus Torvalds #define AHD_BUSRESET_DELAY 25 1921da177e4SLinus Torvalds 1931da177e4SLinus Torvalds /******************* Chip Characteristics/Operating Settings *****************/ 1941da177e4SLinus Torvalds /* 1951da177e4SLinus Torvalds * Chip Type 1961da177e4SLinus Torvalds * The chip order is from least sophisticated to most sophisticated. 1971da177e4SLinus Torvalds */ 1981da177e4SLinus Torvalds typedef enum { 1991da177e4SLinus Torvalds AHD_NONE = 0x0000, 2001da177e4SLinus Torvalds AHD_CHIPID_MASK = 0x00FF, 2011da177e4SLinus Torvalds AHD_AIC7901 = 0x0001, 2021da177e4SLinus Torvalds AHD_AIC7902 = 0x0002, 2031da177e4SLinus Torvalds AHD_AIC7901A = 0x0003, 2041da177e4SLinus Torvalds AHD_PCI = 0x0100, /* Bus type PCI */ 2051da177e4SLinus Torvalds AHD_PCIX = 0x0200, /* Bus type PCIX */ 2061da177e4SLinus Torvalds AHD_BUS_MASK = 0x0F00 2071da177e4SLinus Torvalds } ahd_chip; 2081da177e4SLinus Torvalds 2091da177e4SLinus Torvalds /* 2101da177e4SLinus Torvalds * Features available in each chip type. 2111da177e4SLinus Torvalds */ 2121da177e4SLinus Torvalds typedef enum { 2131da177e4SLinus Torvalds AHD_FENONE = 0x00000, 2141da177e4SLinus Torvalds AHD_WIDE = 0x00001,/* Wide Channel */ 2153fb08612SHannes Reinecke AHD_AIC79XXB_SLOWCRC = 0x00002,/* SLOWCRC bit should be set */ 2161da177e4SLinus Torvalds AHD_MULTI_FUNC = 0x00100,/* Multi-Function/Channel Device */ 2171da177e4SLinus Torvalds AHD_TARGETMODE = 0x01000,/* Has tested target mode support */ 2181da177e4SLinus Torvalds AHD_MULTIROLE = 0x02000,/* Space for two roles at a time */ 2191da177e4SLinus Torvalds AHD_RTI = 0x04000,/* Retained Training Support */ 2201da177e4SLinus Torvalds AHD_NEW_IOCELL_OPTS = 0x08000,/* More Signal knobs in the IOCELL */ 2211da177e4SLinus Torvalds AHD_NEW_DFCNTRL_OPTS = 0x10000,/* SCSIENWRDIS bit */ 2221da177e4SLinus Torvalds AHD_FAST_CDB_DELIVERY = 0x20000,/* CDB acks released to Output Sync */ 2231da177e4SLinus Torvalds AHD_REMOVABLE = 0x00000,/* Hot-Swap supported - None so far*/ 2241da177e4SLinus Torvalds AHD_AIC7901_FE = AHD_FENONE, 2251da177e4SLinus Torvalds AHD_AIC7901A_FE = AHD_FENONE, 2261da177e4SLinus Torvalds AHD_AIC7902_FE = AHD_MULTI_FUNC 2271da177e4SLinus Torvalds } ahd_feature; 2281da177e4SLinus Torvalds 2291da177e4SLinus Torvalds /* 2301da177e4SLinus Torvalds * Bugs in the silicon that we work around in software. 2311da177e4SLinus Torvalds */ 2321da177e4SLinus Torvalds typedef enum { 2331da177e4SLinus Torvalds AHD_BUGNONE = 0x0000, 2341da177e4SLinus Torvalds /* 2351da177e4SLinus Torvalds * Rev A hardware fails to update LAST/CURR/NEXTSCB 2361da177e4SLinus Torvalds * correctly in certain packetized selection cases. 2371da177e4SLinus Torvalds */ 2381da177e4SLinus Torvalds AHD_SENT_SCB_UPDATE_BUG = 0x0001, 2391da177e4SLinus Torvalds /* The wrong SCB is accessed to check the abort pending bit. */ 2401da177e4SLinus Torvalds AHD_ABORT_LQI_BUG = 0x0002, 2411da177e4SLinus Torvalds /* Packetized bitbucket crosses packet boundaries. */ 2421da177e4SLinus Torvalds AHD_PKT_BITBUCKET_BUG = 0x0004, 2431da177e4SLinus Torvalds /* The selection timer runs twice as long as its setting. */ 2441da177e4SLinus Torvalds AHD_LONG_SETIMO_BUG = 0x0008, 2451da177e4SLinus Torvalds /* The Non-LQ CRC error status is delayed until phase change. */ 2461da177e4SLinus Torvalds AHD_NLQICRC_DELAYED_BUG = 0x0010, 2471da177e4SLinus Torvalds /* The chip must be reset for all outgoing bus resets. */ 2481da177e4SLinus Torvalds AHD_SCSIRST_BUG = 0x0020, 2491da177e4SLinus Torvalds /* Some PCIX fields must be saved and restored across chip reset. */ 2501da177e4SLinus Torvalds AHD_PCIX_CHIPRST_BUG = 0x0040, 2511da177e4SLinus Torvalds /* MMAPIO is not functional in PCI-X mode. */ 2521da177e4SLinus Torvalds AHD_PCIX_MMAPIO_BUG = 0x0080, 2531da177e4SLinus Torvalds /* Reads to SCBRAM fail to reset the discard timer. */ 2541da177e4SLinus Torvalds AHD_PCIX_SCBRAM_RD_BUG = 0x0100, 2551da177e4SLinus Torvalds /* Bug workarounds that can be disabled on non-PCIX busses. */ 2561da177e4SLinus Torvalds AHD_PCIX_BUG_MASK = AHD_PCIX_CHIPRST_BUG 2571da177e4SLinus Torvalds | AHD_PCIX_MMAPIO_BUG 2581da177e4SLinus Torvalds | AHD_PCIX_SCBRAM_RD_BUG, 2591da177e4SLinus Torvalds /* 2601da177e4SLinus Torvalds * LQOSTOP0 status set even for forced selections with ATN 2611da177e4SLinus Torvalds * to perform non-packetized message delivery. 2621da177e4SLinus Torvalds */ 2631da177e4SLinus Torvalds AHD_LQO_ATNO_BUG = 0x0200, 2641da177e4SLinus Torvalds /* FIFO auto-flush does not always trigger. */ 2651da177e4SLinus Torvalds AHD_AUTOFLUSH_BUG = 0x0400, 2661da177e4SLinus Torvalds /* The CLRLQO registers are not self-clearing. */ 2671da177e4SLinus Torvalds AHD_CLRLQO_AUTOCLR_BUG = 0x0800, 2681da177e4SLinus Torvalds /* The PACKETIZED status bit refers to the previous connection. */ 2691da177e4SLinus Torvalds AHD_PKTIZED_STATUS_BUG = 0x1000, 2701da177e4SLinus Torvalds /* "Short Luns" are not placed into outgoing LQ packets correctly. */ 2711da177e4SLinus Torvalds AHD_PKT_LUN_BUG = 0x2000, 2721da177e4SLinus Torvalds /* 2731da177e4SLinus Torvalds * Only the FIFO allocated to the non-packetized connection may 2741da177e4SLinus Torvalds * be in use during a non-packetzied connection. 2751da177e4SLinus Torvalds */ 2761da177e4SLinus Torvalds AHD_NONPACKFIFO_BUG = 0x4000, 2771da177e4SLinus Torvalds /* 2781da177e4SLinus Torvalds * Writing to a DFF SCBPTR register may fail if concurent with 2791da177e4SLinus Torvalds * a hardware write to the other DFF SCBPTR register. This is 2801da177e4SLinus Torvalds * not currently a concern in our sequencer since all chips with 2811da177e4SLinus Torvalds * this bug have the AHD_NONPACKFIFO_BUG and all writes of concern 2821da177e4SLinus Torvalds * occur in non-packetized connections. 2831da177e4SLinus Torvalds */ 2841da177e4SLinus Torvalds AHD_MDFF_WSCBPTR_BUG = 0x8000, 2851da177e4SLinus Torvalds /* SGHADDR updates are slow. */ 2861da177e4SLinus Torvalds AHD_REG_SLOW_SETTLE_BUG = 0x10000, 2871da177e4SLinus Torvalds /* 2881da177e4SLinus Torvalds * Changing the MODE_PTR coincident with an interrupt that 2891da177e4SLinus Torvalds * switches to a different mode will cause the interrupt to 2901da177e4SLinus Torvalds * be in the mode written outside of interrupt context. 2911da177e4SLinus Torvalds */ 2921da177e4SLinus Torvalds AHD_SET_MODE_BUG = 0x20000, 2931da177e4SLinus Torvalds /* Non-packetized busfree revision does not work. */ 2941da177e4SLinus Torvalds AHD_BUSFREEREV_BUG = 0x40000, 2951da177e4SLinus Torvalds /* 2961da177e4SLinus Torvalds * Paced transfers are indicated with a non-standard PPR 2971da177e4SLinus Torvalds * option bit in the neg table, 160MHz is indicated by 2981da177e4SLinus Torvalds * sync factor 0x7, and the offset if off by a factor of 2. 2991da177e4SLinus Torvalds */ 3001da177e4SLinus Torvalds AHD_PACED_NEGTABLE_BUG = 0x80000, 3011da177e4SLinus Torvalds /* LQOOVERRUN false positives. */ 3021da177e4SLinus Torvalds AHD_LQOOVERRUN_BUG = 0x100000, 3031da177e4SLinus Torvalds /* 3041da177e4SLinus Torvalds * Controller write to INTSTAT will lose to a host 3051da177e4SLinus Torvalds * write to CLRINT. 3061da177e4SLinus Torvalds */ 3071da177e4SLinus Torvalds AHD_INTCOLLISION_BUG = 0x200000, 3081da177e4SLinus Torvalds /* 3091da177e4SLinus Torvalds * The GEM318 violates the SCSI spec by not waiting 3101da177e4SLinus Torvalds * the mandated bus settle delay between phase changes 3111da177e4SLinus Torvalds * in some situations. Some aic79xx chip revs. are more 3121da177e4SLinus Torvalds * strict in this regard and will treat REQ assertions 3131da177e4SLinus Torvalds * that fall within the bus settle delay window as 3141da177e4SLinus Torvalds * glitches. This flag tells the firmware to tolerate 3151da177e4SLinus Torvalds * early REQ assertions. 3161da177e4SLinus Torvalds */ 3171da177e4SLinus Torvalds AHD_EARLY_REQ_BUG = 0x400000, 3181da177e4SLinus Torvalds /* 3191da177e4SLinus Torvalds * The LED does not stay on long enough in packetized modes. 3201da177e4SLinus Torvalds */ 3211da177e4SLinus Torvalds AHD_FAINT_LED_BUG = 0x800000 3221da177e4SLinus Torvalds } ahd_bug; 3231da177e4SLinus Torvalds 3241da177e4SLinus Torvalds /* 3251da177e4SLinus Torvalds * Configuration specific settings. 3261da177e4SLinus Torvalds * The driver determines these settings by probing the 3271da177e4SLinus Torvalds * chip/controller's configuration. 3281da177e4SLinus Torvalds */ 3291da177e4SLinus Torvalds typedef enum { 3301da177e4SLinus Torvalds AHD_FNONE = 0x00000, 3311da177e4SLinus Torvalds AHD_BOOT_CHANNEL = 0x00001,/* We were set as the boot channel. */ 3321da177e4SLinus Torvalds AHD_USEDEFAULTS = 0x00004,/* 3331da177e4SLinus Torvalds * For cards without an seeprom 3341da177e4SLinus Torvalds * or a BIOS to initialize the chip's 3351da177e4SLinus Torvalds * SRAM, we use the default target 3361da177e4SLinus Torvalds * settings. 3371da177e4SLinus Torvalds */ 3381da177e4SLinus Torvalds AHD_SEQUENCER_DEBUG = 0x00008, 3391da177e4SLinus Torvalds AHD_RESET_BUS_A = 0x00010, 3401da177e4SLinus Torvalds AHD_EXTENDED_TRANS_A = 0x00020, 3411da177e4SLinus Torvalds AHD_TERM_ENB_A = 0x00040, 3421da177e4SLinus Torvalds AHD_SPCHK_ENB_A = 0x00080, 3431da177e4SLinus Torvalds AHD_STPWLEVEL_A = 0x00100, 3441da177e4SLinus Torvalds AHD_INITIATORROLE = 0x00200,/* 3451da177e4SLinus Torvalds * Allow initiator operations on 3461da177e4SLinus Torvalds * this controller. 3471da177e4SLinus Torvalds */ 3481da177e4SLinus Torvalds AHD_TARGETROLE = 0x00400,/* 3491da177e4SLinus Torvalds * Allow target operations on this 3501da177e4SLinus Torvalds * controller. 3511da177e4SLinus Torvalds */ 3521da177e4SLinus Torvalds AHD_RESOURCE_SHORTAGE = 0x00800, 3531da177e4SLinus Torvalds AHD_TQINFIFO_BLOCKED = 0x01000,/* Blocked waiting for ATIOs */ 3541da177e4SLinus Torvalds AHD_INT50_SPEEDFLEX = 0x02000,/* 3551da177e4SLinus Torvalds * Internal 50pin connector 3561da177e4SLinus Torvalds * sits behind an aic3860 3571da177e4SLinus Torvalds */ 3581da177e4SLinus Torvalds AHD_BIOS_ENABLED = 0x04000, 3591da177e4SLinus Torvalds AHD_ALL_INTERRUPTS = 0x08000, 3601da177e4SLinus Torvalds AHD_39BIT_ADDRESSING = 0x10000,/* Use 39 bit addressing scheme. */ 3611da177e4SLinus Torvalds AHD_64BIT_ADDRESSING = 0x20000,/* Use 64 bit addressing scheme. */ 3621da177e4SLinus Torvalds AHD_CURRENT_SENSING = 0x40000, 3631da177e4SLinus Torvalds AHD_SCB_CONFIG_USED = 0x80000,/* No SEEPROM but SCB had info. */ 3641da177e4SLinus Torvalds AHD_HP_BOARD = 0x100000, 365f41b5cecSHannes Reinecke AHD_BUS_RESET_ACTIVE = 0x200000, 3661da177e4SLinus Torvalds AHD_UPDATE_PEND_CMDS = 0x400000, 3671da177e4SLinus Torvalds AHD_RUNNING_QOUTFIFO = 0x800000, 3681da177e4SLinus Torvalds AHD_HAD_FIRST_SEL = 0x1000000 3691da177e4SLinus Torvalds } ahd_flag; 3701da177e4SLinus Torvalds 3711da177e4SLinus Torvalds /************************* Hardware SCB Definition ***************************/ 3721da177e4SLinus Torvalds 3731da177e4SLinus Torvalds /* 3741da177e4SLinus Torvalds * The driver keeps up to MAX_SCB scb structures per card in memory. The SCB 3751da177e4SLinus Torvalds * consists of a "hardware SCB" mirroring the fields available on the card 3761da177e4SLinus Torvalds * and additional information the kernel stores for each transaction. 3771da177e4SLinus Torvalds * 3781da177e4SLinus Torvalds * To minimize space utilization, a portion of the hardware scb stores 3791da177e4SLinus Torvalds * different data during different portions of a SCSI transaction. 3801da177e4SLinus Torvalds * As initialized by the host driver for the initiator role, this area 3811da177e4SLinus Torvalds * contains the SCSI cdb (or a pointer to the cdb) to be executed. After 3821da177e4SLinus Torvalds * the cdb has been presented to the target, this area serves to store 3831da177e4SLinus Torvalds * residual transfer information and the SCSI status byte. 3841da177e4SLinus Torvalds * For the target role, the contents of this area do not change, but 3851da177e4SLinus Torvalds * still serve a different purpose than for the initiator role. See 3861da177e4SLinus Torvalds * struct target_data for details. 3871da177e4SLinus Torvalds */ 3881da177e4SLinus Torvalds 3891da177e4SLinus Torvalds /* 3901da177e4SLinus Torvalds * Status information embedded in the shared poriton of 3911da177e4SLinus Torvalds * an SCB after passing the cdb to the target. The kernel 3921da177e4SLinus Torvalds * driver will only read this data for transactions that 3931da177e4SLinus Torvalds * complete abnormally. 3941da177e4SLinus Torvalds */ 3951da177e4SLinus Torvalds struct initiator_status { 3961da177e4SLinus Torvalds uint32_t residual_datacnt; /* Residual in the current S/G seg */ 3971da177e4SLinus Torvalds uint32_t residual_sgptr; /* The next S/G for this transfer */ 3981da177e4SLinus Torvalds uint8_t scsi_status; /* Standard SCSI status byte */ 3991da177e4SLinus Torvalds }; 4001da177e4SLinus Torvalds 4011da177e4SLinus Torvalds struct target_status { 4021da177e4SLinus Torvalds uint32_t residual_datacnt; /* Residual in the current S/G seg */ 4031da177e4SLinus Torvalds uint32_t residual_sgptr; /* The next S/G for this transfer */ 4041da177e4SLinus Torvalds uint8_t scsi_status; /* SCSI status to give to initiator */ 4051da177e4SLinus Torvalds uint8_t target_phases; /* Bitmap of phases to execute */ 4061da177e4SLinus Torvalds uint8_t data_phase; /* Data-In or Data-Out */ 4071da177e4SLinus Torvalds uint8_t initiator_tag; /* Initiator's transaction tag */ 4081da177e4SLinus Torvalds }; 4091da177e4SLinus Torvalds 4101da177e4SLinus Torvalds /* 4111da177e4SLinus Torvalds * Initiator mode SCB shared data area. 4121da177e4SLinus Torvalds * If the embedded CDB is 12 bytes or less, we embed 4131da177e4SLinus Torvalds * the sense buffer address in the SCB. This allows 4141da177e4SLinus Torvalds * us to retrieve sense information without interrupting 4151da177e4SLinus Torvalds * the host in packetized mode. 4161da177e4SLinus Torvalds */ 4171da177e4SLinus Torvalds typedef uint32_t sense_addr_t; 4181da177e4SLinus Torvalds #define MAX_CDB_LEN 16 4191da177e4SLinus Torvalds #define MAX_CDB_LEN_WITH_SENSE_ADDR (MAX_CDB_LEN - sizeof(sense_addr_t)) 4201da177e4SLinus Torvalds union initiator_data { 4211da177e4SLinus Torvalds struct { 4221da177e4SLinus Torvalds uint64_t cdbptr; 4231da177e4SLinus Torvalds uint8_t cdblen; 4241da177e4SLinus Torvalds } cdb_from_host; 4251da177e4SLinus Torvalds uint8_t cdb[MAX_CDB_LEN]; 4261da177e4SLinus Torvalds struct { 4271da177e4SLinus Torvalds uint8_t cdb[MAX_CDB_LEN_WITH_SENSE_ADDR]; 4281da177e4SLinus Torvalds sense_addr_t sense_addr; 4291da177e4SLinus Torvalds } cdb_plus_saddr; 4301da177e4SLinus Torvalds }; 4311da177e4SLinus Torvalds 4321da177e4SLinus Torvalds /* 4331da177e4SLinus Torvalds * Target mode version of the shared data SCB segment. 4341da177e4SLinus Torvalds */ 4351da177e4SLinus Torvalds struct target_data { 4361da177e4SLinus Torvalds uint32_t spare[2]; 4371da177e4SLinus Torvalds uint8_t scsi_status; /* SCSI status to give to initiator */ 4381da177e4SLinus Torvalds uint8_t target_phases; /* Bitmap of phases to execute */ 4391da177e4SLinus Torvalds uint8_t data_phase; /* Data-In or Data-Out */ 4401da177e4SLinus Torvalds uint8_t initiator_tag; /* Initiator's transaction tag */ 4411da177e4SLinus Torvalds }; 4421da177e4SLinus Torvalds 4431da177e4SLinus Torvalds struct hardware_scb { 4441da177e4SLinus Torvalds /*0*/ union { 4451da177e4SLinus Torvalds union initiator_data idata; 4461da177e4SLinus Torvalds struct target_data tdata; 4471da177e4SLinus Torvalds struct initiator_status istatus; 4481da177e4SLinus Torvalds struct target_status tstatus; 4491da177e4SLinus Torvalds } shared_data; 4501da177e4SLinus Torvalds /* 4511da177e4SLinus Torvalds * A word about residuals. 4521da177e4SLinus Torvalds * The scb is presented to the sequencer with the dataptr and datacnt 4531da177e4SLinus Torvalds * fields initialized to the contents of the first S/G element to 4541da177e4SLinus Torvalds * transfer. The sgptr field is initialized to the bus address for 4551da177e4SLinus Torvalds * the S/G element that follows the first in the in core S/G array 4561da177e4SLinus Torvalds * or'ed with the SG_FULL_RESID flag. Sgptr may point to an invalid 4571da177e4SLinus Torvalds * S/G entry for this transfer (single S/G element transfer with the 4581da177e4SLinus Torvalds * first elements address and length preloaded in the dataptr/datacnt 4591da177e4SLinus Torvalds * fields). If no transfer is to occur, sgptr is set to SG_LIST_NULL. 4601da177e4SLinus Torvalds * The SG_FULL_RESID flag ensures that the residual will be correctly 4611da177e4SLinus Torvalds * noted even if no data transfers occur. Once the data phase is entered, 4621da177e4SLinus Torvalds * the residual sgptr and datacnt are loaded from the sgptr and the 4631da177e4SLinus Torvalds * datacnt fields. After each S/G element's dataptr and length are 4641da177e4SLinus Torvalds * loaded into the hardware, the residual sgptr is advanced. After 4651da177e4SLinus Torvalds * each S/G element is expired, its datacnt field is checked to see 4661da177e4SLinus Torvalds * if the LAST_SEG flag is set. If so, SG_LIST_NULL is set in the 4671da177e4SLinus Torvalds * residual sg ptr and the transfer is considered complete. If the 4681da177e4SLinus Torvalds * sequencer determines that there is a residual in the tranfer, or 4691da177e4SLinus Torvalds * there is non-zero status, it will set the SG_STATUS_VALID flag in 4701da177e4SLinus Torvalds * sgptr and dma the scb back into host memory. To sumarize: 4711da177e4SLinus Torvalds * 4721da177e4SLinus Torvalds * Sequencer: 4731da177e4SLinus Torvalds * o A residual has occurred if SG_FULL_RESID is set in sgptr, 4741da177e4SLinus Torvalds * or residual_sgptr does not have SG_LIST_NULL set. 4751da177e4SLinus Torvalds * 476*25985edcSLucas De Marchi * o We are transferring the last segment if residual_datacnt has 4771da177e4SLinus Torvalds * the SG_LAST_SEG flag set. 4781da177e4SLinus Torvalds * 4791da177e4SLinus Torvalds * Host: 4801da177e4SLinus Torvalds * o A residual can only have occurred if a completed scb has the 4811da177e4SLinus Torvalds * SG_STATUS_VALID flag set. Inspection of the SCSI status field, 4821da177e4SLinus Torvalds * the residual_datacnt, and the residual_sgptr field will tell 4831da177e4SLinus Torvalds * for sure. 4841da177e4SLinus Torvalds * 4851da177e4SLinus Torvalds * o residual_sgptr and sgptr refer to the "next" sg entry 4861da177e4SLinus Torvalds * and so may point beyond the last valid sg entry for the 4871da177e4SLinus Torvalds * transfer. 4881da177e4SLinus Torvalds */ 4891da177e4SLinus Torvalds #define SG_PTR_MASK 0xFFFFFFF8 4901da177e4SLinus Torvalds /*16*/ uint16_t tag; /* Reused by Sequencer. */ 4911da177e4SLinus Torvalds /*18*/ uint8_t control; /* See SCB_CONTROL in aic79xx.reg for details */ 4921da177e4SLinus Torvalds /*19*/ uint8_t scsiid; /* 4931da177e4SLinus Torvalds * Selection out Id 4941da177e4SLinus Torvalds * Our Id (bits 0-3) Their ID (bits 4-7) 4951da177e4SLinus Torvalds */ 4961da177e4SLinus Torvalds /*20*/ uint8_t lun; 4971da177e4SLinus Torvalds /*21*/ uint8_t task_attribute; 4981da177e4SLinus Torvalds /*22*/ uint8_t cdb_len; 4991da177e4SLinus Torvalds /*23*/ uint8_t task_management; 5001da177e4SLinus Torvalds /*24*/ uint64_t dataptr; 5011da177e4SLinus Torvalds /*32*/ uint32_t datacnt; /* Byte 3 is spare. */ 5021da177e4SLinus Torvalds /*36*/ uint32_t sgptr; 5031da177e4SLinus Torvalds /*40*/ uint32_t hscb_busaddr; 5041da177e4SLinus Torvalds /*44*/ uint32_t next_hscb_busaddr; 5051da177e4SLinus Torvalds /********** Long lun field only downloaded for full 8 byte lun support ********/ 5061da177e4SLinus Torvalds /*48*/ uint8_t pkt_long_lun[8]; 5071da177e4SLinus Torvalds /******* Fields below are not Downloaded (Sequencer may use for scratch) ******/ 5081da177e4SLinus Torvalds /*56*/ uint8_t spare[8]; 5091da177e4SLinus Torvalds }; 5101da177e4SLinus Torvalds 5111da177e4SLinus Torvalds /************************ Kernel SCB Definitions ******************************/ 5121da177e4SLinus Torvalds /* 5131da177e4SLinus Torvalds * Some fields of the SCB are OS dependent. Here we collect the 5141da177e4SLinus Torvalds * definitions for elements that all OS platforms need to include 5151da177e4SLinus Torvalds * in there SCB definition. 5161da177e4SLinus Torvalds */ 5171da177e4SLinus Torvalds 5181da177e4SLinus Torvalds /* 519*25985edcSLucas De Marchi * Definition of a scatter/gather element as transferred to the controller. 5201da177e4SLinus Torvalds * The aic7xxx chips only support a 24bit length. We use the top byte of 5211da177e4SLinus Torvalds * the length to store additional address bits and a flag to indicate 5221da177e4SLinus Torvalds * that a given segment terminates the transfer. This gives us an 5231da177e4SLinus Torvalds * addressable range of 512GB on machines with 64bit PCI or with chips 5241da177e4SLinus Torvalds * that can support dual address cycles on 32bit PCI busses. 5251da177e4SLinus Torvalds */ 5261da177e4SLinus Torvalds struct ahd_dma_seg { 5271da177e4SLinus Torvalds uint32_t addr; 5281da177e4SLinus Torvalds uint32_t len; 5291da177e4SLinus Torvalds #define AHD_DMA_LAST_SEG 0x80000000 5301da177e4SLinus Torvalds #define AHD_SG_HIGH_ADDR_MASK 0x7F000000 5311da177e4SLinus Torvalds #define AHD_SG_LEN_MASK 0x00FFFFFF 5321da177e4SLinus Torvalds }; 5331da177e4SLinus Torvalds 5341da177e4SLinus Torvalds struct ahd_dma64_seg { 5351da177e4SLinus Torvalds uint64_t addr; 5361da177e4SLinus Torvalds uint32_t len; 5371da177e4SLinus Torvalds uint32_t pad; 5381da177e4SLinus Torvalds }; 5391da177e4SLinus Torvalds 5401da177e4SLinus Torvalds struct map_node { 5411da177e4SLinus Torvalds bus_dmamap_t dmamap; 5421da177e4SLinus Torvalds dma_addr_t physaddr; 5431da177e4SLinus Torvalds uint8_t *vaddr; 5441da177e4SLinus Torvalds SLIST_ENTRY(map_node) links; 5451da177e4SLinus Torvalds }; 5461da177e4SLinus Torvalds 5471da177e4SLinus Torvalds /* 5481da177e4SLinus Torvalds * The current state of this SCB. 5491da177e4SLinus Torvalds */ 5501da177e4SLinus Torvalds typedef enum { 5511da177e4SLinus Torvalds SCB_FLAG_NONE = 0x00000, 5521da177e4SLinus Torvalds SCB_TRANSMISSION_ERROR = 0x00001,/* 5531da177e4SLinus Torvalds * We detected a parity or CRC 5541da177e4SLinus Torvalds * error that has effected the 5551da177e4SLinus Torvalds * payload of the command. This 5561da177e4SLinus Torvalds * flag is checked when normal 5571da177e4SLinus Torvalds * status is returned to catch 5581da177e4SLinus Torvalds * the case of a target not 5591da177e4SLinus Torvalds * responding to our attempt 5601da177e4SLinus Torvalds * to report the error. 5611da177e4SLinus Torvalds */ 5621da177e4SLinus Torvalds SCB_OTHERTCL_TIMEOUT = 0x00002,/* 5631da177e4SLinus Torvalds * Another device was active 5641da177e4SLinus Torvalds * during the first timeout for 5651da177e4SLinus Torvalds * this SCB so we gave ourselves 5661da177e4SLinus Torvalds * an additional timeout period 5671da177e4SLinus Torvalds * in case it was hogging the 5681da177e4SLinus Torvalds * bus. 5691da177e4SLinus Torvalds */ 5701da177e4SLinus Torvalds SCB_DEVICE_RESET = 0x00004, 5711da177e4SLinus Torvalds SCB_SENSE = 0x00008, 5721da177e4SLinus Torvalds SCB_CDB32_PTR = 0x00010, 5731da177e4SLinus Torvalds SCB_RECOVERY_SCB = 0x00020, 5741da177e4SLinus Torvalds SCB_AUTO_NEGOTIATE = 0x00040,/* Negotiate to achieve goal. */ 5751da177e4SLinus Torvalds SCB_NEGOTIATE = 0x00080,/* Negotiation forced for command. */ 5761da177e4SLinus Torvalds SCB_ABORT = 0x00100, 5771da177e4SLinus Torvalds SCB_ACTIVE = 0x00200, 5781da177e4SLinus Torvalds SCB_TARGET_IMMEDIATE = 0x00400, 5791da177e4SLinus Torvalds SCB_PACKETIZED = 0x00800, 5801da177e4SLinus Torvalds SCB_EXPECT_PPR_BUSFREE = 0x01000, 5811da177e4SLinus Torvalds SCB_PKT_SENSE = 0x02000, 582b0d23648SHannes Reinecke SCB_EXTERNAL_RESET = 0x04000,/* Device was reset externally */ 5831da177e4SLinus Torvalds SCB_ON_COL_LIST = 0x08000, 5841da177e4SLinus Torvalds SCB_SILENT = 0x10000 /* 5851da177e4SLinus Torvalds * Be quiet about transmission type 5861da177e4SLinus Torvalds * errors. They are expected and we 5871da177e4SLinus Torvalds * don't want to upset the user. This 5881da177e4SLinus Torvalds * flag is typically used during DV. 5891da177e4SLinus Torvalds */ 5901da177e4SLinus Torvalds } scb_flag; 5911da177e4SLinus Torvalds 5921da177e4SLinus Torvalds struct scb { 5931da177e4SLinus Torvalds struct hardware_scb *hscb; 5941da177e4SLinus Torvalds union { 5951da177e4SLinus Torvalds SLIST_ENTRY(scb) sle; 5961da177e4SLinus Torvalds LIST_ENTRY(scb) le; 5971da177e4SLinus Torvalds TAILQ_ENTRY(scb) tqe; 5981da177e4SLinus Torvalds } links; 5991da177e4SLinus Torvalds union { 6001da177e4SLinus Torvalds SLIST_ENTRY(scb) sle; 6011da177e4SLinus Torvalds LIST_ENTRY(scb) le; 6021da177e4SLinus Torvalds TAILQ_ENTRY(scb) tqe; 6031da177e4SLinus Torvalds } links2; 6041da177e4SLinus Torvalds #define pending_links links2.le 6051da177e4SLinus Torvalds #define collision_links links2.le 6061da177e4SLinus Torvalds struct scb *col_scb; 6071da177e4SLinus Torvalds ahd_io_ctx_t io_ctx; 6081da177e4SLinus Torvalds struct ahd_softc *ahd_softc; 6091da177e4SLinus Torvalds scb_flag flags; 6101da177e4SLinus Torvalds #ifndef __linux__ 6111da177e4SLinus Torvalds bus_dmamap_t dmamap; 6121da177e4SLinus Torvalds #endif 6131da177e4SLinus Torvalds struct scb_platform_data *platform_data; 6141da177e4SLinus Torvalds struct map_node *hscb_map; 6151da177e4SLinus Torvalds struct map_node *sg_map; 6161da177e4SLinus Torvalds struct map_node *sense_map; 6171da177e4SLinus Torvalds void *sg_list; 6181da177e4SLinus Torvalds uint8_t *sense_data; 6191da177e4SLinus Torvalds dma_addr_t sg_list_busaddr; 6201da177e4SLinus Torvalds dma_addr_t sense_busaddr; 6211da177e4SLinus Torvalds u_int sg_count;/* How full ahd_dma_seg is */ 6221da177e4SLinus Torvalds #define AHD_MAX_LQ_CRC_ERRORS 5 6231da177e4SLinus Torvalds u_int crc_retry_count; 6241da177e4SLinus Torvalds }; 6251da177e4SLinus Torvalds 6261da177e4SLinus Torvalds TAILQ_HEAD(scb_tailq, scb); 6271da177e4SLinus Torvalds LIST_HEAD(scb_list, scb); 6281da177e4SLinus Torvalds 6291da177e4SLinus Torvalds struct scb_data { 6301da177e4SLinus Torvalds /* 6311da177e4SLinus Torvalds * TAILQ of lists of free SCBs grouped by device 6321da177e4SLinus Torvalds * collision domains. 6331da177e4SLinus Torvalds */ 6341da177e4SLinus Torvalds struct scb_tailq free_scbs; 6351da177e4SLinus Torvalds 6361da177e4SLinus Torvalds /* 6371da177e4SLinus Torvalds * Per-device lists of SCBs whose tag ID would collide 6381da177e4SLinus Torvalds * with an already active tag on the device. 6391da177e4SLinus Torvalds */ 6401da177e4SLinus Torvalds struct scb_list free_scb_lists[AHD_NUM_TARGETS * AHD_NUM_LUNS_NONPKT]; 6411da177e4SLinus Torvalds 6421da177e4SLinus Torvalds /* 6431da177e4SLinus Torvalds * SCBs that will not collide with any active device. 6441da177e4SLinus Torvalds */ 6451da177e4SLinus Torvalds struct scb_list any_dev_free_scb_list; 6461da177e4SLinus Torvalds 6471da177e4SLinus Torvalds /* 6481da177e4SLinus Torvalds * Mapping from tag to SCB. 6491da177e4SLinus Torvalds */ 6501da177e4SLinus Torvalds struct scb *scbindex[AHD_SCB_MAX]; 6511da177e4SLinus Torvalds 6521da177e4SLinus Torvalds /* 6531da177e4SLinus Torvalds * "Bus" addresses of our data structures. 6541da177e4SLinus Torvalds */ 6551da177e4SLinus Torvalds bus_dma_tag_t hscb_dmat; /* dmat for our hardware SCB array */ 6561da177e4SLinus Torvalds bus_dma_tag_t sg_dmat; /* dmat for our sg segments */ 6571da177e4SLinus Torvalds bus_dma_tag_t sense_dmat; /* dmat for our sense buffers */ 6581da177e4SLinus Torvalds SLIST_HEAD(, map_node) hscb_maps; 6591da177e4SLinus Torvalds SLIST_HEAD(, map_node) sg_maps; 6601da177e4SLinus Torvalds SLIST_HEAD(, map_node) sense_maps; 6611da177e4SLinus Torvalds int scbs_left; /* unallocated scbs in head map_node */ 6621da177e4SLinus Torvalds int sgs_left; /* unallocated sgs in head map_node */ 6631da177e4SLinus Torvalds int sense_left; /* unallocated sense in head map_node */ 6641da177e4SLinus Torvalds uint16_t numscbs; 6651da177e4SLinus Torvalds uint16_t maxhscbs; /* Number of SCBs on the card */ 6661da177e4SLinus Torvalds uint8_t init_level; /* 6671da177e4SLinus Torvalds * How far we've initialized 6681da177e4SLinus Torvalds * this structure. 6691da177e4SLinus Torvalds */ 6701da177e4SLinus Torvalds }; 6711da177e4SLinus Torvalds 6721da177e4SLinus Torvalds /************************ Target Mode Definitions *****************************/ 6731da177e4SLinus Torvalds 6741da177e4SLinus Torvalds /* 6755a3a7658SJustin P. Mattock * Connection descriptor for select-in requests in target mode. 6761da177e4SLinus Torvalds */ 6771da177e4SLinus Torvalds struct target_cmd { 6781da177e4SLinus Torvalds uint8_t scsiid; /* Our ID and the initiator's ID */ 6791da177e4SLinus Torvalds uint8_t identify; /* Identify message */ 6801da177e4SLinus Torvalds uint8_t bytes[22]; /* 6811da177e4SLinus Torvalds * Bytes contains any additional message 6821da177e4SLinus Torvalds * bytes terminated by 0xFF. The remainder 6831da177e4SLinus Torvalds * is the cdb to execute. 6841da177e4SLinus Torvalds */ 6851da177e4SLinus Torvalds uint8_t cmd_valid; /* 6861da177e4SLinus Torvalds * When a command is complete, the firmware 6871da177e4SLinus Torvalds * will set cmd_valid to all bits set. 6881da177e4SLinus Torvalds * After the host has seen the command, 6891da177e4SLinus Torvalds * the bits are cleared. This allows us 6901da177e4SLinus Torvalds * to just peek at host memory to determine 6911da177e4SLinus Torvalds * if more work is complete. cmd_valid is on 6921da177e4SLinus Torvalds * an 8 byte boundary to simplify setting 6931da177e4SLinus Torvalds * it on aic7880 hardware which only has 6941da177e4SLinus Torvalds * limited direct access to the DMA FIFO. 6951da177e4SLinus Torvalds */ 6961da177e4SLinus Torvalds uint8_t pad[7]; 6971da177e4SLinus Torvalds }; 6981da177e4SLinus Torvalds 6991da177e4SLinus Torvalds /* 7001da177e4SLinus Torvalds * Number of events we can buffer up if we run out 7011da177e4SLinus Torvalds * of immediate notify ccbs. 7021da177e4SLinus Torvalds */ 7031da177e4SLinus Torvalds #define AHD_TMODE_EVENT_BUFFER_SIZE 8 7041da177e4SLinus Torvalds struct ahd_tmode_event { 7051da177e4SLinus Torvalds uint8_t initiator_id; 7061da177e4SLinus Torvalds uint8_t event_type; /* MSG type or EVENT_TYPE_BUS_RESET */ 7071da177e4SLinus Torvalds #define EVENT_TYPE_BUS_RESET 0xFF 7081da177e4SLinus Torvalds uint8_t event_arg; 7091da177e4SLinus Torvalds }; 7101da177e4SLinus Torvalds 7111da177e4SLinus Torvalds /* 7121da177e4SLinus Torvalds * Per enabled lun target mode state. 7131da177e4SLinus Torvalds * As this state is directly influenced by the host OS'es target mode 7141da177e4SLinus Torvalds * environment, we let the OS module define it. Forward declare the 7151da177e4SLinus Torvalds * structure here so we can store arrays of them, etc. in OS neutral 7161da177e4SLinus Torvalds * data structures. 7171da177e4SLinus Torvalds */ 7181da177e4SLinus Torvalds #ifdef AHD_TARGET_MODE 7191da177e4SLinus Torvalds struct ahd_tmode_lstate { 7201da177e4SLinus Torvalds struct cam_path *path; 7211da177e4SLinus Torvalds struct ccb_hdr_slist accept_tios; 7221da177e4SLinus Torvalds struct ccb_hdr_slist immed_notifies; 7231da177e4SLinus Torvalds struct ahd_tmode_event event_buffer[AHD_TMODE_EVENT_BUFFER_SIZE]; 7241da177e4SLinus Torvalds uint8_t event_r_idx; 7251da177e4SLinus Torvalds uint8_t event_w_idx; 7261da177e4SLinus Torvalds }; 7271da177e4SLinus Torvalds #else 7281da177e4SLinus Torvalds struct ahd_tmode_lstate; 7291da177e4SLinus Torvalds #endif 7301da177e4SLinus Torvalds 7311da177e4SLinus Torvalds /******************** Transfer Negotiation Datastructures *********************/ 7321da177e4SLinus Torvalds #define AHD_TRANS_CUR 0x01 /* Modify current neogtiation status */ 7331da177e4SLinus Torvalds #define AHD_TRANS_ACTIVE 0x03 /* Assume this target is on the bus */ 7341da177e4SLinus Torvalds #define AHD_TRANS_GOAL 0x04 /* Modify negotiation goal */ 7351da177e4SLinus Torvalds #define AHD_TRANS_USER 0x08 /* Modify user negotiation settings */ 7361da177e4SLinus Torvalds #define AHD_PERIOD_10MHz 0x19 7371da177e4SLinus Torvalds 7381da177e4SLinus Torvalds #define AHD_WIDTH_UNKNOWN 0xFF 7391da177e4SLinus Torvalds #define AHD_PERIOD_UNKNOWN 0xFF 7401da177e4SLinus Torvalds #define AHD_OFFSET_UNKNOWN 0xFF 7411da177e4SLinus Torvalds #define AHD_PPR_OPTS_UNKNOWN 0xFF 7421da177e4SLinus Torvalds 7431da177e4SLinus Torvalds /* 7441da177e4SLinus Torvalds * Transfer Negotiation Information. 7451da177e4SLinus Torvalds */ 7461da177e4SLinus Torvalds struct ahd_transinfo { 7471da177e4SLinus Torvalds uint8_t protocol_version; /* SCSI Revision level */ 7481da177e4SLinus Torvalds uint8_t transport_version; /* SPI Revision level */ 7491da177e4SLinus Torvalds uint8_t width; /* Bus width */ 7501da177e4SLinus Torvalds uint8_t period; /* Sync rate factor */ 7511da177e4SLinus Torvalds uint8_t offset; /* Sync offset */ 7521da177e4SLinus Torvalds uint8_t ppr_options; /* Parallel Protocol Request options */ 7531da177e4SLinus Torvalds }; 7541da177e4SLinus Torvalds 7551da177e4SLinus Torvalds /* 7561da177e4SLinus Torvalds * Per-initiator current, goal and user transfer negotiation information. */ 7571da177e4SLinus Torvalds struct ahd_initiator_tinfo { 7581da177e4SLinus Torvalds struct ahd_transinfo curr; 7591da177e4SLinus Torvalds struct ahd_transinfo goal; 7601da177e4SLinus Torvalds struct ahd_transinfo user; 7611da177e4SLinus Torvalds }; 7621da177e4SLinus Torvalds 7631da177e4SLinus Torvalds /* 7641da177e4SLinus Torvalds * Per enabled target ID state. 7651da177e4SLinus Torvalds * Pointers to lun target state as well as sync/wide negotiation information 7661da177e4SLinus Torvalds * for each initiator<->target mapping. For the initiator role we pretend 7671da177e4SLinus Torvalds * that we are the target and the targets are the initiators since the 7681da177e4SLinus Torvalds * negotiation is the same regardless of role. 7691da177e4SLinus Torvalds */ 7701da177e4SLinus Torvalds struct ahd_tmode_tstate { 7711da177e4SLinus Torvalds struct ahd_tmode_lstate* enabled_luns[AHD_NUM_LUNS]; 7721da177e4SLinus Torvalds struct ahd_initiator_tinfo transinfo[AHD_NUM_TARGETS]; 7731da177e4SLinus Torvalds 7741da177e4SLinus Torvalds /* 7751da177e4SLinus Torvalds * Per initiator state bitmasks. 7761da177e4SLinus Torvalds */ 7771da177e4SLinus Torvalds uint16_t auto_negotiate;/* Auto Negotiation Required */ 7781da177e4SLinus Torvalds uint16_t discenable; /* Disconnection allowed */ 7791da177e4SLinus Torvalds uint16_t tagenable; /* Tagged Queuing allowed */ 7801da177e4SLinus Torvalds }; 7811da177e4SLinus Torvalds 7821da177e4SLinus Torvalds /* 7831da177e4SLinus Torvalds * Points of interest along the negotiated transfer scale. 7841da177e4SLinus Torvalds */ 7851da177e4SLinus Torvalds #define AHD_SYNCRATE_160 0x8 7861da177e4SLinus Torvalds #define AHD_SYNCRATE_PACED 0x8 7871da177e4SLinus Torvalds #define AHD_SYNCRATE_DT 0x9 7881da177e4SLinus Torvalds #define AHD_SYNCRATE_ULTRA2 0xa 7891da177e4SLinus Torvalds #define AHD_SYNCRATE_ULTRA 0xc 7901da177e4SLinus Torvalds #define AHD_SYNCRATE_FAST 0x19 7911da177e4SLinus Torvalds #define AHD_SYNCRATE_MIN_DT AHD_SYNCRATE_FAST 7921da177e4SLinus Torvalds #define AHD_SYNCRATE_SYNC 0x32 7931da177e4SLinus Torvalds #define AHD_SYNCRATE_MIN 0x60 7941da177e4SLinus Torvalds #define AHD_SYNCRATE_ASYNC 0xFF 7951da177e4SLinus Torvalds #define AHD_SYNCRATE_MAX AHD_SYNCRATE_160 7961da177e4SLinus Torvalds 7971da177e4SLinus Torvalds /* Safe and valid period for async negotiations. */ 7981da177e4SLinus Torvalds #define AHD_ASYNC_XFER_PERIOD 0x44 7991da177e4SLinus Torvalds 8001da177e4SLinus Torvalds /* 8011da177e4SLinus Torvalds * In RevA, the synctable uses a 120MHz rate for the period 8021da177e4SLinus Torvalds * factor 8 and 160MHz for the period factor 7. The 120MHz 8031da177e4SLinus Torvalds * rate never made it into the official SCSI spec, so we must 8041da177e4SLinus Torvalds * compensate when setting the negotiation table for Rev A 8051da177e4SLinus Torvalds * parts. 8061da177e4SLinus Torvalds */ 8071da177e4SLinus Torvalds #define AHD_SYNCRATE_REVA_120 0x8 8081da177e4SLinus Torvalds #define AHD_SYNCRATE_REVA_160 0x7 8091da177e4SLinus Torvalds 8101da177e4SLinus Torvalds /***************************** Lookup Tables **********************************/ 8111da177e4SLinus Torvalds /* 8121da177e4SLinus Torvalds * Phase -> name and message out response 8131da177e4SLinus Torvalds * to parity errors in each phase table. 8141da177e4SLinus Torvalds */ 8151da177e4SLinus Torvalds struct ahd_phase_table_entry { 8161da177e4SLinus Torvalds uint8_t phase; 8171da177e4SLinus Torvalds uint8_t mesg_out; /* Message response to parity errors */ 818980b306aSDenys Vlasenko const char *phasemsg; 8191da177e4SLinus Torvalds }; 8201da177e4SLinus Torvalds 8211da177e4SLinus Torvalds /************************** Serial EEPROM Format ******************************/ 8221da177e4SLinus Torvalds 8231da177e4SLinus Torvalds struct seeprom_config { 8241da177e4SLinus Torvalds /* 8251da177e4SLinus Torvalds * Per SCSI ID Configuration Flags 8261da177e4SLinus Torvalds */ 8271da177e4SLinus Torvalds uint16_t device_flags[16]; /* words 0-15 */ 8281da177e4SLinus Torvalds #define CFXFER 0x003F /* synchronous transfer rate */ 8291da177e4SLinus Torvalds #define CFXFER_ASYNC 0x3F 8301da177e4SLinus Torvalds #define CFQAS 0x0040 /* Negotiate QAS */ 8311da177e4SLinus Torvalds #define CFPACKETIZED 0x0080 /* Negotiate Packetized Transfers */ 8321da177e4SLinus Torvalds #define CFSTART 0x0100 /* send start unit SCSI command */ 8331da177e4SLinus Torvalds #define CFINCBIOS 0x0200 /* include in BIOS scan */ 8341da177e4SLinus Torvalds #define CFDISC 0x0400 /* enable disconnection */ 8351da177e4SLinus Torvalds #define CFMULTILUNDEV 0x0800 /* Probe multiple luns in BIOS scan */ 8361da177e4SLinus Torvalds #define CFWIDEB 0x1000 /* wide bus device */ 8371da177e4SLinus Torvalds #define CFHOSTMANAGED 0x8000 /* Managed by a RAID controller */ 8381da177e4SLinus Torvalds 8391da177e4SLinus Torvalds /* 8401da177e4SLinus Torvalds * BIOS Control Bits 8411da177e4SLinus Torvalds */ 8421da177e4SLinus Torvalds uint16_t bios_control; /* word 16 */ 8431da177e4SLinus Torvalds #define CFSUPREM 0x0001 /* support all removeable drives */ 8441da177e4SLinus Torvalds #define CFSUPREMB 0x0002 /* support removeable boot drives */ 8451da177e4SLinus Torvalds #define CFBIOSSTATE 0x000C /* BIOS Action State */ 8461da177e4SLinus Torvalds #define CFBS_DISABLED 0x00 8471da177e4SLinus Torvalds #define CFBS_ENABLED 0x04 8481da177e4SLinus Torvalds #define CFBS_DISABLED_SCAN 0x08 8491da177e4SLinus Torvalds #define CFENABLEDV 0x0010 /* Perform Domain Validation */ 8501da177e4SLinus Torvalds #define CFCTRL_A 0x0020 /* BIOS displays Ctrl-A message */ 8511da177e4SLinus Torvalds #define CFSPARITY 0x0040 /* SCSI parity */ 8521da177e4SLinus Torvalds #define CFEXTEND 0x0080 /* extended translation enabled */ 8531da177e4SLinus Torvalds #define CFBOOTCD 0x0100 /* Support Bootable CD-ROM */ 8541da177e4SLinus Torvalds #define CFMSG_LEVEL 0x0600 /* BIOS Message Level */ 8551da177e4SLinus Torvalds #define CFMSG_VERBOSE 0x0000 8561da177e4SLinus Torvalds #define CFMSG_SILENT 0x0200 8571da177e4SLinus Torvalds #define CFMSG_DIAG 0x0400 8581da177e4SLinus Torvalds #define CFRESETB 0x0800 /* reset SCSI bus at boot */ 8591da177e4SLinus Torvalds /* UNUSED 0xf000 */ 8601da177e4SLinus Torvalds 8611da177e4SLinus Torvalds /* 8621da177e4SLinus Torvalds * Host Adapter Control Bits 8631da177e4SLinus Torvalds */ 8641da177e4SLinus Torvalds uint16_t adapter_control; /* word 17 */ 8651da177e4SLinus Torvalds #define CFAUTOTERM 0x0001 /* Perform Auto termination */ 8661da177e4SLinus Torvalds #define CFSTERM 0x0002 /* SCSI low byte termination */ 8671da177e4SLinus Torvalds #define CFWSTERM 0x0004 /* SCSI high byte termination */ 8681da177e4SLinus Torvalds #define CFSEAUTOTERM 0x0008 /* Ultra2 Perform secondary Auto Term*/ 8691da177e4SLinus Torvalds #define CFSELOWTERM 0x0010 /* Ultra2 secondary low term */ 8701da177e4SLinus Torvalds #define CFSEHIGHTERM 0x0020 /* Ultra2 secondary high term */ 8711da177e4SLinus Torvalds #define CFSTPWLEVEL 0x0040 /* Termination level control */ 8721da177e4SLinus Torvalds #define CFBIOSAUTOTERM 0x0080 /* Perform Auto termination */ 8731da177e4SLinus Torvalds #define CFTERM_MENU 0x0100 /* BIOS displays termination menu */ 8741da177e4SLinus Torvalds #define CFCLUSTERENB 0x8000 /* Cluster Enable */ 8751da177e4SLinus Torvalds 8761da177e4SLinus Torvalds /* 8771da177e4SLinus Torvalds * Bus Release Time, Host Adapter ID 8781da177e4SLinus Torvalds */ 8791da177e4SLinus Torvalds uint16_t brtime_id; /* word 18 */ 8801da177e4SLinus Torvalds #define CFSCSIID 0x000f /* host adapter SCSI ID */ 8811da177e4SLinus Torvalds /* UNUSED 0x00f0 */ 8821da177e4SLinus Torvalds #define CFBRTIME 0xff00 /* bus release time/PCI Latency Time */ 8831da177e4SLinus Torvalds 8841da177e4SLinus Torvalds /* 8851da177e4SLinus Torvalds * Maximum targets 8861da177e4SLinus Torvalds */ 8871da177e4SLinus Torvalds uint16_t max_targets; /* word 19 */ 8881da177e4SLinus Torvalds #define CFMAXTARG 0x00ff /* maximum targets */ 8891da177e4SLinus Torvalds #define CFBOOTLUN 0x0f00 /* Lun to boot from */ 8901da177e4SLinus Torvalds #define CFBOOTID 0xf000 /* Target to boot from */ 8911da177e4SLinus Torvalds uint16_t res_1[10]; /* words 20-29 */ 8921da177e4SLinus Torvalds uint16_t signature; /* BIOS Signature */ 8931da177e4SLinus Torvalds #define CFSIGNATURE 0x400 8941da177e4SLinus Torvalds uint16_t checksum; /* word 31 */ 8951da177e4SLinus Torvalds }; 8961da177e4SLinus Torvalds 8971da177e4SLinus Torvalds /* 8981da177e4SLinus Torvalds * Vital Product Data used during POST and by the BIOS. 8991da177e4SLinus Torvalds */ 9001da177e4SLinus Torvalds struct vpd_config { 9011da177e4SLinus Torvalds uint8_t bios_flags; 9021da177e4SLinus Torvalds #define VPDMASTERBIOS 0x0001 9031da177e4SLinus Torvalds #define VPDBOOTHOST 0x0002 9041da177e4SLinus Torvalds uint8_t reserved_1[21]; 9051da177e4SLinus Torvalds uint8_t resource_type; 9061da177e4SLinus Torvalds uint8_t resource_len[2]; 9071da177e4SLinus Torvalds uint8_t resource_data[8]; 9081da177e4SLinus Torvalds uint8_t vpd_tag; 9091da177e4SLinus Torvalds uint16_t vpd_len; 9101da177e4SLinus Torvalds uint8_t vpd_keyword[2]; 9111da177e4SLinus Torvalds uint8_t length; 9121da177e4SLinus Torvalds uint8_t revision; 9131da177e4SLinus Torvalds uint8_t device_flags; 9141da177e4SLinus Torvalds uint8_t termnation_menus[2]; 9151da177e4SLinus Torvalds uint8_t fifo_threshold; 9161da177e4SLinus Torvalds uint8_t end_tag; 9171da177e4SLinus Torvalds uint8_t vpd_checksum; 9181da177e4SLinus Torvalds uint16_t default_target_flags; 9191da177e4SLinus Torvalds uint16_t default_bios_flags; 9201da177e4SLinus Torvalds uint16_t default_ctrl_flags; 9211da177e4SLinus Torvalds uint8_t default_irq; 9221da177e4SLinus Torvalds uint8_t pci_lattime; 9231da177e4SLinus Torvalds uint8_t max_target; 9241da177e4SLinus Torvalds uint8_t boot_lun; 9251da177e4SLinus Torvalds uint16_t signature; 9261da177e4SLinus Torvalds uint8_t reserved_2; 9271da177e4SLinus Torvalds uint8_t checksum; 9281da177e4SLinus Torvalds uint8_t reserved_3[4]; 9291da177e4SLinus Torvalds }; 9301da177e4SLinus Torvalds 9311da177e4SLinus Torvalds /****************************** Flexport Logic ********************************/ 9321da177e4SLinus Torvalds #define FLXADDR_TERMCTL 0x0 9331da177e4SLinus Torvalds #define FLX_TERMCTL_ENSECHIGH 0x8 9341da177e4SLinus Torvalds #define FLX_TERMCTL_ENSECLOW 0x4 9351da177e4SLinus Torvalds #define FLX_TERMCTL_ENPRIHIGH 0x2 9361da177e4SLinus Torvalds #define FLX_TERMCTL_ENPRILOW 0x1 9371da177e4SLinus Torvalds #define FLXADDR_ROMSTAT_CURSENSECTL 0x1 9381da177e4SLinus Torvalds #define FLX_ROMSTAT_SEECFG 0xF0 9391da177e4SLinus Torvalds #define FLX_ROMSTAT_EECFG 0x0F 9401da177e4SLinus Torvalds #define FLX_ROMSTAT_SEE_93C66 0x00 9411da177e4SLinus Torvalds #define FLX_ROMSTAT_SEE_NONE 0xF0 9421da177e4SLinus Torvalds #define FLX_ROMSTAT_EE_512x8 0x0 9431da177e4SLinus Torvalds #define FLX_ROMSTAT_EE_1MBx8 0x1 9441da177e4SLinus Torvalds #define FLX_ROMSTAT_EE_2MBx8 0x2 9451da177e4SLinus Torvalds #define FLX_ROMSTAT_EE_4MBx8 0x3 9461da177e4SLinus Torvalds #define FLX_ROMSTAT_EE_16MBx8 0x4 9471da177e4SLinus Torvalds #define CURSENSE_ENB 0x1 9481da177e4SLinus Torvalds #define FLXADDR_FLEXSTAT 0x2 9491da177e4SLinus Torvalds #define FLX_FSTAT_BUSY 0x1 9501da177e4SLinus Torvalds #define FLXADDR_CURRENT_STAT 0x4 9511da177e4SLinus Torvalds #define FLX_CSTAT_SEC_HIGH 0xC0 9521da177e4SLinus Torvalds #define FLX_CSTAT_SEC_LOW 0x30 9531da177e4SLinus Torvalds #define FLX_CSTAT_PRI_HIGH 0x0C 9541da177e4SLinus Torvalds #define FLX_CSTAT_PRI_LOW 0x03 9551da177e4SLinus Torvalds #define FLX_CSTAT_MASK 0x03 9561da177e4SLinus Torvalds #define FLX_CSTAT_SHIFT 2 9571da177e4SLinus Torvalds #define FLX_CSTAT_OKAY 0x0 9581da177e4SLinus Torvalds #define FLX_CSTAT_OVER 0x1 9591da177e4SLinus Torvalds #define FLX_CSTAT_UNDER 0x2 9601da177e4SLinus Torvalds #define FLX_CSTAT_INVALID 0x3 9611da177e4SLinus Torvalds 9621da177e4SLinus Torvalds int ahd_read_seeprom(struct ahd_softc *ahd, uint16_t *buf, 9631da177e4SLinus Torvalds u_int start_addr, u_int count, int bstream); 9641da177e4SLinus Torvalds 9651da177e4SLinus Torvalds int ahd_write_seeprom(struct ahd_softc *ahd, uint16_t *buf, 9661da177e4SLinus Torvalds u_int start_addr, u_int count); 9671da177e4SLinus Torvalds int ahd_verify_cksum(struct seeprom_config *sc); 9681da177e4SLinus Torvalds int ahd_acquire_seeprom(struct ahd_softc *ahd); 9691da177e4SLinus Torvalds void ahd_release_seeprom(struct ahd_softc *ahd); 9701da177e4SLinus Torvalds 9711da177e4SLinus Torvalds /**************************** Message Buffer *********************************/ 9721da177e4SLinus Torvalds typedef enum { 9731da177e4SLinus Torvalds MSG_FLAG_NONE = 0x00, 9741da177e4SLinus Torvalds MSG_FLAG_EXPECT_PPR_BUSFREE = 0x01, 9751da177e4SLinus Torvalds MSG_FLAG_IU_REQ_CHANGED = 0x02, 9761da177e4SLinus Torvalds MSG_FLAG_EXPECT_IDE_BUSFREE = 0x04, 9771da177e4SLinus Torvalds MSG_FLAG_EXPECT_QASREJ_BUSFREE = 0x08, 9781da177e4SLinus Torvalds MSG_FLAG_PACKETIZED = 0x10 9791da177e4SLinus Torvalds } ahd_msg_flags; 9801da177e4SLinus Torvalds 9811da177e4SLinus Torvalds typedef enum { 9821da177e4SLinus Torvalds MSG_TYPE_NONE = 0x00, 9831da177e4SLinus Torvalds MSG_TYPE_INITIATOR_MSGOUT = 0x01, 9841da177e4SLinus Torvalds MSG_TYPE_INITIATOR_MSGIN = 0x02, 9851da177e4SLinus Torvalds MSG_TYPE_TARGET_MSGOUT = 0x03, 9861da177e4SLinus Torvalds MSG_TYPE_TARGET_MSGIN = 0x04 9871da177e4SLinus Torvalds } ahd_msg_type; 9881da177e4SLinus Torvalds 9891da177e4SLinus Torvalds typedef enum { 9901da177e4SLinus Torvalds MSGLOOP_IN_PROG, 9911da177e4SLinus Torvalds MSGLOOP_MSGCOMPLETE, 9921da177e4SLinus Torvalds MSGLOOP_TERMINATED 9931da177e4SLinus Torvalds } msg_loop_stat; 9941da177e4SLinus Torvalds 9951da177e4SLinus Torvalds /*********************** Software Configuration Structure *********************/ 9961da177e4SLinus Torvalds struct ahd_suspend_channel_state { 9971da177e4SLinus Torvalds uint8_t scsiseq; 9981da177e4SLinus Torvalds uint8_t sxfrctl0; 9991da177e4SLinus Torvalds uint8_t sxfrctl1; 10001da177e4SLinus Torvalds uint8_t simode0; 10011da177e4SLinus Torvalds uint8_t simode1; 10021da177e4SLinus Torvalds uint8_t seltimer; 10031da177e4SLinus Torvalds uint8_t seqctl; 10041da177e4SLinus Torvalds }; 10051da177e4SLinus Torvalds 1006b5720729SHannes Reinecke struct ahd_suspend_pci_state { 1007b5720729SHannes Reinecke uint32_t devconfig; 1008b5720729SHannes Reinecke uint8_t command; 1009b5720729SHannes Reinecke uint8_t csize_lattime; 1010b5720729SHannes Reinecke }; 1011b5720729SHannes Reinecke 10121da177e4SLinus Torvalds struct ahd_suspend_state { 10131da177e4SLinus Torvalds struct ahd_suspend_channel_state channel[2]; 1014b5720729SHannes Reinecke struct ahd_suspend_pci_state pci_state; 10151da177e4SLinus Torvalds uint8_t optionmode; 10161da177e4SLinus Torvalds uint8_t dscommand0; 10171da177e4SLinus Torvalds uint8_t dspcistatus; 10181da177e4SLinus Torvalds /* hsmailbox */ 10191da177e4SLinus Torvalds uint8_t crccontrol1; 10201da177e4SLinus Torvalds uint8_t scbbaddr; 10211da177e4SLinus Torvalds /* Host and sequencer SCB counts */ 10221da177e4SLinus Torvalds uint8_t dff_thrsh; 10231da177e4SLinus Torvalds uint8_t *scratch_ram; 10241da177e4SLinus Torvalds uint8_t *btt; 10251da177e4SLinus Torvalds }; 10261da177e4SLinus Torvalds 10271da177e4SLinus Torvalds typedef void (*ahd_bus_intr_t)(struct ahd_softc *); 10281da177e4SLinus Torvalds 10291da177e4SLinus Torvalds typedef enum { 10301da177e4SLinus Torvalds AHD_MODE_DFF0, 10311da177e4SLinus Torvalds AHD_MODE_DFF1, 10321da177e4SLinus Torvalds AHD_MODE_CCHAN, 10331da177e4SLinus Torvalds AHD_MODE_SCSI, 10341da177e4SLinus Torvalds AHD_MODE_CFG, 10351da177e4SLinus Torvalds AHD_MODE_UNKNOWN 10361da177e4SLinus Torvalds } ahd_mode; 10371da177e4SLinus Torvalds 10381da177e4SLinus Torvalds #define AHD_MK_MSK(x) (0x01 << (x)) 10391da177e4SLinus Torvalds #define AHD_MODE_DFF0_MSK AHD_MK_MSK(AHD_MODE_DFF0) 10401da177e4SLinus Torvalds #define AHD_MODE_DFF1_MSK AHD_MK_MSK(AHD_MODE_DFF1) 10411da177e4SLinus Torvalds #define AHD_MODE_CCHAN_MSK AHD_MK_MSK(AHD_MODE_CCHAN) 10421da177e4SLinus Torvalds #define AHD_MODE_SCSI_MSK AHD_MK_MSK(AHD_MODE_SCSI) 10431da177e4SLinus Torvalds #define AHD_MODE_CFG_MSK AHD_MK_MSK(AHD_MODE_CFG) 10441da177e4SLinus Torvalds #define AHD_MODE_UNKNOWN_MSK AHD_MK_MSK(AHD_MODE_UNKNOWN) 10451da177e4SLinus Torvalds #define AHD_MODE_ANY_MSK (~0) 10461da177e4SLinus Torvalds 10471da177e4SLinus Torvalds typedef uint8_t ahd_mode_state; 10481da177e4SLinus Torvalds 10491da177e4SLinus Torvalds typedef void ahd_callback_t (void *); 10501da177e4SLinus Torvalds 105111668bb6SHannes Reinecke struct ahd_completion 105211668bb6SHannes Reinecke { 105311668bb6SHannes Reinecke uint16_t tag; 105411668bb6SHannes Reinecke uint8_t sg_status; 105511668bb6SHannes Reinecke uint8_t valid_tag; 105611668bb6SHannes Reinecke }; 105711668bb6SHannes Reinecke 10581da177e4SLinus Torvalds struct ahd_softc { 10591da177e4SLinus Torvalds bus_space_tag_t tags[2]; 10601da177e4SLinus Torvalds bus_space_handle_t bshs[2]; 10611da177e4SLinus Torvalds #ifndef __linux__ 10621da177e4SLinus Torvalds bus_dma_tag_t buffer_dmat; /* dmat for buffer I/O */ 10631da177e4SLinus Torvalds #endif 10641da177e4SLinus Torvalds struct scb_data scb_data; 10651da177e4SLinus Torvalds 10661da177e4SLinus Torvalds struct hardware_scb *next_queued_hscb; 106766a0683eSHannes Reinecke struct map_node *next_queued_hscb_map; 10681da177e4SLinus Torvalds 10691da177e4SLinus Torvalds /* 10701da177e4SLinus Torvalds * SCBs that have been sent to the controller 10711da177e4SLinus Torvalds */ 10721da177e4SLinus Torvalds LIST_HEAD(, scb) pending_scbs; 10731da177e4SLinus Torvalds 10741da177e4SLinus Torvalds /* 10751da177e4SLinus Torvalds * Current register window mode information. 10761da177e4SLinus Torvalds */ 10771da177e4SLinus Torvalds ahd_mode dst_mode; 10781da177e4SLinus Torvalds ahd_mode src_mode; 10791da177e4SLinus Torvalds 10801da177e4SLinus Torvalds /* 10811da177e4SLinus Torvalds * Saved register window mode information 10821da177e4SLinus Torvalds * used for restore on next unpause. 10831da177e4SLinus Torvalds */ 10841da177e4SLinus Torvalds ahd_mode saved_dst_mode; 10851da177e4SLinus Torvalds ahd_mode saved_src_mode; 10861da177e4SLinus Torvalds 10871da177e4SLinus Torvalds /* 10881da177e4SLinus Torvalds * Platform specific data. 10891da177e4SLinus Torvalds */ 10901da177e4SLinus Torvalds struct ahd_platform_data *platform_data; 10911da177e4SLinus Torvalds 10921da177e4SLinus Torvalds /* 10931da177e4SLinus Torvalds * Platform specific device information. 10941da177e4SLinus Torvalds */ 10951da177e4SLinus Torvalds ahd_dev_softc_t dev_softc; 10961da177e4SLinus Torvalds 10971da177e4SLinus Torvalds /* 10981da177e4SLinus Torvalds * Bus specific device information. 10991da177e4SLinus Torvalds */ 11001da177e4SLinus Torvalds ahd_bus_intr_t bus_intr; 11011da177e4SLinus Torvalds 11021da177e4SLinus Torvalds /* 11031da177e4SLinus Torvalds * Target mode related state kept on a per enabled lun basis. 11041da177e4SLinus Torvalds * Targets that are not enabled will have null entries. 11051da177e4SLinus Torvalds * As an initiator, we keep one target entry for our initiator 11061da177e4SLinus Torvalds * ID to store our sync/wide transfer settings. 11071da177e4SLinus Torvalds */ 11081da177e4SLinus Torvalds struct ahd_tmode_tstate *enabled_targets[AHD_NUM_TARGETS]; 11091da177e4SLinus Torvalds 11101da177e4SLinus Torvalds /* 11111da177e4SLinus Torvalds * The black hole device responsible for handling requests for 11121da177e4SLinus Torvalds * disabled luns on enabled targets. 11131da177e4SLinus Torvalds */ 11141da177e4SLinus Torvalds struct ahd_tmode_lstate *black_hole; 11151da177e4SLinus Torvalds 11161da177e4SLinus Torvalds /* 11171da177e4SLinus Torvalds * Device instance currently on the bus awaiting a continue TIO 11181da177e4SLinus Torvalds * for a command that was not given the disconnect priveledge. 11191da177e4SLinus Torvalds */ 11201da177e4SLinus Torvalds struct ahd_tmode_lstate *pending_device; 11211da177e4SLinus Torvalds 11221da177e4SLinus Torvalds /* 11231da177e4SLinus Torvalds * Timer handles for timer driven callbacks. 11241da177e4SLinus Torvalds */ 11251da177e4SLinus Torvalds ahd_timer_t reset_timer; 11261da177e4SLinus Torvalds ahd_timer_t stat_timer; 11271da177e4SLinus Torvalds 11281da177e4SLinus Torvalds /* 11291da177e4SLinus Torvalds * Statistics. 11301da177e4SLinus Torvalds */ 11311da177e4SLinus Torvalds #define AHD_STAT_UPDATE_US 250000 /* 250ms */ 11321da177e4SLinus Torvalds #define AHD_STAT_BUCKETS 4 11331da177e4SLinus Torvalds u_int cmdcmplt_bucket; 11341da177e4SLinus Torvalds uint32_t cmdcmplt_counts[AHD_STAT_BUCKETS]; 11351da177e4SLinus Torvalds uint32_t cmdcmplt_total; 11361da177e4SLinus Torvalds 11371da177e4SLinus Torvalds /* 11381da177e4SLinus Torvalds * Card characteristics 11391da177e4SLinus Torvalds */ 11401da177e4SLinus Torvalds ahd_chip chip; 11411da177e4SLinus Torvalds ahd_feature features; 11421da177e4SLinus Torvalds ahd_bug bugs; 11431da177e4SLinus Torvalds ahd_flag flags; 11441da177e4SLinus Torvalds struct seeprom_config *seep_config; 11451da177e4SLinus Torvalds 11461da177e4SLinus Torvalds /* Command Queues */ 114711668bb6SHannes Reinecke struct ahd_completion *qoutfifo; 11481da177e4SLinus Torvalds uint16_t qoutfifonext; 11491da177e4SLinus Torvalds uint16_t qoutfifonext_valid_tag; 11501da177e4SLinus Torvalds uint16_t qinfifonext; 11511da177e4SLinus Torvalds uint16_t qinfifo[AHD_SCB_MAX]; 11521da177e4SLinus Torvalds 115366a0683eSHannes Reinecke /* 115466a0683eSHannes Reinecke * Our qfreeze count. The sequencer compares 115566a0683eSHannes Reinecke * this value with its own counter to determine 115666a0683eSHannes Reinecke * whether to allow selections to occur. 115766a0683eSHannes Reinecke */ 115866a0683eSHannes Reinecke uint16_t qfreeze_cnt; 115966a0683eSHannes Reinecke 116066a0683eSHannes Reinecke /* Values to store in the SEQCTL register for pause and unpause */ 116166a0683eSHannes Reinecke uint8_t unpause; 116266a0683eSHannes Reinecke uint8_t pause; 116366a0683eSHannes Reinecke 11641da177e4SLinus Torvalds /* Critical Section Data */ 11651da177e4SLinus Torvalds struct cs *critical_sections; 11661da177e4SLinus Torvalds u_int num_critical_sections; 11671da177e4SLinus Torvalds 11681da177e4SLinus Torvalds /* Buffer for handling packetized bitbucket. */ 11691da177e4SLinus Torvalds uint8_t *overrun_buf; 11701da177e4SLinus Torvalds 11711da177e4SLinus Torvalds /* Links for chaining softcs */ 11721da177e4SLinus Torvalds TAILQ_ENTRY(ahd_softc) links; 11731da177e4SLinus Torvalds 11741da177e4SLinus Torvalds /* Channel Names ('A', 'B', etc.) */ 11751da177e4SLinus Torvalds char channel; 11761da177e4SLinus Torvalds 11771da177e4SLinus Torvalds /* Initiator Bus ID */ 11781da177e4SLinus Torvalds uint8_t our_id; 11791da177e4SLinus Torvalds 11801da177e4SLinus Torvalds /* 11811da177e4SLinus Torvalds * Target incoming command FIFO. 11821da177e4SLinus Torvalds */ 11831da177e4SLinus Torvalds struct target_cmd *targetcmds; 11841da177e4SLinus Torvalds uint8_t tqinfifonext; 11851da177e4SLinus Torvalds 11861da177e4SLinus Torvalds /* 11871da177e4SLinus Torvalds * Cached verson of the hs_mailbox so we can avoid 11881da177e4SLinus Torvalds * pausing the sequencer during mailbox updates. 11891da177e4SLinus Torvalds */ 11901da177e4SLinus Torvalds uint8_t hs_mailbox; 11911da177e4SLinus Torvalds 11921da177e4SLinus Torvalds /* 11931da177e4SLinus Torvalds * Incoming and outgoing message handling. 11941da177e4SLinus Torvalds */ 11951da177e4SLinus Torvalds uint8_t send_msg_perror; 11961da177e4SLinus Torvalds ahd_msg_flags msg_flags; 11971da177e4SLinus Torvalds ahd_msg_type msg_type; 11981da177e4SLinus Torvalds uint8_t msgout_buf[12];/* Message we are sending */ 11991da177e4SLinus Torvalds uint8_t msgin_buf[12];/* Message we are receiving */ 12001da177e4SLinus Torvalds u_int msgout_len; /* Length of message to send */ 12011da177e4SLinus Torvalds u_int msgout_index; /* Current index in msgout */ 12021da177e4SLinus Torvalds u_int msgin_index; /* Current index in msgin */ 12031da177e4SLinus Torvalds 12041da177e4SLinus Torvalds /* 12051da177e4SLinus Torvalds * Mapping information for data structures shared 12061da177e4SLinus Torvalds * between the sequencer and kernel. 12071da177e4SLinus Torvalds */ 12081da177e4SLinus Torvalds bus_dma_tag_t parent_dmat; 12091da177e4SLinus Torvalds bus_dma_tag_t shared_data_dmat; 121066a0683eSHannes Reinecke struct map_node shared_data_map; 12111da177e4SLinus Torvalds 12121da177e4SLinus Torvalds /* Information saved through suspend/resume cycles */ 12131da177e4SLinus Torvalds struct ahd_suspend_state suspend_state; 12141da177e4SLinus Torvalds 12151da177e4SLinus Torvalds /* Number of enabled target mode device on this card */ 12161da177e4SLinus Torvalds u_int enabled_luns; 12171da177e4SLinus Torvalds 12181da177e4SLinus Torvalds /* Initialization level of this data structure */ 12191da177e4SLinus Torvalds u_int init_level; 12201da177e4SLinus Torvalds 12211da177e4SLinus Torvalds /* PCI cacheline size. */ 12221da177e4SLinus Torvalds u_int pci_cachesize; 12231da177e4SLinus Torvalds 12241da177e4SLinus Torvalds /* IO Cell Parameters */ 12251da177e4SLinus Torvalds uint8_t iocell_opts[AHD_NUM_PER_DEV_ANNEXCOLS]; 12261da177e4SLinus Torvalds 12271da177e4SLinus Torvalds u_int stack_size; 12281da177e4SLinus Torvalds uint16_t *saved_stack; 12291da177e4SLinus Torvalds 12301da177e4SLinus Torvalds /* Per-Unit descriptive information */ 12311da177e4SLinus Torvalds const char *description; 12321da177e4SLinus Torvalds const char *bus_description; 12331da177e4SLinus Torvalds char *name; 12341da177e4SLinus Torvalds int unit; 12351da177e4SLinus Torvalds 12361da177e4SLinus Torvalds /* Selection Timer settings */ 12371da177e4SLinus Torvalds int seltime; 12381da177e4SLinus Torvalds 12391da177e4SLinus Torvalds /* 12401da177e4SLinus Torvalds * Interrupt coalescing settings. 12411da177e4SLinus Torvalds */ 12421da177e4SLinus Torvalds #define AHD_INT_COALESCING_TIMER_DEFAULT 250 /*us*/ 12431da177e4SLinus Torvalds #define AHD_INT_COALESCING_MAXCMDS_DEFAULT 10 12441da177e4SLinus Torvalds #define AHD_INT_COALESCING_MAXCMDS_MAX 127 12451da177e4SLinus Torvalds #define AHD_INT_COALESCING_MINCMDS_DEFAULT 5 12461da177e4SLinus Torvalds #define AHD_INT_COALESCING_MINCMDS_MAX 127 12471da177e4SLinus Torvalds #define AHD_INT_COALESCING_THRESHOLD_DEFAULT 2000 12481da177e4SLinus Torvalds #define AHD_INT_COALESCING_STOP_THRESHOLD_DEFAULT 1000 12491da177e4SLinus Torvalds u_int int_coalescing_timer; 12501da177e4SLinus Torvalds u_int int_coalescing_maxcmds; 12511da177e4SLinus Torvalds u_int int_coalescing_mincmds; 12521da177e4SLinus Torvalds u_int int_coalescing_threshold; 12531da177e4SLinus Torvalds u_int int_coalescing_stop_threshold; 12541da177e4SLinus Torvalds 12551da177e4SLinus Torvalds uint16_t user_discenable;/* Disconnection allowed */ 12561da177e4SLinus Torvalds uint16_t user_tagenable;/* Tagged Queuing allowed */ 12571da177e4SLinus Torvalds }; 12581da177e4SLinus Torvalds 12591da177e4SLinus Torvalds /*************************** IO Cell Configuration ****************************/ 12601da177e4SLinus Torvalds #define AHD_PRECOMP_SLEW_INDEX \ 12611da177e4SLinus Torvalds (AHD_ANNEXCOL_PRECOMP_SLEW - AHD_ANNEXCOL_PER_DEV0) 12621da177e4SLinus Torvalds 12631da177e4SLinus Torvalds #define AHD_AMPLITUDE_INDEX \ 12641da177e4SLinus Torvalds (AHD_ANNEXCOL_AMPLITUDE - AHD_ANNEXCOL_PER_DEV0) 12651da177e4SLinus Torvalds 12661da177e4SLinus Torvalds #define AHD_SET_SLEWRATE(ahd, new_slew) \ 12671da177e4SLinus Torvalds do { \ 12681da177e4SLinus Torvalds (ahd)->iocell_opts[AHD_PRECOMP_SLEW_INDEX] &= ~AHD_SLEWRATE_MASK; \ 12691da177e4SLinus Torvalds (ahd)->iocell_opts[AHD_PRECOMP_SLEW_INDEX] |= \ 12701da177e4SLinus Torvalds (((new_slew) << AHD_SLEWRATE_SHIFT) & AHD_SLEWRATE_MASK); \ 12711da177e4SLinus Torvalds } while (0) 12721da177e4SLinus Torvalds 12731da177e4SLinus Torvalds #define AHD_SET_PRECOMP(ahd, new_pcomp) \ 12741da177e4SLinus Torvalds do { \ 12751da177e4SLinus Torvalds (ahd)->iocell_opts[AHD_PRECOMP_SLEW_INDEX] &= ~AHD_PRECOMP_MASK; \ 12761da177e4SLinus Torvalds (ahd)->iocell_opts[AHD_PRECOMP_SLEW_INDEX] |= \ 12771da177e4SLinus Torvalds (((new_pcomp) << AHD_PRECOMP_SHIFT) & AHD_PRECOMP_MASK); \ 12781da177e4SLinus Torvalds } while (0) 12791da177e4SLinus Torvalds 12801da177e4SLinus Torvalds #define AHD_SET_AMPLITUDE(ahd, new_amp) \ 12811da177e4SLinus Torvalds do { \ 12821da177e4SLinus Torvalds (ahd)->iocell_opts[AHD_AMPLITUDE_INDEX] &= ~AHD_AMPLITUDE_MASK; \ 12831da177e4SLinus Torvalds (ahd)->iocell_opts[AHD_AMPLITUDE_INDEX] |= \ 12841da177e4SLinus Torvalds (((new_amp) << AHD_AMPLITUDE_SHIFT) & AHD_AMPLITUDE_MASK); \ 12851da177e4SLinus Torvalds } while (0) 12861da177e4SLinus Torvalds 12871da177e4SLinus Torvalds /************************ Active Device Information ***************************/ 12881da177e4SLinus Torvalds typedef enum { 12891da177e4SLinus Torvalds ROLE_UNKNOWN, 12901da177e4SLinus Torvalds ROLE_INITIATOR, 12911da177e4SLinus Torvalds ROLE_TARGET 12921da177e4SLinus Torvalds } role_t; 12931da177e4SLinus Torvalds 12941da177e4SLinus Torvalds struct ahd_devinfo { 12951da177e4SLinus Torvalds int our_scsiid; 12961da177e4SLinus Torvalds int target_offset; 12971da177e4SLinus Torvalds uint16_t target_mask; 12981da177e4SLinus Torvalds u_int target; 12991da177e4SLinus Torvalds u_int lun; 13001da177e4SLinus Torvalds char channel; 13011da177e4SLinus Torvalds role_t role; /* 13021da177e4SLinus Torvalds * Only guaranteed to be correct if not 13031da177e4SLinus Torvalds * in the busfree state. 13041da177e4SLinus Torvalds */ 13051da177e4SLinus Torvalds }; 13061da177e4SLinus Torvalds 13071da177e4SLinus Torvalds /****************************** PCI Structures ********************************/ 130866a0683eSHannes Reinecke #define AHD_PCI_IOADDR0 PCIR_BAR(0) /* I/O BAR*/ 130966a0683eSHannes Reinecke #define AHD_PCI_MEMADDR PCIR_BAR(1) /* Memory BAR */ 131066a0683eSHannes Reinecke #define AHD_PCI_IOADDR1 PCIR_BAR(3) /* Second I/O BAR */ 13111da177e4SLinus Torvalds 13121da177e4SLinus Torvalds typedef int (ahd_device_setup_t)(struct ahd_softc *); 13131da177e4SLinus Torvalds 13141da177e4SLinus Torvalds struct ahd_pci_identity { 13151da177e4SLinus Torvalds uint64_t full_id; 13161da177e4SLinus Torvalds uint64_t id_mask; 1317d1d7b19dSDenys Vlasenko const char *name; 13181da177e4SLinus Torvalds ahd_device_setup_t *setup; 13191da177e4SLinus Torvalds }; 13201da177e4SLinus Torvalds 13211da177e4SLinus Torvalds /***************************** VL/EISA Declarations ***************************/ 13221da177e4SLinus Torvalds struct aic7770_identity { 13231da177e4SLinus Torvalds uint32_t full_id; 13241da177e4SLinus Torvalds uint32_t id_mask; 1325d1d7b19dSDenys Vlasenko const char *name; 13261da177e4SLinus Torvalds ahd_device_setup_t *setup; 13271da177e4SLinus Torvalds }; 13281da177e4SLinus Torvalds extern struct aic7770_identity aic7770_ident_table []; 13291da177e4SLinus Torvalds extern const int ahd_num_aic7770_devs; 13301da177e4SLinus Torvalds 13311da177e4SLinus Torvalds #define AHD_EISA_SLOT_OFFSET 0xc00 13321da177e4SLinus Torvalds #define AHD_EISA_IOSIZE 0x100 13331da177e4SLinus Torvalds 13341da177e4SLinus Torvalds /*************************** Function Declarations ****************************/ 13351da177e4SLinus Torvalds /******************************************************************************/ 13361da177e4SLinus Torvalds 13371da177e4SLinus Torvalds /***************************** PCI Front End *********************************/ 1338980b306aSDenys Vlasenko const struct ahd_pci_identity *ahd_find_pci_device(ahd_dev_softc_t); 13391da177e4SLinus Torvalds int ahd_pci_config(struct ahd_softc *, 1340980b306aSDenys Vlasenko const struct ahd_pci_identity *); 13411da177e4SLinus Torvalds int ahd_pci_test_register_access(struct ahd_softc *); 134267eb6336SFUJITA Tomonori #ifdef CONFIG_PM 1343b5720729SHannes Reinecke void ahd_pci_suspend(struct ahd_softc *); 1344b5720729SHannes Reinecke void ahd_pci_resume(struct ahd_softc *); 134567eb6336SFUJITA Tomonori #endif 13461da177e4SLinus Torvalds 13471da177e4SLinus Torvalds /************************** SCB and SCB queue management **********************/ 13481da177e4SLinus Torvalds void ahd_qinfifo_requeue_tail(struct ahd_softc *ahd, 13491da177e4SLinus Torvalds struct scb *scb); 13501da177e4SLinus Torvalds 13511da177e4SLinus Torvalds /****************************** Initialization ********************************/ 13521da177e4SLinus Torvalds struct ahd_softc *ahd_alloc(void *platform_arg, char *name); 13531da177e4SLinus Torvalds int ahd_softc_init(struct ahd_softc *); 13541da177e4SLinus Torvalds void ahd_controller_info(struct ahd_softc *ahd, char *buf); 13551da177e4SLinus Torvalds int ahd_init(struct ahd_softc *ahd); 135667eb6336SFUJITA Tomonori #ifdef CONFIG_PM 1357b5720729SHannes Reinecke int ahd_suspend(struct ahd_softc *ahd); 1358b5720729SHannes Reinecke void ahd_resume(struct ahd_softc *ahd); 135967eb6336SFUJITA Tomonori #endif 13601da177e4SLinus Torvalds int ahd_default_config(struct ahd_softc *ahd); 13611da177e4SLinus Torvalds int ahd_parse_vpddata(struct ahd_softc *ahd, 13621da177e4SLinus Torvalds struct vpd_config *vpd); 13631da177e4SLinus Torvalds int ahd_parse_cfgdata(struct ahd_softc *ahd, 13641da177e4SLinus Torvalds struct seeprom_config *sc); 13651da177e4SLinus Torvalds void ahd_intr_enable(struct ahd_softc *ahd, int enable); 13661da177e4SLinus Torvalds void ahd_pause_and_flushwork(struct ahd_softc *ahd); 13671da177e4SLinus Torvalds void ahd_set_unit(struct ahd_softc *, int); 13681da177e4SLinus Torvalds void ahd_set_name(struct ahd_softc *, char *); 13691da177e4SLinus Torvalds struct scb *ahd_get_scb(struct ahd_softc *ahd, u_int col_idx); 13701da177e4SLinus Torvalds void ahd_free_scb(struct ahd_softc *ahd, struct scb *scb); 13711da177e4SLinus Torvalds void ahd_free(struct ahd_softc *ahd); 13721da177e4SLinus Torvalds int ahd_reset(struct ahd_softc *ahd, int reinit); 13731da177e4SLinus Torvalds int ahd_write_flexport(struct ahd_softc *ahd, 13741da177e4SLinus Torvalds u_int addr, u_int value); 13751da177e4SLinus Torvalds int ahd_read_flexport(struct ahd_softc *ahd, u_int addr, 13761da177e4SLinus Torvalds uint8_t *value); 13771da177e4SLinus Torvalds 13781da177e4SLinus Torvalds /***************************** Error Recovery *********************************/ 13791da177e4SLinus Torvalds typedef enum { 13801da177e4SLinus Torvalds SEARCH_COMPLETE, 13811da177e4SLinus Torvalds SEARCH_COUNT, 13821da177e4SLinus Torvalds SEARCH_REMOVE, 13831da177e4SLinus Torvalds SEARCH_PRINT 13841da177e4SLinus Torvalds } ahd_search_action; 13851da177e4SLinus Torvalds int ahd_search_qinfifo(struct ahd_softc *ahd, int target, 13861da177e4SLinus Torvalds char channel, int lun, u_int tag, 13871da177e4SLinus Torvalds role_t role, uint32_t status, 13881da177e4SLinus Torvalds ahd_search_action action); 13891da177e4SLinus Torvalds int ahd_search_disc_list(struct ahd_softc *ahd, int target, 13901da177e4SLinus Torvalds char channel, int lun, u_int tag, 13911da177e4SLinus Torvalds int stop_on_first, int remove, 13921da177e4SLinus Torvalds int save_state); 13931da177e4SLinus Torvalds int ahd_reset_channel(struct ahd_softc *ahd, char channel, 13941da177e4SLinus Torvalds int initiate_reset); 13951da177e4SLinus Torvalds /*************************** Utility Functions ********************************/ 13961da177e4SLinus Torvalds void ahd_compile_devinfo(struct ahd_devinfo *devinfo, 13971da177e4SLinus Torvalds u_int our_id, u_int target, 13981da177e4SLinus Torvalds u_int lun, char channel, 13991da177e4SLinus Torvalds role_t role); 14001da177e4SLinus Torvalds /************************** Transfer Negotiation ******************************/ 14011da177e4SLinus Torvalds void ahd_find_syncrate(struct ahd_softc *ahd, u_int *period, 14021da177e4SLinus Torvalds u_int *ppr_options, u_int maxsync); 14031da177e4SLinus Torvalds /* 14041da177e4SLinus Torvalds * Negotiation types. These are used to qualify if we should renegotiate 14051da177e4SLinus Torvalds * even if our goal and current transport parameters are identical. 14061da177e4SLinus Torvalds */ 14071da177e4SLinus Torvalds typedef enum { 14081da177e4SLinus Torvalds AHD_NEG_TO_GOAL, /* Renegotiate only if goal and curr differ. */ 14091da177e4SLinus Torvalds AHD_NEG_IF_NON_ASYNC, /* Renegotiate so long as goal is non-async. */ 14101da177e4SLinus Torvalds AHD_NEG_ALWAYS /* Renegotiat even if goal is async. */ 14111da177e4SLinus Torvalds } ahd_neg_type; 14121da177e4SLinus Torvalds int ahd_update_neg_request(struct ahd_softc*, 14131da177e4SLinus Torvalds struct ahd_devinfo*, 14141da177e4SLinus Torvalds struct ahd_tmode_tstate*, 14151da177e4SLinus Torvalds struct ahd_initiator_tinfo*, 14161da177e4SLinus Torvalds ahd_neg_type); 14171da177e4SLinus Torvalds void ahd_set_width(struct ahd_softc *ahd, 14181da177e4SLinus Torvalds struct ahd_devinfo *devinfo, 14191da177e4SLinus Torvalds u_int width, u_int type, int paused); 14201da177e4SLinus Torvalds void ahd_set_syncrate(struct ahd_softc *ahd, 14211da177e4SLinus Torvalds struct ahd_devinfo *devinfo, 14221da177e4SLinus Torvalds u_int period, u_int offset, 14231da177e4SLinus Torvalds u_int ppr_options, 14241da177e4SLinus Torvalds u_int type, int paused); 14251da177e4SLinus Torvalds typedef enum { 14261da177e4SLinus Torvalds AHD_QUEUE_NONE, 14271da177e4SLinus Torvalds AHD_QUEUE_BASIC, 14281da177e4SLinus Torvalds AHD_QUEUE_TAGGED 14291da177e4SLinus Torvalds } ahd_queue_alg; 14301da177e4SLinus Torvalds 14311da177e4SLinus Torvalds /**************************** Target Mode *************************************/ 14321da177e4SLinus Torvalds #ifdef AHD_TARGET_MODE 14331da177e4SLinus Torvalds void ahd_send_lstate_events(struct ahd_softc *, 14341da177e4SLinus Torvalds struct ahd_tmode_lstate *); 14351da177e4SLinus Torvalds void ahd_handle_en_lun(struct ahd_softc *ahd, 14361da177e4SLinus Torvalds struct cam_sim *sim, union ccb *ccb); 14371da177e4SLinus Torvalds cam_status ahd_find_tmode_devs(struct ahd_softc *ahd, 14381da177e4SLinus Torvalds struct cam_sim *sim, union ccb *ccb, 14391da177e4SLinus Torvalds struct ahd_tmode_tstate **tstate, 14401da177e4SLinus Torvalds struct ahd_tmode_lstate **lstate, 14411da177e4SLinus Torvalds int notfound_failure); 14421da177e4SLinus Torvalds #ifndef AHD_TMODE_ENABLE 14431da177e4SLinus Torvalds #define AHD_TMODE_ENABLE 0 14441da177e4SLinus Torvalds #endif 14451da177e4SLinus Torvalds #endif 14461da177e4SLinus Torvalds /******************************* Debug ***************************************/ 14471da177e4SLinus Torvalds #ifdef AHD_DEBUG 14481da177e4SLinus Torvalds extern uint32_t ahd_debug; 14491da177e4SLinus Torvalds #define AHD_SHOW_MISC 0x00001 14501da177e4SLinus Torvalds #define AHD_SHOW_SENSE 0x00002 14511da177e4SLinus Torvalds #define AHD_SHOW_RECOVERY 0x00004 14521da177e4SLinus Torvalds #define AHD_DUMP_SEEPROM 0x00008 14531da177e4SLinus Torvalds #define AHD_SHOW_TERMCTL 0x00010 14541da177e4SLinus Torvalds #define AHD_SHOW_MEMORY 0x00020 14551da177e4SLinus Torvalds #define AHD_SHOW_MESSAGES 0x00040 14561da177e4SLinus Torvalds #define AHD_SHOW_MODEPTR 0x00080 14571da177e4SLinus Torvalds #define AHD_SHOW_SELTO 0x00100 14581da177e4SLinus Torvalds #define AHD_SHOW_FIFOS 0x00200 14591da177e4SLinus Torvalds #define AHD_SHOW_QFULL 0x00400 14601da177e4SLinus Torvalds #define AHD_SHOW_DV 0x00800 14611da177e4SLinus Torvalds #define AHD_SHOW_MASKED_ERRORS 0x01000 14621da177e4SLinus Torvalds #define AHD_SHOW_QUEUE 0x02000 14631da177e4SLinus Torvalds #define AHD_SHOW_TQIN 0x04000 14641da177e4SLinus Torvalds #define AHD_SHOW_SG 0x08000 14651da177e4SLinus Torvalds #define AHD_SHOW_INT_COALESCING 0x10000 14661da177e4SLinus Torvalds #define AHD_DEBUG_SEQUENCER 0x20000 14671da177e4SLinus Torvalds #endif 14681da177e4SLinus Torvalds void ahd_print_devinfo(struct ahd_softc *ahd, 14691da177e4SLinus Torvalds struct ahd_devinfo *devinfo); 14701da177e4SLinus Torvalds void ahd_dump_card_state(struct ahd_softc *ahd); 1471d1d7b19dSDenys Vlasenko int ahd_print_register(const ahd_reg_parse_entry_t *table, 14721da177e4SLinus Torvalds u_int num_entries, 14731da177e4SLinus Torvalds const char *name, 14741da177e4SLinus Torvalds u_int address, 14751da177e4SLinus Torvalds u_int value, 14761da177e4SLinus Torvalds u_int *cur_column, 14771da177e4SLinus Torvalds u_int wrap_point); 14781da177e4SLinus Torvalds #endif /* _AIC79XX_H_ */ 1479