1 /* 2 * Product specific probe and attach routines for: 3 * 27/284X and aic7770 motherboard SCSI controllers 4 * 5 * Copyright (c) 1994-1998, 2000, 2001 Justin T. Gibbs. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions, and the following disclaimer, 13 * without modification. 14 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 15 * substantially similar to the "NO WARRANTY" disclaimer below 16 * ("Disclaimer") and any redistribution must be conditioned upon 17 * including a substantially similar Disclaimer requirement for further 18 * binary redistribution. 19 * 3. Neither the names of the above-listed copyright holders nor the names 20 * of any contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * Alternatively, this software may be distributed under the terms of the 24 * GNU General Public License ("GPL") version 2 as published by the Free 25 * Software Foundation. 26 * 27 * NO WARRANTY 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 37 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGES. 39 * 40 * $Id: //depot/aic7xxx/aic7xxx/aic7770.c#32 $ 41 * 42 * $FreeBSD$ 43 */ 44 45 #include "aic7xxx_osm.h" 46 #include "aic7xxx_inline.h" 47 #include "aic7xxx_93cx6.h" 48 49 #define ID_AIC7770 0x04907770 50 #define ID_AHA_274x 0x04907771 51 #define ID_AHA_284xB 0x04907756 /* BIOS enabled */ 52 #define ID_AHA_284x 0x04907757 /* BIOS disabled*/ 53 #define ID_OLV_274x 0x04907782 /* Olivetti OEM */ 54 #define ID_OLV_274xD 0x04907783 /* Olivetti OEM (Differential) */ 55 56 static int aic7770_chip_init(struct ahc_softc *ahc); 57 static int aha2840_load_seeprom(struct ahc_softc *ahc); 58 static ahc_device_setup_t ahc_aic7770_VL_setup; 59 static ahc_device_setup_t ahc_aic7770_EISA_setup; 60 static ahc_device_setup_t ahc_aic7770_setup; 61 62 struct aic7770_identity aic7770_ident_table[] = 63 { 64 { 65 ID_AHA_274x, 66 0xFFFFFFFF, 67 "Adaptec 274X SCSI adapter", 68 ahc_aic7770_EISA_setup 69 }, 70 { 71 ID_AHA_284xB, 72 0xFFFFFFFE, 73 "Adaptec 284X SCSI adapter", 74 ahc_aic7770_VL_setup 75 }, 76 { 77 ID_AHA_284x, 78 0xFFFFFFFE, 79 "Adaptec 284X SCSI adapter (BIOS Disabled)", 80 ahc_aic7770_VL_setup 81 }, 82 { 83 ID_OLV_274x, 84 0xFFFFFFFF, 85 "Adaptec (Olivetti OEM) 274X SCSI adapter", 86 ahc_aic7770_EISA_setup 87 }, 88 { 89 ID_OLV_274xD, 90 0xFFFFFFFF, 91 "Adaptec (Olivetti OEM) 274X Differential SCSI adapter", 92 ahc_aic7770_EISA_setup 93 }, 94 /* Generic chip probes for devices we don't know 'exactly' */ 95 { 96 ID_AIC7770, 97 0xFFFFFFFF, 98 "Adaptec aic7770 SCSI adapter", 99 ahc_aic7770_EISA_setup 100 } 101 }; 102 103 int 104 aic7770_config(struct ahc_softc *ahc, struct aic7770_identity *entry, u_int io) 105 { 106 int error; 107 int have_seeprom; 108 u_int hostconf; 109 u_int irq; 110 u_int intdef; 111 112 error = entry->setup(ahc); 113 have_seeprom = 0; 114 if (error != 0) 115 return (error); 116 117 error = aic7770_map_registers(ahc, io); 118 if (error != 0) 119 return (error); 120 121 /* 122 * Before we continue probing the card, ensure that 123 * its interrupts are *disabled*. We don't want 124 * a misstep to hang the machine in an interrupt 125 * storm. 126 */ 127 ahc_intr_enable(ahc, FALSE); 128 129 ahc->description = entry->name; 130 error = ahc_softc_init(ahc); 131 if (error != 0) 132 return (error); 133 134 ahc->bus_chip_init = aic7770_chip_init; 135 136 error = ahc_reset(ahc, /*reinit*/FALSE); 137 if (error != 0) 138 return (error); 139 140 /* Make sure we have a valid interrupt vector */ 141 intdef = ahc_inb(ahc, INTDEF); 142 irq = intdef & VECTOR; 143 switch (irq) { 144 case 9: 145 case 10: 146 case 11: 147 case 12: 148 case 14: 149 case 15: 150 break; 151 default: 152 printk("aic7770_config: invalid irq setting %d\n", intdef); 153 return (ENXIO); 154 } 155 156 if ((intdef & EDGE_TRIG) != 0) 157 ahc->flags |= AHC_EDGE_INTERRUPT; 158 159 switch (ahc->chip & (AHC_EISA|AHC_VL)) { 160 case AHC_EISA: 161 { 162 u_int biosctrl; 163 u_int scsiconf; 164 u_int scsiconf1; 165 166 biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL); 167 scsiconf = ahc_inb(ahc, SCSICONF); 168 scsiconf1 = ahc_inb(ahc, SCSICONF + 1); 169 170 /* Get the primary channel information */ 171 if ((biosctrl & CHANNEL_B_PRIMARY) != 0) 172 ahc->flags |= 1; 173 174 if ((biosctrl & BIOSMODE) == BIOSDISABLED) { 175 ahc->flags |= AHC_USEDEFAULTS; 176 } else { 177 if ((ahc->features & AHC_WIDE) != 0) { 178 ahc->our_id = scsiconf1 & HWSCSIID; 179 if (scsiconf & TERM_ENB) 180 ahc->flags |= AHC_TERM_ENB_A; 181 } else { 182 ahc->our_id = scsiconf & HSCSIID; 183 ahc->our_id_b = scsiconf1 & HSCSIID; 184 if (scsiconf & TERM_ENB) 185 ahc->flags |= AHC_TERM_ENB_A; 186 if (scsiconf1 & TERM_ENB) 187 ahc->flags |= AHC_TERM_ENB_B; 188 } 189 } 190 if ((ahc_inb(ahc, HA_274_BIOSGLOBAL) & HA_274_EXTENDED_TRANS)) 191 ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B; 192 break; 193 } 194 case AHC_VL: 195 { 196 have_seeprom = aha2840_load_seeprom(ahc); 197 break; 198 } 199 default: 200 break; 201 } 202 if (have_seeprom == 0) { 203 kfree(ahc->seep_config); 204 ahc->seep_config = NULL; 205 } 206 207 /* 208 * Ensure autoflush is enabled 209 */ 210 ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS); 211 212 /* Setup the FIFO threshold and the bus off time */ 213 hostconf = ahc_inb(ahc, HOSTCONF); 214 ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH); 215 ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF); 216 217 ahc->bus_softc.aic7770_softc.busspd = hostconf & DFTHRSH; 218 ahc->bus_softc.aic7770_softc.bustime = (hostconf << 2) & BOFF; 219 220 /* 221 * Generic aic7xxx initialization. 222 */ 223 error = ahc_init(ahc); 224 if (error != 0) 225 return (error); 226 227 error = aic7770_map_int(ahc, irq); 228 if (error != 0) 229 return (error); 230 231 ahc->init_level++; 232 233 /* 234 * Enable the board's BUS drivers 235 */ 236 ahc_outb(ahc, BCTL, ENABLE); 237 return (0); 238 } 239 240 static int 241 aic7770_chip_init(struct ahc_softc *ahc) 242 { 243 ahc_outb(ahc, BUSSPD, ahc->bus_softc.aic7770_softc.busspd); 244 ahc_outb(ahc, BUSTIME, ahc->bus_softc.aic7770_softc.bustime); 245 ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS); 246 ahc_outb(ahc, BCTL, ENABLE); 247 return (ahc_chip_init(ahc)); 248 } 249 250 /* 251 * Read the 284x SEEPROM. 252 */ 253 static int 254 aha2840_load_seeprom(struct ahc_softc *ahc) 255 { 256 struct seeprom_descriptor sd; 257 struct seeprom_config *sc; 258 int have_seeprom; 259 uint8_t scsi_conf; 260 261 sd.sd_ahc = ahc; 262 sd.sd_control_offset = SEECTL_2840; 263 sd.sd_status_offset = STATUS_2840; 264 sd.sd_dataout_offset = STATUS_2840; 265 sd.sd_chip = C46; 266 sd.sd_MS = 0; 267 sd.sd_RDY = EEPROM_TF; 268 sd.sd_CS = CS_2840; 269 sd.sd_CK = CK_2840; 270 sd.sd_DO = DO_2840; 271 sd.sd_DI = DI_2840; 272 sc = ahc->seep_config; 273 274 if (bootverbose) 275 printk("%s: Reading SEEPROM...", ahc_name(ahc)); 276 have_seeprom = ahc_read_seeprom(&sd, (uint16_t *)sc, 277 /*start_addr*/0, sizeof(*sc)/2); 278 279 if (have_seeprom) { 280 281 if (ahc_verify_cksum(sc) == 0) { 282 if(bootverbose) 283 printk ("checksum error\n"); 284 have_seeprom = 0; 285 } else if (bootverbose) { 286 printk("done.\n"); 287 } 288 } 289 290 if (!have_seeprom) { 291 if (bootverbose) 292 printk("%s: No SEEPROM available\n", ahc_name(ahc)); 293 ahc->flags |= AHC_USEDEFAULTS; 294 } else { 295 /* 296 * Put the data we've collected down into SRAM 297 * where ahc_init will find it. 298 */ 299 int i; 300 int max_targ; 301 uint16_t discenable; 302 303 max_targ = (ahc->features & AHC_WIDE) != 0 ? 16 : 8; 304 discenable = 0; 305 for (i = 0; i < max_targ; i++){ 306 uint8_t target_settings; 307 308 target_settings = (sc->device_flags[i] & CFXFER) << 4; 309 if (sc->device_flags[i] & CFSYNCH) 310 target_settings |= SOFS; 311 if (sc->device_flags[i] & CFWIDEB) 312 target_settings |= WIDEXFER; 313 if (sc->device_flags[i] & CFDISC) 314 discenable |= (0x01 << i); 315 ahc_outb(ahc, TARG_SCSIRATE + i, target_settings); 316 } 317 ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff)); 318 ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff)); 319 320 ahc->our_id = sc->brtime_id & CFSCSIID; 321 322 scsi_conf = (ahc->our_id & 0x7); 323 if (sc->adapter_control & CFSPARITY) 324 scsi_conf |= ENSPCHK; 325 if (sc->adapter_control & CFRESETB) 326 scsi_conf |= RESET_SCSI; 327 328 if (sc->bios_control & CF284XEXTEND) 329 ahc->flags |= AHC_EXTENDED_TRANS_A; 330 /* Set SCSICONF info */ 331 ahc_outb(ahc, SCSICONF, scsi_conf); 332 333 if (sc->adapter_control & CF284XSTERM) 334 ahc->flags |= AHC_TERM_ENB_A; 335 } 336 return (have_seeprom); 337 } 338 339 static int 340 ahc_aic7770_VL_setup(struct ahc_softc *ahc) 341 { 342 int error; 343 344 error = ahc_aic7770_setup(ahc); 345 ahc->chip |= AHC_VL; 346 return (error); 347 } 348 349 static int 350 ahc_aic7770_EISA_setup(struct ahc_softc *ahc) 351 { 352 int error; 353 354 error = ahc_aic7770_setup(ahc); 355 ahc->chip |= AHC_EISA; 356 return (error); 357 } 358 359 static int 360 ahc_aic7770_setup(struct ahc_softc *ahc) 361 { 362 ahc->channel = 'A'; 363 ahc->channel_b = 'B'; 364 ahc->chip = AHC_AIC7770; 365 ahc->features = AHC_AIC7770_FE; 366 ahc->bugs |= AHC_TMODE_WIDEODD_BUG; 367 ahc->flags |= AHC_PAGESCBS; 368 ahc->instruction_ram_size = 448; 369 return (0); 370 } 371