xref: /linux/drivers/scsi/aacraid/rx.c (revision 2624f124b3b5d550ab2fbef7ee3bc0e1fed09722)
1 /*
2  *	Adaptec AAC series RAID controller driver
3  *	(c) Copyright 2001 Red Hat Inc.	<alan@redhat.com>
4  *
5  * based on the old aacraid driver that is..
6  * Adaptec aacraid device driver for Linux.
7  *
8  * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com)
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2, or (at your option)
13  * any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; see the file COPYING.  If not, write to
22  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
23  *
24  * Module Name:
25  *  rx.c
26  *
27  * Abstract: Hardware miniport for Drawbridge specific hardware functions.
28  *
29  */
30 
31 #include <linux/kernel.h>
32 #include <linux/init.h>
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/pci.h>
36 #include <linux/spinlock.h>
37 #include <linux/slab.h>
38 #include <linux/blkdev.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/time.h>
42 #include <linux/interrupt.h>
43 #include <asm/semaphore.h>
44 
45 #include <scsi/scsi_host.h>
46 
47 #include "aacraid.h"
48 
49 static irqreturn_t aac_rx_intr(int irq, void *dev_id, struct pt_regs *regs)
50 {
51 	struct aac_dev *dev = dev_id;
52 	unsigned long bellbits;
53 	u8 intstat, mask;
54 	intstat = rx_readb(dev, MUnit.OISR);
55 	/*
56 	 *	Read mask and invert because drawbridge is reversed.
57 	 *	This allows us to only service interrupts that have
58 	 *	been enabled.
59 	 */
60 	mask = ~(dev->OIMR);
61 	/* Check to see if this is our interrupt.  If it isn't just return */
62 	if (intstat & mask)
63 	{
64 		bellbits = rx_readl(dev, OutboundDoorbellReg);
65 		if (bellbits & DoorBellPrintfReady) {
66 			aac_printf(dev, rx_readl(dev, IndexRegs.Mailbox[5]));
67 			rx_writel(dev, MUnit.ODR,DoorBellPrintfReady);
68 			rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone);
69 		}
70 		else if (bellbits & DoorBellAdapterNormCmdReady) {
71 			rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady);
72 			aac_command_normal(&dev->queues->queue[HostNormCmdQueue]);
73 		}
74 		else if (bellbits & DoorBellAdapterNormRespReady) {
75 			aac_response_normal(&dev->queues->queue[HostNormRespQueue]);
76 			rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady);
77 		}
78 		else if (bellbits & DoorBellAdapterNormCmdNotFull) {
79 			rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
80 		}
81 		else if (bellbits & DoorBellAdapterNormRespNotFull) {
82 			rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
83 			rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull);
84 		}
85 		return IRQ_HANDLED;
86 	}
87 	return IRQ_NONE;
88 }
89 
90 /**
91  *	aac_rx_disable_interrupt	-	Disable interrupts
92  *	@dev: Adapter
93  */
94 
95 static void aac_rx_disable_interrupt(struct aac_dev *dev)
96 {
97 	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
98 }
99 
100 /**
101  *	rx_sync_cmd	-	send a command and wait
102  *	@dev: Adapter
103  *	@command: Command to execute
104  *	@p1: first parameter
105  *	@ret: adapter status
106  *
107  *	This routine will send a synchronous command to the adapter and wait
108  *	for its	completion.
109  */
110 
111 static int rx_sync_cmd(struct aac_dev *dev, u32 command,
112 	u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
113 	u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
114 {
115 	unsigned long start;
116 	int ok;
117 	/*
118 	 *	Write the command into Mailbox 0
119 	 */
120 	rx_writel(dev, InboundMailbox0, command);
121 	/*
122 	 *	Write the parameters into Mailboxes 1 - 6
123 	 */
124 	rx_writel(dev, InboundMailbox1, p1);
125 	rx_writel(dev, InboundMailbox2, p2);
126 	rx_writel(dev, InboundMailbox3, p3);
127 	rx_writel(dev, InboundMailbox4, p4);
128 	/*
129 	 *	Clear the synch command doorbell to start on a clean slate.
130 	 */
131 	rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
132 	/*
133 	 *	Disable doorbell interrupts
134 	 */
135 	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
136 	/*
137 	 *	Force the completion of the mask register write before issuing
138 	 *	the interrupt.
139 	 */
140 	rx_readb (dev, MUnit.OIMR);
141 	/*
142 	 *	Signal that there is a new synch command
143 	 */
144 	rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);
145 
146 	ok = 0;
147 	start = jiffies;
148 
149 	/*
150 	 *	Wait up to 30 seconds
151 	 */
152 	while (time_before(jiffies, start+30*HZ))
153 	{
154 		udelay(5);	/* Delay 5 microseconds to let Mon960 get info. */
155 		/*
156 		 *	Mon960 will set doorbell0 bit when it has completed the command.
157 		 */
158 		if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {
159 			/*
160 			 *	Clear the doorbell.
161 			 */
162 			rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
163 			ok = 1;
164 			break;
165 		}
166 		/*
167 		 *	Yield the processor in case we are slow
168 		 */
169 		set_current_state(TASK_UNINTERRUPTIBLE);
170 		schedule_timeout(1);
171 	}
172 	if (ok != 1) {
173 		/*
174 		 *	Restore interrupt mask even though we timed out
175 		 */
176 		rx_writeb(dev, MUnit.OIMR, dev->OIMR &= 0xfb);
177 		return -ETIMEDOUT;
178 	}
179 	/*
180 	 *	Pull the synch status from Mailbox 0.
181 	 */
182 	if (status)
183 		*status = rx_readl(dev, IndexRegs.Mailbox[0]);
184 	if (r1)
185 		*r1 = rx_readl(dev, IndexRegs.Mailbox[1]);
186 	if (r2)
187 		*r2 = rx_readl(dev, IndexRegs.Mailbox[2]);
188 	if (r3)
189 		*r3 = rx_readl(dev, IndexRegs.Mailbox[3]);
190 	if (r4)
191 		*r4 = rx_readl(dev, IndexRegs.Mailbox[4]);
192 	/*
193 	 *	Clear the synch command doorbell.
194 	 */
195 	rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
196 	/*
197 	 *	Restore interrupt mask
198 	 */
199 	rx_writeb(dev, MUnit.OIMR, dev->OIMR &= 0xfb);
200 	return 0;
201 
202 }
203 
204 /**
205  *	aac_rx_interrupt_adapter	-	interrupt adapter
206  *	@dev: Adapter
207  *
208  *	Send an interrupt to the i960 and breakpoint it.
209  */
210 
211 static void aac_rx_interrupt_adapter(struct aac_dev *dev)
212 {
213 	rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
214 }
215 
216 /**
217  *	aac_rx_notify_adapter		-	send an event to the adapter
218  *	@dev: Adapter
219  *	@event: Event to send
220  *
221  *	Notify the i960 that something it probably cares about has
222  *	happened.
223  */
224 
225 static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event)
226 {
227 	switch (event) {
228 
229 	case AdapNormCmdQue:
230 		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1);
231 		break;
232 	case HostNormRespNotFull:
233 		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4);
234 		break;
235 	case AdapNormRespQue:
236 		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2);
237 		break;
238 	case HostNormCmdNotFull:
239 		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3);
240 		break;
241 	case HostShutdown:
242 //		rx_sync_cmd(dev, HOST_CRASHING, 0, 0, 0, 0, 0, 0,
243 //		  NULL, NULL, NULL, NULL, NULL);
244 		break;
245 	case FastIo:
246 		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6);
247 		break;
248 	case AdapPrintfDone:
249 		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5);
250 		break;
251 	default:
252 		BUG();
253 		break;
254 	}
255 }
256 
257 /**
258  *	aac_rx_start_adapter		-	activate adapter
259  *	@dev:	Adapter
260  *
261  *	Start up processing on an i960 based AAC adapter
262  */
263 
264 static void aac_rx_start_adapter(struct aac_dev *dev)
265 {
266 	struct aac_init *init;
267 
268 	init = dev->init;
269 	init->HostElapsedSeconds = cpu_to_le32(get_seconds());
270 	/*
271 	 *	First clear out all interrupts.  Then enable the one's that we
272 	 *	can handle.
273 	 */
274 	rx_writeb(dev, MUnit.OIMR, 0xff);
275 	rx_writel(dev, MUnit.ODR, 0xffffffff);
276 //	rx_writeb(dev, MUnit.OIMR, ~(u8)OUTBOUND_DOORBELL_INTERRUPT_MASK);
277 	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
278 
279 	// We can only use a 32 bit address here
280 	rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
281 	  0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
282 }
283 
284 /**
285  *	aac_rx_check_health
286  *	@dev: device to check if healthy
287  *
288  *	Will attempt to determine if the specified adapter is alive and
289  *	capable of handling requests, returning 0 if alive.
290  */
291 static int aac_rx_check_health(struct aac_dev *dev)
292 {
293 	u32 status = rx_readl(dev, MUnit.OMRx[0]);
294 
295 	/*
296 	 *	Check to see if the board failed any self tests.
297 	 */
298 	if (status & SELF_TEST_FAILED)
299 		return -1;
300 	/*
301 	 *	Check to see if the board panic'd.
302 	 */
303 	if (status & KERNEL_PANIC) {
304 		char * buffer;
305 		struct POSTSTATUS {
306 			__le32 Post_Command;
307 			__le32 Post_Address;
308 		} * post;
309 		dma_addr_t paddr, baddr;
310 		int ret;
311 
312 		if ((status & 0xFF000000L) == 0xBC000000L)
313 			return (status >> 16) & 0xFF;
314 		buffer = pci_alloc_consistent(dev->pdev, 512, &baddr);
315 		ret = -2;
316 		if (buffer == NULL)
317 			return ret;
318 		post = pci_alloc_consistent(dev->pdev,
319 		  sizeof(struct POSTSTATUS), &paddr);
320 		if (post == NULL) {
321 			pci_free_consistent(dev->pdev, 512, buffer, baddr);
322 			return ret;
323 		}
324 		memset(buffer, 0, 512);
325 		post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);
326 		post->Post_Address = cpu_to_le32(baddr);
327 		rx_writel(dev, MUnit.IMRx[0], paddr);
328 		rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0,
329 		  NULL, NULL, NULL, NULL, NULL);
330 		pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS),
331 		  post, paddr);
332 		if ((buffer[0] == '0') && (buffer[1] == 'x')) {
333 			ret = (buffer[2] <= '9') ? (buffer[2] - '0') : (buffer[2] - 'A' + 10);
334 			ret <<= 4;
335 			ret += (buffer[3] <= '9') ? (buffer[3] - '0') : (buffer[3] - 'A' + 10);
336 		}
337 		pci_free_consistent(dev->pdev, 512, buffer, baddr);
338 		return ret;
339 	}
340 	/*
341 	 *	Wait for the adapter to be up and running.
342 	 */
343 	if (!(status & KERNEL_UP_AND_RUNNING))
344 		return -3;
345 	/*
346 	 *	Everything is OK
347 	 */
348 	return 0;
349 }
350 
351 /**
352  *	aac_rx_init	-	initialize an i960 based AAC card
353  *	@dev: device to configure
354  *
355  *	Allocate and set up resources for the i960 based AAC variants. The
356  *	device_interface in the commregion will be allocated and linked
357  *	to the comm region.
358  */
359 
360 int aac_rx_init(struct aac_dev *dev)
361 {
362 	unsigned long start;
363 	unsigned long status;
364 	int instance;
365 	const char * name;
366 
367 	instance = dev->id;
368 	name     = dev->name;
369 
370 	/*
371 	 *	Map in the registers from the adapter.
372 	 */
373 	if((dev->regs.rx = ioremap((unsigned long)dev->scsi_host_ptr->base, 8192))==NULL)
374 	{
375 		printk(KERN_WARNING "aacraid: unable to map i960.\n" );
376 		return -1;
377 	}
378 	/*
379 	 *	Check to see if the board failed any self tests.
380 	 */
381 	if (rx_readl(dev, MUnit.OMRx[0]) & SELF_TEST_FAILED) {
382 		printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
383 		goto error_iounmap;
384 	}
385 	/*
386 	 *	Check to see if the board panic'd while booting.
387 	 */
388 	if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC) {
389 		printk(KERN_ERR "%s%d: adapter kernel panic.\n", dev->name, instance);
390 		goto error_iounmap;
391 	}
392 	/*
393 	 *	Check to see if the monitor panic'd while booting.
394 	 */
395 	if (rx_readl(dev, MUnit.OMRx[0]) & MONITOR_PANIC) {
396 		printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
397 		goto error_iounmap;
398 	}
399 	start = jiffies;
400 	/*
401 	 *	Wait for the adapter to be up and running. Wait up to 3 minutes
402 	 */
403 	while ((!(rx_readl(dev, IndexRegs.Mailbox[7]) & KERNEL_UP_AND_RUNNING))
404 		|| (!(rx_readl(dev, MUnit.OMRx[0]) & KERNEL_UP_AND_RUNNING)))
405 	{
406 		if(time_after(jiffies, start+180*HZ))
407 		{
408 			status = rx_readl(dev, IndexRegs.Mailbox[7]);
409 			printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
410 					dev->name, instance, status);
411 			goto error_iounmap;
412 		}
413 		set_current_state(TASK_UNINTERRUPTIBLE);
414 		schedule_timeout(1);
415 	}
416 	if (request_irq(dev->scsi_host_ptr->irq, aac_rx_intr, SA_SHIRQ|SA_INTERRUPT, "aacraid", (void *)dev)<0)
417 	{
418 		printk(KERN_ERR "%s%d: Interrupt unavailable.\n", name, instance);
419 		goto error_iounmap;
420 	}
421 	/*
422 	 *	Fill in the function dispatch table.
423 	 */
424 	dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter;
425 	dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt;
426 	dev->a_ops.adapter_notify = aac_rx_notify_adapter;
427 	dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
428 	dev->a_ops.adapter_check_health = aac_rx_check_health;
429 
430 	/*
431 	 *	First clear out all interrupts.  Then enable the one's that we
432 	 *	can handle.
433 	 */
434 	rx_writeb(dev, MUnit.OIMR, 0xff);
435 	rx_writel(dev, MUnit.ODR, 0xffffffff);
436 	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
437 
438 	if (aac_init_adapter(dev) == NULL)
439 		goto error_irq;
440 	/*
441 	 *	Start any kernel threads needed
442 	 */
443 	dev->thread_pid = kernel_thread((int (*)(void *))aac_command_thread, dev, 0);
444 	if(dev->thread_pid < 0)
445 	{
446 		printk(KERN_ERR "aacraid: Unable to create rx thread.\n");
447 		goto error_kfree;
448 	}
449 	/*
450 	 *	Tell the adapter that all is configured, and it can start
451 	 *	accepting requests
452 	 */
453 	aac_rx_start_adapter(dev);
454 	return 0;
455 
456 error_kfree:
457 	kfree(dev->queues);
458 
459 error_irq:
460 	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
461 	free_irq(dev->scsi_host_ptr->irq, (void *)dev);
462 
463 error_iounmap:
464 	iounmap(dev->regs.rx);
465 
466 	return -1;
467 }
468