1 /* 2 * NCR 5380 generic driver routines. These should make it *trivial* 3 * to implement 5380 SCSI drivers under Linux with a non-trantor 4 * architecture. 5 * 6 * Note that these routines also work with NR53c400 family chips. 7 * 8 * Copyright 1993, Drew Eckhardt 9 * Visionary Computing 10 * (Unix and Linux consulting and custom programming) 11 * drew@colorado.edu 12 * +1 (303) 666-5836 13 * 14 * For more information, please consult 15 * 16 * NCR 5380 Family 17 * SCSI Protocol Controller 18 * Databook 19 * 20 * NCR Microelectronics 21 * 1635 Aeroplaza Drive 22 * Colorado Springs, CO 80916 23 * 1+ (719) 578-3400 24 * 1+ (800) 334-5454 25 */ 26 27 /* 28 * With contributions from Ray Van Tassle, Ingmar Baumgart, 29 * Ronald van Cuijlenborg, Alan Cox and others. 30 */ 31 32 /* Ported to Atari by Roman Hodek and others. */ 33 34 /* Adapted for the Sun 3 by Sam Creasey. */ 35 36 /* 37 * Design 38 * 39 * This is a generic 5380 driver. To use it on a different platform, 40 * one simply writes appropriate system specific macros (ie, data 41 * transfer - some PC's will use the I/O bus, 68K's must use 42 * memory mapped) and drops this file in their 'C' wrapper. 43 * 44 * As far as command queueing, two queues are maintained for 45 * each 5380 in the system - commands that haven't been issued yet, 46 * and commands that are currently executing. This means that an 47 * unlimited number of commands may be queued, letting 48 * more commands propagate from the higher driver levels giving higher 49 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, 50 * allowing multiple commands to propagate all the way to a SCSI-II device 51 * while a command is already executing. 52 * 53 * 54 * Issues specific to the NCR5380 : 55 * 56 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead 57 * piece of hardware that requires you to sit in a loop polling for 58 * the REQ signal as long as you are connected. Some devices are 59 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect 60 * while doing long seek operations. [...] These 61 * broken devices are the exception rather than the rule and I'd rather 62 * spend my time optimizing for the normal case. 63 * 64 * Architecture : 65 * 66 * At the heart of the design is a coroutine, NCR5380_main, 67 * which is started from a workqueue for each NCR5380 host in the 68 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by 69 * removing the commands from the issue queue and calling 70 * NCR5380_select() if a nexus is not established. 71 * 72 * Once a nexus is established, the NCR5380_information_transfer() 73 * phase goes through the various phases as instructed by the target. 74 * if the target goes into MSG IN and sends a DISCONNECT message, 75 * the command structure is placed into the per instance disconnected 76 * queue, and NCR5380_main tries to find more work. If the target is 77 * idle for too long, the system will try to sleep. 78 * 79 * If a command has disconnected, eventually an interrupt will trigger, 80 * calling NCR5380_intr() which will in turn call NCR5380_reselect 81 * to reestablish a nexus. This will run main if necessary. 82 * 83 * On command termination, the done function will be called as 84 * appropriate. 85 * 86 * SCSI pointers are maintained in the SCp field of SCSI command 87 * structures, being initialized after the command is connected 88 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. 89 * Note that in violation of the standard, an implicit SAVE POINTERS operation 90 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. 91 */ 92 93 /* 94 * Using this file : 95 * This file a skeleton Linux SCSI driver for the NCR 5380 series 96 * of chips. To use it, you write an architecture specific functions 97 * and macros and include this file in your driver. 98 * 99 * These macros control options : 100 * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be 101 * defined. 102 * 103 * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically 104 * for commands that return with a CHECK CONDITION status. 105 * 106 * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential 107 * transceivers. 108 * 109 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases. 110 * 111 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases. 112 * 113 * These macros MUST be defined : 114 * 115 * NCR5380_read(register) - read from the specified register 116 * 117 * NCR5380_write(register, value) - write to the specific register 118 * 119 * NCR5380_implementation_fields - additional fields needed for this 120 * specific implementation of the NCR5380 121 * 122 * Either real DMA *or* pseudo DMA may be implemented 123 * 124 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer 125 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380 126 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory 127 * NCR5380_dma_residual - residual byte count 128 * 129 * The generic driver is initialized by calling NCR5380_init(instance), 130 * after setting the appropriate host specific fields and ID. If the 131 * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance, 132 * possible) function may be used. 133 */ 134 135 #ifndef NCR5380_io_delay 136 #define NCR5380_io_delay(x) 137 #endif 138 139 #ifndef NCR5380_acquire_dma_irq 140 #define NCR5380_acquire_dma_irq(x) (1) 141 #endif 142 143 #ifndef NCR5380_release_dma_irq 144 #define NCR5380_release_dma_irq(x) 145 #endif 146 147 static int do_abort(struct Scsi_Host *); 148 static void do_reset(struct Scsi_Host *); 149 150 /** 151 * initialize_SCp - init the scsi pointer field 152 * @cmd: command block to set up 153 * 154 * Set up the internal fields in the SCSI command. 155 */ 156 157 static inline void initialize_SCp(struct scsi_cmnd *cmd) 158 { 159 /* 160 * Initialize the Scsi Pointer field so that all of the commands in the 161 * various queues are valid. 162 */ 163 164 if (scsi_bufflen(cmd)) { 165 cmd->SCp.buffer = scsi_sglist(cmd); 166 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1; 167 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 168 cmd->SCp.this_residual = cmd->SCp.buffer->length; 169 } else { 170 cmd->SCp.buffer = NULL; 171 cmd->SCp.buffers_residual = 0; 172 cmd->SCp.ptr = NULL; 173 cmd->SCp.this_residual = 0; 174 } 175 176 cmd->SCp.Status = 0; 177 cmd->SCp.Message = 0; 178 } 179 180 /** 181 * NCR5380_poll_politely2 - wait for two chip register values 182 * @hostdata: host private data 183 * @reg1: 5380 register to poll 184 * @bit1: Bitmask to check 185 * @val1: Expected value 186 * @reg2: Second 5380 register to poll 187 * @bit2: Second bitmask to check 188 * @val2: Second expected value 189 * @wait: Time-out in jiffies 190 * 191 * Polls the chip in a reasonably efficient manner waiting for an 192 * event to occur. After a short quick poll we begin to yield the CPU 193 * (if possible). In irq contexts the time-out is arbitrarily limited. 194 * Callers may hold locks as long as they are held in irq mode. 195 * 196 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. 197 */ 198 199 static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata, 200 unsigned int reg1, u8 bit1, u8 val1, 201 unsigned int reg2, u8 bit2, u8 val2, 202 unsigned long wait) 203 { 204 unsigned long n = hostdata->poll_loops; 205 unsigned long deadline = jiffies + wait; 206 207 do { 208 if ((NCR5380_read(reg1) & bit1) == val1) 209 return 0; 210 if ((NCR5380_read(reg2) & bit2) == val2) 211 return 0; 212 cpu_relax(); 213 } while (n--); 214 215 if (irqs_disabled() || in_interrupt()) 216 return -ETIMEDOUT; 217 218 /* Repeatedly sleep for 1 ms until deadline */ 219 while (time_is_after_jiffies(deadline)) { 220 schedule_timeout_uninterruptible(1); 221 if ((NCR5380_read(reg1) & bit1) == val1) 222 return 0; 223 if ((NCR5380_read(reg2) & bit2) == val2) 224 return 0; 225 } 226 227 return -ETIMEDOUT; 228 } 229 230 #if NDEBUG 231 static struct { 232 unsigned char mask; 233 const char *name; 234 } signals[] = { 235 {SR_DBP, "PARITY"}, 236 {SR_RST, "RST"}, 237 {SR_BSY, "BSY"}, 238 {SR_REQ, "REQ"}, 239 {SR_MSG, "MSG"}, 240 {SR_CD, "CD"}, 241 {SR_IO, "IO"}, 242 {SR_SEL, "SEL"}, 243 {0, NULL} 244 }, 245 basrs[] = { 246 {BASR_END_DMA_TRANSFER, "END OF DMA"}, 247 {BASR_DRQ, "DRQ"}, 248 {BASR_PARITY_ERROR, "PARITY ERROR"}, 249 {BASR_IRQ, "IRQ"}, 250 {BASR_PHASE_MATCH, "PHASE MATCH"}, 251 {BASR_BUSY_ERROR, "BUSY ERROR"}, 252 {BASR_ATN, "ATN"}, 253 {BASR_ACK, "ACK"}, 254 {0, NULL} 255 }, 256 icrs[] = { 257 {ICR_ASSERT_RST, "ASSERT RST"}, 258 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, 259 {ICR_ARBITRATION_LOST, "LOST ARB."}, 260 {ICR_ASSERT_ACK, "ASSERT ACK"}, 261 {ICR_ASSERT_BSY, "ASSERT BSY"}, 262 {ICR_ASSERT_SEL, "ASSERT SEL"}, 263 {ICR_ASSERT_ATN, "ASSERT ATN"}, 264 {ICR_ASSERT_DATA, "ASSERT DATA"}, 265 {0, NULL} 266 }, 267 mrs[] = { 268 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, 269 {MR_TARGET, "TARGET"}, 270 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, 271 {MR_ENABLE_PAR_INTR, "PARITY INTR"}, 272 {MR_ENABLE_EOP_INTR, "EOP INTR"}, 273 {MR_MONITOR_BSY, "MONITOR BSY"}, 274 {MR_DMA_MODE, "DMA MODE"}, 275 {MR_ARBITRATE, "ARBITRATE"}, 276 {0, NULL} 277 }; 278 279 /** 280 * NCR5380_print - print scsi bus signals 281 * @instance: adapter state to dump 282 * 283 * Print the SCSI bus signals for debugging purposes 284 */ 285 286 static void NCR5380_print(struct Scsi_Host *instance) 287 { 288 struct NCR5380_hostdata *hostdata = shost_priv(instance); 289 unsigned char status, data, basr, mr, icr, i; 290 291 data = NCR5380_read(CURRENT_SCSI_DATA_REG); 292 status = NCR5380_read(STATUS_REG); 293 mr = NCR5380_read(MODE_REG); 294 icr = NCR5380_read(INITIATOR_COMMAND_REG); 295 basr = NCR5380_read(BUS_AND_STATUS_REG); 296 297 printk(KERN_DEBUG "SR = 0x%02x : ", status); 298 for (i = 0; signals[i].mask; ++i) 299 if (status & signals[i].mask) 300 printk(KERN_CONT "%s, ", signals[i].name); 301 printk(KERN_CONT "\nBASR = 0x%02x : ", basr); 302 for (i = 0; basrs[i].mask; ++i) 303 if (basr & basrs[i].mask) 304 printk(KERN_CONT "%s, ", basrs[i].name); 305 printk(KERN_CONT "\nICR = 0x%02x : ", icr); 306 for (i = 0; icrs[i].mask; ++i) 307 if (icr & icrs[i].mask) 308 printk(KERN_CONT "%s, ", icrs[i].name); 309 printk(KERN_CONT "\nMR = 0x%02x : ", mr); 310 for (i = 0; mrs[i].mask; ++i) 311 if (mr & mrs[i].mask) 312 printk(KERN_CONT "%s, ", mrs[i].name); 313 printk(KERN_CONT "\n"); 314 } 315 316 static struct { 317 unsigned char value; 318 const char *name; 319 } phases[] = { 320 {PHASE_DATAOUT, "DATAOUT"}, 321 {PHASE_DATAIN, "DATAIN"}, 322 {PHASE_CMDOUT, "CMDOUT"}, 323 {PHASE_STATIN, "STATIN"}, 324 {PHASE_MSGOUT, "MSGOUT"}, 325 {PHASE_MSGIN, "MSGIN"}, 326 {PHASE_UNKNOWN, "UNKNOWN"} 327 }; 328 329 /** 330 * NCR5380_print_phase - show SCSI phase 331 * @instance: adapter to dump 332 * 333 * Print the current SCSI phase for debugging purposes 334 */ 335 336 static void NCR5380_print_phase(struct Scsi_Host *instance) 337 { 338 struct NCR5380_hostdata *hostdata = shost_priv(instance); 339 unsigned char status; 340 int i; 341 342 status = NCR5380_read(STATUS_REG); 343 if (!(status & SR_REQ)) 344 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); 345 else { 346 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && 347 (phases[i].value != (status & PHASE_MASK)); ++i) 348 ; 349 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); 350 } 351 } 352 #endif 353 354 355 static int probe_irq; 356 357 /** 358 * probe_intr - helper for IRQ autoprobe 359 * @irq: interrupt number 360 * @dev_id: unused 361 * @regs: unused 362 * 363 * Set a flag to indicate the IRQ in question was received. This is 364 * used by the IRQ probe code. 365 */ 366 367 static irqreturn_t probe_intr(int irq, void *dev_id) 368 { 369 probe_irq = irq; 370 return IRQ_HANDLED; 371 } 372 373 /** 374 * NCR5380_probe_irq - find the IRQ of an NCR5380 375 * @instance: NCR5380 controller 376 * @possible: bitmask of ISA IRQ lines 377 * 378 * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ 379 * and then looking to see what interrupt actually turned up. 380 */ 381 382 static int __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance, 383 int possible) 384 { 385 struct NCR5380_hostdata *hostdata = shost_priv(instance); 386 unsigned long timeout; 387 int trying_irqs, i, mask; 388 389 for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1) 390 if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0)) 391 trying_irqs |= mask; 392 393 timeout = jiffies + msecs_to_jiffies(250); 394 probe_irq = NO_IRQ; 395 396 /* 397 * A interrupt is triggered whenever BSY = false, SEL = true 398 * and a bit set in the SELECT_ENABLE_REG is asserted on the 399 * SCSI bus. 400 * 401 * Note that the bus is only driven when the phase control signals 402 * (I/O, C/D, and MSG) match those in the TCR, so we must reset that 403 * to zero. 404 */ 405 406 NCR5380_write(TARGET_COMMAND_REG, 0); 407 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 408 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); 409 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL); 410 411 while (probe_irq == NO_IRQ && time_before(jiffies, timeout)) 412 schedule_timeout_uninterruptible(1); 413 414 NCR5380_write(SELECT_ENABLE_REG, 0); 415 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 416 417 for (i = 1, mask = 2; i < 16; ++i, mask <<= 1) 418 if (trying_irqs & mask) 419 free_irq(i, NULL); 420 421 return probe_irq; 422 } 423 424 /** 425 * NCR58380_info - report driver and host information 426 * @instance: relevant scsi host instance 427 * 428 * For use as the host template info() handler. 429 */ 430 431 static const char *NCR5380_info(struct Scsi_Host *instance) 432 { 433 struct NCR5380_hostdata *hostdata = shost_priv(instance); 434 435 return hostdata->info; 436 } 437 438 static void prepare_info(struct Scsi_Host *instance) 439 { 440 struct NCR5380_hostdata *hostdata = shost_priv(instance); 441 442 snprintf(hostdata->info, sizeof(hostdata->info), 443 "%s, irq %d, " 444 "io_port 0x%lx, base 0x%lx, " 445 "can_queue %d, cmd_per_lun %d, " 446 "sg_tablesize %d, this_id %d, " 447 "flags { %s%s%s}, " 448 "options { %s} ", 449 instance->hostt->name, instance->irq, 450 hostdata->io_port, hostdata->base, 451 instance->can_queue, instance->cmd_per_lun, 452 instance->sg_tablesize, instance->this_id, 453 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", 454 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", 455 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "", 456 #ifdef DIFFERENTIAL 457 "DIFFERENTIAL " 458 #endif 459 #ifdef PARITY 460 "PARITY " 461 #endif 462 ""); 463 } 464 465 /** 466 * NCR5380_init - initialise an NCR5380 467 * @instance: adapter to configure 468 * @flags: control flags 469 * 470 * Initializes *instance and corresponding 5380 chip, 471 * with flags OR'd into the initial flags value. 472 * 473 * Notes : I assume that the host, hostno, and id bits have been 474 * set correctly. I don't care about the irq and other fields. 475 * 476 * Returns 0 for success 477 */ 478 479 static int NCR5380_init(struct Scsi_Host *instance, int flags) 480 { 481 struct NCR5380_hostdata *hostdata = shost_priv(instance); 482 int i; 483 unsigned long deadline; 484 unsigned long accesses_per_ms; 485 486 instance->max_lun = 7; 487 488 hostdata->host = instance; 489 hostdata->id_mask = 1 << instance->this_id; 490 hostdata->id_higher_mask = 0; 491 for (i = hostdata->id_mask; i <= 0x80; i <<= 1) 492 if (i > hostdata->id_mask) 493 hostdata->id_higher_mask |= i; 494 for (i = 0; i < 8; ++i) 495 hostdata->busy[i] = 0; 496 hostdata->dma_len = 0; 497 498 spin_lock_init(&hostdata->lock); 499 hostdata->connected = NULL; 500 hostdata->sensing = NULL; 501 INIT_LIST_HEAD(&hostdata->autosense); 502 INIT_LIST_HEAD(&hostdata->unissued); 503 INIT_LIST_HEAD(&hostdata->disconnected); 504 505 hostdata->flags = flags; 506 507 INIT_WORK(&hostdata->main_task, NCR5380_main); 508 hostdata->work_q = alloc_workqueue("ncr5380_%d", 509 WQ_UNBOUND | WQ_MEM_RECLAIM, 510 1, instance->host_no); 511 if (!hostdata->work_q) 512 return -ENOMEM; 513 514 prepare_info(instance); 515 516 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 517 NCR5380_write(MODE_REG, MR_BASE); 518 NCR5380_write(TARGET_COMMAND_REG, 0); 519 NCR5380_write(SELECT_ENABLE_REG, 0); 520 521 /* Calibrate register polling loop */ 522 i = 0; 523 deadline = jiffies + 1; 524 do { 525 cpu_relax(); 526 } while (time_is_after_jiffies(deadline)); 527 deadline += msecs_to_jiffies(256); 528 do { 529 NCR5380_read(STATUS_REG); 530 ++i; 531 cpu_relax(); 532 } while (time_is_after_jiffies(deadline)); 533 accesses_per_ms = i / 256; 534 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2; 535 536 return 0; 537 } 538 539 /** 540 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. 541 * @instance: adapter to check 542 * 543 * If the system crashed, it may have crashed with a connected target and 544 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the 545 * currently established nexus, which we know nothing about. Failing that 546 * do a bus reset. 547 * 548 * Note that a bus reset will cause the chip to assert IRQ. 549 * 550 * Returns 0 if successful, otherwise -ENXIO. 551 */ 552 553 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) 554 { 555 struct NCR5380_hostdata *hostdata = shost_priv(instance); 556 int pass; 557 558 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { 559 switch (pass) { 560 case 1: 561 case 3: 562 case 5: 563 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); 564 NCR5380_poll_politely(hostdata, 565 STATUS_REG, SR_BSY, 0, 5 * HZ); 566 break; 567 case 2: 568 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); 569 do_abort(instance); 570 break; 571 case 4: 572 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); 573 do_reset(instance); 574 /* Wait after a reset; the SCSI standard calls for 575 * 250ms, we wait 500ms to be on the safe side. 576 * But some Toshiba CD-ROMs need ten times that. 577 */ 578 if (hostdata->flags & FLAG_TOSHIBA_DELAY) 579 msleep(2500); 580 else 581 msleep(500); 582 break; 583 case 6: 584 shost_printk(KERN_ERR, instance, "bus locked solid\n"); 585 return -ENXIO; 586 } 587 } 588 return 0; 589 } 590 591 /** 592 * NCR5380_exit - remove an NCR5380 593 * @instance: adapter to remove 594 * 595 * Assumes that no more work can be queued (e.g. by NCR5380_intr). 596 */ 597 598 static void NCR5380_exit(struct Scsi_Host *instance) 599 { 600 struct NCR5380_hostdata *hostdata = shost_priv(instance); 601 602 cancel_work_sync(&hostdata->main_task); 603 destroy_workqueue(hostdata->work_q); 604 } 605 606 /** 607 * complete_cmd - finish processing a command and return it to the SCSI ML 608 * @instance: the host instance 609 * @cmd: command to complete 610 */ 611 612 static void complete_cmd(struct Scsi_Host *instance, 613 struct scsi_cmnd *cmd) 614 { 615 struct NCR5380_hostdata *hostdata = shost_priv(instance); 616 617 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); 618 619 if (hostdata->sensing == cmd) { 620 /* Autosense processing ends here */ 621 if ((cmd->result & 0xff) != SAM_STAT_GOOD) { 622 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 623 set_host_byte(cmd, DID_ERROR); 624 } else 625 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 626 hostdata->sensing = NULL; 627 } 628 629 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 630 631 cmd->scsi_done(cmd); 632 } 633 634 /** 635 * NCR5380_queue_command - queue a command 636 * @instance: the relevant SCSI adapter 637 * @cmd: SCSI command 638 * 639 * cmd is added to the per-instance issue queue, with minor 640 * twiddling done to the host specific fields of cmd. If the 641 * main coroutine is not running, it is restarted. 642 */ 643 644 static int NCR5380_queue_command(struct Scsi_Host *instance, 645 struct scsi_cmnd *cmd) 646 { 647 struct NCR5380_hostdata *hostdata = shost_priv(instance); 648 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 649 unsigned long flags; 650 651 #if (NDEBUG & NDEBUG_NO_WRITE) 652 switch (cmd->cmnd[0]) { 653 case WRITE_6: 654 case WRITE_10: 655 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); 656 cmd->result = (DID_ERROR << 16); 657 cmd->scsi_done(cmd); 658 return 0; 659 } 660 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ 661 662 cmd->result = 0; 663 664 if (!NCR5380_acquire_dma_irq(instance)) 665 return SCSI_MLQUEUE_HOST_BUSY; 666 667 spin_lock_irqsave(&hostdata->lock, flags); 668 669 /* 670 * Insert the cmd into the issue queue. Note that REQUEST SENSE 671 * commands are added to the head of the queue since any command will 672 * clear the contingent allegiance condition that exists and the 673 * sense data is only guaranteed to be valid while the condition exists. 674 */ 675 676 if (cmd->cmnd[0] == REQUEST_SENSE) 677 list_add(&ncmd->list, &hostdata->unissued); 678 else 679 list_add_tail(&ncmd->list, &hostdata->unissued); 680 681 spin_unlock_irqrestore(&hostdata->lock, flags); 682 683 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", 684 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); 685 686 /* Kick off command processing */ 687 queue_work(hostdata->work_q, &hostdata->main_task); 688 return 0; 689 } 690 691 static inline void maybe_release_dma_irq(struct Scsi_Host *instance) 692 { 693 struct NCR5380_hostdata *hostdata = shost_priv(instance); 694 695 /* Caller does the locking needed to set & test these data atomically */ 696 if (list_empty(&hostdata->disconnected) && 697 list_empty(&hostdata->unissued) && 698 list_empty(&hostdata->autosense) && 699 !hostdata->connected && 700 !hostdata->selecting) 701 NCR5380_release_dma_irq(instance); 702 } 703 704 /** 705 * dequeue_next_cmd - dequeue a command for processing 706 * @instance: the scsi host instance 707 * 708 * Priority is given to commands on the autosense queue. These commands 709 * need autosense because of a CHECK CONDITION result. 710 * 711 * Returns a command pointer if a command is found for a target that is 712 * not already busy. Otherwise returns NULL. 713 */ 714 715 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) 716 { 717 struct NCR5380_hostdata *hostdata = shost_priv(instance); 718 struct NCR5380_cmd *ncmd; 719 struct scsi_cmnd *cmd; 720 721 if (hostdata->sensing || list_empty(&hostdata->autosense)) { 722 list_for_each_entry(ncmd, &hostdata->unissued, list) { 723 cmd = NCR5380_to_scmd(ncmd); 724 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", 725 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); 726 727 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { 728 list_del(&ncmd->list); 729 dsprintk(NDEBUG_QUEUES, instance, 730 "dequeue: removed %p from issue queue\n", cmd); 731 return cmd; 732 } 733 } 734 } else { 735 /* Autosense processing begins here */ 736 ncmd = list_first_entry(&hostdata->autosense, 737 struct NCR5380_cmd, list); 738 list_del(&ncmd->list); 739 cmd = NCR5380_to_scmd(ncmd); 740 dsprintk(NDEBUG_QUEUES, instance, 741 "dequeue: removed %p from autosense queue\n", cmd); 742 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); 743 hostdata->sensing = cmd; 744 return cmd; 745 } 746 return NULL; 747 } 748 749 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) 750 { 751 struct NCR5380_hostdata *hostdata = shost_priv(instance); 752 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 753 754 if (hostdata->sensing == cmd) { 755 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 756 list_add(&ncmd->list, &hostdata->autosense); 757 hostdata->sensing = NULL; 758 } else 759 list_add(&ncmd->list, &hostdata->unissued); 760 } 761 762 /** 763 * NCR5380_main - NCR state machines 764 * 765 * NCR5380_main is a coroutine that runs as long as more work can 766 * be done on the NCR5380 host adapters in a system. Both 767 * NCR5380_queue_command() and NCR5380_intr() will try to start it 768 * in case it is not running. 769 */ 770 771 static void NCR5380_main(struct work_struct *work) 772 { 773 struct NCR5380_hostdata *hostdata = 774 container_of(work, struct NCR5380_hostdata, main_task); 775 struct Scsi_Host *instance = hostdata->host; 776 int done; 777 778 do { 779 done = 1; 780 781 spin_lock_irq(&hostdata->lock); 782 while (!hostdata->connected && !hostdata->selecting) { 783 struct scsi_cmnd *cmd = dequeue_next_cmd(instance); 784 785 if (!cmd) 786 break; 787 788 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); 789 790 /* 791 * Attempt to establish an I_T_L nexus here. 792 * On success, instance->hostdata->connected is set. 793 * On failure, we must add the command back to the 794 * issue queue so we can keep trying. 795 */ 796 /* 797 * REQUEST SENSE commands are issued without tagged 798 * queueing, even on SCSI-II devices because the 799 * contingent allegiance condition exists for the 800 * entire unit. 801 */ 802 803 if (!NCR5380_select(instance, cmd)) { 804 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); 805 maybe_release_dma_irq(instance); 806 } else { 807 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, 808 "main: select failed, returning %p to queue\n", cmd); 809 requeue_cmd(instance, cmd); 810 } 811 } 812 if (hostdata->connected && !hostdata->dma_len) { 813 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); 814 NCR5380_information_transfer(instance); 815 done = 0; 816 } 817 spin_unlock_irq(&hostdata->lock); 818 if (!done) 819 cond_resched(); 820 } while (!done); 821 } 822 823 /* 824 * NCR5380_dma_complete - finish DMA transfer 825 * @instance: the scsi host instance 826 * 827 * Called by the interrupt handler when DMA finishes or a phase 828 * mismatch occurs (which would end the DMA transfer). 829 */ 830 831 static void NCR5380_dma_complete(struct Scsi_Host *instance) 832 { 833 struct NCR5380_hostdata *hostdata = shost_priv(instance); 834 int transferred; 835 unsigned char **data; 836 int *count; 837 int saved_data = 0, overrun = 0; 838 unsigned char p; 839 840 if (hostdata->read_overruns) { 841 p = hostdata->connected->SCp.phase; 842 if (p & SR_IO) { 843 udelay(10); 844 if ((NCR5380_read(BUS_AND_STATUS_REG) & 845 (BASR_PHASE_MATCH | BASR_ACK)) == 846 (BASR_PHASE_MATCH | BASR_ACK)) { 847 saved_data = NCR5380_read(INPUT_DATA_REG); 848 overrun = 1; 849 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); 850 } 851 } 852 } 853 854 #ifdef CONFIG_SUN3 855 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) { 856 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", 857 instance->host_no); 858 BUG(); 859 } 860 861 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == 862 (BASR_PHASE_MATCH | BASR_ACK)) { 863 pr_err("scsi%d: BASR %02x\n", instance->host_no, 864 NCR5380_read(BUS_AND_STATUS_REG)); 865 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", 866 instance->host_no); 867 BUG(); 868 } 869 #endif 870 871 NCR5380_write(MODE_REG, MR_BASE); 872 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 873 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 874 875 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata); 876 hostdata->dma_len = 0; 877 878 data = (unsigned char **)&hostdata->connected->SCp.ptr; 879 count = &hostdata->connected->SCp.this_residual; 880 *data += transferred; 881 *count -= transferred; 882 883 if (hostdata->read_overruns) { 884 int cnt, toPIO; 885 886 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { 887 cnt = toPIO = hostdata->read_overruns; 888 if (overrun) { 889 dsprintk(NDEBUG_DMA, instance, 890 "Got an input overrun, using saved byte\n"); 891 *(*data)++ = saved_data; 892 (*count)--; 893 cnt--; 894 toPIO--; 895 } 896 if (toPIO > 0) { 897 dsprintk(NDEBUG_DMA, instance, 898 "Doing %d byte PIO to 0x%p\n", cnt, *data); 899 NCR5380_transfer_pio(instance, &p, &cnt, data); 900 *count -= toPIO - cnt; 901 } 902 } 903 } 904 } 905 906 /** 907 * NCR5380_intr - generic NCR5380 irq handler 908 * @irq: interrupt number 909 * @dev_id: device info 910 * 911 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses 912 * from the disconnected queue, and restarting NCR5380_main() 913 * as required. 914 * 915 * The chip can assert IRQ in any of six different conditions. The IRQ flag 916 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). 917 * Three of these six conditions are latched in the Bus and Status Register: 918 * - End of DMA (cleared by ending DMA Mode) 919 * - Parity error (cleared by reading RPIR) 920 * - Loss of BSY (cleared by reading RPIR) 921 * Two conditions have flag bits that are not latched: 922 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) 923 * - Bus reset (non-maskable) 924 * The remaining condition has no flag bit at all: 925 * - Selection/reselection 926 * 927 * Hence, establishing the cause(s) of any interrupt is partly guesswork. 928 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor 929 * claimed that "the design of the [DP8490] interrupt logic ensures 930 * interrupts will not be lost (they can be on the DP5380)." 931 * The L5380/53C80 datasheet from LOGIC Devices has more details. 932 * 933 * Checking for bus reset by reading RST is futile because of interrupt 934 * latency, but a bus reset will reset chip logic. Checking for parity error 935 * is unnecessary because that interrupt is never enabled. A Loss of BSY 936 * condition will clear DMA Mode. We can tell when this occurs because the 937 * the Busy Monitor interrupt is enabled together with DMA Mode. 938 */ 939 940 static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id) 941 { 942 struct Scsi_Host *instance = dev_id; 943 struct NCR5380_hostdata *hostdata = shost_priv(instance); 944 int handled = 0; 945 unsigned char basr; 946 unsigned long flags; 947 948 spin_lock_irqsave(&hostdata->lock, flags); 949 950 basr = NCR5380_read(BUS_AND_STATUS_REG); 951 if (basr & BASR_IRQ) { 952 unsigned char mr = NCR5380_read(MODE_REG); 953 unsigned char sr = NCR5380_read(STATUS_REG); 954 955 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", 956 irq, basr, sr, mr); 957 958 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { 959 /* Probably End of DMA, Phase Mismatch or Loss of BSY. 960 * We ack IRQ after clearing Mode Register. Workarounds 961 * for End of DMA errata need to happen in DMA Mode. 962 */ 963 964 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); 965 966 if (hostdata->connected) { 967 NCR5380_dma_complete(instance); 968 queue_work(hostdata->work_q, &hostdata->main_task); 969 } else { 970 NCR5380_write(MODE_REG, MR_BASE); 971 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 972 } 973 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && 974 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { 975 /* Probably reselected */ 976 NCR5380_write(SELECT_ENABLE_REG, 0); 977 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 978 979 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); 980 981 if (!hostdata->connected) { 982 NCR5380_reselect(instance); 983 queue_work(hostdata->work_q, &hostdata->main_task); 984 } 985 if (!hostdata->connected) 986 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 987 } else { 988 /* Probably Bus Reset */ 989 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 990 991 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); 992 #ifdef SUN3_SCSI_VME 993 dregs->csr |= CSR_DMA_ENABLE; 994 #endif 995 } 996 handled = 1; 997 } else { 998 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n"); 999 #ifdef SUN3_SCSI_VME 1000 dregs->csr |= CSR_DMA_ENABLE; 1001 #endif 1002 } 1003 1004 spin_unlock_irqrestore(&hostdata->lock, flags); 1005 1006 return IRQ_RETVAL(handled); 1007 } 1008 1009 /* 1010 * Function : int NCR5380_select(struct Scsi_Host *instance, 1011 * struct scsi_cmnd *cmd) 1012 * 1013 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command, 1014 * including ARBITRATION, SELECTION, and initial message out for 1015 * IDENTIFY and queue messages. 1016 * 1017 * Inputs : instance - instantiation of the 5380 driver on which this 1018 * target lives, cmd - SCSI command to execute. 1019 * 1020 * Returns cmd if selection failed but should be retried, 1021 * NULL if selection failed and should not be retried, or 1022 * NULL if selection succeeded (hostdata->connected == cmd). 1023 * 1024 * Side effects : 1025 * If bus busy, arbitration failed, etc, NCR5380_select() will exit 1026 * with registers as they should have been on entry - ie 1027 * SELECT_ENABLE will be set appropriately, the NCR5380 1028 * will cease to drive any SCSI bus signals. 1029 * 1030 * If successful : I_T_L or I_T_L_Q nexus will be established, 1031 * instance->connected will be set to cmd. 1032 * SELECT interrupt will be disabled. 1033 * 1034 * If failed (no target) : cmd->scsi_done() will be called, and the 1035 * cmd->result host byte set to DID_BAD_TARGET. 1036 */ 1037 1038 static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance, 1039 struct scsi_cmnd *cmd) 1040 { 1041 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1042 unsigned char tmp[3], phase; 1043 unsigned char *data; 1044 int len; 1045 int err; 1046 1047 NCR5380_dprint(NDEBUG_ARBITRATION, instance); 1048 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", 1049 instance->this_id); 1050 1051 /* 1052 * Arbitration and selection phases are slow and involve dropping the 1053 * lock, so we have to watch out for EH. An exception handler may 1054 * change 'selecting' to NULL. This function will then return NULL 1055 * so that the caller will forget about 'cmd'. (During information 1056 * transfer phases, EH may change 'connected' to NULL.) 1057 */ 1058 hostdata->selecting = cmd; 1059 1060 /* 1061 * Set the phase bits to 0, otherwise the NCR5380 won't drive the 1062 * data bus during SELECTION. 1063 */ 1064 1065 NCR5380_write(TARGET_COMMAND_REG, 0); 1066 1067 /* 1068 * Start arbitration. 1069 */ 1070 1071 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); 1072 NCR5380_write(MODE_REG, MR_ARBITRATE); 1073 1074 /* The chip now waits for BUS FREE phase. Then after the 800 ns 1075 * Bus Free Delay, arbitration will begin. 1076 */ 1077 1078 spin_unlock_irq(&hostdata->lock); 1079 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0, 1080 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, 1081 ICR_ARBITRATION_PROGRESS, HZ); 1082 spin_lock_irq(&hostdata->lock); 1083 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { 1084 /* Reselection interrupt */ 1085 goto out; 1086 } 1087 if (!hostdata->selecting) { 1088 /* Command was aborted */ 1089 NCR5380_write(MODE_REG, MR_BASE); 1090 goto out; 1091 } 1092 if (err < 0) { 1093 NCR5380_write(MODE_REG, MR_BASE); 1094 shost_printk(KERN_ERR, instance, 1095 "select: arbitration timeout\n"); 1096 goto out; 1097 } 1098 spin_unlock_irq(&hostdata->lock); 1099 1100 /* The SCSI-2 arbitration delay is 2.4 us */ 1101 udelay(3); 1102 1103 /* Check for lost arbitration */ 1104 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || 1105 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || 1106 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { 1107 NCR5380_write(MODE_REG, MR_BASE); 1108 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); 1109 spin_lock_irq(&hostdata->lock); 1110 goto out; 1111 } 1112 1113 /* After/during arbitration, BSY should be asserted. 1114 * IBM DPES-31080 Version S31Q works now 1115 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) 1116 */ 1117 NCR5380_write(INITIATOR_COMMAND_REG, 1118 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); 1119 1120 /* 1121 * Again, bus clear + bus settle time is 1.2us, however, this is 1122 * a minimum so we'll udelay ceil(1.2) 1123 */ 1124 1125 if (hostdata->flags & FLAG_TOSHIBA_DELAY) 1126 udelay(15); 1127 else 1128 udelay(2); 1129 1130 spin_lock_irq(&hostdata->lock); 1131 1132 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ 1133 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) 1134 goto out; 1135 1136 if (!hostdata->selecting) { 1137 NCR5380_write(MODE_REG, MR_BASE); 1138 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1139 goto out; 1140 } 1141 1142 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); 1143 1144 /* 1145 * Now that we have won arbitration, start Selection process, asserting 1146 * the host and target ID's on the SCSI bus. 1147 */ 1148 1149 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); 1150 1151 /* 1152 * Raise ATN while SEL is true before BSY goes false from arbitration, 1153 * since this is the only way to guarantee that we'll get a MESSAGE OUT 1154 * phase immediately after selection. 1155 */ 1156 1157 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | 1158 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); 1159 NCR5380_write(MODE_REG, MR_BASE); 1160 1161 /* 1162 * Reselect interrupts must be turned off prior to the dropping of BSY, 1163 * otherwise we will trigger an interrupt. 1164 */ 1165 NCR5380_write(SELECT_ENABLE_REG, 0); 1166 1167 spin_unlock_irq(&hostdata->lock); 1168 1169 /* 1170 * The initiator shall then wait at least two deskew delays and release 1171 * the BSY signal. 1172 */ 1173 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ 1174 1175 /* Reset BSY */ 1176 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | 1177 ICR_ASSERT_ATN | ICR_ASSERT_SEL); 1178 1179 /* 1180 * Something weird happens when we cease to drive BSY - looks 1181 * like the board/chip is letting us do another read before the 1182 * appropriate propagation delay has expired, and we're confusing 1183 * a BSY signal from ourselves as the target's response to SELECTION. 1184 * 1185 * A small delay (the 'C++' frontend breaks the pipeline with an 1186 * unnecessary jump, making it work on my 386-33/Trantor T128, the 1187 * tighter 'C' code breaks and requires this) solves the problem - 1188 * the 1 us delay is arbitrary, and only used because this delay will 1189 * be the same on other platforms and since it works here, it should 1190 * work there. 1191 * 1192 * wingel suggests that this could be due to failing to wait 1193 * one deskew delay. 1194 */ 1195 1196 udelay(1); 1197 1198 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); 1199 1200 /* 1201 * The SCSI specification calls for a 250 ms timeout for the actual 1202 * selection. 1203 */ 1204 1205 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY, 1206 msecs_to_jiffies(250)); 1207 1208 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { 1209 spin_lock_irq(&hostdata->lock); 1210 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1211 NCR5380_reselect(instance); 1212 if (!hostdata->connected) 1213 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1214 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); 1215 goto out; 1216 } 1217 1218 if (err < 0) { 1219 spin_lock_irq(&hostdata->lock); 1220 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1221 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1222 /* Can't touch cmd if it has been reclaimed by the scsi ML */ 1223 if (hostdata->selecting) { 1224 cmd->result = DID_BAD_TARGET << 16; 1225 complete_cmd(instance, cmd); 1226 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n"); 1227 cmd = NULL; 1228 } 1229 goto out; 1230 } 1231 1232 /* 1233 * No less than two deskew delays after the initiator detects the 1234 * BSY signal is true, it shall release the SEL signal and may 1235 * change the DATA BUS. -wingel 1236 */ 1237 1238 udelay(1); 1239 1240 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1241 1242 /* 1243 * Since we followed the SCSI spec, and raised ATN while SEL 1244 * was true but before BSY was false during selection, the information 1245 * transfer phase should be a MESSAGE OUT phase so that we can send the 1246 * IDENTIFY message. 1247 */ 1248 1249 /* Wait for start of REQ/ACK handshake */ 1250 1251 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); 1252 spin_lock_irq(&hostdata->lock); 1253 if (err < 0) { 1254 shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); 1255 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1256 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1257 goto out; 1258 } 1259 if (!hostdata->selecting) { 1260 do_abort(instance); 1261 goto out; 1262 } 1263 1264 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", 1265 scmd_id(cmd)); 1266 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun); 1267 1268 len = 1; 1269 data = tmp; 1270 phase = PHASE_MSGOUT; 1271 NCR5380_transfer_pio(instance, &phase, &len, &data); 1272 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); 1273 /* XXX need to handle errors here */ 1274 1275 hostdata->connected = cmd; 1276 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; 1277 1278 #ifdef SUN3_SCSI_VME 1279 dregs->csr |= CSR_INTR; 1280 #endif 1281 1282 initialize_SCp(cmd); 1283 1284 cmd = NULL; 1285 1286 out: 1287 if (!hostdata->selecting) 1288 return NULL; 1289 hostdata->selecting = NULL; 1290 return cmd; 1291 } 1292 1293 /* 1294 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, 1295 * unsigned char *phase, int *count, unsigned char **data) 1296 * 1297 * Purpose : transfers data in given phase using polled I/O 1298 * 1299 * Inputs : instance - instance of driver, *phase - pointer to 1300 * what phase is expected, *count - pointer to number of 1301 * bytes to transfer, **data - pointer to data pointer. 1302 * 1303 * Returns : -1 when different phase is entered without transferring 1304 * maximum number of bytes, 0 if all bytes are transferred or exit 1305 * is in same phase. 1306 * 1307 * Also, *phase, *count, *data are modified in place. 1308 * 1309 * XXX Note : handling for bus free may be useful. 1310 */ 1311 1312 /* 1313 * Note : this code is not as quick as it could be, however it 1314 * IS 100% reliable, and for the actual data transfer where speed 1315 * counts, we will always do a pseudo DMA or DMA transfer. 1316 */ 1317 1318 static int NCR5380_transfer_pio(struct Scsi_Host *instance, 1319 unsigned char *phase, int *count, 1320 unsigned char **data) 1321 { 1322 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1323 unsigned char p = *phase, tmp; 1324 int c = *count; 1325 unsigned char *d = *data; 1326 1327 /* 1328 * The NCR5380 chip will only drive the SCSI bus when the 1329 * phase specified in the appropriate bits of the TARGET COMMAND 1330 * REGISTER match the STATUS REGISTER 1331 */ 1332 1333 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1334 1335 do { 1336 /* 1337 * Wait for assertion of REQ, after which the phase bits will be 1338 * valid 1339 */ 1340 1341 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) 1342 break; 1343 1344 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); 1345 1346 /* Check for phase mismatch */ 1347 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { 1348 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); 1349 NCR5380_dprint_phase(NDEBUG_PIO, instance); 1350 break; 1351 } 1352 1353 /* Do actual transfer from SCSI bus to / from memory */ 1354 if (!(p & SR_IO)) 1355 NCR5380_write(OUTPUT_DATA_REG, *d); 1356 else 1357 *d = NCR5380_read(CURRENT_SCSI_DATA_REG); 1358 1359 ++d; 1360 1361 /* 1362 * The SCSI standard suggests that in MSGOUT phase, the initiator 1363 * should drop ATN on the last byte of the message phase 1364 * after REQ has been asserted for the handshake but before 1365 * the initiator raises ACK. 1366 */ 1367 1368 if (!(p & SR_IO)) { 1369 if (!((p & SR_MSG) && c > 1)) { 1370 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); 1371 NCR5380_dprint(NDEBUG_PIO, instance); 1372 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1373 ICR_ASSERT_DATA | ICR_ASSERT_ACK); 1374 } else { 1375 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1376 ICR_ASSERT_DATA | ICR_ASSERT_ATN); 1377 NCR5380_dprint(NDEBUG_PIO, instance); 1378 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1379 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); 1380 } 1381 } else { 1382 NCR5380_dprint(NDEBUG_PIO, instance); 1383 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); 1384 } 1385 1386 if (NCR5380_poll_politely(hostdata, 1387 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) 1388 break; 1389 1390 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); 1391 1392 /* 1393 * We have several special cases to consider during REQ/ACK handshaking : 1394 * 1. We were in MSGOUT phase, and we are on the last byte of the 1395 * message. ATN must be dropped as ACK is dropped. 1396 * 1397 * 2. We are in a MSGIN phase, and we are on the last byte of the 1398 * message. We must exit with ACK asserted, so that the calling 1399 * code may raise ATN before dropping ACK to reject the message. 1400 * 1401 * 3. ACK and ATN are clear and the target may proceed as normal. 1402 */ 1403 if (!(p == PHASE_MSGIN && c == 1)) { 1404 if (p == PHASE_MSGOUT && c > 1) 1405 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1406 else 1407 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1408 } 1409 } while (--c); 1410 1411 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); 1412 1413 *count = c; 1414 *data = d; 1415 tmp = NCR5380_read(STATUS_REG); 1416 /* The phase read from the bus is valid if either REQ is (already) 1417 * asserted or if ACK hasn't been released yet. The latter applies if 1418 * we're in MSG IN, DATA IN or STATUS and all bytes have been received. 1419 */ 1420 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) 1421 *phase = tmp & PHASE_MASK; 1422 else 1423 *phase = PHASE_UNKNOWN; 1424 1425 if (!c || (*phase == p)) 1426 return 0; 1427 else 1428 return -1; 1429 } 1430 1431 /** 1432 * do_reset - issue a reset command 1433 * @instance: adapter to reset 1434 * 1435 * Issue a reset sequence to the NCR5380 and try and get the bus 1436 * back into sane shape. 1437 * 1438 * This clears the reset interrupt flag because there may be no handler for 1439 * it. When the driver is initialized, the NCR5380_intr() handler has not yet 1440 * been installed. And when in EH we may have released the ST DMA interrupt. 1441 */ 1442 1443 static void do_reset(struct Scsi_Host *instance) 1444 { 1445 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance); 1446 unsigned long flags; 1447 1448 local_irq_save(flags); 1449 NCR5380_write(TARGET_COMMAND_REG, 1450 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); 1451 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); 1452 udelay(50); 1453 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1454 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); 1455 local_irq_restore(flags); 1456 } 1457 1458 /** 1459 * do_abort - abort the currently established nexus by going to 1460 * MESSAGE OUT phase and sending an ABORT message. 1461 * @instance: relevant scsi host instance 1462 * 1463 * Returns 0 on success, -1 on failure. 1464 */ 1465 1466 static int do_abort(struct Scsi_Host *instance) 1467 { 1468 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1469 unsigned char *msgptr, phase, tmp; 1470 int len; 1471 int rc; 1472 1473 /* Request message out phase */ 1474 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1475 1476 /* 1477 * Wait for the target to indicate a valid phase by asserting 1478 * REQ. Once this happens, we'll have either a MSGOUT phase 1479 * and can immediately send the ABORT message, or we'll have some 1480 * other phase and will have to source/sink data. 1481 * 1482 * We really don't care what value was on the bus or what value 1483 * the target sees, so we just handshake. 1484 */ 1485 1486 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); 1487 if (rc < 0) 1488 goto timeout; 1489 1490 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; 1491 1492 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); 1493 1494 if (tmp != PHASE_MSGOUT) { 1495 NCR5380_write(INITIATOR_COMMAND_REG, 1496 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); 1497 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ); 1498 if (rc < 0) 1499 goto timeout; 1500 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1501 } 1502 1503 tmp = ABORT; 1504 msgptr = &tmp; 1505 len = 1; 1506 phase = PHASE_MSGOUT; 1507 NCR5380_transfer_pio(instance, &phase, &len, &msgptr); 1508 1509 /* 1510 * If we got here, and the command completed successfully, 1511 * we're about to go into bus free state. 1512 */ 1513 1514 return len ? -1 : 0; 1515 1516 timeout: 1517 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1518 return -1; 1519 } 1520 1521 /* 1522 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, 1523 * unsigned char *phase, int *count, unsigned char **data) 1524 * 1525 * Purpose : transfers data in given phase using either real 1526 * or pseudo DMA. 1527 * 1528 * Inputs : instance - instance of driver, *phase - pointer to 1529 * what phase is expected, *count - pointer to number of 1530 * bytes to transfer, **data - pointer to data pointer. 1531 * 1532 * Returns : -1 when different phase is entered without transferring 1533 * maximum number of bytes, 0 if all bytes or transferred or exit 1534 * is in same phase. 1535 * 1536 * Also, *phase, *count, *data are modified in place. 1537 */ 1538 1539 1540 static int NCR5380_transfer_dma(struct Scsi_Host *instance, 1541 unsigned char *phase, int *count, 1542 unsigned char **data) 1543 { 1544 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1545 int c = *count; 1546 unsigned char p = *phase; 1547 unsigned char *d = *data; 1548 unsigned char tmp; 1549 int result = 0; 1550 1551 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { 1552 *phase = tmp; 1553 return -1; 1554 } 1555 1556 hostdata->connected->SCp.phase = p; 1557 1558 if (p & SR_IO) { 1559 if (hostdata->read_overruns) 1560 c -= hostdata->read_overruns; 1561 else if (hostdata->flags & FLAG_DMA_FIXUP) 1562 --c; 1563 } 1564 1565 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", 1566 (p & SR_IO) ? "receive" : "send", c, d); 1567 1568 #ifdef CONFIG_SUN3 1569 /* send start chain */ 1570 sun3scsi_dma_start(c, *data); 1571 #endif 1572 1573 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1574 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | 1575 MR_ENABLE_EOP_INTR); 1576 1577 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { 1578 /* On the Medusa, it is a must to initialize the DMA before 1579 * starting the NCR. This is also the cleaner way for the TT. 1580 */ 1581 if (p & SR_IO) 1582 result = NCR5380_dma_recv_setup(hostdata, d, c); 1583 else 1584 result = NCR5380_dma_send_setup(hostdata, d, c); 1585 } 1586 1587 /* 1588 * On the PAS16 at least I/O recovery delays are not needed here. 1589 * Everyone else seems to want them. 1590 */ 1591 1592 if (p & SR_IO) { 1593 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1594 NCR5380_io_delay(1); 1595 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); 1596 } else { 1597 NCR5380_io_delay(1); 1598 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); 1599 NCR5380_io_delay(1); 1600 NCR5380_write(START_DMA_SEND_REG, 0); 1601 NCR5380_io_delay(1); 1602 } 1603 1604 #ifdef CONFIG_SUN3 1605 #ifdef SUN3_SCSI_VME 1606 dregs->csr |= CSR_DMA_ENABLE; 1607 #endif 1608 sun3_dma_active = 1; 1609 #endif 1610 1611 if (hostdata->flags & FLAG_LATE_DMA_SETUP) { 1612 /* On the Falcon, the DMA setup must be done after the last 1613 * NCR access, else the DMA setup gets trashed! 1614 */ 1615 if (p & SR_IO) 1616 result = NCR5380_dma_recv_setup(hostdata, d, c); 1617 else 1618 result = NCR5380_dma_send_setup(hostdata, d, c); 1619 } 1620 1621 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ 1622 if (result < 0) 1623 return result; 1624 1625 /* For real DMA, result is the byte count. DMA interrupt is expected. */ 1626 if (result > 0) { 1627 hostdata->dma_len = result; 1628 return 0; 1629 } 1630 1631 /* The result is zero iff pseudo DMA send/receive was completed. */ 1632 hostdata->dma_len = c; 1633 1634 /* 1635 * A note regarding the DMA errata workarounds for early NMOS silicon. 1636 * 1637 * For DMA sends, we want to wait until the last byte has been 1638 * transferred out over the bus before we turn off DMA mode. Alas, there 1639 * seems to be no terribly good way of doing this on a 5380 under all 1640 * conditions. For non-scatter-gather operations, we can wait until REQ 1641 * and ACK both go false, or until a phase mismatch occurs. Gather-sends 1642 * are nastier, since the device will be expecting more data than we 1643 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we 1644 * could test Last Byte Sent to assure transfer (I imagine this is precisely 1645 * why this signal was added to the newer chips) but on the older 538[01] 1646 * this signal does not exist. The workaround for this lack is a watchdog; 1647 * we bail out of the wait-loop after a modest amount of wait-time if 1648 * the usual exit conditions are not met. Not a terribly clean or 1649 * correct solution :-% 1650 * 1651 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. 1652 * If the chip is in DMA receive mode, it will respond to a target's 1653 * REQ by latching the SCSI data into the INPUT DATA register and asserting 1654 * ACK, even if it has _already_ been notified by the DMA controller that 1655 * the current DMA transfer has completed! If the NCR5380 is then taken 1656 * out of DMA mode, this already-acknowledged byte is lost. This is 1657 * not a problem for "one DMA transfer per READ command", because 1658 * the situation will never arise... either all of the data is DMA'ed 1659 * properly, or the target switches to MESSAGE IN phase to signal a 1660 * disconnection (either operation bringing the DMA to a clean halt). 1661 * However, in order to handle scatter-receive, we must work around the 1662 * problem. The chosen fix is to DMA fewer bytes, then check for the 1663 * condition before taking the NCR5380 out of DMA mode. One or two extra 1664 * bytes are transferred via PIO as necessary to fill out the original 1665 * request. 1666 */ 1667 1668 if (hostdata->flags & FLAG_DMA_FIXUP) { 1669 if (p & SR_IO) { 1670 /* 1671 * The workaround was to transfer fewer bytes than we 1672 * intended to with the pseudo-DMA read function, wait for 1673 * the chip to latch the last byte, read it, and then disable 1674 * pseudo-DMA mode. 1675 * 1676 * After REQ is asserted, the NCR5380 asserts DRQ and ACK. 1677 * REQ is deasserted when ACK is asserted, and not reasserted 1678 * until ACK goes false. Since the NCR5380 won't lower ACK 1679 * until DACK is asserted, which won't happen unless we twiddle 1680 * the DMA port or we take the NCR5380 out of DMA mode, we 1681 * can guarantee that we won't handshake another extra 1682 * byte. 1683 */ 1684 1685 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, 1686 BASR_DRQ, BASR_DRQ, HZ) < 0) { 1687 result = -1; 1688 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); 1689 } 1690 if (NCR5380_poll_politely(hostdata, STATUS_REG, 1691 SR_REQ, 0, HZ) < 0) { 1692 result = -1; 1693 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); 1694 } 1695 d[*count - 1] = NCR5380_read(INPUT_DATA_REG); 1696 } else { 1697 /* 1698 * Wait for the last byte to be sent. If REQ is being asserted for 1699 * the byte we're interested, we'll ACK it and it will go false. 1700 */ 1701 if (NCR5380_poll_politely2(hostdata, 1702 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, 1703 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { 1704 result = -1; 1705 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); 1706 } 1707 } 1708 } 1709 1710 NCR5380_dma_complete(instance); 1711 return result; 1712 } 1713 1714 /* 1715 * Function : NCR5380_information_transfer (struct Scsi_Host *instance) 1716 * 1717 * Purpose : run through the various SCSI phases and do as the target 1718 * directs us to. Operates on the currently connected command, 1719 * instance->connected. 1720 * 1721 * Inputs : instance, instance for which we are doing commands 1722 * 1723 * Side effects : SCSI things happen, the disconnected queue will be 1724 * modified if a command disconnects, *instance->connected will 1725 * change. 1726 * 1727 * XXX Note : we need to watch for bus free or a reset condition here 1728 * to recover from an unexpected bus free condition. 1729 */ 1730 1731 static void NCR5380_information_transfer(struct Scsi_Host *instance) 1732 { 1733 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1734 unsigned char msgout = NOP; 1735 int sink = 0; 1736 int len; 1737 int transfersize; 1738 unsigned char *data; 1739 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; 1740 struct scsi_cmnd *cmd; 1741 1742 #ifdef SUN3_SCSI_VME 1743 dregs->csr |= CSR_INTR; 1744 #endif 1745 1746 while ((cmd = hostdata->connected)) { 1747 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 1748 1749 tmp = NCR5380_read(STATUS_REG); 1750 /* We only have a valid SCSI phase when REQ is asserted */ 1751 if (tmp & SR_REQ) { 1752 phase = (tmp & PHASE_MASK); 1753 if (phase != old_phase) { 1754 old_phase = phase; 1755 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); 1756 } 1757 #ifdef CONFIG_SUN3 1758 if (phase == PHASE_CMDOUT && 1759 sun3_dma_setup_done != cmd) { 1760 int count; 1761 1762 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { 1763 ++cmd->SCp.buffer; 1764 --cmd->SCp.buffers_residual; 1765 cmd->SCp.this_residual = cmd->SCp.buffer->length; 1766 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 1767 } 1768 1769 count = sun3scsi_dma_xfer_len(hostdata, cmd); 1770 1771 if (count > 0) { 1772 if (rq_data_dir(cmd->request)) 1773 sun3scsi_dma_send_setup(hostdata, 1774 cmd->SCp.ptr, count); 1775 else 1776 sun3scsi_dma_recv_setup(hostdata, 1777 cmd->SCp.ptr, count); 1778 sun3_dma_setup_done = cmd; 1779 } 1780 #ifdef SUN3_SCSI_VME 1781 dregs->csr |= CSR_INTR; 1782 #endif 1783 } 1784 #endif /* CONFIG_SUN3 */ 1785 1786 if (sink && (phase != PHASE_MSGOUT)) { 1787 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); 1788 1789 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | 1790 ICR_ASSERT_ACK); 1791 while (NCR5380_read(STATUS_REG) & SR_REQ) 1792 ; 1793 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1794 ICR_ASSERT_ATN); 1795 sink = 0; 1796 continue; 1797 } 1798 1799 switch (phase) { 1800 case PHASE_DATAOUT: 1801 #if (NDEBUG & NDEBUG_NO_DATAOUT) 1802 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); 1803 sink = 1; 1804 do_abort(instance); 1805 cmd->result = DID_ERROR << 16; 1806 complete_cmd(instance, cmd); 1807 hostdata->connected = NULL; 1808 return; 1809 #endif 1810 case PHASE_DATAIN: 1811 /* 1812 * If there is no room left in the current buffer in the 1813 * scatter-gather list, move onto the next one. 1814 */ 1815 1816 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { 1817 ++cmd->SCp.buffer; 1818 --cmd->SCp.buffers_residual; 1819 cmd->SCp.this_residual = cmd->SCp.buffer->length; 1820 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 1821 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n", 1822 cmd->SCp.this_residual, 1823 cmd->SCp.buffers_residual); 1824 } 1825 1826 /* 1827 * The preferred transfer method is going to be 1828 * PSEUDO-DMA for systems that are strictly PIO, 1829 * since we can let the hardware do the handshaking. 1830 * 1831 * For this to work, we need to know the transfersize 1832 * ahead of time, since the pseudo-DMA code will sit 1833 * in an unconditional loop. 1834 */ 1835 1836 transfersize = 0; 1837 if (!cmd->device->borken) 1838 transfersize = NCR5380_dma_xfer_len(hostdata, cmd); 1839 1840 if (transfersize > 0) { 1841 len = transfersize; 1842 if (NCR5380_transfer_dma(instance, &phase, 1843 &len, (unsigned char **)&cmd->SCp.ptr)) { 1844 /* 1845 * If the watchdog timer fires, all future 1846 * accesses to this device will use the 1847 * polled-IO. 1848 */ 1849 scmd_printk(KERN_INFO, cmd, 1850 "switching to slow handshake\n"); 1851 cmd->device->borken = 1; 1852 sink = 1; 1853 do_abort(instance); 1854 cmd->result = DID_ERROR << 16; 1855 /* XXX - need to source or sink data here, as appropriate */ 1856 } 1857 } else { 1858 /* Transfer a small chunk so that the 1859 * irq mode lock is not held too long. 1860 */ 1861 transfersize = min(cmd->SCp.this_residual, 1862 NCR5380_PIO_CHUNK_SIZE); 1863 len = transfersize; 1864 NCR5380_transfer_pio(instance, &phase, &len, 1865 (unsigned char **)&cmd->SCp.ptr); 1866 cmd->SCp.this_residual -= transfersize - len; 1867 } 1868 #ifdef CONFIG_SUN3 1869 if (sun3_dma_setup_done == cmd) 1870 sun3_dma_setup_done = NULL; 1871 #endif 1872 return; 1873 case PHASE_MSGIN: 1874 len = 1; 1875 data = &tmp; 1876 NCR5380_transfer_pio(instance, &phase, &len, &data); 1877 cmd->SCp.Message = tmp; 1878 1879 switch (tmp) { 1880 case ABORT: 1881 case COMMAND_COMPLETE: 1882 /* Accept message by clearing ACK */ 1883 sink = 1; 1884 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1885 dsprintk(NDEBUG_QUEUES, instance, 1886 "COMMAND COMPLETE %p target %d lun %llu\n", 1887 cmd, scmd_id(cmd), cmd->device->lun); 1888 1889 hostdata->connected = NULL; 1890 1891 cmd->result &= ~0xffff; 1892 cmd->result |= cmd->SCp.Status; 1893 cmd->result |= cmd->SCp.Message << 8; 1894 1895 if (cmd->cmnd[0] == REQUEST_SENSE) 1896 complete_cmd(instance, cmd); 1897 else { 1898 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || 1899 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { 1900 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", 1901 cmd); 1902 list_add_tail(&ncmd->list, 1903 &hostdata->autosense); 1904 } else 1905 complete_cmd(instance, cmd); 1906 } 1907 1908 /* 1909 * Restore phase bits to 0 so an interrupted selection, 1910 * arbitration can resume. 1911 */ 1912 NCR5380_write(TARGET_COMMAND_REG, 0); 1913 1914 /* Enable reselect interrupts */ 1915 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1916 1917 maybe_release_dma_irq(instance); 1918 return; 1919 case MESSAGE_REJECT: 1920 /* Accept message by clearing ACK */ 1921 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1922 switch (hostdata->last_message) { 1923 case HEAD_OF_QUEUE_TAG: 1924 case ORDERED_QUEUE_TAG: 1925 case SIMPLE_QUEUE_TAG: 1926 cmd->device->simple_tags = 0; 1927 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); 1928 break; 1929 default: 1930 break; 1931 } 1932 break; 1933 case DISCONNECT: 1934 /* Accept message by clearing ACK */ 1935 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1936 hostdata->connected = NULL; 1937 list_add(&ncmd->list, &hostdata->disconnected); 1938 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, 1939 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", 1940 cmd, scmd_id(cmd), cmd->device->lun); 1941 1942 /* 1943 * Restore phase bits to 0 so an interrupted selection, 1944 * arbitration can resume. 1945 */ 1946 NCR5380_write(TARGET_COMMAND_REG, 0); 1947 1948 /* Enable reselect interrupts */ 1949 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1950 #ifdef SUN3_SCSI_VME 1951 dregs->csr |= CSR_DMA_ENABLE; 1952 #endif 1953 return; 1954 /* 1955 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect 1956 * operation, in violation of the SCSI spec so we can safely 1957 * ignore SAVE/RESTORE pointers calls. 1958 * 1959 * Unfortunately, some disks violate the SCSI spec and 1960 * don't issue the required SAVE_POINTERS message before 1961 * disconnecting, and we have to break spec to remain 1962 * compatible. 1963 */ 1964 case SAVE_POINTERS: 1965 case RESTORE_POINTERS: 1966 /* Accept message by clearing ACK */ 1967 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1968 break; 1969 case EXTENDED_MESSAGE: 1970 /* 1971 * Start the message buffer with the EXTENDED_MESSAGE 1972 * byte, since spi_print_msg() wants the whole thing. 1973 */ 1974 extended_msg[0] = EXTENDED_MESSAGE; 1975 /* Accept first byte by clearing ACK */ 1976 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1977 1978 spin_unlock_irq(&hostdata->lock); 1979 1980 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); 1981 1982 len = 2; 1983 data = extended_msg + 1; 1984 phase = PHASE_MSGIN; 1985 NCR5380_transfer_pio(instance, &phase, &len, &data); 1986 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", 1987 (int)extended_msg[1], 1988 (int)extended_msg[2]); 1989 1990 if (!len && extended_msg[1] > 0 && 1991 extended_msg[1] <= sizeof(extended_msg) - 2) { 1992 /* Accept third byte by clearing ACK */ 1993 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1994 len = extended_msg[1] - 1; 1995 data = extended_msg + 3; 1996 phase = PHASE_MSGIN; 1997 1998 NCR5380_transfer_pio(instance, &phase, &len, &data); 1999 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", 2000 len); 2001 2002 switch (extended_msg[2]) { 2003 case EXTENDED_SDTR: 2004 case EXTENDED_WDTR: 2005 case EXTENDED_MODIFY_DATA_POINTER: 2006 case EXTENDED_EXTENDED_IDENTIFY: 2007 tmp = 0; 2008 } 2009 } else if (len) { 2010 shost_printk(KERN_ERR, instance, "error receiving extended message\n"); 2011 tmp = 0; 2012 } else { 2013 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", 2014 extended_msg[2], extended_msg[1]); 2015 tmp = 0; 2016 } 2017 2018 spin_lock_irq(&hostdata->lock); 2019 if (!hostdata->connected) 2020 return; 2021 2022 /* Fall through to reject message */ 2023 2024 /* 2025 * If we get something weird that we aren't expecting, 2026 * reject it. 2027 */ 2028 default: 2029 if (!tmp) { 2030 shost_printk(KERN_ERR, instance, "rejecting message "); 2031 spi_print_msg(extended_msg); 2032 printk("\n"); 2033 } else if (tmp != EXTENDED_MESSAGE) 2034 scmd_printk(KERN_INFO, cmd, 2035 "rejecting unknown message %02x\n", 2036 tmp); 2037 else 2038 scmd_printk(KERN_INFO, cmd, 2039 "rejecting unknown extended message code %02x, length %d\n", 2040 extended_msg[1], extended_msg[0]); 2041 2042 msgout = MESSAGE_REJECT; 2043 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 2044 break; 2045 } /* switch (tmp) */ 2046 break; 2047 case PHASE_MSGOUT: 2048 len = 1; 2049 data = &msgout; 2050 hostdata->last_message = msgout; 2051 NCR5380_transfer_pio(instance, &phase, &len, &data); 2052 if (msgout == ABORT) { 2053 hostdata->connected = NULL; 2054 cmd->result = DID_ERROR << 16; 2055 complete_cmd(instance, cmd); 2056 maybe_release_dma_irq(instance); 2057 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 2058 return; 2059 } 2060 msgout = NOP; 2061 break; 2062 case PHASE_CMDOUT: 2063 len = cmd->cmd_len; 2064 data = cmd->cmnd; 2065 /* 2066 * XXX for performance reasons, on machines with a 2067 * PSEUDO-DMA architecture we should probably 2068 * use the dma transfer function. 2069 */ 2070 NCR5380_transfer_pio(instance, &phase, &len, &data); 2071 break; 2072 case PHASE_STATIN: 2073 len = 1; 2074 data = &tmp; 2075 NCR5380_transfer_pio(instance, &phase, &len, &data); 2076 cmd->SCp.Status = tmp; 2077 break; 2078 default: 2079 shost_printk(KERN_ERR, instance, "unknown phase\n"); 2080 NCR5380_dprint(NDEBUG_ANY, instance); 2081 } /* switch(phase) */ 2082 } else { 2083 spin_unlock_irq(&hostdata->lock); 2084 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); 2085 spin_lock_irq(&hostdata->lock); 2086 } 2087 } 2088 } 2089 2090 /* 2091 * Function : void NCR5380_reselect (struct Scsi_Host *instance) 2092 * 2093 * Purpose : does reselection, initializing the instance->connected 2094 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q 2095 * nexus has been reestablished, 2096 * 2097 * Inputs : instance - this instance of the NCR5380. 2098 */ 2099 2100 static void NCR5380_reselect(struct Scsi_Host *instance) 2101 { 2102 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2103 unsigned char target_mask; 2104 unsigned char lun; 2105 unsigned char msg[3]; 2106 struct NCR5380_cmd *ncmd; 2107 struct scsi_cmnd *tmp; 2108 2109 /* 2110 * Disable arbitration, etc. since the host adapter obviously 2111 * lost, and tell an interrupted NCR5380_select() to restart. 2112 */ 2113 2114 NCR5380_write(MODE_REG, MR_BASE); 2115 2116 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); 2117 2118 dsprintk(NDEBUG_RESELECTION, instance, "reselect\n"); 2119 2120 /* 2121 * At this point, we have detected that our SCSI ID is on the bus, 2122 * SEL is true and BSY was false for at least one bus settle delay 2123 * (400 ns). 2124 * 2125 * We must assert BSY ourselves, until the target drops the SEL 2126 * signal. 2127 */ 2128 2129 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); 2130 if (NCR5380_poll_politely(hostdata, 2131 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { 2132 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2133 return; 2134 } 2135 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2136 2137 /* 2138 * Wait for target to go into MSGIN. 2139 */ 2140 2141 if (NCR5380_poll_politely(hostdata, 2142 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { 2143 do_abort(instance); 2144 return; 2145 } 2146 2147 #ifdef CONFIG_SUN3 2148 /* acknowledge toggle to MSGIN */ 2149 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); 2150 2151 /* peek at the byte without really hitting the bus */ 2152 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); 2153 #else 2154 { 2155 int len = 1; 2156 unsigned char *data = msg; 2157 unsigned char phase = PHASE_MSGIN; 2158 2159 NCR5380_transfer_pio(instance, &phase, &len, &data); 2160 2161 if (len) { 2162 do_abort(instance); 2163 return; 2164 } 2165 } 2166 #endif /* CONFIG_SUN3 */ 2167 2168 if (!(msg[0] & 0x80)) { 2169 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); 2170 spi_print_msg(msg); 2171 printk("\n"); 2172 do_abort(instance); 2173 return; 2174 } 2175 lun = msg[0] & 0x07; 2176 2177 /* 2178 * We need to add code for SCSI-II to track which devices have 2179 * I_T_L_Q nexuses established, and which have simple I_T_L 2180 * nexuses so we can chose to do additional data transfer. 2181 */ 2182 2183 /* 2184 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we 2185 * just reestablished, and remove it from the disconnected queue. 2186 */ 2187 2188 tmp = NULL; 2189 list_for_each_entry(ncmd, &hostdata->disconnected, list) { 2190 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2191 2192 if (target_mask == (1 << scmd_id(cmd)) && 2193 lun == (u8)cmd->device->lun) { 2194 list_del(&ncmd->list); 2195 tmp = cmd; 2196 break; 2197 } 2198 } 2199 2200 if (tmp) { 2201 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, 2202 "reselect: removed %p from disconnected queue\n", tmp); 2203 } else { 2204 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", 2205 target_mask, lun); 2206 /* 2207 * Since we have an established nexus that we can't do anything 2208 * with, we must abort it. 2209 */ 2210 do_abort(instance); 2211 return; 2212 } 2213 2214 #ifdef CONFIG_SUN3 2215 if (sun3_dma_setup_done != tmp) { 2216 int count; 2217 2218 if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) { 2219 ++tmp->SCp.buffer; 2220 --tmp->SCp.buffers_residual; 2221 tmp->SCp.this_residual = tmp->SCp.buffer->length; 2222 tmp->SCp.ptr = sg_virt(tmp->SCp.buffer); 2223 } 2224 2225 count = sun3scsi_dma_xfer_len(hostdata, tmp); 2226 2227 if (count > 0) { 2228 if (rq_data_dir(tmp->request)) 2229 sun3scsi_dma_send_setup(hostdata, 2230 tmp->SCp.ptr, count); 2231 else 2232 sun3scsi_dma_recv_setup(hostdata, 2233 tmp->SCp.ptr, count); 2234 sun3_dma_setup_done = tmp; 2235 } 2236 } 2237 2238 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); 2239 #endif /* CONFIG_SUN3 */ 2240 2241 /* Accept message by clearing ACK */ 2242 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2243 2244 hostdata->connected = tmp; 2245 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", 2246 scmd_id(tmp), tmp->device->lun); 2247 } 2248 2249 /** 2250 * list_find_cmd - test for presence of a command in a linked list 2251 * @haystack: list of commands 2252 * @needle: command to search for 2253 */ 2254 2255 static bool list_find_cmd(struct list_head *haystack, 2256 struct scsi_cmnd *needle) 2257 { 2258 struct NCR5380_cmd *ncmd; 2259 2260 list_for_each_entry(ncmd, haystack, list) 2261 if (NCR5380_to_scmd(ncmd) == needle) 2262 return true; 2263 return false; 2264 } 2265 2266 /** 2267 * list_remove_cmd - remove a command from linked list 2268 * @haystack: list of commands 2269 * @needle: command to remove 2270 */ 2271 2272 static bool list_del_cmd(struct list_head *haystack, 2273 struct scsi_cmnd *needle) 2274 { 2275 if (list_find_cmd(haystack, needle)) { 2276 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); 2277 2278 list_del(&ncmd->list); 2279 return true; 2280 } 2281 return false; 2282 } 2283 2284 /** 2285 * NCR5380_abort - scsi host eh_abort_handler() method 2286 * @cmd: the command to be aborted 2287 * 2288 * Try to abort a given command by removing it from queues and/or sending 2289 * the target an abort message. This may not succeed in causing a target 2290 * to abort the command. Nonetheless, the low-level driver must forget about 2291 * the command because the mid-layer reclaims it and it may be re-issued. 2292 * 2293 * The normal path taken by a command is as follows. For EH we trace this 2294 * same path to locate and abort the command. 2295 * 2296 * unissued -> selecting -> [unissued -> selecting ->]... connected -> 2297 * [disconnected -> connected ->]... 2298 * [autosense -> connected ->] done 2299 * 2300 * If cmd was not found at all then presumably it has already been completed, 2301 * in which case return SUCCESS to try to avoid further EH measures. 2302 * 2303 * If the command has not completed yet, we must not fail to find it. 2304 * We have no option but to forget the aborted command (even if it still 2305 * lacks sense data). The mid-layer may re-issue a command that is in error 2306 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in 2307 * this driver are such that a command can appear on one queue only. 2308 * 2309 * The lock protects driver data structures, but EH handlers also use it 2310 * to serialize their own execution and prevent their own re-entry. 2311 */ 2312 2313 static int NCR5380_abort(struct scsi_cmnd *cmd) 2314 { 2315 struct Scsi_Host *instance = cmd->device->host; 2316 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2317 unsigned long flags; 2318 int result = SUCCESS; 2319 2320 spin_lock_irqsave(&hostdata->lock, flags); 2321 2322 #if (NDEBUG & NDEBUG_ANY) 2323 scmd_printk(KERN_INFO, cmd, __func__); 2324 #endif 2325 NCR5380_dprint(NDEBUG_ANY, instance); 2326 NCR5380_dprint_phase(NDEBUG_ANY, instance); 2327 2328 if (list_del_cmd(&hostdata->unissued, cmd)) { 2329 dsprintk(NDEBUG_ABORT, instance, 2330 "abort: removed %p from issue queue\n", cmd); 2331 cmd->result = DID_ABORT << 16; 2332 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ 2333 goto out; 2334 } 2335 2336 if (hostdata->selecting == cmd) { 2337 dsprintk(NDEBUG_ABORT, instance, 2338 "abort: cmd %p == selecting\n", cmd); 2339 hostdata->selecting = NULL; 2340 cmd->result = DID_ABORT << 16; 2341 complete_cmd(instance, cmd); 2342 goto out; 2343 } 2344 2345 if (list_del_cmd(&hostdata->disconnected, cmd)) { 2346 dsprintk(NDEBUG_ABORT, instance, 2347 "abort: removed %p from disconnected list\n", cmd); 2348 /* Can't call NCR5380_select() and send ABORT because that 2349 * means releasing the lock. Need a bus reset. 2350 */ 2351 set_host_byte(cmd, DID_ERROR); 2352 complete_cmd(instance, cmd); 2353 result = FAILED; 2354 goto out; 2355 } 2356 2357 if (hostdata->connected == cmd) { 2358 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); 2359 hostdata->connected = NULL; 2360 hostdata->dma_len = 0; 2361 if (do_abort(instance)) { 2362 set_host_byte(cmd, DID_ERROR); 2363 complete_cmd(instance, cmd); 2364 result = FAILED; 2365 goto out; 2366 } 2367 set_host_byte(cmd, DID_ABORT); 2368 complete_cmd(instance, cmd); 2369 goto out; 2370 } 2371 2372 if (list_del_cmd(&hostdata->autosense, cmd)) { 2373 dsprintk(NDEBUG_ABORT, instance, 2374 "abort: removed %p from sense queue\n", cmd); 2375 set_host_byte(cmd, DID_ERROR); 2376 complete_cmd(instance, cmd); 2377 } 2378 2379 out: 2380 if (result == FAILED) 2381 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); 2382 else 2383 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); 2384 2385 queue_work(hostdata->work_q, &hostdata->main_task); 2386 maybe_release_dma_irq(instance); 2387 spin_unlock_irqrestore(&hostdata->lock, flags); 2388 2389 return result; 2390 } 2391 2392 2393 /** 2394 * NCR5380_bus_reset - reset the SCSI bus 2395 * @cmd: SCSI command undergoing EH 2396 * 2397 * Returns SUCCESS 2398 */ 2399 2400 static int NCR5380_bus_reset(struct scsi_cmnd *cmd) 2401 { 2402 struct Scsi_Host *instance = cmd->device->host; 2403 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2404 int i; 2405 unsigned long flags; 2406 struct NCR5380_cmd *ncmd; 2407 2408 spin_lock_irqsave(&hostdata->lock, flags); 2409 2410 #if (NDEBUG & NDEBUG_ANY) 2411 scmd_printk(KERN_INFO, cmd, __func__); 2412 #endif 2413 NCR5380_dprint(NDEBUG_ANY, instance); 2414 NCR5380_dprint_phase(NDEBUG_ANY, instance); 2415 2416 do_reset(instance); 2417 2418 /* reset NCR registers */ 2419 NCR5380_write(MODE_REG, MR_BASE); 2420 NCR5380_write(TARGET_COMMAND_REG, 0); 2421 NCR5380_write(SELECT_ENABLE_REG, 0); 2422 2423 /* After the reset, there are no more connected or disconnected commands 2424 * and no busy units; so clear the low-level status here to avoid 2425 * conflicts when the mid-level code tries to wake up the affected 2426 * commands! 2427 */ 2428 2429 if (list_del_cmd(&hostdata->unissued, cmd)) { 2430 cmd->result = DID_RESET << 16; 2431 cmd->scsi_done(cmd); 2432 } 2433 2434 if (hostdata->selecting) { 2435 hostdata->selecting->result = DID_RESET << 16; 2436 complete_cmd(instance, hostdata->selecting); 2437 hostdata->selecting = NULL; 2438 } 2439 2440 list_for_each_entry(ncmd, &hostdata->disconnected, list) { 2441 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2442 2443 set_host_byte(cmd, DID_RESET); 2444 complete_cmd(instance, cmd); 2445 } 2446 INIT_LIST_HEAD(&hostdata->disconnected); 2447 2448 list_for_each_entry(ncmd, &hostdata->autosense, list) { 2449 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2450 2451 set_host_byte(cmd, DID_RESET); 2452 cmd->scsi_done(cmd); 2453 } 2454 INIT_LIST_HEAD(&hostdata->autosense); 2455 2456 if (hostdata->connected) { 2457 set_host_byte(hostdata->connected, DID_RESET); 2458 complete_cmd(instance, hostdata->connected); 2459 hostdata->connected = NULL; 2460 } 2461 2462 for (i = 0; i < 8; ++i) 2463 hostdata->busy[i] = 0; 2464 hostdata->dma_len = 0; 2465 2466 queue_work(hostdata->work_q, &hostdata->main_task); 2467 maybe_release_dma_irq(instance); 2468 spin_unlock_irqrestore(&hostdata->lock, flags); 2469 2470 return SUCCESS; 2471 } 2472