1*1da177e4SLinus Torvalds /* 2*1da177e4SLinus Torvalds 3w-9xxx.h -- 3ware 9000 Storage Controller device driver for Linux. 3*1da177e4SLinus Torvalds 4*1da177e4SLinus Torvalds Written By: Adam Radford <linuxraid@amcc.com> 5*1da177e4SLinus Torvalds 6*1da177e4SLinus Torvalds Copyright (C) 2004-2005 Applied Micro Circuits Corporation. 7*1da177e4SLinus Torvalds 8*1da177e4SLinus Torvalds This program is free software; you can redistribute it and/or modify 9*1da177e4SLinus Torvalds it under the terms of the GNU General Public License as published by 10*1da177e4SLinus Torvalds the Free Software Foundation; version 2 of the License. 11*1da177e4SLinus Torvalds 12*1da177e4SLinus Torvalds This program is distributed in the hope that it will be useful, 13*1da177e4SLinus Torvalds but WITHOUT ANY WARRANTY; without even the implied warranty of 14*1da177e4SLinus Torvalds MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15*1da177e4SLinus Torvalds GNU General Public License for more details. 16*1da177e4SLinus Torvalds 17*1da177e4SLinus Torvalds NO WARRANTY 18*1da177e4SLinus Torvalds THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 19*1da177e4SLinus Torvalds CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 20*1da177e4SLinus Torvalds LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 21*1da177e4SLinus Torvalds MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 22*1da177e4SLinus Torvalds solely responsible for determining the appropriateness of using and 23*1da177e4SLinus Torvalds distributing the Program and assumes all risks associated with its 24*1da177e4SLinus Torvalds exercise of rights under this Agreement, including but not limited to 25*1da177e4SLinus Torvalds the risks and costs of program errors, damage to or loss of data, 26*1da177e4SLinus Torvalds programs or equipment, and unavailability or interruption of operations. 27*1da177e4SLinus Torvalds 28*1da177e4SLinus Torvalds DISCLAIMER OF LIABILITY 29*1da177e4SLinus Torvalds NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 30*1da177e4SLinus Torvalds DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31*1da177e4SLinus Torvalds DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 32*1da177e4SLinus Torvalds ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 33*1da177e4SLinus Torvalds TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 34*1da177e4SLinus Torvalds USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 35*1da177e4SLinus Torvalds HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 36*1da177e4SLinus Torvalds 37*1da177e4SLinus Torvalds You should have received a copy of the GNU General Public License 38*1da177e4SLinus Torvalds along with this program; if not, write to the Free Software 39*1da177e4SLinus Torvalds Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 40*1da177e4SLinus Torvalds 41*1da177e4SLinus Torvalds Bugs/Comments/Suggestions should be mailed to: 42*1da177e4SLinus Torvalds linuxraid@amcc.com 43*1da177e4SLinus Torvalds 44*1da177e4SLinus Torvalds For more information, goto: 45*1da177e4SLinus Torvalds http://www.amcc.com 46*1da177e4SLinus Torvalds */ 47*1da177e4SLinus Torvalds 48*1da177e4SLinus Torvalds #ifndef _3W_9XXX_H 49*1da177e4SLinus Torvalds #define _3W_9XXX_H 50*1da177e4SLinus Torvalds 51*1da177e4SLinus Torvalds /* AEN string type */ 52*1da177e4SLinus Torvalds typedef struct TAG_twa_message_type { 53*1da177e4SLinus Torvalds unsigned int code; 54*1da177e4SLinus Torvalds char* text; 55*1da177e4SLinus Torvalds } twa_message_type; 56*1da177e4SLinus Torvalds 57*1da177e4SLinus Torvalds /* AEN strings */ 58*1da177e4SLinus Torvalds static twa_message_type twa_aen_table[] = { 59*1da177e4SLinus Torvalds {0x0000, "AEN queue empty"}, 60*1da177e4SLinus Torvalds {0x0001, "Controller reset occurred"}, 61*1da177e4SLinus Torvalds {0x0002, "Degraded unit detected"}, 62*1da177e4SLinus Torvalds {0x0003, "Controller error occured"}, 63*1da177e4SLinus Torvalds {0x0004, "Background rebuild failed"}, 64*1da177e4SLinus Torvalds {0x0005, "Background rebuild done"}, 65*1da177e4SLinus Torvalds {0x0006, "Incomplete unit detected"}, 66*1da177e4SLinus Torvalds {0x0007, "Background initialize done"}, 67*1da177e4SLinus Torvalds {0x0008, "Unclean shutdown detected"}, 68*1da177e4SLinus Torvalds {0x0009, "Drive timeout detected"}, 69*1da177e4SLinus Torvalds {0x000A, "Drive error detected"}, 70*1da177e4SLinus Torvalds {0x000B, "Rebuild started"}, 71*1da177e4SLinus Torvalds {0x000C, "Background initialize started"}, 72*1da177e4SLinus Torvalds {0x000D, "Entire logical unit was deleted"}, 73*1da177e4SLinus Torvalds {0x000E, "Background initialize failed"}, 74*1da177e4SLinus Torvalds {0x000F, "SMART attribute exceeded threshold"}, 75*1da177e4SLinus Torvalds {0x0010, "Power supply reported AC under range"}, 76*1da177e4SLinus Torvalds {0x0011, "Power supply reported DC out of range"}, 77*1da177e4SLinus Torvalds {0x0012, "Power supply reported a malfunction"}, 78*1da177e4SLinus Torvalds {0x0013, "Power supply predicted malfunction"}, 79*1da177e4SLinus Torvalds {0x0014, "Battery charge is below threshold"}, 80*1da177e4SLinus Torvalds {0x0015, "Fan speed is below threshold"}, 81*1da177e4SLinus Torvalds {0x0016, "Temperature sensor is above threshold"}, 82*1da177e4SLinus Torvalds {0x0017, "Power supply was removed"}, 83*1da177e4SLinus Torvalds {0x0018, "Power supply was inserted"}, 84*1da177e4SLinus Torvalds {0x0019, "Drive was removed from a bay"}, 85*1da177e4SLinus Torvalds {0x001A, "Drive was inserted into a bay"}, 86*1da177e4SLinus Torvalds {0x001B, "Drive bay cover door was opened"}, 87*1da177e4SLinus Torvalds {0x001C, "Drive bay cover door was closed"}, 88*1da177e4SLinus Torvalds {0x001D, "Product case was opened"}, 89*1da177e4SLinus Torvalds {0x0020, "Prepare for shutdown (power-off)"}, 90*1da177e4SLinus Torvalds {0x0021, "Downgrade UDMA mode to lower speed"}, 91*1da177e4SLinus Torvalds {0x0022, "Upgrade UDMA mode to higher speed"}, 92*1da177e4SLinus Torvalds {0x0023, "Sector repair completed"}, 93*1da177e4SLinus Torvalds {0x0024, "Sbuf memory test failed"}, 94*1da177e4SLinus Torvalds {0x0025, "Error flushing cached write data to array"}, 95*1da177e4SLinus Torvalds {0x0026, "Drive reported data ECC error"}, 96*1da177e4SLinus Torvalds {0x0027, "DCB has checksum error"}, 97*1da177e4SLinus Torvalds {0x0028, "DCB version is unsupported"}, 98*1da177e4SLinus Torvalds {0x0029, "Background verify started"}, 99*1da177e4SLinus Torvalds {0x002A, "Background verify failed"}, 100*1da177e4SLinus Torvalds {0x002B, "Background verify done"}, 101*1da177e4SLinus Torvalds {0x002C, "Bad sector overwritten during rebuild"}, 102*1da177e4SLinus Torvalds {0x002D, "Background rebuild error on source drive"}, 103*1da177e4SLinus Torvalds {0x002E, "Replace failed because replacement drive too small"}, 104*1da177e4SLinus Torvalds {0x002F, "Verify failed because array was never initialized"}, 105*1da177e4SLinus Torvalds {0x0030, "Unsupported ATA drive"}, 106*1da177e4SLinus Torvalds {0x0031, "Synchronize host/controller time"}, 107*1da177e4SLinus Torvalds {0x0032, "Spare capacity is inadequate for some units"}, 108*1da177e4SLinus Torvalds {0x0033, "Background migration started"}, 109*1da177e4SLinus Torvalds {0x0034, "Background migration failed"}, 110*1da177e4SLinus Torvalds {0x0035, "Background migration done"}, 111*1da177e4SLinus Torvalds {0x0036, "Verify detected and fixed data/parity mismatch"}, 112*1da177e4SLinus Torvalds {0x0037, "SO-DIMM incompatible"}, 113*1da177e4SLinus Torvalds {0x0038, "SO-DIMM not detected"}, 114*1da177e4SLinus Torvalds {0x0039, "Corrected Sbuf ECC error"}, 115*1da177e4SLinus Torvalds {0x003A, "Drive power on reset detected"}, 116*1da177e4SLinus Torvalds {0x003B, "Background rebuild paused"}, 117*1da177e4SLinus Torvalds {0x003C, "Background initialize paused"}, 118*1da177e4SLinus Torvalds {0x003D, "Background verify paused"}, 119*1da177e4SLinus Torvalds {0x003E, "Background migration paused"}, 120*1da177e4SLinus Torvalds {0x003F, "Corrupt flash file system detected"}, 121*1da177e4SLinus Torvalds {0x0040, "Flash file system repaired"}, 122*1da177e4SLinus Torvalds {0x0041, "Unit number assignments were lost"}, 123*1da177e4SLinus Torvalds {0x0042, "Error during read of primary DCB"}, 124*1da177e4SLinus Torvalds {0x0043, "Latent error found in backup DCB"}, 125*1da177e4SLinus Torvalds {0x00FC, "Recovered/finished array membership update"}, 126*1da177e4SLinus Torvalds {0x00FD, "Handler lockup"}, 127*1da177e4SLinus Torvalds {0x00FE, "Retrying PCI transfer"}, 128*1da177e4SLinus Torvalds {0x00FF, "AEN queue is full"}, 129*1da177e4SLinus Torvalds {0xFFFFFFFF, (char*) 0} 130*1da177e4SLinus Torvalds }; 131*1da177e4SLinus Torvalds 132*1da177e4SLinus Torvalds /* AEN severity table */ 133*1da177e4SLinus Torvalds static char *twa_aen_severity_table[] = 134*1da177e4SLinus Torvalds { 135*1da177e4SLinus Torvalds "None", "ERROR", "WARNING", "INFO", "DEBUG", (char*) 0 136*1da177e4SLinus Torvalds }; 137*1da177e4SLinus Torvalds 138*1da177e4SLinus Torvalds /* Error strings */ 139*1da177e4SLinus Torvalds static twa_message_type twa_error_table[] = { 140*1da177e4SLinus Torvalds {0x0100, "SGL entry contains zero data"}, 141*1da177e4SLinus Torvalds {0x0101, "Invalid command opcode"}, 142*1da177e4SLinus Torvalds {0x0102, "SGL entry has unaligned address"}, 143*1da177e4SLinus Torvalds {0x0103, "SGL size does not match command"}, 144*1da177e4SLinus Torvalds {0x0104, "SGL entry has illegal length"}, 145*1da177e4SLinus Torvalds {0x0105, "Command packet is not aligned"}, 146*1da177e4SLinus Torvalds {0x0106, "Invalid request ID"}, 147*1da177e4SLinus Torvalds {0x0107, "Duplicate request ID"}, 148*1da177e4SLinus Torvalds {0x0108, "ID not locked"}, 149*1da177e4SLinus Torvalds {0x0109, "LBA out of range"}, 150*1da177e4SLinus Torvalds {0x010A, "Logical unit not supported"}, 151*1da177e4SLinus Torvalds {0x010B, "Parameter table does not exist"}, 152*1da177e4SLinus Torvalds {0x010C, "Parameter index does not exist"}, 153*1da177e4SLinus Torvalds {0x010D, "Invalid field in CDB"}, 154*1da177e4SLinus Torvalds {0x010E, "Specified port has invalid drive"}, 155*1da177e4SLinus Torvalds {0x010F, "Parameter item size mismatch"}, 156*1da177e4SLinus Torvalds {0x0110, "Failed memory allocation"}, 157*1da177e4SLinus Torvalds {0x0111, "Memory request too large"}, 158*1da177e4SLinus Torvalds {0x0112, "Out of memory segments"}, 159*1da177e4SLinus Torvalds {0x0113, "Invalid address to deallocate"}, 160*1da177e4SLinus Torvalds {0x0114, "Out of memory"}, 161*1da177e4SLinus Torvalds {0x0115, "Out of heap"}, 162*1da177e4SLinus Torvalds {0x0120, "Double degrade"}, 163*1da177e4SLinus Torvalds {0x0121, "Drive not degraded"}, 164*1da177e4SLinus Torvalds {0x0122, "Reconstruct error"}, 165*1da177e4SLinus Torvalds {0x0123, "Replace not accepted"}, 166*1da177e4SLinus Torvalds {0x0124, "Replace drive capacity too small"}, 167*1da177e4SLinus Torvalds {0x0125, "Sector count not allowed"}, 168*1da177e4SLinus Torvalds {0x0126, "No spares left"}, 169*1da177e4SLinus Torvalds {0x0127, "Reconstruct error"}, 170*1da177e4SLinus Torvalds {0x0128, "Unit is offline"}, 171*1da177e4SLinus Torvalds {0x0129, "Cannot update status to DCB"}, 172*1da177e4SLinus Torvalds {0x0130, "Invalid stripe handle"}, 173*1da177e4SLinus Torvalds {0x0131, "Handle that was not locked"}, 174*1da177e4SLinus Torvalds {0x0132, "Handle that was not empty"}, 175*1da177e4SLinus Torvalds {0x0133, "Handle has different owner"}, 176*1da177e4SLinus Torvalds {0x0140, "IPR has parent"}, 177*1da177e4SLinus Torvalds {0x0150, "Illegal Pbuf address alignment"}, 178*1da177e4SLinus Torvalds {0x0151, "Illegal Pbuf transfer length"}, 179*1da177e4SLinus Torvalds {0x0152, "Illegal Sbuf address alignment"}, 180*1da177e4SLinus Torvalds {0x0153, "Illegal Sbuf transfer length"}, 181*1da177e4SLinus Torvalds {0x0160, "Command packet too large"}, 182*1da177e4SLinus Torvalds {0x0161, "SGL exceeds maximum length"}, 183*1da177e4SLinus Torvalds {0x0162, "SGL has too many entries"}, 184*1da177e4SLinus Torvalds {0x0170, "Insufficient resources for rebuilder"}, 185*1da177e4SLinus Torvalds {0x0171, "Verify error (data != parity)"}, 186*1da177e4SLinus Torvalds {0x0180, "Requested segment not in directory of this DCB"}, 187*1da177e4SLinus Torvalds {0x0181, "DCB segment has unsupported version"}, 188*1da177e4SLinus Torvalds {0x0182, "DCB segment has checksum error"}, 189*1da177e4SLinus Torvalds {0x0183, "DCB support (settings) segment invalid"}, 190*1da177e4SLinus Torvalds {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 191*1da177e4SLinus Torvalds {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 192*1da177e4SLinus Torvalds {0x01A0, "Could not clear Sbuf"}, 193*1da177e4SLinus Torvalds {0x01C0, "Flash identify failed"}, 194*1da177e4SLinus Torvalds {0x01C1, "Flash out of bounds"}, 195*1da177e4SLinus Torvalds {0x01C2, "Flash verify error"}, 196*1da177e4SLinus Torvalds {0x01C3, "Flash file object not found"}, 197*1da177e4SLinus Torvalds {0x01C4, "Flash file already present"}, 198*1da177e4SLinus Torvalds {0x01C5, "Flash file system full"}, 199*1da177e4SLinus Torvalds {0x01C6, "Flash file not present"}, 200*1da177e4SLinus Torvalds {0x01C7, "Flash file size error"}, 201*1da177e4SLinus Torvalds {0x01C8, "Bad flash file checksum"}, 202*1da177e4SLinus Torvalds {0x01CA, "Corrupt flash file system detected"}, 203*1da177e4SLinus Torvalds {0x01D0, "Invalid field in parameter list"}, 204*1da177e4SLinus Torvalds {0x01D1, "Parameter list length error"}, 205*1da177e4SLinus Torvalds {0x01D2, "Parameter item is not changeable"}, 206*1da177e4SLinus Torvalds {0x01D3, "Parameter item is not saveable"}, 207*1da177e4SLinus Torvalds {0x0200, "UDMA CRC error"}, 208*1da177e4SLinus Torvalds {0x0201, "Internal CRC error"}, 209*1da177e4SLinus Torvalds {0x0202, "Data ECC error"}, 210*1da177e4SLinus Torvalds {0x0203, "ADP level 1 error"}, 211*1da177e4SLinus Torvalds {0x0204, "Port timeout"}, 212*1da177e4SLinus Torvalds {0x0205, "Drive power on reset"}, 213*1da177e4SLinus Torvalds {0x0206, "ADP level 2 error"}, 214*1da177e4SLinus Torvalds {0x0207, "Soft reset failed"}, 215*1da177e4SLinus Torvalds {0x0208, "Drive not ready"}, 216*1da177e4SLinus Torvalds {0x0209, "Unclassified port error"}, 217*1da177e4SLinus Torvalds {0x020A, "Drive aborted command"}, 218*1da177e4SLinus Torvalds {0x0210, "Internal CRC error"}, 219*1da177e4SLinus Torvalds {0x0211, "PCI abort error"}, 220*1da177e4SLinus Torvalds {0x0212, "PCI parity error"}, 221*1da177e4SLinus Torvalds {0x0213, "Port handler error"}, 222*1da177e4SLinus Torvalds {0x0214, "Token interrupt count error"}, 223*1da177e4SLinus Torvalds {0x0215, "Timeout waiting for PCI transfer"}, 224*1da177e4SLinus Torvalds {0x0216, "Corrected buffer ECC"}, 225*1da177e4SLinus Torvalds {0x0217, "Uncorrected buffer ECC"}, 226*1da177e4SLinus Torvalds {0x0230, "Unsupported command during flash recovery"}, 227*1da177e4SLinus Torvalds {0x0231, "Next image buffer expected"}, 228*1da177e4SLinus Torvalds {0x0232, "Binary image architecture incompatible"}, 229*1da177e4SLinus Torvalds {0x0233, "Binary image has no signature"}, 230*1da177e4SLinus Torvalds {0x0234, "Binary image has bad checksum"}, 231*1da177e4SLinus Torvalds {0x0235, "Image downloaded overflowed buffer"}, 232*1da177e4SLinus Torvalds {0x0240, "I2C device not found"}, 233*1da177e4SLinus Torvalds {0x0241, "I2C transaction aborted"}, 234*1da177e4SLinus Torvalds {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 235*1da177e4SLinus Torvalds {0x0243, "SO-DIMM unsupported"}, 236*1da177e4SLinus Torvalds {0x0248, "SPI transfer status error"}, 237*1da177e4SLinus Torvalds {0x0249, "SPI transfer timeout error"}, 238*1da177e4SLinus Torvalds {0x0250, "Invalid unit descriptor size in CreateUnit"}, 239*1da177e4SLinus Torvalds {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 240*1da177e4SLinus Torvalds {0x0252, "Invalid value in CreateUnit descriptor"}, 241*1da177e4SLinus Torvalds {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 242*1da177e4SLinus Torvalds {0x0254, "Unable to create data channel for this unit descriptor"}, 243*1da177e4SLinus Torvalds {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 244*1da177e4SLinus Torvalds {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 245*1da177e4SLinus Torvalds {0x0257, "CreateUnit does not support this descriptor version"}, 246*1da177e4SLinus Torvalds {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 247*1da177e4SLinus Torvalds {0x0259, "Too many descriptors in CreateUnit"}, 248*1da177e4SLinus Torvalds {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 249*1da177e4SLinus Torvalds {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 250*1da177e4SLinus Torvalds {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 251*1da177e4SLinus Torvalds {0x0260, "SMART attribute exceeded threshold"}, 252*1da177e4SLinus Torvalds {0xFFFFFFFF, (char*) 0} 253*1da177e4SLinus Torvalds }; 254*1da177e4SLinus Torvalds 255*1da177e4SLinus Torvalds /* Control register bit definitions */ 256*1da177e4SLinus Torvalds #define TW_CONTROL_CLEAR_HOST_INTERRUPT 0x00080000 257*1da177e4SLinus Torvalds #define TW_CONTROL_CLEAR_ATTENTION_INTERRUPT 0x00040000 258*1da177e4SLinus Torvalds #define TW_CONTROL_MASK_COMMAND_INTERRUPT 0x00020000 259*1da177e4SLinus Torvalds #define TW_CONTROL_MASK_RESPONSE_INTERRUPT 0x00010000 260*1da177e4SLinus Torvalds #define TW_CONTROL_UNMASK_COMMAND_INTERRUPT 0x00008000 261*1da177e4SLinus Torvalds #define TW_CONTROL_UNMASK_RESPONSE_INTERRUPT 0x00004000 262*1da177e4SLinus Torvalds #define TW_CONTROL_CLEAR_ERROR_STATUS 0x00000200 263*1da177e4SLinus Torvalds #define TW_CONTROL_ISSUE_SOFT_RESET 0x00000100 264*1da177e4SLinus Torvalds #define TW_CONTROL_ENABLE_INTERRUPTS 0x00000080 265*1da177e4SLinus Torvalds #define TW_CONTROL_DISABLE_INTERRUPTS 0x00000040 266*1da177e4SLinus Torvalds #define TW_CONTROL_ISSUE_HOST_INTERRUPT 0x00000020 267*1da177e4SLinus Torvalds #define TW_CONTROL_CLEAR_PARITY_ERROR 0x00800000 268*1da177e4SLinus Torvalds #define TW_CONTROL_CLEAR_QUEUE_ERROR 0x00400000 269*1da177e4SLinus Torvalds #define TW_CONTROL_CLEAR_PCI_ABORT 0x00100000 270*1da177e4SLinus Torvalds #define TW_CONTROL_CLEAR_SBUF_WRITE_ERROR 0x00000008 271*1da177e4SLinus Torvalds 272*1da177e4SLinus Torvalds /* Status register bit definitions */ 273*1da177e4SLinus Torvalds #define TW_STATUS_MAJOR_VERSION_MASK 0xF0000000 274*1da177e4SLinus Torvalds #define TW_STATUS_MINOR_VERSION_MASK 0x0F000000 275*1da177e4SLinus Torvalds #define TW_STATUS_PCI_PARITY_ERROR 0x00800000 276*1da177e4SLinus Torvalds #define TW_STATUS_QUEUE_ERROR 0x00400000 277*1da177e4SLinus Torvalds #define TW_STATUS_MICROCONTROLLER_ERROR 0x00200000 278*1da177e4SLinus Torvalds #define TW_STATUS_PCI_ABORT 0x00100000 279*1da177e4SLinus Torvalds #define TW_STATUS_HOST_INTERRUPT 0x00080000 280*1da177e4SLinus Torvalds #define TW_STATUS_ATTENTION_INTERRUPT 0x00040000 281*1da177e4SLinus Torvalds #define TW_STATUS_COMMAND_INTERRUPT 0x00020000 282*1da177e4SLinus Torvalds #define TW_STATUS_RESPONSE_INTERRUPT 0x00010000 283*1da177e4SLinus Torvalds #define TW_STATUS_COMMAND_QUEUE_FULL 0x00008000 284*1da177e4SLinus Torvalds #define TW_STATUS_RESPONSE_QUEUE_EMPTY 0x00004000 285*1da177e4SLinus Torvalds #define TW_STATUS_MICROCONTROLLER_READY 0x00002000 286*1da177e4SLinus Torvalds #define TW_STATUS_COMMAND_QUEUE_EMPTY 0x00001000 287*1da177e4SLinus Torvalds #define TW_STATUS_EXPECTED_BITS 0x00002000 288*1da177e4SLinus Torvalds #define TW_STATUS_UNEXPECTED_BITS 0x00F00008 289*1da177e4SLinus Torvalds #define TW_STATUS_SBUF_WRITE_ERROR 0x00000008 290*1da177e4SLinus Torvalds #define TW_STATUS_VALID_INTERRUPT 0x00DF0008 291*1da177e4SLinus Torvalds 292*1da177e4SLinus Torvalds /* RESPONSE QUEUE BIT DEFINITIONS */ 293*1da177e4SLinus Torvalds #define TW_RESPONSE_ID_MASK 0x00000FF0 294*1da177e4SLinus Torvalds 295*1da177e4SLinus Torvalds /* PCI related defines */ 296*1da177e4SLinus Torvalds #define TW_NUMDEVICES 1 297*1da177e4SLinus Torvalds #define TW_PCI_CLEAR_PARITY_ERRORS 0xc100 298*1da177e4SLinus Torvalds #define TW_PCI_CLEAR_PCI_ABORT 0x2000 299*1da177e4SLinus Torvalds 300*1da177e4SLinus Torvalds /* Command packet opcodes used by the driver */ 301*1da177e4SLinus Torvalds #define TW_OP_INIT_CONNECTION 0x1 302*1da177e4SLinus Torvalds #define TW_OP_GET_PARAM 0x12 303*1da177e4SLinus Torvalds #define TW_OP_SET_PARAM 0x13 304*1da177e4SLinus Torvalds #define TW_OP_EXECUTE_SCSI 0x10 305*1da177e4SLinus Torvalds #define TW_OP_DOWNLOAD_FIRMWARE 0x16 306*1da177e4SLinus Torvalds #define TW_OP_RESET 0x1C 307*1da177e4SLinus Torvalds 308*1da177e4SLinus Torvalds /* Asynchronous Event Notification (AEN) codes used by the driver */ 309*1da177e4SLinus Torvalds #define TW_AEN_QUEUE_EMPTY 0x0000 310*1da177e4SLinus Torvalds #define TW_AEN_SOFT_RESET 0x0001 311*1da177e4SLinus Torvalds #define TW_AEN_SYNC_TIME_WITH_HOST 0x031 312*1da177e4SLinus Torvalds #define TW_AEN_SEVERITY_ERROR 0x1 313*1da177e4SLinus Torvalds #define TW_AEN_SEVERITY_DEBUG 0x4 314*1da177e4SLinus Torvalds #define TW_AEN_NOT_RETRIEVED 0x1 315*1da177e4SLinus Torvalds #define TW_AEN_RETRIEVED 0x2 316*1da177e4SLinus Torvalds 317*1da177e4SLinus Torvalds /* Command state defines */ 318*1da177e4SLinus Torvalds #define TW_S_INITIAL 0x1 /* Initial state */ 319*1da177e4SLinus Torvalds #define TW_S_STARTED 0x2 /* Id in use */ 320*1da177e4SLinus Torvalds #define TW_S_POSTED 0x4 /* Posted to the controller */ 321*1da177e4SLinus Torvalds #define TW_S_PENDING 0x8 /* Waiting to be posted in isr */ 322*1da177e4SLinus Torvalds #define TW_S_COMPLETED 0x10 /* Completed by isr */ 323*1da177e4SLinus Torvalds #define TW_S_FINISHED 0x20 /* I/O completely done */ 324*1da177e4SLinus Torvalds 325*1da177e4SLinus Torvalds /* Compatibility defines */ 326*1da177e4SLinus Torvalds #define TW_9000_ARCH_ID 0x5 327*1da177e4SLinus Torvalds #define TW_CURRENT_DRIVER_SRL 28 328*1da177e4SLinus Torvalds #define TW_CURRENT_DRIVER_BUILD 9 329*1da177e4SLinus Torvalds #define TW_CURRENT_DRIVER_BRANCH 4 330*1da177e4SLinus Torvalds 331*1da177e4SLinus Torvalds /* Phase defines */ 332*1da177e4SLinus Torvalds #define TW_PHASE_INITIAL 0 333*1da177e4SLinus Torvalds #define TW_PHASE_SINGLE 1 334*1da177e4SLinus Torvalds #define TW_PHASE_SGLIST 2 335*1da177e4SLinus Torvalds 336*1da177e4SLinus Torvalds /* Misc defines */ 337*1da177e4SLinus Torvalds #define TW_SECTOR_SIZE 512 338*1da177e4SLinus Torvalds #define TW_ALIGNMENT_9000 4 /* 4 bytes */ 339*1da177e4SLinus Torvalds #define TW_ALIGNMENT_9000_SGL 0x3 340*1da177e4SLinus Torvalds #define TW_MAX_UNITS 16 341*1da177e4SLinus Torvalds #define TW_INIT_MESSAGE_CREDITS 0x100 342*1da177e4SLinus Torvalds #define TW_INIT_COMMAND_PACKET_SIZE 0x3 343*1da177e4SLinus Torvalds #define TW_INIT_COMMAND_PACKET_SIZE_EXTENDED 0x6 344*1da177e4SLinus Torvalds #define TW_EXTENDED_INIT_CONNECT 0x2 345*1da177e4SLinus Torvalds #define TW_BUNDLED_FW_SAFE_TO_FLASH 0x4 346*1da177e4SLinus Torvalds #define TW_CTLR_FW_RECOMMENDS_FLASH 0x8 347*1da177e4SLinus Torvalds #define TW_CTLR_FW_COMPATIBLE 0x2 348*1da177e4SLinus Torvalds #define TW_BASE_FW_SRL 24 349*1da177e4SLinus Torvalds #define TW_BASE_FW_BRANCH 0 350*1da177e4SLinus Torvalds #define TW_BASE_FW_BUILD 1 351*1da177e4SLinus Torvalds #define TW_FW_SRL_LUNS_SUPPORTED 28 352*1da177e4SLinus Torvalds #define TW_Q_LENGTH 256 353*1da177e4SLinus Torvalds #define TW_Q_START 0 354*1da177e4SLinus Torvalds #define TW_MAX_SLOT 32 355*1da177e4SLinus Torvalds #define TW_MAX_RESET_TRIES 2 356*1da177e4SLinus Torvalds #define TW_MAX_CMDS_PER_LUN 254 357*1da177e4SLinus Torvalds #define TW_MAX_RESPONSE_DRAIN 256 358*1da177e4SLinus Torvalds #define TW_MAX_AEN_DRAIN 40 359*1da177e4SLinus Torvalds #define TW_IN_RESET 2 360*1da177e4SLinus Torvalds #define TW_IN_CHRDEV_IOCTL 3 361*1da177e4SLinus Torvalds #define TW_IN_ATTENTION_LOOP 4 362*1da177e4SLinus Torvalds #define TW_MAX_SECTORS 256 363*1da177e4SLinus Torvalds #define TW_AEN_WAIT_TIME 1000 364*1da177e4SLinus Torvalds #define TW_IOCTL_WAIT_TIME (1 * HZ) /* 1 second */ 365*1da177e4SLinus Torvalds #define TW_MAX_CDB_LEN 16 366*1da177e4SLinus Torvalds #define TW_ISR_DONT_COMPLETE 2 367*1da177e4SLinus Torvalds #define TW_ISR_DONT_RESULT 3 368*1da177e4SLinus Torvalds #define TW_IOCTL_CHRDEV_TIMEOUT 60 /* 60 seconds */ 369*1da177e4SLinus Torvalds #define TW_IOCTL_CHRDEV_FREE -1 370*1da177e4SLinus Torvalds #define TW_COMMAND_OFFSET 128 /* 128 bytes */ 371*1da177e4SLinus Torvalds #define TW_VERSION_TABLE 0x0402 372*1da177e4SLinus Torvalds #define TW_TIMEKEEP_TABLE 0x040A 373*1da177e4SLinus Torvalds #define TW_INFORMATION_TABLE 0x0403 374*1da177e4SLinus Torvalds #define TW_PARAM_FWVER 3 375*1da177e4SLinus Torvalds #define TW_PARAM_FWVER_LENGTH 16 376*1da177e4SLinus Torvalds #define TW_PARAM_BIOSVER 4 377*1da177e4SLinus Torvalds #define TW_PARAM_BIOSVER_LENGTH 16 378*1da177e4SLinus Torvalds #define TW_PARAM_PORTCOUNT 3 379*1da177e4SLinus Torvalds #define TW_PARAM_PORTCOUNT_LENGTH 1 380*1da177e4SLinus Torvalds #define TW_MIN_SGL_LENGTH 0x200 /* 512 bytes */ 381*1da177e4SLinus Torvalds #define TW_MAX_SENSE_LENGTH 256 382*1da177e4SLinus Torvalds #define TW_EVENT_SOURCE_AEN 0x1000 383*1da177e4SLinus Torvalds #define TW_EVENT_SOURCE_COMMAND 0x1001 384*1da177e4SLinus Torvalds #define TW_EVENT_SOURCE_PCHIP 0x1002 385*1da177e4SLinus Torvalds #define TW_EVENT_SOURCE_DRIVER 0x1003 386*1da177e4SLinus Torvalds #define TW_IOCTL_GET_COMPATIBILITY_INFO 0x101 387*1da177e4SLinus Torvalds #define TW_IOCTL_GET_LAST_EVENT 0x102 388*1da177e4SLinus Torvalds #define TW_IOCTL_GET_FIRST_EVENT 0x103 389*1da177e4SLinus Torvalds #define TW_IOCTL_GET_NEXT_EVENT 0x104 390*1da177e4SLinus Torvalds #define TW_IOCTL_GET_PREVIOUS_EVENT 0x105 391*1da177e4SLinus Torvalds #define TW_IOCTL_GET_LOCK 0x106 392*1da177e4SLinus Torvalds #define TW_IOCTL_RELEASE_LOCK 0x107 393*1da177e4SLinus Torvalds #define TW_IOCTL_FIRMWARE_PASS_THROUGH 0x108 394*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_STATUS_NOT_LOCKED 0x1001 // Not locked 395*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_STATUS_LOCKED 0x1002 // Already locked 396*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_STATUS_NO_MORE_EVENTS 0x1003 // No more events 397*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_STATUS_AEN_CLOBBER 0x1004 // AEN clobber occurred 398*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_OS_EFAULT -EFAULT // Bad address 399*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_OS_EINTR -EINTR // Interrupted system call 400*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_OS_EINVAL -EINVAL // Invalid argument 401*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_OS_ENOMEM -ENOMEM // Out of memory 402*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_OS_ERESTARTSYS -ERESTARTSYS // Restart system call 403*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_OS_EIO -EIO // I/O error 404*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_OS_ENOTTY -ENOTTY // Not a typewriter 405*1da177e4SLinus Torvalds #define TW_IOCTL_ERROR_OS_ENODEV -ENODEV // No such device 406*1da177e4SLinus Torvalds #define TW_ALLOCATION_LENGTH 128 407*1da177e4SLinus Torvalds #define TW_SENSE_DATA_LENGTH 18 408*1da177e4SLinus Torvalds #define TW_STATUS_CHECK_CONDITION 2 409*1da177e4SLinus Torvalds #define TW_ERROR_LOGICAL_UNIT_NOT_SUPPORTED 0x10a 410*1da177e4SLinus Torvalds #define TW_ERROR_UNIT_OFFLINE 0x128 411*1da177e4SLinus Torvalds #define TW_MESSAGE_SOURCE_CONTROLLER_ERROR 3 412*1da177e4SLinus Torvalds #define TW_MESSAGE_SOURCE_CONTROLLER_EVENT 4 413*1da177e4SLinus Torvalds #define TW_MESSAGE_SOURCE_LINUX_DRIVER 6 414*1da177e4SLinus Torvalds #define TW_DRIVER TW_MESSAGE_SOURCE_LINUX_DRIVER 415*1da177e4SLinus Torvalds #define TW_MESSAGE_SOURCE_LINUX_OS 9 416*1da177e4SLinus Torvalds #define TW_OS TW_MESSAGE_SOURCE_LINUX_OS 417*1da177e4SLinus Torvalds #ifndef PCI_DEVICE_ID_3WARE_9000 418*1da177e4SLinus Torvalds #define PCI_DEVICE_ID_3WARE_9000 0x1002 419*1da177e4SLinus Torvalds #endif 420*1da177e4SLinus Torvalds 421*1da177e4SLinus Torvalds /* Bitmask macros to eliminate bitfields */ 422*1da177e4SLinus Torvalds 423*1da177e4SLinus Torvalds /* opcode: 5, reserved: 3 */ 424*1da177e4SLinus Torvalds #define TW_OPRES_IN(x,y) ((x << 5) | (y & 0x1f)) 425*1da177e4SLinus Torvalds #define TW_OP_OUT(x) (x & 0x1f) 426*1da177e4SLinus Torvalds 427*1da177e4SLinus Torvalds /* opcode: 5, sgloffset: 3 */ 428*1da177e4SLinus Torvalds #define TW_OPSGL_IN(x,y) ((x << 5) | (y & 0x1f)) 429*1da177e4SLinus Torvalds #define TW_SGL_OUT(x) ((x >> 5) & 0x7) 430*1da177e4SLinus Torvalds 431*1da177e4SLinus Torvalds /* severity: 3, reserved: 5 */ 432*1da177e4SLinus Torvalds #define TW_SEV_OUT(x) (x & 0x7) 433*1da177e4SLinus Torvalds 434*1da177e4SLinus Torvalds /* reserved_1: 4, response_id: 8, reserved_2: 20 */ 435*1da177e4SLinus Torvalds #define TW_RESID_OUT(x) ((x >> 4) & 0xff) 436*1da177e4SLinus Torvalds 437*1da177e4SLinus Torvalds /* request_id: 12, lun: 4 */ 438*1da177e4SLinus Torvalds #define TW_REQ_LUN_IN(lun, request_id) (((lun << 12) & 0xf000) | (request_id & 0xfff)) 439*1da177e4SLinus Torvalds #define TW_LUN_OUT(lun) ((lun >> 12) & 0xf) 440*1da177e4SLinus Torvalds 441*1da177e4SLinus Torvalds /* Macros */ 442*1da177e4SLinus Torvalds #define TW_CONTROL_REG_ADDR(x) (x->base_addr) 443*1da177e4SLinus Torvalds #define TW_STATUS_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + 0x4) 444*1da177e4SLinus Torvalds #define TW_COMMAND_QUEUE_REG_ADDR(x) (sizeof(dma_addr_t) > 4 ? ((unsigned char __iomem *)x->base_addr + 0x20) : ((unsigned char __iomem *)x->base_addr + 0x8)) 445*1da177e4SLinus Torvalds #define TW_RESPONSE_QUEUE_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + 0xC) 446*1da177e4SLinus Torvalds #define TW_CLEAR_ALL_INTERRUPTS(x) (writel(TW_STATUS_VALID_INTERRUPT, TW_CONTROL_REG_ADDR(x))) 447*1da177e4SLinus Torvalds #define TW_CLEAR_ATTENTION_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT, TW_CONTROL_REG_ADDR(x))) 448*1da177e4SLinus Torvalds #define TW_CLEAR_HOST_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_HOST_INTERRUPT, TW_CONTROL_REG_ADDR(x))) 449*1da177e4SLinus Torvalds #define TW_DISABLE_INTERRUPTS(x) (writel(TW_CONTROL_DISABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) 450*1da177e4SLinus Torvalds #define TW_ENABLE_AND_CLEAR_INTERRUPTS(x) (writel(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT | TW_CONTROL_UNMASK_RESPONSE_INTERRUPT | TW_CONTROL_ENABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) 451*1da177e4SLinus Torvalds #define TW_MASK_COMMAND_INTERRUPT(x) (writel(TW_CONTROL_MASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x))) 452*1da177e4SLinus Torvalds #define TW_UNMASK_COMMAND_INTERRUPT(x) (writel(TW_CONTROL_UNMASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x))) 453*1da177e4SLinus Torvalds #define TW_SOFT_RESET(x) (writel(TW_CONTROL_ISSUE_SOFT_RESET | \ 454*1da177e4SLinus Torvalds TW_CONTROL_CLEAR_HOST_INTERRUPT | \ 455*1da177e4SLinus Torvalds TW_CONTROL_CLEAR_ATTENTION_INTERRUPT | \ 456*1da177e4SLinus Torvalds TW_CONTROL_MASK_COMMAND_INTERRUPT | \ 457*1da177e4SLinus Torvalds TW_CONTROL_MASK_RESPONSE_INTERRUPT | \ 458*1da177e4SLinus Torvalds TW_CONTROL_CLEAR_ERROR_STATUS | \ 459*1da177e4SLinus Torvalds TW_CONTROL_DISABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) 460*1da177e4SLinus Torvalds #define TW_PRINTK(h,a,b,c) { \ 461*1da177e4SLinus Torvalds if (h) \ 462*1da177e4SLinus Torvalds printk(KERN_WARNING "3w-9xxx: scsi%d: ERROR: (0x%02X:0x%04X): %s.\n",h->host_no,a,b,c); \ 463*1da177e4SLinus Torvalds else \ 464*1da177e4SLinus Torvalds printk(KERN_WARNING "3w-9xxx: ERROR: (0x%02X:0x%04X): %s.\n",a,b,c); \ 465*1da177e4SLinus Torvalds } 466*1da177e4SLinus Torvalds #define TW_MAX_LUNS(srl) (srl < TW_FW_SRL_LUNS_SUPPORTED ? 1 : 16) 467*1da177e4SLinus Torvalds #define TW_COMMAND_SIZE (sizeof(dma_addr_t) > 4 ? 5 : 4) 468*1da177e4SLinus Torvalds #define TW_APACHE_MAX_SGL_LENGTH (sizeof(dma_addr_t) > 4 ? 72 : 109) 469*1da177e4SLinus Torvalds #define TW_ESCALADE_MAX_SGL_LENGTH (sizeof(dma_addr_t) > 4 ? 41 : 62) 470*1da177e4SLinus Torvalds #define TW_PADDING_LENGTH (sizeof(dma_addr_t) > 4 ? 8 : 0) 471*1da177e4SLinus Torvalds 472*1da177e4SLinus Torvalds #pragma pack(1) 473*1da177e4SLinus Torvalds 474*1da177e4SLinus Torvalds /* Scatter Gather List Entry */ 475*1da177e4SLinus Torvalds typedef struct TAG_TW_SG_Entry { 476*1da177e4SLinus Torvalds dma_addr_t address; 477*1da177e4SLinus Torvalds u32 length; 478*1da177e4SLinus Torvalds } TW_SG_Entry; 479*1da177e4SLinus Torvalds 480*1da177e4SLinus Torvalds /* Command Packet */ 481*1da177e4SLinus Torvalds typedef struct TW_Command { 482*1da177e4SLinus Torvalds unsigned char opcode__sgloffset; 483*1da177e4SLinus Torvalds unsigned char size; 484*1da177e4SLinus Torvalds unsigned char request_id; 485*1da177e4SLinus Torvalds unsigned char unit__hostid; 486*1da177e4SLinus Torvalds /* Second DWORD */ 487*1da177e4SLinus Torvalds unsigned char status; 488*1da177e4SLinus Torvalds unsigned char flags; 489*1da177e4SLinus Torvalds union { 490*1da177e4SLinus Torvalds unsigned short block_count; 491*1da177e4SLinus Torvalds unsigned short parameter_count; 492*1da177e4SLinus Torvalds } byte6_offset; 493*1da177e4SLinus Torvalds union { 494*1da177e4SLinus Torvalds struct { 495*1da177e4SLinus Torvalds u32 lba; 496*1da177e4SLinus Torvalds TW_SG_Entry sgl[TW_ESCALADE_MAX_SGL_LENGTH]; 497*1da177e4SLinus Torvalds dma_addr_t padding; 498*1da177e4SLinus Torvalds } io; 499*1da177e4SLinus Torvalds struct { 500*1da177e4SLinus Torvalds TW_SG_Entry sgl[TW_ESCALADE_MAX_SGL_LENGTH]; 501*1da177e4SLinus Torvalds u32 padding; 502*1da177e4SLinus Torvalds dma_addr_t padding2; 503*1da177e4SLinus Torvalds } param; 504*1da177e4SLinus Torvalds } byte8_offset; 505*1da177e4SLinus Torvalds } TW_Command; 506*1da177e4SLinus Torvalds 507*1da177e4SLinus Torvalds /* Command Packet for 9000+ controllers */ 508*1da177e4SLinus Torvalds typedef struct TAG_TW_Command_Apache { 509*1da177e4SLinus Torvalds unsigned char opcode__reserved; 510*1da177e4SLinus Torvalds unsigned char unit; 511*1da177e4SLinus Torvalds unsigned short request_id__lunl; 512*1da177e4SLinus Torvalds unsigned char status; 513*1da177e4SLinus Torvalds unsigned char sgl_offset; 514*1da177e4SLinus Torvalds unsigned short sgl_entries__lunh; 515*1da177e4SLinus Torvalds unsigned char cdb[16]; 516*1da177e4SLinus Torvalds TW_SG_Entry sg_list[TW_APACHE_MAX_SGL_LENGTH]; 517*1da177e4SLinus Torvalds unsigned char padding[TW_PADDING_LENGTH]; 518*1da177e4SLinus Torvalds } TW_Command_Apache; 519*1da177e4SLinus Torvalds 520*1da177e4SLinus Torvalds /* New command packet header */ 521*1da177e4SLinus Torvalds typedef struct TAG_TW_Command_Apache_Header { 522*1da177e4SLinus Torvalds unsigned char sense_data[TW_SENSE_DATA_LENGTH]; 523*1da177e4SLinus Torvalds struct { 524*1da177e4SLinus Torvalds char reserved[4]; 525*1da177e4SLinus Torvalds unsigned short error; 526*1da177e4SLinus Torvalds unsigned char padding; 527*1da177e4SLinus Torvalds unsigned char severity__reserved; 528*1da177e4SLinus Torvalds } status_block; 529*1da177e4SLinus Torvalds unsigned char err_specific_desc[98]; 530*1da177e4SLinus Torvalds struct { 531*1da177e4SLinus Torvalds unsigned char size_header; 532*1da177e4SLinus Torvalds unsigned short reserved; 533*1da177e4SLinus Torvalds unsigned char size_sense; 534*1da177e4SLinus Torvalds } header_desc; 535*1da177e4SLinus Torvalds } TW_Command_Apache_Header; 536*1da177e4SLinus Torvalds 537*1da177e4SLinus Torvalds /* This struct is a union of the 2 command packets */ 538*1da177e4SLinus Torvalds typedef struct TAG_TW_Command_Full { 539*1da177e4SLinus Torvalds TW_Command_Apache_Header header; 540*1da177e4SLinus Torvalds union { 541*1da177e4SLinus Torvalds TW_Command oldcommand; 542*1da177e4SLinus Torvalds TW_Command_Apache newcommand; 543*1da177e4SLinus Torvalds } command; 544*1da177e4SLinus Torvalds } TW_Command_Full; 545*1da177e4SLinus Torvalds 546*1da177e4SLinus Torvalds /* Initconnection structure */ 547*1da177e4SLinus Torvalds typedef struct TAG_TW_Initconnect { 548*1da177e4SLinus Torvalds unsigned char opcode__reserved; 549*1da177e4SLinus Torvalds unsigned char size; 550*1da177e4SLinus Torvalds unsigned char request_id; 551*1da177e4SLinus Torvalds unsigned char res2; 552*1da177e4SLinus Torvalds unsigned char status; 553*1da177e4SLinus Torvalds unsigned char flags; 554*1da177e4SLinus Torvalds unsigned short message_credits; 555*1da177e4SLinus Torvalds u32 features; 556*1da177e4SLinus Torvalds unsigned short fw_srl; 557*1da177e4SLinus Torvalds unsigned short fw_arch_id; 558*1da177e4SLinus Torvalds unsigned short fw_branch; 559*1da177e4SLinus Torvalds unsigned short fw_build; 560*1da177e4SLinus Torvalds u32 result; 561*1da177e4SLinus Torvalds } TW_Initconnect; 562*1da177e4SLinus Torvalds 563*1da177e4SLinus Torvalds /* Event info structure */ 564*1da177e4SLinus Torvalds typedef struct TAG_TW_Event 565*1da177e4SLinus Torvalds { 566*1da177e4SLinus Torvalds unsigned int sequence_id; 567*1da177e4SLinus Torvalds unsigned int time_stamp_sec; 568*1da177e4SLinus Torvalds unsigned short aen_code; 569*1da177e4SLinus Torvalds unsigned char severity; 570*1da177e4SLinus Torvalds unsigned char retrieved; 571*1da177e4SLinus Torvalds unsigned char repeat_count; 572*1da177e4SLinus Torvalds unsigned char parameter_len; 573*1da177e4SLinus Torvalds unsigned char parameter_data[98]; 574*1da177e4SLinus Torvalds } TW_Event; 575*1da177e4SLinus Torvalds 576*1da177e4SLinus Torvalds typedef struct TAG_TW_Ioctl_Driver_Command { 577*1da177e4SLinus Torvalds unsigned int control_code; 578*1da177e4SLinus Torvalds unsigned int status; 579*1da177e4SLinus Torvalds unsigned int unique_id; 580*1da177e4SLinus Torvalds unsigned int sequence_id; 581*1da177e4SLinus Torvalds unsigned int os_specific; 582*1da177e4SLinus Torvalds unsigned int buffer_length; 583*1da177e4SLinus Torvalds } TW_Ioctl_Driver_Command; 584*1da177e4SLinus Torvalds 585*1da177e4SLinus Torvalds typedef struct TAG_TW_Ioctl_Apache { 586*1da177e4SLinus Torvalds TW_Ioctl_Driver_Command driver_command; 587*1da177e4SLinus Torvalds char padding[488]; 588*1da177e4SLinus Torvalds TW_Command_Full firmware_command; 589*1da177e4SLinus Torvalds char data_buffer[1]; 590*1da177e4SLinus Torvalds } TW_Ioctl_Buf_Apache; 591*1da177e4SLinus Torvalds 592*1da177e4SLinus Torvalds /* Lock structure for ioctl get/release lock */ 593*1da177e4SLinus Torvalds typedef struct TAG_TW_Lock { 594*1da177e4SLinus Torvalds unsigned long timeout_msec; 595*1da177e4SLinus Torvalds unsigned long time_remaining_msec; 596*1da177e4SLinus Torvalds unsigned long force_flag; 597*1da177e4SLinus Torvalds } TW_Lock; 598*1da177e4SLinus Torvalds 599*1da177e4SLinus Torvalds /* GetParam descriptor */ 600*1da177e4SLinus Torvalds typedef struct { 601*1da177e4SLinus Torvalds unsigned short table_id; 602*1da177e4SLinus Torvalds unsigned short parameter_id; 603*1da177e4SLinus Torvalds unsigned short parameter_size_bytes; 604*1da177e4SLinus Torvalds unsigned short actual_parameter_size_bytes; 605*1da177e4SLinus Torvalds unsigned char data[1]; 606*1da177e4SLinus Torvalds } TW_Param_Apache, *PTW_Param_Apache; 607*1da177e4SLinus Torvalds 608*1da177e4SLinus Torvalds /* Response queue */ 609*1da177e4SLinus Torvalds typedef union TAG_TW_Response_Queue { 610*1da177e4SLinus Torvalds u32 response_id; 611*1da177e4SLinus Torvalds u32 value; 612*1da177e4SLinus Torvalds } TW_Response_Queue; 613*1da177e4SLinus Torvalds 614*1da177e4SLinus Torvalds typedef struct TAG_TW_Info { 615*1da177e4SLinus Torvalds char *buffer; 616*1da177e4SLinus Torvalds int length; 617*1da177e4SLinus Torvalds int offset; 618*1da177e4SLinus Torvalds int position; 619*1da177e4SLinus Torvalds } TW_Info; 620*1da177e4SLinus Torvalds 621*1da177e4SLinus Torvalds /* Compatibility information structure */ 622*1da177e4SLinus Torvalds typedef struct TAG_TW_Compatibility_Info 623*1da177e4SLinus Torvalds { 624*1da177e4SLinus Torvalds char driver_version[32]; 625*1da177e4SLinus Torvalds unsigned short working_srl; 626*1da177e4SLinus Torvalds unsigned short working_branch; 627*1da177e4SLinus Torvalds unsigned short working_build; 628*1da177e4SLinus Torvalds unsigned short driver_srl_high; 629*1da177e4SLinus Torvalds unsigned short driver_branch_high; 630*1da177e4SLinus Torvalds unsigned short driver_build_high; 631*1da177e4SLinus Torvalds unsigned short driver_srl_low; 632*1da177e4SLinus Torvalds unsigned short driver_branch_low; 633*1da177e4SLinus Torvalds unsigned short driver_build_low; 634*1da177e4SLinus Torvalds } TW_Compatibility_Info; 635*1da177e4SLinus Torvalds 636*1da177e4SLinus Torvalds typedef struct TAG_TW_Device_Extension { 637*1da177e4SLinus Torvalds u32 __iomem *base_addr; 638*1da177e4SLinus Torvalds unsigned long *generic_buffer_virt[TW_Q_LENGTH]; 639*1da177e4SLinus Torvalds dma_addr_t generic_buffer_phys[TW_Q_LENGTH]; 640*1da177e4SLinus Torvalds TW_Command_Full *command_packet_virt[TW_Q_LENGTH]; 641*1da177e4SLinus Torvalds dma_addr_t command_packet_phys[TW_Q_LENGTH]; 642*1da177e4SLinus Torvalds struct pci_dev *tw_pci_dev; 643*1da177e4SLinus Torvalds struct scsi_cmnd *srb[TW_Q_LENGTH]; 644*1da177e4SLinus Torvalds unsigned char free_queue[TW_Q_LENGTH]; 645*1da177e4SLinus Torvalds unsigned char free_head; 646*1da177e4SLinus Torvalds unsigned char free_tail; 647*1da177e4SLinus Torvalds unsigned char pending_queue[TW_Q_LENGTH]; 648*1da177e4SLinus Torvalds unsigned char pending_head; 649*1da177e4SLinus Torvalds unsigned char pending_tail; 650*1da177e4SLinus Torvalds int state[TW_Q_LENGTH]; 651*1da177e4SLinus Torvalds unsigned int posted_request_count; 652*1da177e4SLinus Torvalds unsigned int max_posted_request_count; 653*1da177e4SLinus Torvalds unsigned int pending_request_count; 654*1da177e4SLinus Torvalds unsigned int max_pending_request_count; 655*1da177e4SLinus Torvalds unsigned int max_sgl_entries; 656*1da177e4SLinus Torvalds unsigned int sgl_entries; 657*1da177e4SLinus Torvalds unsigned int num_resets; 658*1da177e4SLinus Torvalds unsigned int sector_count; 659*1da177e4SLinus Torvalds unsigned int max_sector_count; 660*1da177e4SLinus Torvalds unsigned int aen_count; 661*1da177e4SLinus Torvalds struct Scsi_Host *host; 662*1da177e4SLinus Torvalds long flags; 663*1da177e4SLinus Torvalds int reset_print; 664*1da177e4SLinus Torvalds TW_Event *event_queue[TW_Q_LENGTH]; 665*1da177e4SLinus Torvalds unsigned char error_index; 666*1da177e4SLinus Torvalds unsigned char event_queue_wrapped; 667*1da177e4SLinus Torvalds unsigned int error_sequence_id; 668*1da177e4SLinus Torvalds int ioctl_sem_lock; 669*1da177e4SLinus Torvalds u32 ioctl_msec; 670*1da177e4SLinus Torvalds int chrdev_request_id; 671*1da177e4SLinus Torvalds wait_queue_head_t ioctl_wqueue; 672*1da177e4SLinus Torvalds struct semaphore ioctl_sem; 673*1da177e4SLinus Torvalds char aen_clobber; 674*1da177e4SLinus Torvalds unsigned short working_srl; 675*1da177e4SLinus Torvalds unsigned short working_branch; 676*1da177e4SLinus Torvalds unsigned short working_build; 677*1da177e4SLinus Torvalds } TW_Device_Extension; 678*1da177e4SLinus Torvalds 679*1da177e4SLinus Torvalds #pragma pack() 680*1da177e4SLinus Torvalds 681*1da177e4SLinus Torvalds #endif /* _3W_9XXX_H */ 682*1da177e4SLinus Torvalds 683