1 /* 2 * drivers/s390/net/qeth_core_main.c 3 * 4 * Copyright IBM Corp. 2007, 2009 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 6 * Frank Pavlic <fpavlic@de.ibm.com>, 7 * Thomas Spatzier <tspat@de.ibm.com>, 8 * Frank Blaschka <frank.blaschka@de.ibm.com> 9 */ 10 11 #define KMSG_COMPONENT "qeth" 12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/string.h> 17 #include <linux/errno.h> 18 #include <linux/kernel.h> 19 #include <linux/ip.h> 20 #include <linux/tcp.h> 21 #include <linux/mii.h> 22 #include <linux/kthread.h> 23 #include <linux/slab.h> 24 #include <net/iucv/af_iucv.h> 25 26 #include <asm/ebcdic.h> 27 #include <asm/io.h> 28 #include <asm/sysinfo.h> 29 30 #include "qeth_core.h" 31 32 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 34 /* N P A M L V H */ 35 [QETH_DBF_SETUP] = {"qeth_setup", 36 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 37 [QETH_DBF_MSG] = {"qeth_msg", 38 8, 1, 128, 3, &debug_sprintf_view, NULL}, 39 [QETH_DBF_CTRL] = {"qeth_control", 40 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 41 }; 42 EXPORT_SYMBOL_GPL(qeth_dbf); 43 44 struct qeth_card_list_struct qeth_core_card_list; 45 EXPORT_SYMBOL_GPL(qeth_core_card_list); 46 struct kmem_cache *qeth_core_header_cache; 47 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 48 static struct kmem_cache *qeth_qdio_outbuf_cache; 49 50 static struct device *qeth_core_root_dev; 51 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 52 static struct lock_class_key qdio_out_skb_queue_key; 53 54 static void qeth_send_control_data_cb(struct qeth_channel *, 55 struct qeth_cmd_buffer *); 56 static int qeth_issue_next_read(struct qeth_card *); 57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 59 static void qeth_free_buffer_pool(struct qeth_card *); 60 static int qeth_qdio_establish(struct qeth_card *); 61 static void qeth_free_qdio_buffers(struct qeth_card *); 62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 63 struct qeth_qdio_out_buffer *buf, 64 enum iucv_tx_notify notification); 65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 67 struct qeth_qdio_out_buffer *buf, 68 enum qeth_qdio_buffer_states newbufstate); 69 70 71 static inline const char *qeth_get_cardname(struct qeth_card *card) 72 { 73 if (card->info.guestlan) { 74 switch (card->info.type) { 75 case QETH_CARD_TYPE_OSD: 76 return " Guest LAN QDIO"; 77 case QETH_CARD_TYPE_IQD: 78 return " Guest LAN Hiper"; 79 case QETH_CARD_TYPE_OSM: 80 return " Guest LAN QDIO - OSM"; 81 case QETH_CARD_TYPE_OSX: 82 return " Guest LAN QDIO - OSX"; 83 default: 84 return " unknown"; 85 } 86 } else { 87 switch (card->info.type) { 88 case QETH_CARD_TYPE_OSD: 89 return " OSD Express"; 90 case QETH_CARD_TYPE_IQD: 91 return " HiperSockets"; 92 case QETH_CARD_TYPE_OSN: 93 return " OSN QDIO"; 94 case QETH_CARD_TYPE_OSM: 95 return " OSM QDIO"; 96 case QETH_CARD_TYPE_OSX: 97 return " OSX QDIO"; 98 default: 99 return " unknown"; 100 } 101 } 102 return " n/a"; 103 } 104 105 /* max length to be returned: 14 */ 106 const char *qeth_get_cardname_short(struct qeth_card *card) 107 { 108 if (card->info.guestlan) { 109 switch (card->info.type) { 110 case QETH_CARD_TYPE_OSD: 111 return "GuestLAN QDIO"; 112 case QETH_CARD_TYPE_IQD: 113 return "GuestLAN Hiper"; 114 case QETH_CARD_TYPE_OSM: 115 return "GuestLAN OSM"; 116 case QETH_CARD_TYPE_OSX: 117 return "GuestLAN OSX"; 118 default: 119 return "unknown"; 120 } 121 } else { 122 switch (card->info.type) { 123 case QETH_CARD_TYPE_OSD: 124 switch (card->info.link_type) { 125 case QETH_LINK_TYPE_FAST_ETH: 126 return "OSD_100"; 127 case QETH_LINK_TYPE_HSTR: 128 return "HSTR"; 129 case QETH_LINK_TYPE_GBIT_ETH: 130 return "OSD_1000"; 131 case QETH_LINK_TYPE_10GBIT_ETH: 132 return "OSD_10GIG"; 133 case QETH_LINK_TYPE_LANE_ETH100: 134 return "OSD_FE_LANE"; 135 case QETH_LINK_TYPE_LANE_TR: 136 return "OSD_TR_LANE"; 137 case QETH_LINK_TYPE_LANE_ETH1000: 138 return "OSD_GbE_LANE"; 139 case QETH_LINK_TYPE_LANE: 140 return "OSD_ATM_LANE"; 141 default: 142 return "OSD_Express"; 143 } 144 case QETH_CARD_TYPE_IQD: 145 return "HiperSockets"; 146 case QETH_CARD_TYPE_OSN: 147 return "OSN"; 148 case QETH_CARD_TYPE_OSM: 149 return "OSM_1000"; 150 case QETH_CARD_TYPE_OSX: 151 return "OSX_10GIG"; 152 default: 153 return "unknown"; 154 } 155 } 156 return "n/a"; 157 } 158 159 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 160 int clear_start_mask) 161 { 162 unsigned long flags; 163 164 spin_lock_irqsave(&card->thread_mask_lock, flags); 165 card->thread_allowed_mask = threads; 166 if (clear_start_mask) 167 card->thread_start_mask &= threads; 168 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 169 wake_up(&card->wait_q); 170 } 171 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 172 173 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 174 { 175 unsigned long flags; 176 int rc = 0; 177 178 spin_lock_irqsave(&card->thread_mask_lock, flags); 179 rc = (card->thread_running_mask & threads); 180 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 181 return rc; 182 } 183 EXPORT_SYMBOL_GPL(qeth_threads_running); 184 185 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 186 { 187 return wait_event_interruptible(card->wait_q, 188 qeth_threads_running(card, threads) == 0); 189 } 190 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 191 192 void qeth_clear_working_pool_list(struct qeth_card *card) 193 { 194 struct qeth_buffer_pool_entry *pool_entry, *tmp; 195 196 QETH_CARD_TEXT(card, 5, "clwrklst"); 197 list_for_each_entry_safe(pool_entry, tmp, 198 &card->qdio.in_buf_pool.entry_list, list){ 199 list_del(&pool_entry->list); 200 } 201 } 202 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 203 204 static int qeth_alloc_buffer_pool(struct qeth_card *card) 205 { 206 struct qeth_buffer_pool_entry *pool_entry; 207 void *ptr; 208 int i, j; 209 210 QETH_CARD_TEXT(card, 5, "alocpool"); 211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 213 if (!pool_entry) { 214 qeth_free_buffer_pool(card); 215 return -ENOMEM; 216 } 217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 218 ptr = (void *) __get_free_page(GFP_KERNEL); 219 if (!ptr) { 220 while (j > 0) 221 free_page((unsigned long) 222 pool_entry->elements[--j]); 223 kfree(pool_entry); 224 qeth_free_buffer_pool(card); 225 return -ENOMEM; 226 } 227 pool_entry->elements[j] = ptr; 228 } 229 list_add(&pool_entry->init_list, 230 &card->qdio.init_pool.entry_list); 231 } 232 return 0; 233 } 234 235 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 236 { 237 QETH_CARD_TEXT(card, 2, "realcbp"); 238 239 if ((card->state != CARD_STATE_DOWN) && 240 (card->state != CARD_STATE_RECOVER)) 241 return -EPERM; 242 243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 244 qeth_clear_working_pool_list(card); 245 qeth_free_buffer_pool(card); 246 card->qdio.in_buf_pool.buf_count = bufcnt; 247 card->qdio.init_pool.buf_count = bufcnt; 248 return qeth_alloc_buffer_pool(card); 249 } 250 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 251 252 static inline int qeth_cq_init(struct qeth_card *card) 253 { 254 int rc; 255 256 if (card->options.cq == QETH_CQ_ENABLED) { 257 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 258 memset(card->qdio.c_q->qdio_bufs, 0, 259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 260 card->qdio.c_q->next_buf_to_init = 127; 261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 262 card->qdio.no_in_queues - 1, 0, 263 127); 264 if (rc) { 265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 266 goto out; 267 } 268 } 269 rc = 0; 270 out: 271 return rc; 272 } 273 274 static inline int qeth_alloc_cq(struct qeth_card *card) 275 { 276 int rc; 277 278 if (card->options.cq == QETH_CQ_ENABLED) { 279 int i; 280 struct qdio_outbuf_state *outbuf_states; 281 282 QETH_DBF_TEXT(SETUP, 2, "cqon"); 283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q), 284 GFP_KERNEL); 285 if (!card->qdio.c_q) { 286 rc = -1; 287 goto kmsg_out; 288 } 289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *)); 290 291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 292 card->qdio.c_q->bufs[i].buffer = 293 &card->qdio.c_q->qdio_bufs[i]; 294 } 295 296 card->qdio.no_in_queues = 2; 297 298 card->qdio.out_bufstates = (struct qdio_outbuf_state *) 299 kzalloc(card->qdio.no_out_queues * 300 QDIO_MAX_BUFFERS_PER_Q * 301 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 302 outbuf_states = card->qdio.out_bufstates; 303 if (outbuf_states == NULL) { 304 rc = -1; 305 goto free_cq_out; 306 } 307 for (i = 0; i < card->qdio.no_out_queues; ++i) { 308 card->qdio.out_qs[i]->bufstates = outbuf_states; 309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 310 } 311 } else { 312 QETH_DBF_TEXT(SETUP, 2, "nocq"); 313 card->qdio.c_q = NULL; 314 card->qdio.no_in_queues = 1; 315 } 316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 317 rc = 0; 318 out: 319 return rc; 320 free_cq_out: 321 kfree(card->qdio.c_q); 322 card->qdio.c_q = NULL; 323 kmsg_out: 324 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 325 goto out; 326 } 327 328 static inline void qeth_free_cq(struct qeth_card *card) 329 { 330 if (card->qdio.c_q) { 331 --card->qdio.no_in_queues; 332 kfree(card->qdio.c_q); 333 card->qdio.c_q = NULL; 334 } 335 kfree(card->qdio.out_bufstates); 336 card->qdio.out_bufstates = NULL; 337 } 338 339 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 340 int delayed) { 341 enum iucv_tx_notify n; 342 343 switch (sbalf15) { 344 case 0: 345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 346 break; 347 case 4: 348 case 16: 349 case 17: 350 case 18: 351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 352 TX_NOTIFY_UNREACHABLE; 353 break; 354 default: 355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 356 TX_NOTIFY_GENERALERROR; 357 break; 358 } 359 360 return n; 361 } 362 363 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 364 int bidx, int forced_cleanup) 365 { 366 if (q->bufs[bidx]->next_pending != NULL) { 367 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 368 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 369 370 while (c) { 371 if (forced_cleanup || 372 atomic_read(&c->state) == 373 QETH_QDIO_BUF_HANDLED_DELAYED) { 374 struct qeth_qdio_out_buffer *f = c; 375 QETH_CARD_TEXT(f->q->card, 5, "fp"); 376 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 377 /* release here to avoid interleaving between 378 outbound tasklet and inbound tasklet 379 regarding notifications and lifecycle */ 380 qeth_release_skbs(c); 381 382 c = f->next_pending; 383 BUG_ON(head->next_pending != f); 384 head->next_pending = c; 385 kmem_cache_free(qeth_qdio_outbuf_cache, f); 386 } else { 387 head = c; 388 c = c->next_pending; 389 } 390 391 } 392 } 393 } 394 395 396 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 397 unsigned long phys_aob_addr) { 398 struct qaob *aob; 399 struct qeth_qdio_out_buffer *buffer; 400 enum iucv_tx_notify notification; 401 402 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 403 QETH_CARD_TEXT(card, 5, "haob"); 404 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 405 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 406 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 407 408 BUG_ON(buffer == NULL); 409 410 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 411 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 412 notification = TX_NOTIFY_OK; 413 } else { 414 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING); 415 416 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 417 notification = TX_NOTIFY_DELAYED_OK; 418 } 419 420 if (aob->aorc != 0) { 421 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 422 notification = qeth_compute_cq_notification(aob->aorc, 1); 423 } 424 qeth_notify_skbs(buffer->q, buffer, notification); 425 426 buffer->aob = NULL; 427 qeth_clear_output_buffer(buffer->q, buffer, 428 QETH_QDIO_BUF_HANDLED_DELAYED); 429 /* from here on: do not touch buffer anymore */ 430 qdio_release_aob(aob); 431 } 432 433 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 434 { 435 return card->options.cq == QETH_CQ_ENABLED && 436 card->qdio.c_q != NULL && 437 queue != 0 && 438 queue == card->qdio.no_in_queues - 1; 439 } 440 441 442 static int qeth_issue_next_read(struct qeth_card *card) 443 { 444 int rc; 445 struct qeth_cmd_buffer *iob; 446 447 QETH_CARD_TEXT(card, 5, "issnxrd"); 448 if (card->read.state != CH_STATE_UP) 449 return -EIO; 450 iob = qeth_get_buffer(&card->read); 451 if (!iob) { 452 dev_warn(&card->gdev->dev, "The qeth device driver " 453 "failed to recover an error on the device\n"); 454 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 455 "available\n", dev_name(&card->gdev->dev)); 456 return -ENOMEM; 457 } 458 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 459 QETH_CARD_TEXT(card, 6, "noirqpnd"); 460 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 461 (addr_t) iob, 0, 0); 462 if (rc) { 463 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 464 "rc=%i\n", dev_name(&card->gdev->dev), rc); 465 atomic_set(&card->read.irq_pending, 0); 466 card->read_or_write_problem = 1; 467 qeth_schedule_recovery(card); 468 wake_up(&card->wait_q); 469 } 470 return rc; 471 } 472 473 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 474 { 475 struct qeth_reply *reply; 476 477 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 478 if (reply) { 479 atomic_set(&reply->refcnt, 1); 480 atomic_set(&reply->received, 0); 481 reply->card = card; 482 }; 483 return reply; 484 } 485 486 static void qeth_get_reply(struct qeth_reply *reply) 487 { 488 WARN_ON(atomic_read(&reply->refcnt) <= 0); 489 atomic_inc(&reply->refcnt); 490 } 491 492 static void qeth_put_reply(struct qeth_reply *reply) 493 { 494 WARN_ON(atomic_read(&reply->refcnt) <= 0); 495 if (atomic_dec_and_test(&reply->refcnt)) 496 kfree(reply); 497 } 498 499 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 500 struct qeth_card *card) 501 { 502 char *ipa_name; 503 int com = cmd->hdr.command; 504 ipa_name = qeth_get_ipa_cmd_name(com); 505 if (rc) 506 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 507 "x%X \"%s\"\n", 508 ipa_name, com, dev_name(&card->gdev->dev), 509 QETH_CARD_IFNAME(card), rc, 510 qeth_get_ipa_msg(rc)); 511 else 512 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 513 ipa_name, com, dev_name(&card->gdev->dev), 514 QETH_CARD_IFNAME(card)); 515 } 516 517 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 518 struct qeth_cmd_buffer *iob) 519 { 520 struct qeth_ipa_cmd *cmd = NULL; 521 522 QETH_CARD_TEXT(card, 5, "chkipad"); 523 if (IS_IPA(iob->data)) { 524 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 525 if (IS_IPA_REPLY(cmd)) { 526 if (cmd->hdr.command != IPA_CMD_SETCCID && 527 cmd->hdr.command != IPA_CMD_DELCCID && 528 cmd->hdr.command != IPA_CMD_MODCCID && 529 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 530 qeth_issue_ipa_msg(cmd, 531 cmd->hdr.return_code, card); 532 return cmd; 533 } else { 534 switch (cmd->hdr.command) { 535 case IPA_CMD_STOPLAN: 536 dev_warn(&card->gdev->dev, 537 "The link for interface %s on CHPID" 538 " 0x%X failed\n", 539 QETH_CARD_IFNAME(card), 540 card->info.chpid); 541 card->lan_online = 0; 542 if (card->dev && netif_carrier_ok(card->dev)) 543 netif_carrier_off(card->dev); 544 return NULL; 545 case IPA_CMD_STARTLAN: 546 dev_info(&card->gdev->dev, 547 "The link for %s on CHPID 0x%X has" 548 " been restored\n", 549 QETH_CARD_IFNAME(card), 550 card->info.chpid); 551 netif_carrier_on(card->dev); 552 card->lan_online = 1; 553 if (card->info.hwtrap) 554 card->info.hwtrap = 2; 555 qeth_schedule_recovery(card); 556 return NULL; 557 case IPA_CMD_MODCCID: 558 return cmd; 559 case IPA_CMD_REGISTER_LOCAL_ADDR: 560 QETH_CARD_TEXT(card, 3, "irla"); 561 break; 562 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 563 QETH_CARD_TEXT(card, 3, "urla"); 564 break; 565 default: 566 QETH_DBF_MESSAGE(2, "Received data is IPA " 567 "but not a reply!\n"); 568 break; 569 } 570 } 571 } 572 return cmd; 573 } 574 575 void qeth_clear_ipacmd_list(struct qeth_card *card) 576 { 577 struct qeth_reply *reply, *r; 578 unsigned long flags; 579 580 QETH_CARD_TEXT(card, 4, "clipalst"); 581 582 spin_lock_irqsave(&card->lock, flags); 583 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 584 qeth_get_reply(reply); 585 reply->rc = -EIO; 586 atomic_inc(&reply->received); 587 list_del_init(&reply->list); 588 wake_up(&reply->wait_q); 589 qeth_put_reply(reply); 590 } 591 spin_unlock_irqrestore(&card->lock, flags); 592 atomic_set(&card->write.irq_pending, 0); 593 } 594 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 595 596 static int qeth_check_idx_response(struct qeth_card *card, 597 unsigned char *buffer) 598 { 599 if (!buffer) 600 return 0; 601 602 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 603 if ((buffer[2] & 0xc0) == 0xc0) { 604 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 605 "with cause code 0x%02x%s\n", 606 buffer[4], 607 ((buffer[4] == 0x22) ? 608 " -- try another portname" : "")); 609 QETH_CARD_TEXT(card, 2, "ckidxres"); 610 QETH_CARD_TEXT(card, 2, " idxterm"); 611 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 612 if (buffer[4] == 0xf6) { 613 dev_err(&card->gdev->dev, 614 "The qeth device is not configured " 615 "for the OSI layer required by z/VM\n"); 616 return -EPERM; 617 } 618 return -EIO; 619 } 620 return 0; 621 } 622 623 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 624 __u32 len) 625 { 626 struct qeth_card *card; 627 628 card = CARD_FROM_CDEV(channel->ccwdev); 629 QETH_CARD_TEXT(card, 4, "setupccw"); 630 if (channel == &card->read) 631 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 632 else 633 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 634 channel->ccw.count = len; 635 channel->ccw.cda = (__u32) __pa(iob); 636 } 637 638 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 639 { 640 __u8 index; 641 642 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 643 index = channel->io_buf_no; 644 do { 645 if (channel->iob[index].state == BUF_STATE_FREE) { 646 channel->iob[index].state = BUF_STATE_LOCKED; 647 channel->io_buf_no = (channel->io_buf_no + 1) % 648 QETH_CMD_BUFFER_NO; 649 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 650 return channel->iob + index; 651 } 652 index = (index + 1) % QETH_CMD_BUFFER_NO; 653 } while (index != channel->io_buf_no); 654 655 return NULL; 656 } 657 658 void qeth_release_buffer(struct qeth_channel *channel, 659 struct qeth_cmd_buffer *iob) 660 { 661 unsigned long flags; 662 663 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 664 spin_lock_irqsave(&channel->iob_lock, flags); 665 memset(iob->data, 0, QETH_BUFSIZE); 666 iob->state = BUF_STATE_FREE; 667 iob->callback = qeth_send_control_data_cb; 668 iob->rc = 0; 669 spin_unlock_irqrestore(&channel->iob_lock, flags); 670 } 671 EXPORT_SYMBOL_GPL(qeth_release_buffer); 672 673 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 674 { 675 struct qeth_cmd_buffer *buffer = NULL; 676 unsigned long flags; 677 678 spin_lock_irqsave(&channel->iob_lock, flags); 679 buffer = __qeth_get_buffer(channel); 680 spin_unlock_irqrestore(&channel->iob_lock, flags); 681 return buffer; 682 } 683 684 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 685 { 686 struct qeth_cmd_buffer *buffer; 687 wait_event(channel->wait_q, 688 ((buffer = qeth_get_buffer(channel)) != NULL)); 689 return buffer; 690 } 691 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 692 693 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 694 { 695 int cnt; 696 697 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 698 qeth_release_buffer(channel, &channel->iob[cnt]); 699 channel->buf_no = 0; 700 channel->io_buf_no = 0; 701 } 702 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 703 704 static void qeth_send_control_data_cb(struct qeth_channel *channel, 705 struct qeth_cmd_buffer *iob) 706 { 707 struct qeth_card *card; 708 struct qeth_reply *reply, *r; 709 struct qeth_ipa_cmd *cmd; 710 unsigned long flags; 711 int keep_reply; 712 int rc = 0; 713 714 card = CARD_FROM_CDEV(channel->ccwdev); 715 QETH_CARD_TEXT(card, 4, "sndctlcb"); 716 rc = qeth_check_idx_response(card, iob->data); 717 switch (rc) { 718 case 0: 719 break; 720 case -EIO: 721 qeth_clear_ipacmd_list(card); 722 qeth_schedule_recovery(card); 723 /* fall through */ 724 default: 725 goto out; 726 } 727 728 cmd = qeth_check_ipa_data(card, iob); 729 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 730 goto out; 731 /*in case of OSN : check if cmd is set */ 732 if (card->info.type == QETH_CARD_TYPE_OSN && 733 cmd && 734 cmd->hdr.command != IPA_CMD_STARTLAN && 735 card->osn_info.assist_cb != NULL) { 736 card->osn_info.assist_cb(card->dev, cmd); 737 goto out; 738 } 739 740 spin_lock_irqsave(&card->lock, flags); 741 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 742 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 743 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 744 qeth_get_reply(reply); 745 list_del_init(&reply->list); 746 spin_unlock_irqrestore(&card->lock, flags); 747 keep_reply = 0; 748 if (reply->callback != NULL) { 749 if (cmd) { 750 reply->offset = (__u16)((char *)cmd - 751 (char *)iob->data); 752 keep_reply = reply->callback(card, 753 reply, 754 (unsigned long)cmd); 755 } else 756 keep_reply = reply->callback(card, 757 reply, 758 (unsigned long)iob); 759 } 760 if (cmd) 761 reply->rc = (u16) cmd->hdr.return_code; 762 else if (iob->rc) 763 reply->rc = iob->rc; 764 if (keep_reply) { 765 spin_lock_irqsave(&card->lock, flags); 766 list_add_tail(&reply->list, 767 &card->cmd_waiter_list); 768 spin_unlock_irqrestore(&card->lock, flags); 769 } else { 770 atomic_inc(&reply->received); 771 wake_up(&reply->wait_q); 772 } 773 qeth_put_reply(reply); 774 goto out; 775 } 776 } 777 spin_unlock_irqrestore(&card->lock, flags); 778 out: 779 memcpy(&card->seqno.pdu_hdr_ack, 780 QETH_PDU_HEADER_SEQ_NO(iob->data), 781 QETH_SEQ_NO_LENGTH); 782 qeth_release_buffer(channel, iob); 783 } 784 785 static int qeth_setup_channel(struct qeth_channel *channel) 786 { 787 int cnt; 788 789 QETH_DBF_TEXT(SETUP, 2, "setupch"); 790 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 791 channel->iob[cnt].data = 792 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 793 if (channel->iob[cnt].data == NULL) 794 break; 795 channel->iob[cnt].state = BUF_STATE_FREE; 796 channel->iob[cnt].channel = channel; 797 channel->iob[cnt].callback = qeth_send_control_data_cb; 798 channel->iob[cnt].rc = 0; 799 } 800 if (cnt < QETH_CMD_BUFFER_NO) { 801 while (cnt-- > 0) 802 kfree(channel->iob[cnt].data); 803 return -ENOMEM; 804 } 805 channel->buf_no = 0; 806 channel->io_buf_no = 0; 807 atomic_set(&channel->irq_pending, 0); 808 spin_lock_init(&channel->iob_lock); 809 810 init_waitqueue_head(&channel->wait_q); 811 return 0; 812 } 813 814 static int qeth_set_thread_start_bit(struct qeth_card *card, 815 unsigned long thread) 816 { 817 unsigned long flags; 818 819 spin_lock_irqsave(&card->thread_mask_lock, flags); 820 if (!(card->thread_allowed_mask & thread) || 821 (card->thread_start_mask & thread)) { 822 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 823 return -EPERM; 824 } 825 card->thread_start_mask |= thread; 826 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 827 return 0; 828 } 829 830 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 831 { 832 unsigned long flags; 833 834 spin_lock_irqsave(&card->thread_mask_lock, flags); 835 card->thread_start_mask &= ~thread; 836 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 837 wake_up(&card->wait_q); 838 } 839 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 840 841 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 842 { 843 unsigned long flags; 844 845 spin_lock_irqsave(&card->thread_mask_lock, flags); 846 card->thread_running_mask &= ~thread; 847 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 848 wake_up(&card->wait_q); 849 } 850 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 851 852 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 853 { 854 unsigned long flags; 855 int rc = 0; 856 857 spin_lock_irqsave(&card->thread_mask_lock, flags); 858 if (card->thread_start_mask & thread) { 859 if ((card->thread_allowed_mask & thread) && 860 !(card->thread_running_mask & thread)) { 861 rc = 1; 862 card->thread_start_mask &= ~thread; 863 card->thread_running_mask |= thread; 864 } else 865 rc = -EPERM; 866 } 867 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 868 return rc; 869 } 870 871 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 872 { 873 int rc = 0; 874 875 wait_event(card->wait_q, 876 (rc = __qeth_do_run_thread(card, thread)) >= 0); 877 return rc; 878 } 879 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 880 881 void qeth_schedule_recovery(struct qeth_card *card) 882 { 883 QETH_CARD_TEXT(card, 2, "startrec"); 884 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 885 schedule_work(&card->kernel_thread_starter); 886 } 887 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 888 889 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 890 { 891 int dstat, cstat; 892 char *sense; 893 struct qeth_card *card; 894 895 sense = (char *) irb->ecw; 896 cstat = irb->scsw.cmd.cstat; 897 dstat = irb->scsw.cmd.dstat; 898 card = CARD_FROM_CDEV(cdev); 899 900 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 901 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 902 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 903 QETH_CARD_TEXT(card, 2, "CGENCHK"); 904 dev_warn(&cdev->dev, "The qeth device driver " 905 "failed to recover an error on the device\n"); 906 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 907 dev_name(&cdev->dev), dstat, cstat); 908 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 909 16, 1, irb, 64, 1); 910 return 1; 911 } 912 913 if (dstat & DEV_STAT_UNIT_CHECK) { 914 if (sense[SENSE_RESETTING_EVENT_BYTE] & 915 SENSE_RESETTING_EVENT_FLAG) { 916 QETH_CARD_TEXT(card, 2, "REVIND"); 917 return 1; 918 } 919 if (sense[SENSE_COMMAND_REJECT_BYTE] & 920 SENSE_COMMAND_REJECT_FLAG) { 921 QETH_CARD_TEXT(card, 2, "CMDREJi"); 922 return 1; 923 } 924 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 925 QETH_CARD_TEXT(card, 2, "AFFE"); 926 return 1; 927 } 928 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 929 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 930 return 0; 931 } 932 QETH_CARD_TEXT(card, 2, "DGENCHK"); 933 return 1; 934 } 935 return 0; 936 } 937 938 static long __qeth_check_irb_error(struct ccw_device *cdev, 939 unsigned long intparm, struct irb *irb) 940 { 941 struct qeth_card *card; 942 943 card = CARD_FROM_CDEV(cdev); 944 945 if (!IS_ERR(irb)) 946 return 0; 947 948 switch (PTR_ERR(irb)) { 949 case -EIO: 950 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 951 dev_name(&cdev->dev)); 952 QETH_CARD_TEXT(card, 2, "ckirberr"); 953 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 954 break; 955 case -ETIMEDOUT: 956 dev_warn(&cdev->dev, "A hardware operation timed out" 957 " on the device\n"); 958 QETH_CARD_TEXT(card, 2, "ckirberr"); 959 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 960 if (intparm == QETH_RCD_PARM) { 961 if (card && (card->data.ccwdev == cdev)) { 962 card->data.state = CH_STATE_DOWN; 963 wake_up(&card->wait_q); 964 } 965 } 966 break; 967 default: 968 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 969 dev_name(&cdev->dev), PTR_ERR(irb)); 970 QETH_CARD_TEXT(card, 2, "ckirberr"); 971 QETH_CARD_TEXT(card, 2, " rc???"); 972 } 973 return PTR_ERR(irb); 974 } 975 976 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 977 struct irb *irb) 978 { 979 int rc; 980 int cstat, dstat; 981 struct qeth_cmd_buffer *buffer; 982 struct qeth_channel *channel; 983 struct qeth_card *card; 984 struct qeth_cmd_buffer *iob; 985 __u8 index; 986 987 if (__qeth_check_irb_error(cdev, intparm, irb)) 988 return; 989 cstat = irb->scsw.cmd.cstat; 990 dstat = irb->scsw.cmd.dstat; 991 992 card = CARD_FROM_CDEV(cdev); 993 if (!card) 994 return; 995 996 QETH_CARD_TEXT(card, 5, "irq"); 997 998 if (card->read.ccwdev == cdev) { 999 channel = &card->read; 1000 QETH_CARD_TEXT(card, 5, "read"); 1001 } else if (card->write.ccwdev == cdev) { 1002 channel = &card->write; 1003 QETH_CARD_TEXT(card, 5, "write"); 1004 } else { 1005 channel = &card->data; 1006 QETH_CARD_TEXT(card, 5, "data"); 1007 } 1008 atomic_set(&channel->irq_pending, 0); 1009 1010 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1011 channel->state = CH_STATE_STOPPED; 1012 1013 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1014 channel->state = CH_STATE_HALTED; 1015 1016 /*let's wake up immediately on data channel*/ 1017 if ((channel == &card->data) && (intparm != 0) && 1018 (intparm != QETH_RCD_PARM)) 1019 goto out; 1020 1021 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1022 QETH_CARD_TEXT(card, 6, "clrchpar"); 1023 /* we don't have to handle this further */ 1024 intparm = 0; 1025 } 1026 if (intparm == QETH_HALT_CHANNEL_PARM) { 1027 QETH_CARD_TEXT(card, 6, "hltchpar"); 1028 /* we don't have to handle this further */ 1029 intparm = 0; 1030 } 1031 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1032 (dstat & DEV_STAT_UNIT_CHECK) || 1033 (cstat)) { 1034 if (irb->esw.esw0.erw.cons) { 1035 dev_warn(&channel->ccwdev->dev, 1036 "The qeth device driver failed to recover " 1037 "an error on the device\n"); 1038 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1039 "0x%X dstat 0x%X\n", 1040 dev_name(&channel->ccwdev->dev), cstat, dstat); 1041 print_hex_dump(KERN_WARNING, "qeth: irb ", 1042 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1043 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1044 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1045 } 1046 if (intparm == QETH_RCD_PARM) { 1047 channel->state = CH_STATE_DOWN; 1048 goto out; 1049 } 1050 rc = qeth_get_problem(cdev, irb); 1051 if (rc) { 1052 qeth_clear_ipacmd_list(card); 1053 qeth_schedule_recovery(card); 1054 goto out; 1055 } 1056 } 1057 1058 if (intparm == QETH_RCD_PARM) { 1059 channel->state = CH_STATE_RCD_DONE; 1060 goto out; 1061 } 1062 if (intparm) { 1063 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1064 buffer->state = BUF_STATE_PROCESSED; 1065 } 1066 if (channel == &card->data) 1067 return; 1068 if (channel == &card->read && 1069 channel->state == CH_STATE_UP) 1070 qeth_issue_next_read(card); 1071 1072 iob = channel->iob; 1073 index = channel->buf_no; 1074 while (iob[index].state == BUF_STATE_PROCESSED) { 1075 if (iob[index].callback != NULL) 1076 iob[index].callback(channel, iob + index); 1077 1078 index = (index + 1) % QETH_CMD_BUFFER_NO; 1079 } 1080 channel->buf_no = index; 1081 out: 1082 wake_up(&card->wait_q); 1083 return; 1084 } 1085 1086 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1087 struct qeth_qdio_out_buffer *buf, 1088 enum iucv_tx_notify notification) 1089 { 1090 struct sk_buff *skb; 1091 1092 if (skb_queue_empty(&buf->skb_list)) 1093 goto out; 1094 skb = skb_peek(&buf->skb_list); 1095 while (skb) { 1096 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1097 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1098 if (skb->protocol == ETH_P_AF_IUCV) { 1099 if (skb->sk) { 1100 struct iucv_sock *iucv = iucv_sk(skb->sk); 1101 iucv->sk_txnotify(skb, notification); 1102 } 1103 } 1104 if (skb_queue_is_last(&buf->skb_list, skb)) 1105 skb = NULL; 1106 else 1107 skb = skb_queue_next(&buf->skb_list, skb); 1108 } 1109 out: 1110 return; 1111 } 1112 1113 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1114 { 1115 struct sk_buff *skb; 1116 1117 skb = skb_dequeue(&buf->skb_list); 1118 while (skb) { 1119 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1120 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1121 atomic_dec(&skb->users); 1122 dev_kfree_skb_any(skb); 1123 skb = skb_dequeue(&buf->skb_list); 1124 } 1125 } 1126 1127 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1128 struct qeth_qdio_out_buffer *buf, 1129 enum qeth_qdio_buffer_states newbufstate) 1130 { 1131 int i; 1132 1133 /* is PCI flag set on buffer? */ 1134 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1135 atomic_dec(&queue->set_pci_flags_count); 1136 1137 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1138 qeth_release_skbs(buf); 1139 } 1140 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1141 if (buf->buffer->element[i].addr && buf->is_header[i]) 1142 kmem_cache_free(qeth_core_header_cache, 1143 buf->buffer->element[i].addr); 1144 buf->is_header[i] = 0; 1145 buf->buffer->element[i].length = 0; 1146 buf->buffer->element[i].addr = NULL; 1147 buf->buffer->element[i].eflags = 0; 1148 buf->buffer->element[i].sflags = 0; 1149 } 1150 buf->buffer->element[15].eflags = 0; 1151 buf->buffer->element[15].sflags = 0; 1152 buf->next_element_to_fill = 0; 1153 atomic_set(&buf->state, newbufstate); 1154 } 1155 1156 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1157 { 1158 int j; 1159 1160 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1161 if (!q->bufs[j]) 1162 continue; 1163 qeth_cleanup_handled_pending(q, j, free); 1164 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1165 if (free) { 1166 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1167 q->bufs[j] = NULL; 1168 } 1169 } 1170 } 1171 1172 void qeth_clear_qdio_buffers(struct qeth_card *card) 1173 { 1174 int i; 1175 1176 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1177 /* clear outbound buffers to free skbs */ 1178 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1179 if (card->qdio.out_qs[i]) { 1180 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1181 } 1182 } 1183 } 1184 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1185 1186 static void qeth_free_buffer_pool(struct qeth_card *card) 1187 { 1188 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1189 int i = 0; 1190 list_for_each_entry_safe(pool_entry, tmp, 1191 &card->qdio.init_pool.entry_list, init_list){ 1192 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1193 free_page((unsigned long)pool_entry->elements[i]); 1194 list_del(&pool_entry->init_list); 1195 kfree(pool_entry); 1196 } 1197 } 1198 1199 static void qeth_free_qdio_buffers(struct qeth_card *card) 1200 { 1201 int i, j; 1202 1203 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 1204 QETH_QDIO_UNINITIALIZED) 1205 return; 1206 1207 qeth_free_cq(card); 1208 cancel_delayed_work_sync(&card->buffer_reclaim_work); 1209 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 1210 kfree_skb(card->qdio.in_q->bufs[j].rx_skb); 1211 kfree(card->qdio.in_q); 1212 card->qdio.in_q = NULL; 1213 /* inbound buffer pool */ 1214 qeth_free_buffer_pool(card); 1215 /* free outbound qdio_qs */ 1216 if (card->qdio.out_qs) { 1217 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1218 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 1219 kfree(card->qdio.out_qs[i]); 1220 } 1221 kfree(card->qdio.out_qs); 1222 card->qdio.out_qs = NULL; 1223 } 1224 } 1225 1226 static void qeth_clean_channel(struct qeth_channel *channel) 1227 { 1228 int cnt; 1229 1230 QETH_DBF_TEXT(SETUP, 2, "freech"); 1231 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1232 kfree(channel->iob[cnt].data); 1233 } 1234 1235 static void qeth_get_channel_path_desc(struct qeth_card *card) 1236 { 1237 struct ccw_device *ccwdev; 1238 struct channelPath_dsc { 1239 u8 flags; 1240 u8 lsn; 1241 u8 desc; 1242 u8 chpid; 1243 u8 swla; 1244 u8 zeroes; 1245 u8 chla; 1246 u8 chpp; 1247 } *chp_dsc; 1248 1249 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1250 1251 ccwdev = card->data.ccwdev; 1252 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); 1253 if (chp_dsc != NULL) { 1254 if (card->info.type != QETH_CARD_TYPE_IQD) { 1255 /* CHPP field bit 6 == 1 -> single queue */ 1256 if ((chp_dsc->chpp & 0x02) == 0x02) { 1257 if ((atomic_read(&card->qdio.state) != 1258 QETH_QDIO_UNINITIALIZED) && 1259 (card->qdio.no_out_queues == 4)) 1260 /* change from 4 to 1 outbound queues */ 1261 qeth_free_qdio_buffers(card); 1262 card->qdio.no_out_queues = 1; 1263 if (card->qdio.default_out_queue != 0) 1264 dev_info(&card->gdev->dev, 1265 "Priority Queueing not supported\n"); 1266 card->qdio.default_out_queue = 0; 1267 } else { 1268 if ((atomic_read(&card->qdio.state) != 1269 QETH_QDIO_UNINITIALIZED) && 1270 (card->qdio.no_out_queues == 1)) { 1271 /* change from 1 to 4 outbound queues */ 1272 qeth_free_qdio_buffers(card); 1273 card->qdio.default_out_queue = 2; 1274 } 1275 card->qdio.no_out_queues = 4; 1276 } 1277 } 1278 card->info.func_level = 0x4100 + chp_dsc->desc; 1279 kfree(chp_dsc); 1280 } 1281 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1282 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1283 return; 1284 } 1285 1286 static void qeth_init_qdio_info(struct qeth_card *card) 1287 { 1288 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1289 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1290 /* inbound */ 1291 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1292 if (card->info.type == QETH_CARD_TYPE_IQD) 1293 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1294 else 1295 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1296 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1297 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1298 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1299 } 1300 1301 static void qeth_set_intial_options(struct qeth_card *card) 1302 { 1303 card->options.route4.type = NO_ROUTER; 1304 card->options.route6.type = NO_ROUTER; 1305 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; 1306 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; 1307 card->options.fake_broadcast = 0; 1308 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1309 card->options.performance_stats = 0; 1310 card->options.rx_sg_cb = QETH_RX_SG_CB; 1311 card->options.isolation = ISOLATION_MODE_NONE; 1312 card->options.cq = QETH_CQ_DISABLED; 1313 } 1314 1315 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1316 { 1317 unsigned long flags; 1318 int rc = 0; 1319 1320 spin_lock_irqsave(&card->thread_mask_lock, flags); 1321 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1322 (u8) card->thread_start_mask, 1323 (u8) card->thread_allowed_mask, 1324 (u8) card->thread_running_mask); 1325 rc = (card->thread_start_mask & thread); 1326 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1327 return rc; 1328 } 1329 1330 static void qeth_start_kernel_thread(struct work_struct *work) 1331 { 1332 struct qeth_card *card = container_of(work, struct qeth_card, 1333 kernel_thread_starter); 1334 QETH_CARD_TEXT(card , 2, "strthrd"); 1335 1336 if (card->read.state != CH_STATE_UP && 1337 card->write.state != CH_STATE_UP) 1338 return; 1339 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) 1340 kthread_run(card->discipline.recover, (void *) card, 1341 "qeth_recover"); 1342 } 1343 1344 static int qeth_setup_card(struct qeth_card *card) 1345 { 1346 1347 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1348 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1349 1350 card->read.state = CH_STATE_DOWN; 1351 card->write.state = CH_STATE_DOWN; 1352 card->data.state = CH_STATE_DOWN; 1353 card->state = CARD_STATE_DOWN; 1354 card->lan_online = 0; 1355 card->read_or_write_problem = 0; 1356 card->dev = NULL; 1357 spin_lock_init(&card->vlanlock); 1358 spin_lock_init(&card->mclock); 1359 spin_lock_init(&card->lock); 1360 spin_lock_init(&card->ip_lock); 1361 spin_lock_init(&card->thread_mask_lock); 1362 mutex_init(&card->conf_mutex); 1363 mutex_init(&card->discipline_mutex); 1364 card->thread_start_mask = 0; 1365 card->thread_allowed_mask = 0; 1366 card->thread_running_mask = 0; 1367 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1368 INIT_LIST_HEAD(&card->ip_list); 1369 INIT_LIST_HEAD(card->ip_tbd_list); 1370 INIT_LIST_HEAD(&card->cmd_waiter_list); 1371 init_waitqueue_head(&card->wait_q); 1372 /* initial options */ 1373 qeth_set_intial_options(card); 1374 /* IP address takeover */ 1375 INIT_LIST_HEAD(&card->ipato.entries); 1376 card->ipato.enabled = 0; 1377 card->ipato.invert4 = 0; 1378 card->ipato.invert6 = 0; 1379 /* init QDIO stuff */ 1380 qeth_init_qdio_info(card); 1381 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1382 return 0; 1383 } 1384 1385 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1386 { 1387 struct qeth_card *card = container_of(slr, struct qeth_card, 1388 qeth_service_level); 1389 if (card->info.mcl_level[0]) 1390 seq_printf(m, "qeth: %s firmware level %s\n", 1391 CARD_BUS_ID(card), card->info.mcl_level); 1392 } 1393 1394 static struct qeth_card *qeth_alloc_card(void) 1395 { 1396 struct qeth_card *card; 1397 1398 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1399 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1400 if (!card) 1401 goto out; 1402 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1403 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1404 if (!card->ip_tbd_list) { 1405 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1406 goto out_card; 1407 } 1408 if (qeth_setup_channel(&card->read)) 1409 goto out_ip; 1410 if (qeth_setup_channel(&card->write)) 1411 goto out_channel; 1412 card->options.layer2 = -1; 1413 card->qeth_service_level.seq_print = qeth_core_sl_print; 1414 register_service_level(&card->qeth_service_level); 1415 return card; 1416 1417 out_channel: 1418 qeth_clean_channel(&card->read); 1419 out_ip: 1420 kfree(card->ip_tbd_list); 1421 out_card: 1422 kfree(card); 1423 out: 1424 return NULL; 1425 } 1426 1427 static int qeth_determine_card_type(struct qeth_card *card) 1428 { 1429 int i = 0; 1430 1431 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1432 1433 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1434 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1435 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1436 if ((CARD_RDEV(card)->id.dev_type == 1437 known_devices[i][QETH_DEV_TYPE_IND]) && 1438 (CARD_RDEV(card)->id.dev_model == 1439 known_devices[i][QETH_DEV_MODEL_IND])) { 1440 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1441 card->qdio.no_out_queues = 1442 known_devices[i][QETH_QUEUE_NO_IND]; 1443 card->qdio.no_in_queues = 1; 1444 card->info.is_multicast_different = 1445 known_devices[i][QETH_MULTICAST_IND]; 1446 qeth_get_channel_path_desc(card); 1447 return 0; 1448 } 1449 i++; 1450 } 1451 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1452 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1453 "unknown type\n"); 1454 return -ENOENT; 1455 } 1456 1457 static int qeth_clear_channel(struct qeth_channel *channel) 1458 { 1459 unsigned long flags; 1460 struct qeth_card *card; 1461 int rc; 1462 1463 card = CARD_FROM_CDEV(channel->ccwdev); 1464 QETH_CARD_TEXT(card, 3, "clearch"); 1465 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1466 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1467 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1468 1469 if (rc) 1470 return rc; 1471 rc = wait_event_interruptible_timeout(card->wait_q, 1472 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1473 if (rc == -ERESTARTSYS) 1474 return rc; 1475 if (channel->state != CH_STATE_STOPPED) 1476 return -ETIME; 1477 channel->state = CH_STATE_DOWN; 1478 return 0; 1479 } 1480 1481 static int qeth_halt_channel(struct qeth_channel *channel) 1482 { 1483 unsigned long flags; 1484 struct qeth_card *card; 1485 int rc; 1486 1487 card = CARD_FROM_CDEV(channel->ccwdev); 1488 QETH_CARD_TEXT(card, 3, "haltch"); 1489 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1490 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1491 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1492 1493 if (rc) 1494 return rc; 1495 rc = wait_event_interruptible_timeout(card->wait_q, 1496 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1497 if (rc == -ERESTARTSYS) 1498 return rc; 1499 if (channel->state != CH_STATE_HALTED) 1500 return -ETIME; 1501 return 0; 1502 } 1503 1504 static int qeth_halt_channels(struct qeth_card *card) 1505 { 1506 int rc1 = 0, rc2 = 0, rc3 = 0; 1507 1508 QETH_CARD_TEXT(card, 3, "haltchs"); 1509 rc1 = qeth_halt_channel(&card->read); 1510 rc2 = qeth_halt_channel(&card->write); 1511 rc3 = qeth_halt_channel(&card->data); 1512 if (rc1) 1513 return rc1; 1514 if (rc2) 1515 return rc2; 1516 return rc3; 1517 } 1518 1519 static int qeth_clear_channels(struct qeth_card *card) 1520 { 1521 int rc1 = 0, rc2 = 0, rc3 = 0; 1522 1523 QETH_CARD_TEXT(card, 3, "clearchs"); 1524 rc1 = qeth_clear_channel(&card->read); 1525 rc2 = qeth_clear_channel(&card->write); 1526 rc3 = qeth_clear_channel(&card->data); 1527 if (rc1) 1528 return rc1; 1529 if (rc2) 1530 return rc2; 1531 return rc3; 1532 } 1533 1534 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1535 { 1536 int rc = 0; 1537 1538 QETH_CARD_TEXT(card, 3, "clhacrd"); 1539 1540 if (halt) 1541 rc = qeth_halt_channels(card); 1542 if (rc) 1543 return rc; 1544 return qeth_clear_channels(card); 1545 } 1546 1547 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1548 { 1549 int rc = 0; 1550 1551 QETH_CARD_TEXT(card, 3, "qdioclr"); 1552 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1553 QETH_QDIO_CLEANING)) { 1554 case QETH_QDIO_ESTABLISHED: 1555 if (card->info.type == QETH_CARD_TYPE_IQD) 1556 rc = qdio_shutdown(CARD_DDEV(card), 1557 QDIO_FLAG_CLEANUP_USING_HALT); 1558 else 1559 rc = qdio_shutdown(CARD_DDEV(card), 1560 QDIO_FLAG_CLEANUP_USING_CLEAR); 1561 if (rc) 1562 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1563 qdio_free(CARD_DDEV(card)); 1564 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1565 break; 1566 case QETH_QDIO_CLEANING: 1567 return rc; 1568 default: 1569 break; 1570 } 1571 rc = qeth_clear_halt_card(card, use_halt); 1572 if (rc) 1573 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1574 card->state = CARD_STATE_DOWN; 1575 return rc; 1576 } 1577 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1578 1579 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1580 int *length) 1581 { 1582 struct ciw *ciw; 1583 char *rcd_buf; 1584 int ret; 1585 struct qeth_channel *channel = &card->data; 1586 unsigned long flags; 1587 1588 /* 1589 * scan for RCD command in extended SenseID data 1590 */ 1591 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1592 if (!ciw || ciw->cmd == 0) 1593 return -EOPNOTSUPP; 1594 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1595 if (!rcd_buf) 1596 return -ENOMEM; 1597 1598 channel->ccw.cmd_code = ciw->cmd; 1599 channel->ccw.cda = (__u32) __pa(rcd_buf); 1600 channel->ccw.count = ciw->count; 1601 channel->ccw.flags = CCW_FLAG_SLI; 1602 channel->state = CH_STATE_RCD; 1603 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1604 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1605 QETH_RCD_PARM, LPM_ANYPATH, 0, 1606 QETH_RCD_TIMEOUT); 1607 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1608 if (!ret) 1609 wait_event(card->wait_q, 1610 (channel->state == CH_STATE_RCD_DONE || 1611 channel->state == CH_STATE_DOWN)); 1612 if (channel->state == CH_STATE_DOWN) 1613 ret = -EIO; 1614 else 1615 channel->state = CH_STATE_DOWN; 1616 if (ret) { 1617 kfree(rcd_buf); 1618 *buffer = NULL; 1619 *length = 0; 1620 } else { 1621 *length = ciw->count; 1622 *buffer = rcd_buf; 1623 } 1624 return ret; 1625 } 1626 1627 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1628 { 1629 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1630 card->info.chpid = prcd[30]; 1631 card->info.unit_addr2 = prcd[31]; 1632 card->info.cula = prcd[63]; 1633 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1634 (prcd[0x11] == _ascebc['M'])); 1635 } 1636 1637 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1638 { 1639 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1640 1641 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) { 1642 card->info.blkt.time_total = 250; 1643 card->info.blkt.inter_packet = 5; 1644 card->info.blkt.inter_packet_jumbo = 15; 1645 } else { 1646 card->info.blkt.time_total = 0; 1647 card->info.blkt.inter_packet = 0; 1648 card->info.blkt.inter_packet_jumbo = 0; 1649 } 1650 } 1651 1652 static void qeth_init_tokens(struct qeth_card *card) 1653 { 1654 card->token.issuer_rm_w = 0x00010103UL; 1655 card->token.cm_filter_w = 0x00010108UL; 1656 card->token.cm_connection_w = 0x0001010aUL; 1657 card->token.ulp_filter_w = 0x0001010bUL; 1658 card->token.ulp_connection_w = 0x0001010dUL; 1659 } 1660 1661 static void qeth_init_func_level(struct qeth_card *card) 1662 { 1663 switch (card->info.type) { 1664 case QETH_CARD_TYPE_IQD: 1665 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1666 break; 1667 case QETH_CARD_TYPE_OSD: 1668 case QETH_CARD_TYPE_OSN: 1669 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1670 break; 1671 default: 1672 break; 1673 } 1674 } 1675 1676 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1677 void (*idx_reply_cb)(struct qeth_channel *, 1678 struct qeth_cmd_buffer *)) 1679 { 1680 struct qeth_cmd_buffer *iob; 1681 unsigned long flags; 1682 int rc; 1683 struct qeth_card *card; 1684 1685 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1686 card = CARD_FROM_CDEV(channel->ccwdev); 1687 iob = qeth_get_buffer(channel); 1688 iob->callback = idx_reply_cb; 1689 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1690 channel->ccw.count = QETH_BUFSIZE; 1691 channel->ccw.cda = (__u32) __pa(iob->data); 1692 1693 wait_event(card->wait_q, 1694 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1695 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1696 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1697 rc = ccw_device_start(channel->ccwdev, 1698 &channel->ccw, (addr_t) iob, 0, 0); 1699 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1700 1701 if (rc) { 1702 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1703 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1704 atomic_set(&channel->irq_pending, 0); 1705 wake_up(&card->wait_q); 1706 return rc; 1707 } 1708 rc = wait_event_interruptible_timeout(card->wait_q, 1709 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1710 if (rc == -ERESTARTSYS) 1711 return rc; 1712 if (channel->state != CH_STATE_UP) { 1713 rc = -ETIME; 1714 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1715 qeth_clear_cmd_buffers(channel); 1716 } else 1717 rc = 0; 1718 return rc; 1719 } 1720 1721 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1722 void (*idx_reply_cb)(struct qeth_channel *, 1723 struct qeth_cmd_buffer *)) 1724 { 1725 struct qeth_card *card; 1726 struct qeth_cmd_buffer *iob; 1727 unsigned long flags; 1728 __u16 temp; 1729 __u8 tmp; 1730 int rc; 1731 struct ccw_dev_id temp_devid; 1732 1733 card = CARD_FROM_CDEV(channel->ccwdev); 1734 1735 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1736 1737 iob = qeth_get_buffer(channel); 1738 iob->callback = idx_reply_cb; 1739 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1740 channel->ccw.count = IDX_ACTIVATE_SIZE; 1741 channel->ccw.cda = (__u32) __pa(iob->data); 1742 if (channel == &card->write) { 1743 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1744 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1745 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1746 card->seqno.trans_hdr++; 1747 } else { 1748 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1749 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1750 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1751 } 1752 tmp = ((__u8)card->info.portno) | 0x80; 1753 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1754 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1755 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1756 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1757 &card->info.func_level, sizeof(__u16)); 1758 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1759 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1760 temp = (card->info.cula << 8) + card->info.unit_addr2; 1761 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1762 1763 wait_event(card->wait_q, 1764 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1765 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1766 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1767 rc = ccw_device_start(channel->ccwdev, 1768 &channel->ccw, (addr_t) iob, 0, 0); 1769 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1770 1771 if (rc) { 1772 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1773 rc); 1774 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1775 atomic_set(&channel->irq_pending, 0); 1776 wake_up(&card->wait_q); 1777 return rc; 1778 } 1779 rc = wait_event_interruptible_timeout(card->wait_q, 1780 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1781 if (rc == -ERESTARTSYS) 1782 return rc; 1783 if (channel->state != CH_STATE_ACTIVATING) { 1784 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1785 " failed to recover an error on the device\n"); 1786 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1787 dev_name(&channel->ccwdev->dev)); 1788 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1789 qeth_clear_cmd_buffers(channel); 1790 return -ETIME; 1791 } 1792 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1793 } 1794 1795 static int qeth_peer_func_level(int level) 1796 { 1797 if ((level & 0xff) == 8) 1798 return (level & 0xff) + 0x400; 1799 if (((level >> 8) & 3) == 1) 1800 return (level & 0xff) + 0x200; 1801 return level; 1802 } 1803 1804 static void qeth_idx_write_cb(struct qeth_channel *channel, 1805 struct qeth_cmd_buffer *iob) 1806 { 1807 struct qeth_card *card; 1808 __u16 temp; 1809 1810 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1811 1812 if (channel->state == CH_STATE_DOWN) { 1813 channel->state = CH_STATE_ACTIVATING; 1814 goto out; 1815 } 1816 card = CARD_FROM_CDEV(channel->ccwdev); 1817 1818 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1819 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1820 dev_err(&card->write.ccwdev->dev, 1821 "The adapter is used exclusively by another " 1822 "host\n"); 1823 else 1824 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1825 " negative reply\n", 1826 dev_name(&card->write.ccwdev->dev)); 1827 goto out; 1828 } 1829 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1830 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1831 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1832 "function level mismatch (sent: 0x%x, received: " 1833 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1834 card->info.func_level, temp); 1835 goto out; 1836 } 1837 channel->state = CH_STATE_UP; 1838 out: 1839 qeth_release_buffer(channel, iob); 1840 } 1841 1842 static void qeth_idx_read_cb(struct qeth_channel *channel, 1843 struct qeth_cmd_buffer *iob) 1844 { 1845 struct qeth_card *card; 1846 __u16 temp; 1847 1848 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1849 if (channel->state == CH_STATE_DOWN) { 1850 channel->state = CH_STATE_ACTIVATING; 1851 goto out; 1852 } 1853 1854 card = CARD_FROM_CDEV(channel->ccwdev); 1855 if (qeth_check_idx_response(card, iob->data)) 1856 goto out; 1857 1858 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1859 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1860 case QETH_IDX_ACT_ERR_EXCL: 1861 dev_err(&card->write.ccwdev->dev, 1862 "The adapter is used exclusively by another " 1863 "host\n"); 1864 break; 1865 case QETH_IDX_ACT_ERR_AUTH: 1866 case QETH_IDX_ACT_ERR_AUTH_USER: 1867 dev_err(&card->read.ccwdev->dev, 1868 "Setting the device online failed because of " 1869 "insufficient authorization\n"); 1870 break; 1871 default: 1872 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1873 " negative reply\n", 1874 dev_name(&card->read.ccwdev->dev)); 1875 } 1876 QETH_CARD_TEXT_(card, 2, "idxread%c", 1877 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1878 goto out; 1879 } 1880 1881 /** 1882 * * temporary fix for microcode bug 1883 * * to revert it,replace OR by AND 1884 * */ 1885 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1886 (card->info.type == QETH_CARD_TYPE_OSD)) 1887 card->info.portname_required = 1; 1888 1889 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1890 if (temp != qeth_peer_func_level(card->info.func_level)) { 1891 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1892 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1893 dev_name(&card->read.ccwdev->dev), 1894 card->info.func_level, temp); 1895 goto out; 1896 } 1897 memcpy(&card->token.issuer_rm_r, 1898 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1899 QETH_MPC_TOKEN_LENGTH); 1900 memcpy(&card->info.mcl_level[0], 1901 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1902 channel->state = CH_STATE_UP; 1903 out: 1904 qeth_release_buffer(channel, iob); 1905 } 1906 1907 void qeth_prepare_control_data(struct qeth_card *card, int len, 1908 struct qeth_cmd_buffer *iob) 1909 { 1910 qeth_setup_ccw(&card->write, iob->data, len); 1911 iob->callback = qeth_release_buffer; 1912 1913 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1914 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1915 card->seqno.trans_hdr++; 1916 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1917 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1918 card->seqno.pdu_hdr++; 1919 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1920 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1921 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1922 } 1923 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1924 1925 int qeth_send_control_data(struct qeth_card *card, int len, 1926 struct qeth_cmd_buffer *iob, 1927 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1928 unsigned long), 1929 void *reply_param) 1930 { 1931 int rc; 1932 unsigned long flags; 1933 struct qeth_reply *reply = NULL; 1934 unsigned long timeout, event_timeout; 1935 struct qeth_ipa_cmd *cmd; 1936 1937 QETH_CARD_TEXT(card, 2, "sendctl"); 1938 1939 if (card->read_or_write_problem) { 1940 qeth_release_buffer(iob->channel, iob); 1941 return -EIO; 1942 } 1943 reply = qeth_alloc_reply(card); 1944 if (!reply) { 1945 return -ENOMEM; 1946 } 1947 reply->callback = reply_cb; 1948 reply->param = reply_param; 1949 if (card->state == CARD_STATE_DOWN) 1950 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1951 else 1952 reply->seqno = card->seqno.ipa++; 1953 init_waitqueue_head(&reply->wait_q); 1954 spin_lock_irqsave(&card->lock, flags); 1955 list_add_tail(&reply->list, &card->cmd_waiter_list); 1956 spin_unlock_irqrestore(&card->lock, flags); 1957 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1958 1959 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1960 qeth_prepare_control_data(card, len, iob); 1961 1962 if (IS_IPA(iob->data)) 1963 event_timeout = QETH_IPA_TIMEOUT; 1964 else 1965 event_timeout = QETH_TIMEOUT; 1966 timeout = jiffies + event_timeout; 1967 1968 QETH_CARD_TEXT(card, 6, "noirqpnd"); 1969 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 1970 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 1971 (addr_t) iob, 0, 0); 1972 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 1973 if (rc) { 1974 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 1975 "ccw_device_start rc = %i\n", 1976 dev_name(&card->write.ccwdev->dev), rc); 1977 QETH_CARD_TEXT_(card, 2, " err%d", rc); 1978 spin_lock_irqsave(&card->lock, flags); 1979 list_del_init(&reply->list); 1980 qeth_put_reply(reply); 1981 spin_unlock_irqrestore(&card->lock, flags); 1982 qeth_release_buffer(iob->channel, iob); 1983 atomic_set(&card->write.irq_pending, 0); 1984 wake_up(&card->wait_q); 1985 return rc; 1986 } 1987 1988 /* we have only one long running ipassist, since we can ensure 1989 process context of this command we can sleep */ 1990 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 1991 if ((cmd->hdr.command == IPA_CMD_SETIP) && 1992 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 1993 if (!wait_event_timeout(reply->wait_q, 1994 atomic_read(&reply->received), event_timeout)) 1995 goto time_err; 1996 } else { 1997 while (!atomic_read(&reply->received)) { 1998 if (time_after(jiffies, timeout)) 1999 goto time_err; 2000 cpu_relax(); 2001 }; 2002 } 2003 2004 if (reply->rc == -EIO) 2005 goto error; 2006 rc = reply->rc; 2007 qeth_put_reply(reply); 2008 return rc; 2009 2010 time_err: 2011 reply->rc = -ETIME; 2012 spin_lock_irqsave(&reply->card->lock, flags); 2013 list_del_init(&reply->list); 2014 spin_unlock_irqrestore(&reply->card->lock, flags); 2015 atomic_inc(&reply->received); 2016 error: 2017 atomic_set(&card->write.irq_pending, 0); 2018 qeth_release_buffer(iob->channel, iob); 2019 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2020 rc = reply->rc; 2021 qeth_put_reply(reply); 2022 return rc; 2023 } 2024 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2025 2026 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2027 unsigned long data) 2028 { 2029 struct qeth_cmd_buffer *iob; 2030 2031 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2032 2033 iob = (struct qeth_cmd_buffer *) data; 2034 memcpy(&card->token.cm_filter_r, 2035 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2036 QETH_MPC_TOKEN_LENGTH); 2037 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2038 return 0; 2039 } 2040 2041 static int qeth_cm_enable(struct qeth_card *card) 2042 { 2043 int rc; 2044 struct qeth_cmd_buffer *iob; 2045 2046 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2047 2048 iob = qeth_wait_for_buffer(&card->write); 2049 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2050 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2051 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2052 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2053 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2054 2055 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2056 qeth_cm_enable_cb, NULL); 2057 return rc; 2058 } 2059 2060 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2061 unsigned long data) 2062 { 2063 2064 struct qeth_cmd_buffer *iob; 2065 2066 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2067 2068 iob = (struct qeth_cmd_buffer *) data; 2069 memcpy(&card->token.cm_connection_r, 2070 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2071 QETH_MPC_TOKEN_LENGTH); 2072 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2073 return 0; 2074 } 2075 2076 static int qeth_cm_setup(struct qeth_card *card) 2077 { 2078 int rc; 2079 struct qeth_cmd_buffer *iob; 2080 2081 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2082 2083 iob = qeth_wait_for_buffer(&card->write); 2084 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2085 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2086 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2087 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2088 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2089 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2090 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2091 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2092 qeth_cm_setup_cb, NULL); 2093 return rc; 2094 2095 } 2096 2097 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2098 { 2099 switch (card->info.type) { 2100 case QETH_CARD_TYPE_UNKNOWN: 2101 return 1500; 2102 case QETH_CARD_TYPE_IQD: 2103 return card->info.max_mtu; 2104 case QETH_CARD_TYPE_OSD: 2105 switch (card->info.link_type) { 2106 case QETH_LINK_TYPE_HSTR: 2107 case QETH_LINK_TYPE_LANE_TR: 2108 return 2000; 2109 default: 2110 return 1492; 2111 } 2112 case QETH_CARD_TYPE_OSM: 2113 case QETH_CARD_TYPE_OSX: 2114 return 1492; 2115 default: 2116 return 1500; 2117 } 2118 } 2119 2120 static inline int qeth_get_mtu_outof_framesize(int framesize) 2121 { 2122 switch (framesize) { 2123 case 0x4000: 2124 return 8192; 2125 case 0x6000: 2126 return 16384; 2127 case 0xa000: 2128 return 32768; 2129 case 0xffff: 2130 return 57344; 2131 default: 2132 return 0; 2133 } 2134 } 2135 2136 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2137 { 2138 switch (card->info.type) { 2139 case QETH_CARD_TYPE_OSD: 2140 case QETH_CARD_TYPE_OSM: 2141 case QETH_CARD_TYPE_OSX: 2142 case QETH_CARD_TYPE_IQD: 2143 return ((mtu >= 576) && 2144 (mtu <= card->info.max_mtu)); 2145 case QETH_CARD_TYPE_OSN: 2146 case QETH_CARD_TYPE_UNKNOWN: 2147 default: 2148 return 1; 2149 } 2150 } 2151 2152 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2153 unsigned long data) 2154 { 2155 2156 __u16 mtu, framesize; 2157 __u16 len; 2158 __u8 link_type; 2159 struct qeth_cmd_buffer *iob; 2160 2161 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2162 2163 iob = (struct qeth_cmd_buffer *) data; 2164 memcpy(&card->token.ulp_filter_r, 2165 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2166 QETH_MPC_TOKEN_LENGTH); 2167 if (card->info.type == QETH_CARD_TYPE_IQD) { 2168 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2169 mtu = qeth_get_mtu_outof_framesize(framesize); 2170 if (!mtu) { 2171 iob->rc = -EINVAL; 2172 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2173 return 0; 2174 } 2175 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2176 /* frame size has changed */ 2177 if (card->dev && 2178 ((card->dev->mtu == card->info.initial_mtu) || 2179 (card->dev->mtu > mtu))) 2180 card->dev->mtu = mtu; 2181 qeth_free_qdio_buffers(card); 2182 } 2183 card->info.initial_mtu = mtu; 2184 card->info.max_mtu = mtu; 2185 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2186 } else { 2187 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 2188 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2189 iob->data); 2190 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2191 } 2192 2193 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2194 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2195 memcpy(&link_type, 2196 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2197 card->info.link_type = link_type; 2198 } else 2199 card->info.link_type = 0; 2200 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2201 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2202 return 0; 2203 } 2204 2205 static int qeth_ulp_enable(struct qeth_card *card) 2206 { 2207 int rc; 2208 char prot_type; 2209 struct qeth_cmd_buffer *iob; 2210 2211 /*FIXME: trace view callbacks*/ 2212 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2213 2214 iob = qeth_wait_for_buffer(&card->write); 2215 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2216 2217 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2218 (__u8) card->info.portno; 2219 if (card->options.layer2) 2220 if (card->info.type == QETH_CARD_TYPE_OSN) 2221 prot_type = QETH_PROT_OSN2; 2222 else 2223 prot_type = QETH_PROT_LAYER2; 2224 else 2225 prot_type = QETH_PROT_TCPIP; 2226 2227 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2228 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2229 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2230 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2231 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2232 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2233 card->info.portname, 9); 2234 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2235 qeth_ulp_enable_cb, NULL); 2236 return rc; 2237 2238 } 2239 2240 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2241 unsigned long data) 2242 { 2243 struct qeth_cmd_buffer *iob; 2244 int rc = 0; 2245 2246 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2247 2248 iob = (struct qeth_cmd_buffer *) data; 2249 memcpy(&card->token.ulp_connection_r, 2250 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2251 QETH_MPC_TOKEN_LENGTH); 2252 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2253 3)) { 2254 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2255 dev_err(&card->gdev->dev, "A connection could not be " 2256 "established because of an OLM limit\n"); 2257 iob->rc = -EMLINK; 2258 } 2259 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2260 return rc; 2261 } 2262 2263 static int qeth_ulp_setup(struct qeth_card *card) 2264 { 2265 int rc; 2266 __u16 temp; 2267 struct qeth_cmd_buffer *iob; 2268 struct ccw_dev_id dev_id; 2269 2270 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2271 2272 iob = qeth_wait_for_buffer(&card->write); 2273 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2274 2275 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2276 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2277 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2278 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2279 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2280 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2281 2282 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2283 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2284 temp = (card->info.cula << 8) + card->info.unit_addr2; 2285 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2286 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2287 qeth_ulp_setup_cb, NULL); 2288 return rc; 2289 } 2290 2291 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2292 { 2293 int rc; 2294 struct qeth_qdio_out_buffer *newbuf; 2295 2296 rc = 0; 2297 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2298 if (!newbuf) { 2299 rc = -ENOMEM; 2300 goto out; 2301 } 2302 newbuf->buffer = &q->qdio_bufs[bidx]; 2303 skb_queue_head_init(&newbuf->skb_list); 2304 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2305 newbuf->q = q; 2306 newbuf->aob = NULL; 2307 newbuf->next_pending = q->bufs[bidx]; 2308 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2309 q->bufs[bidx] = newbuf; 2310 if (q->bufstates) { 2311 q->bufstates[bidx].user = newbuf; 2312 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2313 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2314 QETH_CARD_TEXT_(q->card, 2, "%lx", 2315 (long) newbuf->next_pending); 2316 } 2317 out: 2318 return rc; 2319 } 2320 2321 2322 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2323 { 2324 int i, j; 2325 2326 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2327 2328 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2329 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2330 return 0; 2331 2332 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q), 2333 GFP_KERNEL); 2334 if (!card->qdio.in_q) 2335 goto out_nomem; 2336 QETH_DBF_TEXT(SETUP, 2, "inq"); 2337 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2338 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2339 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2340 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 2341 card->qdio.in_q->bufs[i].buffer = 2342 &card->qdio.in_q->qdio_bufs[i]; 2343 card->qdio.in_q->bufs[i].rx_skb = NULL; 2344 } 2345 /* inbound buffer pool */ 2346 if (qeth_alloc_buffer_pool(card)) 2347 goto out_freeinq; 2348 2349 /* outbound */ 2350 card->qdio.out_qs = 2351 kzalloc(card->qdio.no_out_queues * 2352 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2353 if (!card->qdio.out_qs) 2354 goto out_freepool; 2355 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2356 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q), 2357 GFP_KERNEL); 2358 if (!card->qdio.out_qs[i]) 2359 goto out_freeoutq; 2360 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2361 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2362 card->qdio.out_qs[i]->queue_no = i; 2363 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2364 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2365 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2366 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2367 goto out_freeoutqbufs; 2368 } 2369 } 2370 2371 /* completion */ 2372 if (qeth_alloc_cq(card)) 2373 goto out_freeoutq; 2374 2375 return 0; 2376 2377 out_freeoutqbufs: 2378 while (j > 0) { 2379 --j; 2380 kmem_cache_free(qeth_qdio_outbuf_cache, 2381 card->qdio.out_qs[i]->bufs[j]); 2382 card->qdio.out_qs[i]->bufs[j] = NULL; 2383 } 2384 out_freeoutq: 2385 while (i > 0) { 2386 kfree(card->qdio.out_qs[--i]); 2387 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2388 } 2389 kfree(card->qdio.out_qs); 2390 card->qdio.out_qs = NULL; 2391 out_freepool: 2392 qeth_free_buffer_pool(card); 2393 out_freeinq: 2394 kfree(card->qdio.in_q); 2395 card->qdio.in_q = NULL; 2396 out_nomem: 2397 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2398 return -ENOMEM; 2399 } 2400 2401 static void qeth_create_qib_param_field(struct qeth_card *card, 2402 char *param_field) 2403 { 2404 2405 param_field[0] = _ascebc['P']; 2406 param_field[1] = _ascebc['C']; 2407 param_field[2] = _ascebc['I']; 2408 param_field[3] = _ascebc['T']; 2409 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2410 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2411 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2412 } 2413 2414 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2415 char *param_field) 2416 { 2417 param_field[16] = _ascebc['B']; 2418 param_field[17] = _ascebc['L']; 2419 param_field[18] = _ascebc['K']; 2420 param_field[19] = _ascebc['T']; 2421 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2422 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2423 *((unsigned int *) (¶m_field[28])) = 2424 card->info.blkt.inter_packet_jumbo; 2425 } 2426 2427 static int qeth_qdio_activate(struct qeth_card *card) 2428 { 2429 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2430 return qdio_activate(CARD_DDEV(card)); 2431 } 2432 2433 static int qeth_dm_act(struct qeth_card *card) 2434 { 2435 int rc; 2436 struct qeth_cmd_buffer *iob; 2437 2438 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2439 2440 iob = qeth_wait_for_buffer(&card->write); 2441 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2442 2443 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2444 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2445 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2446 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2447 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2448 return rc; 2449 } 2450 2451 static int qeth_mpc_initialize(struct qeth_card *card) 2452 { 2453 int rc; 2454 2455 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2456 2457 rc = qeth_issue_next_read(card); 2458 if (rc) { 2459 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2460 return rc; 2461 } 2462 rc = qeth_cm_enable(card); 2463 if (rc) { 2464 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2465 goto out_qdio; 2466 } 2467 rc = qeth_cm_setup(card); 2468 if (rc) { 2469 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2470 goto out_qdio; 2471 } 2472 rc = qeth_ulp_enable(card); 2473 if (rc) { 2474 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2475 goto out_qdio; 2476 } 2477 rc = qeth_ulp_setup(card); 2478 if (rc) { 2479 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2480 goto out_qdio; 2481 } 2482 rc = qeth_alloc_qdio_buffers(card); 2483 if (rc) { 2484 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2485 goto out_qdio; 2486 } 2487 rc = qeth_qdio_establish(card); 2488 if (rc) { 2489 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2490 qeth_free_qdio_buffers(card); 2491 goto out_qdio; 2492 } 2493 rc = qeth_qdio_activate(card); 2494 if (rc) { 2495 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2496 goto out_qdio; 2497 } 2498 rc = qeth_dm_act(card); 2499 if (rc) { 2500 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2501 goto out_qdio; 2502 } 2503 2504 return 0; 2505 out_qdio: 2506 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2507 return rc; 2508 } 2509 2510 static void qeth_print_status_with_portname(struct qeth_card *card) 2511 { 2512 char dbf_text[15]; 2513 int i; 2514 2515 sprintf(dbf_text, "%s", card->info.portname + 1); 2516 for (i = 0; i < 8; i++) 2517 dbf_text[i] = 2518 (char) _ebcasc[(__u8) dbf_text[i]]; 2519 dbf_text[8] = 0; 2520 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2521 "with link type %s (portname: %s)\n", 2522 qeth_get_cardname(card), 2523 (card->info.mcl_level[0]) ? " (level: " : "", 2524 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2525 (card->info.mcl_level[0]) ? ")" : "", 2526 qeth_get_cardname_short(card), 2527 dbf_text); 2528 2529 } 2530 2531 static void qeth_print_status_no_portname(struct qeth_card *card) 2532 { 2533 if (card->info.portname[0]) 2534 dev_info(&card->gdev->dev, "Device is a%s " 2535 "card%s%s%s\nwith link type %s " 2536 "(no portname needed by interface).\n", 2537 qeth_get_cardname(card), 2538 (card->info.mcl_level[0]) ? " (level: " : "", 2539 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2540 (card->info.mcl_level[0]) ? ")" : "", 2541 qeth_get_cardname_short(card)); 2542 else 2543 dev_info(&card->gdev->dev, "Device is a%s " 2544 "card%s%s%s\nwith link type %s.\n", 2545 qeth_get_cardname(card), 2546 (card->info.mcl_level[0]) ? " (level: " : "", 2547 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2548 (card->info.mcl_level[0]) ? ")" : "", 2549 qeth_get_cardname_short(card)); 2550 } 2551 2552 void qeth_print_status_message(struct qeth_card *card) 2553 { 2554 switch (card->info.type) { 2555 case QETH_CARD_TYPE_OSD: 2556 case QETH_CARD_TYPE_OSM: 2557 case QETH_CARD_TYPE_OSX: 2558 /* VM will use a non-zero first character 2559 * to indicate a HiperSockets like reporting 2560 * of the level OSA sets the first character to zero 2561 * */ 2562 if (!card->info.mcl_level[0]) { 2563 sprintf(card->info.mcl_level, "%02x%02x", 2564 card->info.mcl_level[2], 2565 card->info.mcl_level[3]); 2566 2567 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2568 break; 2569 } 2570 /* fallthrough */ 2571 case QETH_CARD_TYPE_IQD: 2572 if ((card->info.guestlan) || 2573 (card->info.mcl_level[0] & 0x80)) { 2574 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2575 card->info.mcl_level[0]]; 2576 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2577 card->info.mcl_level[1]]; 2578 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2579 card->info.mcl_level[2]]; 2580 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2581 card->info.mcl_level[3]]; 2582 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2583 } 2584 break; 2585 default: 2586 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2587 } 2588 if (card->info.portname_required) 2589 qeth_print_status_with_portname(card); 2590 else 2591 qeth_print_status_no_portname(card); 2592 } 2593 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2594 2595 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2596 { 2597 struct qeth_buffer_pool_entry *entry; 2598 2599 QETH_CARD_TEXT(card, 5, "inwrklst"); 2600 2601 list_for_each_entry(entry, 2602 &card->qdio.init_pool.entry_list, init_list) { 2603 qeth_put_buffer_pool_entry(card, entry); 2604 } 2605 } 2606 2607 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2608 struct qeth_card *card) 2609 { 2610 struct list_head *plh; 2611 struct qeth_buffer_pool_entry *entry; 2612 int i, free; 2613 struct page *page; 2614 2615 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2616 return NULL; 2617 2618 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2619 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2620 free = 1; 2621 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2622 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2623 free = 0; 2624 break; 2625 } 2626 } 2627 if (free) { 2628 list_del_init(&entry->list); 2629 return entry; 2630 } 2631 } 2632 2633 /* no free buffer in pool so take first one and swap pages */ 2634 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2635 struct qeth_buffer_pool_entry, list); 2636 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2637 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2638 page = alloc_page(GFP_ATOMIC); 2639 if (!page) { 2640 return NULL; 2641 } else { 2642 free_page((unsigned long)entry->elements[i]); 2643 entry->elements[i] = page_address(page); 2644 if (card->options.performance_stats) 2645 card->perf_stats.sg_alloc_page_rx++; 2646 } 2647 } 2648 } 2649 list_del_init(&entry->list); 2650 return entry; 2651 } 2652 2653 static int qeth_init_input_buffer(struct qeth_card *card, 2654 struct qeth_qdio_buffer *buf) 2655 { 2656 struct qeth_buffer_pool_entry *pool_entry; 2657 int i; 2658 2659 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2660 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2661 if (!buf->rx_skb) 2662 return 1; 2663 } 2664 2665 pool_entry = qeth_find_free_buffer_pool_entry(card); 2666 if (!pool_entry) 2667 return 1; 2668 2669 /* 2670 * since the buffer is accessed only from the input_tasklet 2671 * there shouldn't be a need to synchronize; also, since we use 2672 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2673 * buffers 2674 */ 2675 2676 buf->pool_entry = pool_entry; 2677 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2678 buf->buffer->element[i].length = PAGE_SIZE; 2679 buf->buffer->element[i].addr = pool_entry->elements[i]; 2680 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2681 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2682 else 2683 buf->buffer->element[i].eflags = 0; 2684 buf->buffer->element[i].sflags = 0; 2685 } 2686 return 0; 2687 } 2688 2689 int qeth_init_qdio_queues(struct qeth_card *card) 2690 { 2691 int i, j; 2692 int rc; 2693 2694 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2695 2696 /* inbound queue */ 2697 memset(card->qdio.in_q->qdio_bufs, 0, 2698 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2699 qeth_initialize_working_pool_list(card); 2700 /*give only as many buffers to hardware as we have buffer pool entries*/ 2701 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2702 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2703 card->qdio.in_q->next_buf_to_init = 2704 card->qdio.in_buf_pool.buf_count - 1; 2705 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2706 card->qdio.in_buf_pool.buf_count - 1); 2707 if (rc) { 2708 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2709 return rc; 2710 } 2711 2712 /* completion */ 2713 rc = qeth_cq_init(card); 2714 if (rc) { 2715 return rc; 2716 } 2717 2718 /* outbound queue */ 2719 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2720 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2721 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2722 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2723 qeth_clear_output_buffer(card->qdio.out_qs[i], 2724 card->qdio.out_qs[i]->bufs[j], 2725 QETH_QDIO_BUF_EMPTY); 2726 } 2727 card->qdio.out_qs[i]->card = card; 2728 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2729 card->qdio.out_qs[i]->do_pack = 0; 2730 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2731 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2732 atomic_set(&card->qdio.out_qs[i]->state, 2733 QETH_OUT_Q_UNLOCKED); 2734 } 2735 return 0; 2736 } 2737 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2738 2739 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2740 { 2741 switch (link_type) { 2742 case QETH_LINK_TYPE_HSTR: 2743 return 2; 2744 default: 2745 return 1; 2746 } 2747 } 2748 2749 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2750 struct qeth_ipa_cmd *cmd, __u8 command, 2751 enum qeth_prot_versions prot) 2752 { 2753 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2754 cmd->hdr.command = command; 2755 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2756 cmd->hdr.seqno = card->seqno.ipa; 2757 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2758 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2759 if (card->options.layer2) 2760 cmd->hdr.prim_version_no = 2; 2761 else 2762 cmd->hdr.prim_version_no = 1; 2763 cmd->hdr.param_count = 1; 2764 cmd->hdr.prot_version = prot; 2765 cmd->hdr.ipa_supported = 0; 2766 cmd->hdr.ipa_enabled = 0; 2767 } 2768 2769 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2770 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2771 { 2772 struct qeth_cmd_buffer *iob; 2773 struct qeth_ipa_cmd *cmd; 2774 2775 iob = qeth_wait_for_buffer(&card->write); 2776 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2777 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2778 2779 return iob; 2780 } 2781 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2782 2783 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2784 char prot_type) 2785 { 2786 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2787 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2788 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2789 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2790 } 2791 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2792 2793 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2794 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2795 unsigned long), 2796 void *reply_param) 2797 { 2798 int rc; 2799 char prot_type; 2800 2801 QETH_CARD_TEXT(card, 4, "sendipa"); 2802 2803 if (card->options.layer2) 2804 if (card->info.type == QETH_CARD_TYPE_OSN) 2805 prot_type = QETH_PROT_OSN2; 2806 else 2807 prot_type = QETH_PROT_LAYER2; 2808 else 2809 prot_type = QETH_PROT_TCPIP; 2810 qeth_prepare_ipa_cmd(card, iob, prot_type); 2811 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2812 iob, reply_cb, reply_param); 2813 if (rc == -ETIME) { 2814 qeth_clear_ipacmd_list(card); 2815 qeth_schedule_recovery(card); 2816 } 2817 return rc; 2818 } 2819 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2820 2821 int qeth_send_startlan(struct qeth_card *card) 2822 { 2823 int rc; 2824 struct qeth_cmd_buffer *iob; 2825 2826 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2827 2828 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2829 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2830 return rc; 2831 } 2832 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2833 2834 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2835 struct qeth_reply *reply, unsigned long data) 2836 { 2837 struct qeth_ipa_cmd *cmd; 2838 2839 QETH_CARD_TEXT(card, 4, "defadpcb"); 2840 2841 cmd = (struct qeth_ipa_cmd *) data; 2842 if (cmd->hdr.return_code == 0) 2843 cmd->hdr.return_code = 2844 cmd->data.setadapterparms.hdr.return_code; 2845 return 0; 2846 } 2847 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2848 2849 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2850 struct qeth_reply *reply, unsigned long data) 2851 { 2852 struct qeth_ipa_cmd *cmd; 2853 2854 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2855 2856 cmd = (struct qeth_ipa_cmd *) data; 2857 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2858 card->info.link_type = 2859 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2860 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2861 } 2862 card->options.adp.supported_funcs = 2863 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2864 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2865 } 2866 2867 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2868 __u32 command, __u32 cmdlen) 2869 { 2870 struct qeth_cmd_buffer *iob; 2871 struct qeth_ipa_cmd *cmd; 2872 2873 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2874 QETH_PROT_IPV4); 2875 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2876 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2877 cmd->data.setadapterparms.hdr.command_code = command; 2878 cmd->data.setadapterparms.hdr.used_total = 1; 2879 cmd->data.setadapterparms.hdr.seq_no = 1; 2880 2881 return iob; 2882 } 2883 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2884 2885 int qeth_query_setadapterparms(struct qeth_card *card) 2886 { 2887 int rc; 2888 struct qeth_cmd_buffer *iob; 2889 2890 QETH_CARD_TEXT(card, 3, "queryadp"); 2891 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2892 sizeof(struct qeth_ipacmd_setadpparms)); 2893 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2894 return rc; 2895 } 2896 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2897 2898 static int qeth_query_ipassists_cb(struct qeth_card *card, 2899 struct qeth_reply *reply, unsigned long data) 2900 { 2901 struct qeth_ipa_cmd *cmd; 2902 2903 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 2904 2905 cmd = (struct qeth_ipa_cmd *) data; 2906 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 2907 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 2908 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 2909 } else { 2910 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 2911 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 2912 } 2913 QETH_DBF_TEXT(SETUP, 2, "suppenbl"); 2914 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported); 2915 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled); 2916 return 0; 2917 } 2918 2919 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 2920 { 2921 int rc; 2922 struct qeth_cmd_buffer *iob; 2923 2924 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 2925 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 2926 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 2927 return rc; 2928 } 2929 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 2930 2931 static int qeth_query_setdiagass_cb(struct qeth_card *card, 2932 struct qeth_reply *reply, unsigned long data) 2933 { 2934 struct qeth_ipa_cmd *cmd; 2935 __u16 rc; 2936 2937 cmd = (struct qeth_ipa_cmd *)data; 2938 rc = cmd->hdr.return_code; 2939 if (rc) 2940 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 2941 else 2942 card->info.diagass_support = cmd->data.diagass.ext; 2943 return 0; 2944 } 2945 2946 static int qeth_query_setdiagass(struct qeth_card *card) 2947 { 2948 struct qeth_cmd_buffer *iob; 2949 struct qeth_ipa_cmd *cmd; 2950 2951 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 2952 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 2953 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2954 cmd->data.diagass.subcmd_len = 16; 2955 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 2956 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 2957 } 2958 2959 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 2960 { 2961 unsigned long info = get_zeroed_page(GFP_KERNEL); 2962 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 2963 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 2964 struct ccw_dev_id ccwid; 2965 int level, rc; 2966 2967 tid->chpid = card->info.chpid; 2968 ccw_device_get_id(CARD_RDEV(card), &ccwid); 2969 tid->ssid = ccwid.ssid; 2970 tid->devno = ccwid.devno; 2971 if (!info) 2972 return; 2973 2974 rc = stsi(NULL, 0, 0, 0); 2975 if (rc == -ENOSYS) 2976 level = rc; 2977 else 2978 level = (((unsigned int) rc) >> 28); 2979 2980 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS)) 2981 tid->lparnr = info222->lpar_number; 2982 2983 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) { 2984 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 2985 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 2986 } 2987 free_page(info); 2988 return; 2989 } 2990 2991 static int qeth_hw_trap_cb(struct qeth_card *card, 2992 struct qeth_reply *reply, unsigned long data) 2993 { 2994 struct qeth_ipa_cmd *cmd; 2995 __u16 rc; 2996 2997 cmd = (struct qeth_ipa_cmd *)data; 2998 rc = cmd->hdr.return_code; 2999 if (rc) 3000 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3001 return 0; 3002 } 3003 3004 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3005 { 3006 struct qeth_cmd_buffer *iob; 3007 struct qeth_ipa_cmd *cmd; 3008 3009 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3010 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3011 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3012 cmd->data.diagass.subcmd_len = 80; 3013 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3014 cmd->data.diagass.type = 1; 3015 cmd->data.diagass.action = action; 3016 switch (action) { 3017 case QETH_DIAGS_TRAP_ARM: 3018 cmd->data.diagass.options = 0x0003; 3019 cmd->data.diagass.ext = 0x00010000 + 3020 sizeof(struct qeth_trap_id); 3021 qeth_get_trap_id(card, 3022 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3023 break; 3024 case QETH_DIAGS_TRAP_DISARM: 3025 cmd->data.diagass.options = 0x0001; 3026 break; 3027 case QETH_DIAGS_TRAP_CAPTURE: 3028 break; 3029 } 3030 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3031 } 3032 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3033 3034 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3035 unsigned int qdio_error, const char *dbftext) 3036 { 3037 if (qdio_error) { 3038 QETH_CARD_TEXT(card, 2, dbftext); 3039 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3040 buf->element[15].sflags); 3041 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3042 buf->element[14].sflags); 3043 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3044 if ((buf->element[15].sflags) == 0x12) { 3045 card->stats.rx_dropped++; 3046 return 0; 3047 } else 3048 return 1; 3049 } 3050 return 0; 3051 } 3052 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3053 3054 void qeth_buffer_reclaim_work(struct work_struct *work) 3055 { 3056 struct qeth_card *card = container_of(work, struct qeth_card, 3057 buffer_reclaim_work.work); 3058 3059 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3060 qeth_queue_input_buffer(card, card->reclaim_index); 3061 } 3062 3063 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3064 { 3065 struct qeth_qdio_q *queue = card->qdio.in_q; 3066 struct list_head *lh; 3067 int count; 3068 int i; 3069 int rc; 3070 int newcount = 0; 3071 3072 count = (index < queue->next_buf_to_init)? 3073 card->qdio.in_buf_pool.buf_count - 3074 (queue->next_buf_to_init - index) : 3075 card->qdio.in_buf_pool.buf_count - 3076 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3077 /* only requeue at a certain threshold to avoid SIGAs */ 3078 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3079 for (i = queue->next_buf_to_init; 3080 i < queue->next_buf_to_init + count; ++i) { 3081 if (qeth_init_input_buffer(card, 3082 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3083 break; 3084 } else { 3085 newcount++; 3086 } 3087 } 3088 3089 if (newcount < count) { 3090 /* we are in memory shortage so we switch back to 3091 traditional skb allocation and drop packages */ 3092 atomic_set(&card->force_alloc_skb, 3); 3093 count = newcount; 3094 } else { 3095 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3096 } 3097 3098 if (!count) { 3099 i = 0; 3100 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3101 i++; 3102 if (i == card->qdio.in_buf_pool.buf_count) { 3103 QETH_CARD_TEXT(card, 2, "qsarbw"); 3104 card->reclaim_index = index; 3105 schedule_delayed_work( 3106 &card->buffer_reclaim_work, 3107 QETH_RECLAIM_WORK_TIME); 3108 } 3109 return; 3110 } 3111 3112 /* 3113 * according to old code it should be avoided to requeue all 3114 * 128 buffers in order to benefit from PCI avoidance. 3115 * this function keeps at least one buffer (the buffer at 3116 * 'index') un-requeued -> this buffer is the first buffer that 3117 * will be requeued the next time 3118 */ 3119 if (card->options.performance_stats) { 3120 card->perf_stats.inbound_do_qdio_cnt++; 3121 card->perf_stats.inbound_do_qdio_start_time = 3122 qeth_get_micros(); 3123 } 3124 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3125 queue->next_buf_to_init, count); 3126 if (card->options.performance_stats) 3127 card->perf_stats.inbound_do_qdio_time += 3128 qeth_get_micros() - 3129 card->perf_stats.inbound_do_qdio_start_time; 3130 if (rc) { 3131 QETH_CARD_TEXT(card, 2, "qinberr"); 3132 } 3133 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3134 QDIO_MAX_BUFFERS_PER_Q; 3135 } 3136 } 3137 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3138 3139 static int qeth_handle_send_error(struct qeth_card *card, 3140 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3141 { 3142 int sbalf15 = buffer->buffer->element[15].sflags; 3143 3144 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3145 if (card->info.type == QETH_CARD_TYPE_IQD) { 3146 if (sbalf15 == 0) { 3147 qdio_err = 0; 3148 } else { 3149 qdio_err = 1; 3150 } 3151 } 3152 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3153 3154 if (!qdio_err) 3155 return QETH_SEND_ERROR_NONE; 3156 3157 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3158 return QETH_SEND_ERROR_RETRY; 3159 3160 QETH_CARD_TEXT(card, 1, "lnkfail"); 3161 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3162 (u16)qdio_err, (u8)sbalf15); 3163 return QETH_SEND_ERROR_LINK_FAILURE; 3164 } 3165 3166 /* 3167 * Switched to packing state if the number of used buffers on a queue 3168 * reaches a certain limit. 3169 */ 3170 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3171 { 3172 if (!queue->do_pack) { 3173 if (atomic_read(&queue->used_buffers) 3174 >= QETH_HIGH_WATERMARK_PACK){ 3175 /* switch non-PACKING -> PACKING */ 3176 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3177 if (queue->card->options.performance_stats) 3178 queue->card->perf_stats.sc_dp_p++; 3179 queue->do_pack = 1; 3180 } 3181 } 3182 } 3183 3184 /* 3185 * Switches from packing to non-packing mode. If there is a packing 3186 * buffer on the queue this buffer will be prepared to be flushed. 3187 * In that case 1 is returned to inform the caller. If no buffer 3188 * has to be flushed, zero is returned. 3189 */ 3190 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3191 { 3192 struct qeth_qdio_out_buffer *buffer; 3193 int flush_count = 0; 3194 3195 if (queue->do_pack) { 3196 if (atomic_read(&queue->used_buffers) 3197 <= QETH_LOW_WATERMARK_PACK) { 3198 /* switch PACKING -> non-PACKING */ 3199 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3200 if (queue->card->options.performance_stats) 3201 queue->card->perf_stats.sc_p_dp++; 3202 queue->do_pack = 0; 3203 /* flush packing buffers */ 3204 buffer = queue->bufs[queue->next_buf_to_fill]; 3205 if ((atomic_read(&buffer->state) == 3206 QETH_QDIO_BUF_EMPTY) && 3207 (buffer->next_element_to_fill > 0)) { 3208 atomic_set(&buffer->state, 3209 QETH_QDIO_BUF_PRIMED); 3210 flush_count++; 3211 queue->next_buf_to_fill = 3212 (queue->next_buf_to_fill + 1) % 3213 QDIO_MAX_BUFFERS_PER_Q; 3214 } 3215 } 3216 } 3217 return flush_count; 3218 } 3219 3220 3221 /* 3222 * Called to flush a packing buffer if no more pci flags are on the queue. 3223 * Checks if there is a packing buffer and prepares it to be flushed. 3224 * In that case returns 1, otherwise zero. 3225 */ 3226 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3227 { 3228 struct qeth_qdio_out_buffer *buffer; 3229 3230 buffer = queue->bufs[queue->next_buf_to_fill]; 3231 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3232 (buffer->next_element_to_fill > 0)) { 3233 /* it's a packing buffer */ 3234 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3235 queue->next_buf_to_fill = 3236 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3237 return 1; 3238 } 3239 return 0; 3240 } 3241 3242 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3243 int count) 3244 { 3245 struct qeth_qdio_out_buffer *buf; 3246 int rc; 3247 int i; 3248 unsigned int qdio_flags; 3249 3250 for (i = index; i < index + count; ++i) { 3251 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3252 buf = queue->bufs[bidx]; 3253 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3254 SBAL_EFLAGS_LAST_ENTRY; 3255 3256 if (queue->bufstates) 3257 queue->bufstates[bidx].user = buf; 3258 3259 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3260 continue; 3261 3262 if (!queue->do_pack) { 3263 if ((atomic_read(&queue->used_buffers) >= 3264 (QETH_HIGH_WATERMARK_PACK - 3265 QETH_WATERMARK_PACK_FUZZ)) && 3266 !atomic_read(&queue->set_pci_flags_count)) { 3267 /* it's likely that we'll go to packing 3268 * mode soon */ 3269 atomic_inc(&queue->set_pci_flags_count); 3270 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3271 } 3272 } else { 3273 if (!atomic_read(&queue->set_pci_flags_count)) { 3274 /* 3275 * there's no outstanding PCI any more, so we 3276 * have to request a PCI to be sure the the PCI 3277 * will wake at some time in the future then we 3278 * can flush packed buffers that might still be 3279 * hanging around, which can happen if no 3280 * further send was requested by the stack 3281 */ 3282 atomic_inc(&queue->set_pci_flags_count); 3283 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3284 } 3285 } 3286 } 3287 3288 queue->card->dev->trans_start = jiffies; 3289 if (queue->card->options.performance_stats) { 3290 queue->card->perf_stats.outbound_do_qdio_cnt++; 3291 queue->card->perf_stats.outbound_do_qdio_start_time = 3292 qeth_get_micros(); 3293 } 3294 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3295 if (atomic_read(&queue->set_pci_flags_count)) 3296 qdio_flags |= QDIO_FLAG_PCI_OUT; 3297 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3298 queue->queue_no, index, count); 3299 if (queue->card->options.performance_stats) 3300 queue->card->perf_stats.outbound_do_qdio_time += 3301 qeth_get_micros() - 3302 queue->card->perf_stats.outbound_do_qdio_start_time; 3303 atomic_add(count, &queue->used_buffers); 3304 if (rc) { 3305 queue->card->stats.tx_errors += count; 3306 /* ignore temporary SIGA errors without busy condition */ 3307 if (rc == QDIO_ERROR_SIGA_TARGET) 3308 return; 3309 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3310 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3311 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3312 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3313 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3314 3315 /* this must not happen under normal circumstances. if it 3316 * happens something is really wrong -> recover */ 3317 qeth_schedule_recovery(queue->card); 3318 return; 3319 } 3320 if (queue->card->options.performance_stats) 3321 queue->card->perf_stats.bufs_sent += count; 3322 } 3323 3324 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3325 { 3326 int index; 3327 int flush_cnt = 0; 3328 int q_was_packing = 0; 3329 3330 /* 3331 * check if weed have to switch to non-packing mode or if 3332 * we have to get a pci flag out on the queue 3333 */ 3334 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3335 !atomic_read(&queue->set_pci_flags_count)) { 3336 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3337 QETH_OUT_Q_UNLOCKED) { 3338 /* 3339 * If we get in here, there was no action in 3340 * do_send_packet. So, we check if there is a 3341 * packing buffer to be flushed here. 3342 */ 3343 netif_stop_queue(queue->card->dev); 3344 index = queue->next_buf_to_fill; 3345 q_was_packing = queue->do_pack; 3346 /* queue->do_pack may change */ 3347 barrier(); 3348 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3349 if (!flush_cnt && 3350 !atomic_read(&queue->set_pci_flags_count)) 3351 flush_cnt += 3352 qeth_flush_buffers_on_no_pci(queue); 3353 if (queue->card->options.performance_stats && 3354 q_was_packing) 3355 queue->card->perf_stats.bufs_sent_pack += 3356 flush_cnt; 3357 if (flush_cnt) 3358 qeth_flush_buffers(queue, index, flush_cnt); 3359 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3360 } 3361 } 3362 } 3363 3364 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3365 unsigned long card_ptr) 3366 { 3367 struct qeth_card *card = (struct qeth_card *)card_ptr; 3368 3369 if (card->dev && (card->dev->flags & IFF_UP)) 3370 napi_schedule(&card->napi); 3371 } 3372 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3373 3374 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3375 { 3376 int rc; 3377 3378 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3379 rc = -1; 3380 goto out; 3381 } else { 3382 if (card->options.cq == cq) { 3383 rc = 0; 3384 goto out; 3385 } 3386 3387 if (card->state != CARD_STATE_DOWN && 3388 card->state != CARD_STATE_RECOVER) { 3389 rc = -1; 3390 goto out; 3391 } 3392 3393 qeth_free_qdio_buffers(card); 3394 card->options.cq = cq; 3395 rc = 0; 3396 } 3397 out: 3398 return rc; 3399 3400 } 3401 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3402 3403 3404 static void qeth_qdio_cq_handler(struct qeth_card *card, 3405 unsigned int qdio_err, 3406 unsigned int queue, int first_element, int count) { 3407 struct qeth_qdio_q *cq = card->qdio.c_q; 3408 int i; 3409 int rc; 3410 3411 if (!qeth_is_cq(card, queue)) 3412 goto out; 3413 3414 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3415 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3416 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3417 3418 if (qdio_err) { 3419 netif_stop_queue(card->dev); 3420 qeth_schedule_recovery(card); 3421 goto out; 3422 } 3423 3424 if (card->options.performance_stats) { 3425 card->perf_stats.cq_cnt++; 3426 card->perf_stats.cq_start_time = qeth_get_micros(); 3427 } 3428 3429 for (i = first_element; i < first_element + count; ++i) { 3430 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3431 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx]; 3432 int e; 3433 3434 e = 0; 3435 while (buffer->element[e].addr) { 3436 unsigned long phys_aob_addr; 3437 3438 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3439 qeth_qdio_handle_aob(card, phys_aob_addr); 3440 buffer->element[e].addr = NULL; 3441 buffer->element[e].eflags = 0; 3442 buffer->element[e].sflags = 0; 3443 buffer->element[e].length = 0; 3444 3445 ++e; 3446 } 3447 3448 buffer->element[15].eflags = 0; 3449 buffer->element[15].sflags = 0; 3450 } 3451 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3452 card->qdio.c_q->next_buf_to_init, 3453 count); 3454 if (rc) { 3455 dev_warn(&card->gdev->dev, 3456 "QDIO reported an error, rc=%i\n", rc); 3457 QETH_CARD_TEXT(card, 2, "qcqherr"); 3458 } 3459 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3460 + count) % QDIO_MAX_BUFFERS_PER_Q; 3461 3462 netif_wake_queue(card->dev); 3463 3464 if (card->options.performance_stats) { 3465 int delta_t = qeth_get_micros(); 3466 delta_t -= card->perf_stats.cq_start_time; 3467 card->perf_stats.cq_time += delta_t; 3468 } 3469 out: 3470 return; 3471 } 3472 3473 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3474 unsigned int queue, int first_elem, int count, 3475 unsigned long card_ptr) 3476 { 3477 struct qeth_card *card = (struct qeth_card *)card_ptr; 3478 3479 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3480 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3481 3482 if (qeth_is_cq(card, queue)) 3483 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3484 else if (qdio_err) 3485 qeth_schedule_recovery(card); 3486 3487 3488 } 3489 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3490 3491 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3492 unsigned int qdio_error, int __queue, int first_element, 3493 int count, unsigned long card_ptr) 3494 { 3495 struct qeth_card *card = (struct qeth_card *) card_ptr; 3496 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3497 struct qeth_qdio_out_buffer *buffer; 3498 int i; 3499 3500 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3501 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { 3502 QETH_CARD_TEXT(card, 2, "achkcond"); 3503 netif_stop_queue(card->dev); 3504 qeth_schedule_recovery(card); 3505 return; 3506 } 3507 if (card->options.performance_stats) { 3508 card->perf_stats.outbound_handler_cnt++; 3509 card->perf_stats.outbound_handler_start_time = 3510 qeth_get_micros(); 3511 } 3512 for (i = first_element; i < (first_element + count); ++i) { 3513 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3514 buffer = queue->bufs[bidx]; 3515 qeth_handle_send_error(card, buffer, qdio_error); 3516 3517 if (queue->bufstates && 3518 (queue->bufstates[bidx].flags & 3519 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3520 BUG_ON(card->options.cq != QETH_CQ_ENABLED); 3521 3522 if (atomic_cmpxchg(&buffer->state, 3523 QETH_QDIO_BUF_PRIMED, 3524 QETH_QDIO_BUF_PENDING) == 3525 QETH_QDIO_BUF_PRIMED) { 3526 qeth_notify_skbs(queue, buffer, 3527 TX_NOTIFY_PENDING); 3528 } 3529 buffer->aob = queue->bufstates[bidx].aob; 3530 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3531 QETH_CARD_TEXT(queue->card, 5, "aob"); 3532 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3533 virt_to_phys(buffer->aob)); 3534 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q); 3535 if (qeth_init_qdio_out_buf(queue, bidx)) { 3536 QETH_CARD_TEXT(card, 2, "outofbuf"); 3537 qeth_schedule_recovery(card); 3538 } 3539 } else { 3540 if (card->options.cq == QETH_CQ_ENABLED) { 3541 enum iucv_tx_notify n; 3542 3543 n = qeth_compute_cq_notification( 3544 buffer->buffer->element[15].sflags, 0); 3545 qeth_notify_skbs(queue, buffer, n); 3546 } 3547 3548 qeth_clear_output_buffer(queue, buffer, 3549 QETH_QDIO_BUF_EMPTY); 3550 } 3551 qeth_cleanup_handled_pending(queue, bidx, 0); 3552 } 3553 atomic_sub(count, &queue->used_buffers); 3554 /* check if we need to do something on this outbound queue */ 3555 if (card->info.type != QETH_CARD_TYPE_IQD) 3556 qeth_check_outbound_queue(queue); 3557 3558 netif_wake_queue(queue->card->dev); 3559 if (card->options.performance_stats) 3560 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3561 card->perf_stats.outbound_handler_start_time; 3562 } 3563 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3564 3565 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3566 int ipv, int cast_type) 3567 { 3568 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 3569 card->info.type == QETH_CARD_TYPE_OSX)) 3570 return card->qdio.default_out_queue; 3571 switch (card->qdio.no_out_queues) { 3572 case 4: 3573 if (cast_type && card->info.is_multicast_different) 3574 return card->info.is_multicast_different & 3575 (card->qdio.no_out_queues - 1); 3576 if (card->qdio.do_prio_queueing && (ipv == 4)) { 3577 const u8 tos = ip_hdr(skb)->tos; 3578 3579 if (card->qdio.do_prio_queueing == 3580 QETH_PRIO_Q_ING_TOS) { 3581 if (tos & IP_TOS_NOTIMPORTANT) 3582 return 3; 3583 if (tos & IP_TOS_HIGHRELIABILITY) 3584 return 2; 3585 if (tos & IP_TOS_HIGHTHROUGHPUT) 3586 return 1; 3587 if (tos & IP_TOS_LOWDELAY) 3588 return 0; 3589 } 3590 if (card->qdio.do_prio_queueing == 3591 QETH_PRIO_Q_ING_PREC) 3592 return 3 - (tos >> 6); 3593 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3594 /* TODO: IPv6!!! */ 3595 } 3596 return card->qdio.default_out_queue; 3597 case 1: /* fallthrough for single-out-queue 1920-device */ 3598 default: 3599 return card->qdio.default_out_queue; 3600 } 3601 } 3602 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3603 3604 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 3605 struct sk_buff *skb, int elems) 3606 { 3607 int dlen = skb->len - skb->data_len; 3608 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3609 PFN_DOWN((unsigned long)skb->data); 3610 3611 elements_needed += skb_shinfo(skb)->nr_frags; 3612 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3613 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3614 "(Number=%d / Length=%d). Discarded.\n", 3615 (elements_needed+elems), skb->len); 3616 return 0; 3617 } 3618 return elements_needed; 3619 } 3620 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3621 3622 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len) 3623 { 3624 int hroom, inpage, rest; 3625 3626 if (((unsigned long)skb->data & PAGE_MASK) != 3627 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3628 hroom = skb_headroom(skb); 3629 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3630 rest = len - inpage; 3631 if (rest > hroom) 3632 return 1; 3633 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3634 skb->data -= rest; 3635 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3636 } 3637 return 0; 3638 } 3639 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3640 3641 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3642 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3643 int offset) 3644 { 3645 int length = skb->len - skb->data_len; 3646 int length_here; 3647 int element; 3648 char *data; 3649 int first_lap, cnt; 3650 struct skb_frag_struct *frag; 3651 3652 element = *next_element_to_fill; 3653 data = skb->data; 3654 first_lap = (is_tso == 0 ? 1 : 0); 3655 3656 if (offset >= 0) { 3657 data = skb->data + offset; 3658 length -= offset; 3659 first_lap = 0; 3660 } 3661 3662 while (length > 0) { 3663 /* length_here is the remaining amount of data in this page */ 3664 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3665 if (length < length_here) 3666 length_here = length; 3667 3668 buffer->element[element].addr = data; 3669 buffer->element[element].length = length_here; 3670 length -= length_here; 3671 if (!length) { 3672 if (first_lap) 3673 if (skb_shinfo(skb)->nr_frags) 3674 buffer->element[element].eflags = 3675 SBAL_EFLAGS_FIRST_FRAG; 3676 else 3677 buffer->element[element].eflags = 0; 3678 else 3679 buffer->element[element].eflags = 3680 SBAL_EFLAGS_MIDDLE_FRAG; 3681 } else { 3682 if (first_lap) 3683 buffer->element[element].eflags = 3684 SBAL_EFLAGS_FIRST_FRAG; 3685 else 3686 buffer->element[element].eflags = 3687 SBAL_EFLAGS_MIDDLE_FRAG; 3688 } 3689 data += length_here; 3690 element++; 3691 first_lap = 0; 3692 } 3693 3694 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3695 frag = &skb_shinfo(skb)->frags[cnt]; 3696 buffer->element[element].addr = (char *) 3697 page_to_phys(skb_frag_page(frag)) 3698 + frag->page_offset; 3699 buffer->element[element].length = frag->size; 3700 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG; 3701 element++; 3702 } 3703 3704 if (buffer->element[element - 1].eflags) 3705 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3706 *next_element_to_fill = element; 3707 } 3708 3709 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3710 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3711 struct qeth_hdr *hdr, int offset, int hd_len) 3712 { 3713 struct qdio_buffer *buffer; 3714 int flush_cnt = 0, hdr_len, large_send = 0; 3715 3716 buffer = buf->buffer; 3717 atomic_inc(&skb->users); 3718 skb_queue_tail(&buf->skb_list, skb); 3719 3720 /*check first on TSO ....*/ 3721 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3722 int element = buf->next_element_to_fill; 3723 3724 hdr_len = sizeof(struct qeth_hdr_tso) + 3725 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3726 /*fill first buffer entry only with header information */ 3727 buffer->element[element].addr = skb->data; 3728 buffer->element[element].length = hdr_len; 3729 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3730 buf->next_element_to_fill++; 3731 skb->data += hdr_len; 3732 skb->len -= hdr_len; 3733 large_send = 1; 3734 } 3735 3736 if (offset >= 0) { 3737 int element = buf->next_element_to_fill; 3738 buffer->element[element].addr = hdr; 3739 buffer->element[element].length = sizeof(struct qeth_hdr) + 3740 hd_len; 3741 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3742 buf->is_header[element] = 1; 3743 buf->next_element_to_fill++; 3744 } 3745 3746 __qeth_fill_buffer(skb, buffer, large_send, 3747 (int *)&buf->next_element_to_fill, offset); 3748 3749 if (!queue->do_pack) { 3750 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3751 /* set state to PRIMED -> will be flushed */ 3752 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3753 flush_cnt = 1; 3754 } else { 3755 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3756 if (queue->card->options.performance_stats) 3757 queue->card->perf_stats.skbs_sent_pack++; 3758 if (buf->next_element_to_fill >= 3759 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3760 /* 3761 * packed buffer if full -> set state PRIMED 3762 * -> will be flushed 3763 */ 3764 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3765 flush_cnt = 1; 3766 } 3767 } 3768 return flush_cnt; 3769 } 3770 3771 int qeth_do_send_packet_fast(struct qeth_card *card, 3772 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3773 struct qeth_hdr *hdr, int elements_needed, 3774 int offset, int hd_len) 3775 { 3776 struct qeth_qdio_out_buffer *buffer; 3777 int index; 3778 3779 /* spin until we get the queue ... */ 3780 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3781 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3782 /* ... now we've got the queue */ 3783 index = queue->next_buf_to_fill; 3784 buffer = queue->bufs[queue->next_buf_to_fill]; 3785 /* 3786 * check if buffer is empty to make sure that we do not 'overtake' 3787 * ourselves and try to fill a buffer that is already primed 3788 */ 3789 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3790 goto out; 3791 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3792 QDIO_MAX_BUFFERS_PER_Q; 3793 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3794 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3795 qeth_flush_buffers(queue, index, 1); 3796 return 0; 3797 out: 3798 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3799 return -EBUSY; 3800 } 3801 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3802 3803 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3804 struct sk_buff *skb, struct qeth_hdr *hdr, 3805 int elements_needed) 3806 { 3807 struct qeth_qdio_out_buffer *buffer; 3808 int start_index; 3809 int flush_count = 0; 3810 int do_pack = 0; 3811 int tmp; 3812 int rc = 0; 3813 3814 /* spin until we get the queue ... */ 3815 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3816 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3817 start_index = queue->next_buf_to_fill; 3818 buffer = queue->bufs[queue->next_buf_to_fill]; 3819 /* 3820 * check if buffer is empty to make sure that we do not 'overtake' 3821 * ourselves and try to fill a buffer that is already primed 3822 */ 3823 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3824 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3825 return -EBUSY; 3826 } 3827 /* check if we need to switch packing state of this queue */ 3828 qeth_switch_to_packing_if_needed(queue); 3829 if (queue->do_pack) { 3830 do_pack = 1; 3831 /* does packet fit in current buffer? */ 3832 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3833 buffer->next_element_to_fill) < elements_needed) { 3834 /* ... no -> set state PRIMED */ 3835 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3836 flush_count++; 3837 queue->next_buf_to_fill = 3838 (queue->next_buf_to_fill + 1) % 3839 QDIO_MAX_BUFFERS_PER_Q; 3840 buffer = queue->bufs[queue->next_buf_to_fill]; 3841 /* we did a step forward, so check buffer state 3842 * again */ 3843 if (atomic_read(&buffer->state) != 3844 QETH_QDIO_BUF_EMPTY) { 3845 qeth_flush_buffers(queue, start_index, 3846 flush_count); 3847 atomic_set(&queue->state, 3848 QETH_OUT_Q_UNLOCKED); 3849 return -EBUSY; 3850 } 3851 } 3852 } 3853 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3854 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3855 QDIO_MAX_BUFFERS_PER_Q; 3856 flush_count += tmp; 3857 if (flush_count) 3858 qeth_flush_buffers(queue, start_index, flush_count); 3859 else if (!atomic_read(&queue->set_pci_flags_count)) 3860 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3861 /* 3862 * queue->state will go from LOCKED -> UNLOCKED or from 3863 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3864 * (switch packing state or flush buffer to get another pci flag out). 3865 * In that case we will enter this loop 3866 */ 3867 while (atomic_dec_return(&queue->state)) { 3868 flush_count = 0; 3869 start_index = queue->next_buf_to_fill; 3870 /* check if we can go back to non-packing state */ 3871 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3872 /* 3873 * check if we need to flush a packing buffer to get a pci 3874 * flag out on the queue 3875 */ 3876 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3877 flush_count += qeth_flush_buffers_on_no_pci(queue); 3878 if (flush_count) 3879 qeth_flush_buffers(queue, start_index, flush_count); 3880 } 3881 /* at this point the queue is UNLOCKED again */ 3882 if (queue->card->options.performance_stats && do_pack) 3883 queue->card->perf_stats.bufs_sent_pack += flush_count; 3884 3885 return rc; 3886 } 3887 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3888 3889 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3890 struct qeth_reply *reply, unsigned long data) 3891 { 3892 struct qeth_ipa_cmd *cmd; 3893 struct qeth_ipacmd_setadpparms *setparms; 3894 3895 QETH_CARD_TEXT(card, 4, "prmadpcb"); 3896 3897 cmd = (struct qeth_ipa_cmd *) data; 3898 setparms = &(cmd->data.setadapterparms); 3899 3900 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3901 if (cmd->hdr.return_code) { 3902 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 3903 setparms->data.mode = SET_PROMISC_MODE_OFF; 3904 } 3905 card->info.promisc_mode = setparms->data.mode; 3906 return 0; 3907 } 3908 3909 void qeth_setadp_promisc_mode(struct qeth_card *card) 3910 { 3911 enum qeth_ipa_promisc_modes mode; 3912 struct net_device *dev = card->dev; 3913 struct qeth_cmd_buffer *iob; 3914 struct qeth_ipa_cmd *cmd; 3915 3916 QETH_CARD_TEXT(card, 4, "setprom"); 3917 3918 if (((dev->flags & IFF_PROMISC) && 3919 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3920 (!(dev->flags & IFF_PROMISC) && 3921 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3922 return; 3923 mode = SET_PROMISC_MODE_OFF; 3924 if (dev->flags & IFF_PROMISC) 3925 mode = SET_PROMISC_MODE_ON; 3926 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 3927 3928 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3929 sizeof(struct qeth_ipacmd_setadpparms)); 3930 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3931 cmd->data.setadapterparms.data.mode = mode; 3932 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3933 } 3934 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3935 3936 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3937 { 3938 struct qeth_card *card; 3939 char dbf_text[15]; 3940 3941 card = dev->ml_priv; 3942 3943 QETH_CARD_TEXT(card, 4, "chgmtu"); 3944 sprintf(dbf_text, "%8x", new_mtu); 3945 QETH_CARD_TEXT(card, 4, dbf_text); 3946 3947 if (new_mtu < 64) 3948 return -EINVAL; 3949 if (new_mtu > 65535) 3950 return -EINVAL; 3951 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3952 (!qeth_mtu_is_valid(card, new_mtu))) 3953 return -EINVAL; 3954 dev->mtu = new_mtu; 3955 return 0; 3956 } 3957 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3958 3959 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3960 { 3961 struct qeth_card *card; 3962 3963 card = dev->ml_priv; 3964 3965 QETH_CARD_TEXT(card, 5, "getstat"); 3966 3967 return &card->stats; 3968 } 3969 EXPORT_SYMBOL_GPL(qeth_get_stats); 3970 3971 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 3972 struct qeth_reply *reply, unsigned long data) 3973 { 3974 struct qeth_ipa_cmd *cmd; 3975 3976 QETH_CARD_TEXT(card, 4, "chgmaccb"); 3977 3978 cmd = (struct qeth_ipa_cmd *) data; 3979 if (!card->options.layer2 || 3980 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 3981 memcpy(card->dev->dev_addr, 3982 &cmd->data.setadapterparms.data.change_addr.addr, 3983 OSA_ADDR_LEN); 3984 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 3985 } 3986 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3987 return 0; 3988 } 3989 3990 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 3991 { 3992 int rc; 3993 struct qeth_cmd_buffer *iob; 3994 struct qeth_ipa_cmd *cmd; 3995 3996 QETH_CARD_TEXT(card, 4, "chgmac"); 3997 3998 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 3999 sizeof(struct qeth_ipacmd_setadpparms)); 4000 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4001 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4002 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4003 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4004 card->dev->dev_addr, OSA_ADDR_LEN); 4005 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4006 NULL); 4007 return rc; 4008 } 4009 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4010 4011 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4012 struct qeth_reply *reply, unsigned long data) 4013 { 4014 struct qeth_ipa_cmd *cmd; 4015 struct qeth_set_access_ctrl *access_ctrl_req; 4016 4017 QETH_CARD_TEXT(card, 4, "setaccb"); 4018 4019 cmd = (struct qeth_ipa_cmd *) data; 4020 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4021 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4022 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4023 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4024 cmd->data.setadapterparms.hdr.return_code); 4025 switch (cmd->data.setadapterparms.hdr.return_code) { 4026 case SET_ACCESS_CTRL_RC_SUCCESS: 4027 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4028 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4029 { 4030 card->options.isolation = access_ctrl_req->subcmd_code; 4031 if (card->options.isolation == ISOLATION_MODE_NONE) { 4032 dev_info(&card->gdev->dev, 4033 "QDIO data connection isolation is deactivated\n"); 4034 } else { 4035 dev_info(&card->gdev->dev, 4036 "QDIO data connection isolation is activated\n"); 4037 } 4038 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n", 4039 card->gdev->dev.kobj.name, 4040 access_ctrl_req->subcmd_code, 4041 cmd->data.setadapterparms.hdr.return_code); 4042 break; 4043 } 4044 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4045 { 4046 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4047 card->gdev->dev.kobj.name, 4048 access_ctrl_req->subcmd_code, 4049 cmd->data.setadapterparms.hdr.return_code); 4050 dev_err(&card->gdev->dev, "Adapter does not " 4051 "support QDIO data connection isolation\n"); 4052 4053 /* ensure isolation mode is "none" */ 4054 card->options.isolation = ISOLATION_MODE_NONE; 4055 break; 4056 } 4057 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4058 { 4059 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 4060 card->gdev->dev.kobj.name, 4061 access_ctrl_req->subcmd_code, 4062 cmd->data.setadapterparms.hdr.return_code); 4063 dev_err(&card->gdev->dev, 4064 "Adapter is dedicated. " 4065 "QDIO data connection isolation not supported\n"); 4066 4067 /* ensure isolation mode is "none" */ 4068 card->options.isolation = ISOLATION_MODE_NONE; 4069 break; 4070 } 4071 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4072 { 4073 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 4074 card->gdev->dev.kobj.name, 4075 access_ctrl_req->subcmd_code, 4076 cmd->data.setadapterparms.hdr.return_code); 4077 dev_err(&card->gdev->dev, 4078 "TSO does not permit QDIO data connection isolation\n"); 4079 4080 /* ensure isolation mode is "none" */ 4081 card->options.isolation = ISOLATION_MODE_NONE; 4082 break; 4083 } 4084 default: 4085 { 4086 /* this should never happen */ 4087 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d" 4088 "==UNKNOWN\n", 4089 card->gdev->dev.kobj.name, 4090 access_ctrl_req->subcmd_code, 4091 cmd->data.setadapterparms.hdr.return_code); 4092 4093 /* ensure isolation mode is "none" */ 4094 card->options.isolation = ISOLATION_MODE_NONE; 4095 break; 4096 } 4097 } 4098 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4099 return 0; 4100 } 4101 4102 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4103 enum qeth_ipa_isolation_modes isolation) 4104 { 4105 int rc; 4106 struct qeth_cmd_buffer *iob; 4107 struct qeth_ipa_cmd *cmd; 4108 struct qeth_set_access_ctrl *access_ctrl_req; 4109 4110 QETH_CARD_TEXT(card, 4, "setacctl"); 4111 4112 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4113 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4114 4115 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4116 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4117 sizeof(struct qeth_set_access_ctrl)); 4118 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4119 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4120 access_ctrl_req->subcmd_code = isolation; 4121 4122 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4123 NULL); 4124 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4125 return rc; 4126 } 4127 4128 int qeth_set_access_ctrl_online(struct qeth_card *card) 4129 { 4130 int rc = 0; 4131 4132 QETH_CARD_TEXT(card, 4, "setactlo"); 4133 4134 if ((card->info.type == QETH_CARD_TYPE_OSD || 4135 card->info.type == QETH_CARD_TYPE_OSX) && 4136 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4137 rc = qeth_setadpparms_set_access_ctrl(card, 4138 card->options.isolation); 4139 if (rc) { 4140 QETH_DBF_MESSAGE(3, 4141 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4142 card->gdev->dev.kobj.name, 4143 rc); 4144 } 4145 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4146 card->options.isolation = ISOLATION_MODE_NONE; 4147 4148 dev_err(&card->gdev->dev, "Adapter does not " 4149 "support QDIO data connection isolation\n"); 4150 rc = -EOPNOTSUPP; 4151 } 4152 return rc; 4153 } 4154 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4155 4156 void qeth_tx_timeout(struct net_device *dev) 4157 { 4158 struct qeth_card *card; 4159 4160 card = dev->ml_priv; 4161 QETH_CARD_TEXT(card, 4, "txtimeo"); 4162 card->stats.tx_errors++; 4163 qeth_schedule_recovery(card); 4164 } 4165 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4166 4167 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4168 { 4169 struct qeth_card *card = dev->ml_priv; 4170 int rc = 0; 4171 4172 switch (regnum) { 4173 case MII_BMCR: /* Basic mode control register */ 4174 rc = BMCR_FULLDPLX; 4175 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4176 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4177 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4178 rc |= BMCR_SPEED100; 4179 break; 4180 case MII_BMSR: /* Basic mode status register */ 4181 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4182 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4183 BMSR_100BASE4; 4184 break; 4185 case MII_PHYSID1: /* PHYS ID 1 */ 4186 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4187 dev->dev_addr[2]; 4188 rc = (rc >> 5) & 0xFFFF; 4189 break; 4190 case MII_PHYSID2: /* PHYS ID 2 */ 4191 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4192 break; 4193 case MII_ADVERTISE: /* Advertisement control reg */ 4194 rc = ADVERTISE_ALL; 4195 break; 4196 case MII_LPA: /* Link partner ability reg */ 4197 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4198 LPA_100BASE4 | LPA_LPACK; 4199 break; 4200 case MII_EXPANSION: /* Expansion register */ 4201 break; 4202 case MII_DCOUNTER: /* disconnect counter */ 4203 break; 4204 case MII_FCSCOUNTER: /* false carrier counter */ 4205 break; 4206 case MII_NWAYTEST: /* N-way auto-neg test register */ 4207 break; 4208 case MII_RERRCOUNTER: /* rx error counter */ 4209 rc = card->stats.rx_errors; 4210 break; 4211 case MII_SREVISION: /* silicon revision */ 4212 break; 4213 case MII_RESV1: /* reserved 1 */ 4214 break; 4215 case MII_LBRERROR: /* loopback, rx, bypass error */ 4216 break; 4217 case MII_PHYADDR: /* physical address */ 4218 break; 4219 case MII_RESV2: /* reserved 2 */ 4220 break; 4221 case MII_TPISTATUS: /* TPI status for 10mbps */ 4222 break; 4223 case MII_NCONFIG: /* network interface config */ 4224 break; 4225 default: 4226 break; 4227 } 4228 return rc; 4229 } 4230 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4231 4232 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4233 struct qeth_cmd_buffer *iob, int len, 4234 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4235 unsigned long), 4236 void *reply_param) 4237 { 4238 u16 s1, s2; 4239 4240 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4241 4242 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4243 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4244 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4245 /* adjust PDU length fields in IPA_PDU_HEADER */ 4246 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4247 s2 = (u32) len; 4248 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4249 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4250 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4251 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4252 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4253 reply_cb, reply_param); 4254 } 4255 4256 static int qeth_snmp_command_cb(struct qeth_card *card, 4257 struct qeth_reply *reply, unsigned long sdata) 4258 { 4259 struct qeth_ipa_cmd *cmd; 4260 struct qeth_arp_query_info *qinfo; 4261 struct qeth_snmp_cmd *snmp; 4262 unsigned char *data; 4263 __u16 data_len; 4264 4265 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4266 4267 cmd = (struct qeth_ipa_cmd *) sdata; 4268 data = (unsigned char *)((char *)cmd - reply->offset); 4269 qinfo = (struct qeth_arp_query_info *) reply->param; 4270 snmp = &cmd->data.setadapterparms.data.snmp; 4271 4272 if (cmd->hdr.return_code) { 4273 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 4274 return 0; 4275 } 4276 if (cmd->data.setadapterparms.hdr.return_code) { 4277 cmd->hdr.return_code = 4278 cmd->data.setadapterparms.hdr.return_code; 4279 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 4280 return 0; 4281 } 4282 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4283 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4284 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4285 else 4286 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4287 4288 /* check if there is enough room in userspace */ 4289 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4290 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4291 cmd->hdr.return_code = -ENOMEM; 4292 return 0; 4293 } 4294 QETH_CARD_TEXT_(card, 4, "snore%i", 4295 cmd->data.setadapterparms.hdr.used_total); 4296 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4297 cmd->data.setadapterparms.hdr.seq_no); 4298 /*copy entries to user buffer*/ 4299 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4300 memcpy(qinfo->udata + qinfo->udata_offset, 4301 (char *)snmp, 4302 data_len + offsetof(struct qeth_snmp_cmd, data)); 4303 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4304 } else { 4305 memcpy(qinfo->udata + qinfo->udata_offset, 4306 (char *)&snmp->request, data_len); 4307 } 4308 qinfo->udata_offset += data_len; 4309 /* check if all replies received ... */ 4310 QETH_CARD_TEXT_(card, 4, "srtot%i", 4311 cmd->data.setadapterparms.hdr.used_total); 4312 QETH_CARD_TEXT_(card, 4, "srseq%i", 4313 cmd->data.setadapterparms.hdr.seq_no); 4314 if (cmd->data.setadapterparms.hdr.seq_no < 4315 cmd->data.setadapterparms.hdr.used_total) 4316 return 1; 4317 return 0; 4318 } 4319 4320 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4321 { 4322 struct qeth_cmd_buffer *iob; 4323 struct qeth_ipa_cmd *cmd; 4324 struct qeth_snmp_ureq *ureq; 4325 int req_len; 4326 struct qeth_arp_query_info qinfo = {0, }; 4327 int rc = 0; 4328 4329 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4330 4331 if (card->info.guestlan) 4332 return -EOPNOTSUPP; 4333 4334 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4335 (!card->options.layer2)) { 4336 return -EOPNOTSUPP; 4337 } 4338 /* skip 4 bytes (data_len struct member) to get req_len */ 4339 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4340 return -EFAULT; 4341 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4342 if (IS_ERR(ureq)) { 4343 QETH_CARD_TEXT(card, 2, "snmpnome"); 4344 return PTR_ERR(ureq); 4345 } 4346 qinfo.udata_len = ureq->hdr.data_len; 4347 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4348 if (!qinfo.udata) { 4349 kfree(ureq); 4350 return -ENOMEM; 4351 } 4352 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4353 4354 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4355 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4356 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4357 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4358 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4359 qeth_snmp_command_cb, (void *)&qinfo); 4360 if (rc) 4361 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4362 QETH_CARD_IFNAME(card), rc); 4363 else { 4364 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4365 rc = -EFAULT; 4366 } 4367 4368 kfree(ureq); 4369 kfree(qinfo.udata); 4370 return rc; 4371 } 4372 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4373 4374 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4375 { 4376 switch (card->info.type) { 4377 case QETH_CARD_TYPE_IQD: 4378 return 2; 4379 default: 4380 return 0; 4381 } 4382 } 4383 4384 static void qeth_determine_capabilities(struct qeth_card *card) 4385 { 4386 int rc; 4387 int length; 4388 char *prcd; 4389 struct ccw_device *ddev; 4390 int ddev_offline = 0; 4391 4392 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4393 ddev = CARD_DDEV(card); 4394 if (!ddev->online) { 4395 ddev_offline = 1; 4396 rc = ccw_device_set_online(ddev); 4397 if (rc) { 4398 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4399 goto out; 4400 } 4401 } 4402 4403 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4404 if (rc) { 4405 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4406 dev_name(&card->gdev->dev), rc); 4407 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4408 goto out_offline; 4409 } 4410 qeth_configure_unitaddr(card, prcd); 4411 qeth_configure_blkt_default(card, prcd); 4412 kfree(prcd); 4413 4414 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4415 if (rc) 4416 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4417 4418 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4419 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4420 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4421 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4422 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4423 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4424 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4425 dev_info(&card->gdev->dev, 4426 "Completion Queueing supported\n"); 4427 } else { 4428 card->options.cq = QETH_CQ_NOTAVAILABLE; 4429 } 4430 4431 4432 out_offline: 4433 if (ddev_offline == 1) 4434 ccw_device_set_offline(ddev); 4435 out: 4436 return; 4437 } 4438 4439 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4440 struct qdio_buffer **in_sbal_ptrs, 4441 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4442 int i; 4443 4444 if (card->options.cq == QETH_CQ_ENABLED) { 4445 int offset = QDIO_MAX_BUFFERS_PER_Q * 4446 (card->qdio.no_in_queues - 1); 4447 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4448 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4449 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4450 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4451 } 4452 4453 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4454 } 4455 } 4456 4457 static int qeth_qdio_establish(struct qeth_card *card) 4458 { 4459 struct qdio_initialize init_data; 4460 char *qib_param_field; 4461 struct qdio_buffer **in_sbal_ptrs; 4462 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4463 struct qdio_buffer **out_sbal_ptrs; 4464 int i, j, k; 4465 int rc = 0; 4466 4467 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4468 4469 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4470 GFP_KERNEL); 4471 if (!qib_param_field) { 4472 rc = -ENOMEM; 4473 goto out_free_nothing; 4474 } 4475 4476 qeth_create_qib_param_field(card, qib_param_field); 4477 qeth_create_qib_param_field_blkt(card, qib_param_field); 4478 4479 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4480 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4481 GFP_KERNEL); 4482 if (!in_sbal_ptrs) { 4483 rc = -ENOMEM; 4484 goto out_free_qib_param; 4485 } 4486 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4487 in_sbal_ptrs[i] = (struct qdio_buffer *) 4488 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4489 } 4490 4491 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4492 GFP_KERNEL); 4493 if (!queue_start_poll) { 4494 rc = -ENOMEM; 4495 goto out_free_in_sbals; 4496 } 4497 for (i = 0; i < card->qdio.no_in_queues; ++i) 4498 queue_start_poll[i] = card->discipline.start_poll; 4499 4500 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4501 4502 out_sbal_ptrs = 4503 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4504 sizeof(void *), GFP_KERNEL); 4505 if (!out_sbal_ptrs) { 4506 rc = -ENOMEM; 4507 goto out_free_queue_start_poll; 4508 } 4509 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4510 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4511 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4512 card->qdio.out_qs[i]->bufs[j]->buffer); 4513 } 4514 4515 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4516 init_data.cdev = CARD_DDEV(card); 4517 init_data.q_format = qeth_get_qdio_q_format(card); 4518 init_data.qib_param_field_format = 0; 4519 init_data.qib_param_field = qib_param_field; 4520 init_data.no_input_qs = card->qdio.no_in_queues; 4521 init_data.no_output_qs = card->qdio.no_out_queues; 4522 init_data.input_handler = card->discipline.input_handler; 4523 init_data.output_handler = card->discipline.output_handler; 4524 init_data.queue_start_poll = queue_start_poll; 4525 init_data.int_parm = (unsigned long) card; 4526 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4527 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4528 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4529 init_data.scan_threshold = 4530 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32; 4531 4532 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4533 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4534 rc = qdio_allocate(&init_data); 4535 if (rc) { 4536 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4537 goto out; 4538 } 4539 rc = qdio_establish(&init_data); 4540 if (rc) { 4541 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4542 qdio_free(CARD_DDEV(card)); 4543 } 4544 } 4545 4546 switch (card->options.cq) { 4547 case QETH_CQ_ENABLED: 4548 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4549 break; 4550 case QETH_CQ_DISABLED: 4551 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4552 break; 4553 default: 4554 break; 4555 } 4556 out: 4557 kfree(out_sbal_ptrs); 4558 out_free_queue_start_poll: 4559 kfree(queue_start_poll); 4560 out_free_in_sbals: 4561 kfree(in_sbal_ptrs); 4562 out_free_qib_param: 4563 kfree(qib_param_field); 4564 out_free_nothing: 4565 return rc; 4566 } 4567 4568 static void qeth_core_free_card(struct qeth_card *card) 4569 { 4570 4571 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4572 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4573 qeth_clean_channel(&card->read); 4574 qeth_clean_channel(&card->write); 4575 if (card->dev) 4576 free_netdev(card->dev); 4577 kfree(card->ip_tbd_list); 4578 qeth_free_qdio_buffers(card); 4579 unregister_service_level(&card->qeth_service_level); 4580 kfree(card); 4581 } 4582 4583 static struct ccw_device_id qeth_ids[] = { 4584 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4585 .driver_info = QETH_CARD_TYPE_OSD}, 4586 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4587 .driver_info = QETH_CARD_TYPE_IQD}, 4588 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4589 .driver_info = QETH_CARD_TYPE_OSN}, 4590 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4591 .driver_info = QETH_CARD_TYPE_OSM}, 4592 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4593 .driver_info = QETH_CARD_TYPE_OSX}, 4594 {}, 4595 }; 4596 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4597 4598 static struct ccw_driver qeth_ccw_driver = { 4599 .driver = { 4600 .owner = THIS_MODULE, 4601 .name = "qeth", 4602 }, 4603 .ids = qeth_ids, 4604 .probe = ccwgroup_probe_ccwdev, 4605 .remove = ccwgroup_remove_ccwdev, 4606 }; 4607 4608 static int qeth_core_driver_group(const char *buf, struct device *root_dev, 4609 unsigned long driver_id) 4610 { 4611 return ccwgroup_create_from_string(root_dev, driver_id, 4612 &qeth_ccw_driver, 3, buf); 4613 } 4614 4615 int qeth_core_hardsetup_card(struct qeth_card *card) 4616 { 4617 int retries = 0; 4618 int rc; 4619 4620 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4621 atomic_set(&card->force_alloc_skb, 0); 4622 qeth_get_channel_path_desc(card); 4623 retry: 4624 if (retries) 4625 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4626 dev_name(&card->gdev->dev)); 4627 ccw_device_set_offline(CARD_DDEV(card)); 4628 ccw_device_set_offline(CARD_WDEV(card)); 4629 ccw_device_set_offline(CARD_RDEV(card)); 4630 rc = ccw_device_set_online(CARD_RDEV(card)); 4631 if (rc) 4632 goto retriable; 4633 rc = ccw_device_set_online(CARD_WDEV(card)); 4634 if (rc) 4635 goto retriable; 4636 rc = ccw_device_set_online(CARD_DDEV(card)); 4637 if (rc) 4638 goto retriable; 4639 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4640 retriable: 4641 if (rc == -ERESTARTSYS) { 4642 QETH_DBF_TEXT(SETUP, 2, "break1"); 4643 return rc; 4644 } else if (rc) { 4645 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4646 if (++retries > 3) 4647 goto out; 4648 else 4649 goto retry; 4650 } 4651 qeth_determine_capabilities(card); 4652 qeth_init_tokens(card); 4653 qeth_init_func_level(card); 4654 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4655 if (rc == -ERESTARTSYS) { 4656 QETH_DBF_TEXT(SETUP, 2, "break2"); 4657 return rc; 4658 } else if (rc) { 4659 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4660 if (--retries < 0) 4661 goto out; 4662 else 4663 goto retry; 4664 } 4665 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4666 if (rc == -ERESTARTSYS) { 4667 QETH_DBF_TEXT(SETUP, 2, "break3"); 4668 return rc; 4669 } else if (rc) { 4670 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4671 if (--retries < 0) 4672 goto out; 4673 else 4674 goto retry; 4675 } 4676 card->read_or_write_problem = 0; 4677 rc = qeth_mpc_initialize(card); 4678 if (rc) { 4679 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4680 goto out; 4681 } 4682 4683 card->options.ipa4.supported_funcs = 0; 4684 card->options.adp.supported_funcs = 0; 4685 card->info.diagass_support = 0; 4686 qeth_query_ipassists(card, QETH_PROT_IPV4); 4687 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4688 qeth_query_setadapterparms(card); 4689 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4690 qeth_query_setdiagass(card); 4691 return 0; 4692 out: 4693 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4694 "an error on the device\n"); 4695 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4696 dev_name(&card->gdev->dev), rc); 4697 return rc; 4698 } 4699 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4700 4701 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 4702 struct qdio_buffer_element *element, 4703 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4704 { 4705 struct page *page = virt_to_page(element->addr); 4706 if (*pskb == NULL) { 4707 if (qethbuffer->rx_skb) { 4708 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 4709 *pskb = qethbuffer->rx_skb; 4710 qethbuffer->rx_skb = NULL; 4711 } else { 4712 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 4713 if (!(*pskb)) 4714 return -ENOMEM; 4715 } 4716 4717 skb_reserve(*pskb, ETH_HLEN); 4718 if (data_len <= QETH_RX_PULL_LEN) { 4719 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4720 data_len); 4721 } else { 4722 get_page(page); 4723 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 4724 element->addr + offset, QETH_RX_PULL_LEN); 4725 skb_fill_page_desc(*pskb, *pfrag, page, 4726 offset + QETH_RX_PULL_LEN, 4727 data_len - QETH_RX_PULL_LEN); 4728 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 4729 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 4730 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 4731 (*pfrag)++; 4732 } 4733 } else { 4734 get_page(page); 4735 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4736 (*pskb)->data_len += data_len; 4737 (*pskb)->len += data_len; 4738 (*pskb)->truesize += data_len; 4739 (*pfrag)++; 4740 } 4741 4742 4743 return 0; 4744 } 4745 4746 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4747 struct qeth_qdio_buffer *qethbuffer, 4748 struct qdio_buffer_element **__element, int *__offset, 4749 struct qeth_hdr **hdr) 4750 { 4751 struct qdio_buffer_element *element = *__element; 4752 struct qdio_buffer *buffer = qethbuffer->buffer; 4753 int offset = *__offset; 4754 struct sk_buff *skb = NULL; 4755 int skb_len = 0; 4756 void *data_ptr; 4757 int data_len; 4758 int headroom = 0; 4759 int use_rx_sg = 0; 4760 int frag = 0; 4761 4762 /* qeth_hdr must not cross element boundaries */ 4763 if (element->length < offset + sizeof(struct qeth_hdr)) { 4764 if (qeth_is_last_sbale(element)) 4765 return NULL; 4766 element++; 4767 offset = 0; 4768 if (element->length < sizeof(struct qeth_hdr)) 4769 return NULL; 4770 } 4771 *hdr = element->addr + offset; 4772 4773 offset += sizeof(struct qeth_hdr); 4774 switch ((*hdr)->hdr.l2.id) { 4775 case QETH_HEADER_TYPE_LAYER2: 4776 skb_len = (*hdr)->hdr.l2.pkt_length; 4777 break; 4778 case QETH_HEADER_TYPE_LAYER3: 4779 skb_len = (*hdr)->hdr.l3.length; 4780 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || 4781 (card->info.link_type == QETH_LINK_TYPE_HSTR)) 4782 headroom = TR_HLEN; 4783 else 4784 headroom = ETH_HLEN; 4785 break; 4786 case QETH_HEADER_TYPE_OSN: 4787 skb_len = (*hdr)->hdr.osn.pdu_length; 4788 headroom = sizeof(struct qeth_hdr); 4789 break; 4790 default: 4791 break; 4792 } 4793 4794 if (!skb_len) 4795 return NULL; 4796 4797 if (((skb_len >= card->options.rx_sg_cb) && 4798 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4799 (!atomic_read(&card->force_alloc_skb))) || 4800 (card->options.cq == QETH_CQ_ENABLED)) { 4801 use_rx_sg = 1; 4802 } else { 4803 skb = dev_alloc_skb(skb_len + headroom); 4804 if (!skb) 4805 goto no_mem; 4806 if (headroom) 4807 skb_reserve(skb, headroom); 4808 } 4809 4810 data_ptr = element->addr + offset; 4811 while (skb_len) { 4812 data_len = min(skb_len, (int)(element->length - offset)); 4813 if (data_len) { 4814 if (use_rx_sg) { 4815 if (qeth_create_skb_frag(qethbuffer, element, 4816 &skb, offset, &frag, data_len)) 4817 goto no_mem; 4818 } else { 4819 memcpy(skb_put(skb, data_len), data_ptr, 4820 data_len); 4821 } 4822 } 4823 skb_len -= data_len; 4824 if (skb_len) { 4825 if (qeth_is_last_sbale(element)) { 4826 QETH_CARD_TEXT(card, 4, "unexeob"); 4827 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 4828 dev_kfree_skb_any(skb); 4829 card->stats.rx_errors++; 4830 return NULL; 4831 } 4832 element++; 4833 offset = 0; 4834 data_ptr = element->addr; 4835 } else { 4836 offset += data_len; 4837 } 4838 } 4839 *__element = element; 4840 *__offset = offset; 4841 if (use_rx_sg && card->options.performance_stats) { 4842 card->perf_stats.sg_skbs_rx++; 4843 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 4844 } 4845 return skb; 4846 no_mem: 4847 if (net_ratelimit()) { 4848 QETH_CARD_TEXT(card, 2, "noskbmem"); 4849 } 4850 card->stats.rx_dropped++; 4851 return NULL; 4852 } 4853 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 4854 4855 static void qeth_unregister_dbf_views(void) 4856 { 4857 int x; 4858 for (x = 0; x < QETH_DBF_INFOS; x++) { 4859 debug_unregister(qeth_dbf[x].id); 4860 qeth_dbf[x].id = NULL; 4861 } 4862 } 4863 4864 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 4865 { 4866 char dbf_txt_buf[32]; 4867 va_list args; 4868 4869 if (level > id->level) 4870 return; 4871 va_start(args, fmt); 4872 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 4873 va_end(args); 4874 debug_text_event(id, level, dbf_txt_buf); 4875 } 4876 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 4877 4878 static int qeth_register_dbf_views(void) 4879 { 4880 int ret; 4881 int x; 4882 4883 for (x = 0; x < QETH_DBF_INFOS; x++) { 4884 /* register the areas */ 4885 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 4886 qeth_dbf[x].pages, 4887 qeth_dbf[x].areas, 4888 qeth_dbf[x].len); 4889 if (qeth_dbf[x].id == NULL) { 4890 qeth_unregister_dbf_views(); 4891 return -ENOMEM; 4892 } 4893 4894 /* register a view */ 4895 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 4896 if (ret) { 4897 qeth_unregister_dbf_views(); 4898 return ret; 4899 } 4900 4901 /* set a passing level */ 4902 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 4903 } 4904 4905 return 0; 4906 } 4907 4908 int qeth_core_load_discipline(struct qeth_card *card, 4909 enum qeth_discipline_id discipline) 4910 { 4911 int rc = 0; 4912 switch (discipline) { 4913 case QETH_DISCIPLINE_LAYER3: 4914 card->discipline.ccwgdriver = try_then_request_module( 4915 symbol_get(qeth_l3_ccwgroup_driver), 4916 "qeth_l3"); 4917 break; 4918 case QETH_DISCIPLINE_LAYER2: 4919 card->discipline.ccwgdriver = try_then_request_module( 4920 symbol_get(qeth_l2_ccwgroup_driver), 4921 "qeth_l2"); 4922 break; 4923 } 4924 if (!card->discipline.ccwgdriver) { 4925 dev_err(&card->gdev->dev, "There is no kernel module to " 4926 "support discipline %d\n", discipline); 4927 rc = -EINVAL; 4928 } 4929 return rc; 4930 } 4931 4932 void qeth_core_free_discipline(struct qeth_card *card) 4933 { 4934 if (card->options.layer2) 4935 symbol_put(qeth_l2_ccwgroup_driver); 4936 else 4937 symbol_put(qeth_l3_ccwgroup_driver); 4938 card->discipline.ccwgdriver = NULL; 4939 } 4940 4941 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 4942 { 4943 struct qeth_card *card; 4944 struct device *dev; 4945 int rc; 4946 unsigned long flags; 4947 char dbf_name[20]; 4948 4949 QETH_DBF_TEXT(SETUP, 2, "probedev"); 4950 4951 dev = &gdev->dev; 4952 if (!get_device(dev)) 4953 return -ENODEV; 4954 4955 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 4956 4957 card = qeth_alloc_card(); 4958 if (!card) { 4959 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 4960 rc = -ENOMEM; 4961 goto err_dev; 4962 } 4963 4964 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 4965 dev_name(&gdev->dev)); 4966 card->debug = debug_register(dbf_name, 2, 1, 8); 4967 if (!card->debug) { 4968 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 4969 rc = -ENOMEM; 4970 goto err_card; 4971 } 4972 debug_register_view(card->debug, &debug_hex_ascii_view); 4973 4974 card->read.ccwdev = gdev->cdev[0]; 4975 card->write.ccwdev = gdev->cdev[1]; 4976 card->data.ccwdev = gdev->cdev[2]; 4977 dev_set_drvdata(&gdev->dev, card); 4978 card->gdev = gdev; 4979 gdev->cdev[0]->handler = qeth_irq; 4980 gdev->cdev[1]->handler = qeth_irq; 4981 gdev->cdev[2]->handler = qeth_irq; 4982 4983 rc = qeth_determine_card_type(card); 4984 if (rc) { 4985 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4986 goto err_dbf; 4987 } 4988 rc = qeth_setup_card(card); 4989 if (rc) { 4990 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 4991 goto err_dbf; 4992 } 4993 4994 if (card->info.type == QETH_CARD_TYPE_OSN) 4995 rc = qeth_core_create_osn_attributes(dev); 4996 else 4997 rc = qeth_core_create_device_attributes(dev); 4998 if (rc) 4999 goto err_dbf; 5000 switch (card->info.type) { 5001 case QETH_CARD_TYPE_OSN: 5002 case QETH_CARD_TYPE_OSM: 5003 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5004 if (rc) 5005 goto err_attr; 5006 rc = card->discipline.ccwgdriver->probe(card->gdev); 5007 if (rc) 5008 goto err_disc; 5009 case QETH_CARD_TYPE_OSD: 5010 case QETH_CARD_TYPE_OSX: 5011 default: 5012 break; 5013 } 5014 5015 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5016 list_add_tail(&card->list, &qeth_core_card_list.list); 5017 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5018 5019 qeth_determine_capabilities(card); 5020 return 0; 5021 5022 err_disc: 5023 qeth_core_free_discipline(card); 5024 err_attr: 5025 if (card->info.type == QETH_CARD_TYPE_OSN) 5026 qeth_core_remove_osn_attributes(dev); 5027 else 5028 qeth_core_remove_device_attributes(dev); 5029 err_dbf: 5030 debug_unregister(card->debug); 5031 err_card: 5032 qeth_core_free_card(card); 5033 err_dev: 5034 put_device(dev); 5035 return rc; 5036 } 5037 5038 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5039 { 5040 unsigned long flags; 5041 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5042 5043 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5044 5045 if (card->info.type == QETH_CARD_TYPE_OSN) { 5046 qeth_core_remove_osn_attributes(&gdev->dev); 5047 } else { 5048 qeth_core_remove_device_attributes(&gdev->dev); 5049 } 5050 5051 if (card->discipline.ccwgdriver) { 5052 card->discipline.ccwgdriver->remove(gdev); 5053 qeth_core_free_discipline(card); 5054 } 5055 5056 debug_unregister(card->debug); 5057 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5058 list_del(&card->list); 5059 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5060 qeth_core_free_card(card); 5061 dev_set_drvdata(&gdev->dev, NULL); 5062 put_device(&gdev->dev); 5063 return; 5064 } 5065 5066 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5067 { 5068 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5069 int rc = 0; 5070 int def_discipline; 5071 5072 if (!card->discipline.ccwgdriver) { 5073 if (card->info.type == QETH_CARD_TYPE_IQD) 5074 def_discipline = QETH_DISCIPLINE_LAYER3; 5075 else 5076 def_discipline = QETH_DISCIPLINE_LAYER2; 5077 rc = qeth_core_load_discipline(card, def_discipline); 5078 if (rc) 5079 goto err; 5080 rc = card->discipline.ccwgdriver->probe(card->gdev); 5081 if (rc) 5082 goto err; 5083 } 5084 rc = card->discipline.ccwgdriver->set_online(gdev); 5085 err: 5086 return rc; 5087 } 5088 5089 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5090 { 5091 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5092 return card->discipline.ccwgdriver->set_offline(gdev); 5093 } 5094 5095 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5096 { 5097 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5098 if (card->discipline.ccwgdriver && 5099 card->discipline.ccwgdriver->shutdown) 5100 card->discipline.ccwgdriver->shutdown(gdev); 5101 } 5102 5103 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5104 { 5105 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5106 if (card->discipline.ccwgdriver && 5107 card->discipline.ccwgdriver->prepare) 5108 return card->discipline.ccwgdriver->prepare(gdev); 5109 return 0; 5110 } 5111 5112 static void qeth_core_complete(struct ccwgroup_device *gdev) 5113 { 5114 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5115 if (card->discipline.ccwgdriver && 5116 card->discipline.ccwgdriver->complete) 5117 card->discipline.ccwgdriver->complete(gdev); 5118 } 5119 5120 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5121 { 5122 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5123 if (card->discipline.ccwgdriver && 5124 card->discipline.ccwgdriver->freeze) 5125 return card->discipline.ccwgdriver->freeze(gdev); 5126 return 0; 5127 } 5128 5129 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5130 { 5131 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5132 if (card->discipline.ccwgdriver && 5133 card->discipline.ccwgdriver->thaw) 5134 return card->discipline.ccwgdriver->thaw(gdev); 5135 return 0; 5136 } 5137 5138 static int qeth_core_restore(struct ccwgroup_device *gdev) 5139 { 5140 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5141 if (card->discipline.ccwgdriver && 5142 card->discipline.ccwgdriver->restore) 5143 return card->discipline.ccwgdriver->restore(gdev); 5144 return 0; 5145 } 5146 5147 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5148 .driver = { 5149 .owner = THIS_MODULE, 5150 .name = "qeth", 5151 }, 5152 .driver_id = 0xD8C5E3C8, 5153 .probe = qeth_core_probe_device, 5154 .remove = qeth_core_remove_device, 5155 .set_online = qeth_core_set_online, 5156 .set_offline = qeth_core_set_offline, 5157 .shutdown = qeth_core_shutdown, 5158 .prepare = qeth_core_prepare, 5159 .complete = qeth_core_complete, 5160 .freeze = qeth_core_freeze, 5161 .thaw = qeth_core_thaw, 5162 .restore = qeth_core_restore, 5163 }; 5164 5165 static ssize_t 5166 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, 5167 size_t count) 5168 { 5169 int err; 5170 err = qeth_core_driver_group(buf, qeth_core_root_dev, 5171 qeth_core_ccwgroup_driver.driver_id); 5172 if (err) 5173 return err; 5174 else 5175 return count; 5176 } 5177 5178 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5179 5180 static struct { 5181 const char str[ETH_GSTRING_LEN]; 5182 } qeth_ethtool_stats_keys[] = { 5183 /* 0 */{"rx skbs"}, 5184 {"rx buffers"}, 5185 {"tx skbs"}, 5186 {"tx buffers"}, 5187 {"tx skbs no packing"}, 5188 {"tx buffers no packing"}, 5189 {"tx skbs packing"}, 5190 {"tx buffers packing"}, 5191 {"tx sg skbs"}, 5192 {"tx sg frags"}, 5193 /* 10 */{"rx sg skbs"}, 5194 {"rx sg frags"}, 5195 {"rx sg page allocs"}, 5196 {"tx large kbytes"}, 5197 {"tx large count"}, 5198 {"tx pk state ch n->p"}, 5199 {"tx pk state ch p->n"}, 5200 {"tx pk watermark low"}, 5201 {"tx pk watermark high"}, 5202 {"queue 0 buffer usage"}, 5203 /* 20 */{"queue 1 buffer usage"}, 5204 {"queue 2 buffer usage"}, 5205 {"queue 3 buffer usage"}, 5206 {"rx poll time"}, 5207 {"rx poll count"}, 5208 {"rx do_QDIO time"}, 5209 {"rx do_QDIO count"}, 5210 {"tx handler time"}, 5211 {"tx handler count"}, 5212 {"tx time"}, 5213 /* 30 */{"tx count"}, 5214 {"tx do_QDIO time"}, 5215 {"tx do_QDIO count"}, 5216 {"tx csum"}, 5217 {"tx lin"}, 5218 {"cq handler count"}, 5219 {"cq handler time"} 5220 }; 5221 5222 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5223 { 5224 switch (stringset) { 5225 case ETH_SS_STATS: 5226 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5227 default: 5228 return -EINVAL; 5229 } 5230 } 5231 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5232 5233 void qeth_core_get_ethtool_stats(struct net_device *dev, 5234 struct ethtool_stats *stats, u64 *data) 5235 { 5236 struct qeth_card *card = dev->ml_priv; 5237 data[0] = card->stats.rx_packets - 5238 card->perf_stats.initial_rx_packets; 5239 data[1] = card->perf_stats.bufs_rec; 5240 data[2] = card->stats.tx_packets - 5241 card->perf_stats.initial_tx_packets; 5242 data[3] = card->perf_stats.bufs_sent; 5243 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5244 - card->perf_stats.skbs_sent_pack; 5245 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5246 data[6] = card->perf_stats.skbs_sent_pack; 5247 data[7] = card->perf_stats.bufs_sent_pack; 5248 data[8] = card->perf_stats.sg_skbs_sent; 5249 data[9] = card->perf_stats.sg_frags_sent; 5250 data[10] = card->perf_stats.sg_skbs_rx; 5251 data[11] = card->perf_stats.sg_frags_rx; 5252 data[12] = card->perf_stats.sg_alloc_page_rx; 5253 data[13] = (card->perf_stats.large_send_bytes >> 10); 5254 data[14] = card->perf_stats.large_send_cnt; 5255 data[15] = card->perf_stats.sc_dp_p; 5256 data[16] = card->perf_stats.sc_p_dp; 5257 data[17] = QETH_LOW_WATERMARK_PACK; 5258 data[18] = QETH_HIGH_WATERMARK_PACK; 5259 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5260 data[20] = (card->qdio.no_out_queues > 1) ? 5261 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5262 data[21] = (card->qdio.no_out_queues > 2) ? 5263 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5264 data[22] = (card->qdio.no_out_queues > 3) ? 5265 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5266 data[23] = card->perf_stats.inbound_time; 5267 data[24] = card->perf_stats.inbound_cnt; 5268 data[25] = card->perf_stats.inbound_do_qdio_time; 5269 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5270 data[27] = card->perf_stats.outbound_handler_time; 5271 data[28] = card->perf_stats.outbound_handler_cnt; 5272 data[29] = card->perf_stats.outbound_time; 5273 data[30] = card->perf_stats.outbound_cnt; 5274 data[31] = card->perf_stats.outbound_do_qdio_time; 5275 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5276 data[33] = card->perf_stats.tx_csum; 5277 data[34] = card->perf_stats.tx_lin; 5278 data[35] = card->perf_stats.cq_cnt; 5279 data[36] = card->perf_stats.cq_time; 5280 } 5281 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5282 5283 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5284 { 5285 switch (stringset) { 5286 case ETH_SS_STATS: 5287 memcpy(data, &qeth_ethtool_stats_keys, 5288 sizeof(qeth_ethtool_stats_keys)); 5289 break; 5290 default: 5291 WARN_ON(1); 5292 break; 5293 } 5294 } 5295 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5296 5297 void qeth_core_get_drvinfo(struct net_device *dev, 5298 struct ethtool_drvinfo *info) 5299 { 5300 struct qeth_card *card = dev->ml_priv; 5301 if (card->options.layer2) 5302 strcpy(info->driver, "qeth_l2"); 5303 else 5304 strcpy(info->driver, "qeth_l3"); 5305 5306 strcpy(info->version, "1.0"); 5307 strcpy(info->fw_version, card->info.mcl_level); 5308 sprintf(info->bus_info, "%s/%s/%s", 5309 CARD_RDEV_ID(card), 5310 CARD_WDEV_ID(card), 5311 CARD_DDEV_ID(card)); 5312 } 5313 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5314 5315 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5316 struct ethtool_cmd *ecmd) 5317 { 5318 struct qeth_card *card = netdev->ml_priv; 5319 enum qeth_link_types link_type; 5320 5321 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5322 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5323 else 5324 link_type = card->info.link_type; 5325 5326 ecmd->transceiver = XCVR_INTERNAL; 5327 ecmd->supported = SUPPORTED_Autoneg; 5328 ecmd->advertising = ADVERTISED_Autoneg; 5329 ecmd->duplex = DUPLEX_FULL; 5330 ecmd->autoneg = AUTONEG_ENABLE; 5331 5332 switch (link_type) { 5333 case QETH_LINK_TYPE_FAST_ETH: 5334 case QETH_LINK_TYPE_LANE_ETH100: 5335 ecmd->supported |= SUPPORTED_10baseT_Half | 5336 SUPPORTED_10baseT_Full | 5337 SUPPORTED_100baseT_Half | 5338 SUPPORTED_100baseT_Full | 5339 SUPPORTED_TP; 5340 ecmd->advertising |= ADVERTISED_10baseT_Half | 5341 ADVERTISED_10baseT_Full | 5342 ADVERTISED_100baseT_Half | 5343 ADVERTISED_100baseT_Full | 5344 ADVERTISED_TP; 5345 ecmd->speed = SPEED_100; 5346 ecmd->port = PORT_TP; 5347 break; 5348 5349 case QETH_LINK_TYPE_GBIT_ETH: 5350 case QETH_LINK_TYPE_LANE_ETH1000: 5351 ecmd->supported |= SUPPORTED_10baseT_Half | 5352 SUPPORTED_10baseT_Full | 5353 SUPPORTED_100baseT_Half | 5354 SUPPORTED_100baseT_Full | 5355 SUPPORTED_1000baseT_Half | 5356 SUPPORTED_1000baseT_Full | 5357 SUPPORTED_FIBRE; 5358 ecmd->advertising |= ADVERTISED_10baseT_Half | 5359 ADVERTISED_10baseT_Full | 5360 ADVERTISED_100baseT_Half | 5361 ADVERTISED_100baseT_Full | 5362 ADVERTISED_1000baseT_Half | 5363 ADVERTISED_1000baseT_Full | 5364 ADVERTISED_FIBRE; 5365 ecmd->speed = SPEED_1000; 5366 ecmd->port = PORT_FIBRE; 5367 break; 5368 5369 case QETH_LINK_TYPE_10GBIT_ETH: 5370 ecmd->supported |= SUPPORTED_10baseT_Half | 5371 SUPPORTED_10baseT_Full | 5372 SUPPORTED_100baseT_Half | 5373 SUPPORTED_100baseT_Full | 5374 SUPPORTED_1000baseT_Half | 5375 SUPPORTED_1000baseT_Full | 5376 SUPPORTED_10000baseT_Full | 5377 SUPPORTED_FIBRE; 5378 ecmd->advertising |= ADVERTISED_10baseT_Half | 5379 ADVERTISED_10baseT_Full | 5380 ADVERTISED_100baseT_Half | 5381 ADVERTISED_100baseT_Full | 5382 ADVERTISED_1000baseT_Half | 5383 ADVERTISED_1000baseT_Full | 5384 ADVERTISED_10000baseT_Full | 5385 ADVERTISED_FIBRE; 5386 ecmd->speed = SPEED_10000; 5387 ecmd->port = PORT_FIBRE; 5388 break; 5389 5390 default: 5391 ecmd->supported |= SUPPORTED_10baseT_Half | 5392 SUPPORTED_10baseT_Full | 5393 SUPPORTED_TP; 5394 ecmd->advertising |= ADVERTISED_10baseT_Half | 5395 ADVERTISED_10baseT_Full | 5396 ADVERTISED_TP; 5397 ecmd->speed = SPEED_10; 5398 ecmd->port = PORT_TP; 5399 } 5400 5401 return 0; 5402 } 5403 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 5404 5405 static int __init qeth_core_init(void) 5406 { 5407 int rc; 5408 5409 pr_info("loading core functions\n"); 5410 INIT_LIST_HEAD(&qeth_core_card_list.list); 5411 rwlock_init(&qeth_core_card_list.rwlock); 5412 5413 rc = qeth_register_dbf_views(); 5414 if (rc) 5415 goto out_err; 5416 rc = ccw_driver_register(&qeth_ccw_driver); 5417 if (rc) 5418 goto ccw_err; 5419 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 5420 if (rc) 5421 goto ccwgroup_err; 5422 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, 5423 &driver_attr_group); 5424 if (rc) 5425 goto driver_err; 5426 qeth_core_root_dev = root_device_register("qeth"); 5427 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 5428 if (rc) 5429 goto register_err; 5430 5431 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 5432 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 5433 if (!qeth_core_header_cache) { 5434 rc = -ENOMEM; 5435 goto slab_err; 5436 } 5437 5438 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 5439 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 5440 if (!qeth_qdio_outbuf_cache) { 5441 rc = -ENOMEM; 5442 goto cqslab_err; 5443 } 5444 5445 return 0; 5446 cqslab_err: 5447 kmem_cache_destroy(qeth_core_header_cache); 5448 slab_err: 5449 root_device_unregister(qeth_core_root_dev); 5450 register_err: 5451 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 5452 &driver_attr_group); 5453 driver_err: 5454 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5455 ccwgroup_err: 5456 ccw_driver_unregister(&qeth_ccw_driver); 5457 ccw_err: 5458 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); 5459 qeth_unregister_dbf_views(); 5460 out_err: 5461 pr_err("Initializing the qeth device driver failed\n"); 5462 return rc; 5463 } 5464 5465 static void __exit qeth_core_exit(void) 5466 { 5467 root_device_unregister(qeth_core_root_dev); 5468 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 5469 &driver_attr_group); 5470 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5471 ccw_driver_unregister(&qeth_ccw_driver); 5472 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5473 kmem_cache_destroy(qeth_core_header_cache); 5474 qeth_unregister_dbf_views(); 5475 pr_info("core functions removed\n"); 5476 } 5477 5478 module_init(qeth_core_init); 5479 module_exit(qeth_core_exit); 5480 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 5481 MODULE_DESCRIPTION("qeth core functions"); 5482 MODULE_LICENSE("GPL"); 5483