1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 24 #include <asm/ebcdic.h> 25 #include <asm/io.h> 26 #include <asm/sysinfo.h> 27 #include <asm/compat.h> 28 29 #include "qeth_core.h" 30 31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 33 /* N P A M L V H */ 34 [QETH_DBF_SETUP] = {"qeth_setup", 35 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 36 [QETH_DBF_MSG] = {"qeth_msg", 37 8, 1, 128, 3, &debug_sprintf_view, NULL}, 38 [QETH_DBF_CTRL] = {"qeth_control", 39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 40 }; 41 EXPORT_SYMBOL_GPL(qeth_dbf); 42 43 struct qeth_card_list_struct qeth_core_card_list; 44 EXPORT_SYMBOL_GPL(qeth_core_card_list); 45 struct kmem_cache *qeth_core_header_cache; 46 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 47 static struct kmem_cache *qeth_qdio_outbuf_cache; 48 49 static struct device *qeth_core_root_dev; 50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 51 static struct lock_class_key qdio_out_skb_queue_key; 52 static struct mutex qeth_mod_mutex; 53 54 static void qeth_send_control_data_cb(struct qeth_channel *, 55 struct qeth_cmd_buffer *); 56 static int qeth_issue_next_read(struct qeth_card *); 57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 59 static void qeth_free_buffer_pool(struct qeth_card *); 60 static int qeth_qdio_establish(struct qeth_card *); 61 static void qeth_free_qdio_buffers(struct qeth_card *); 62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 63 struct qeth_qdio_out_buffer *buf, 64 enum iucv_tx_notify notification); 65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 67 struct qeth_qdio_out_buffer *buf, 68 enum qeth_qdio_buffer_states newbufstate); 69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 70 71 static inline const char *qeth_get_cardname(struct qeth_card *card) 72 { 73 if (card->info.guestlan) { 74 switch (card->info.type) { 75 case QETH_CARD_TYPE_OSD: 76 return " Guest LAN QDIO"; 77 case QETH_CARD_TYPE_IQD: 78 return " Guest LAN Hiper"; 79 case QETH_CARD_TYPE_OSM: 80 return " Guest LAN QDIO - OSM"; 81 case QETH_CARD_TYPE_OSX: 82 return " Guest LAN QDIO - OSX"; 83 default: 84 return " unknown"; 85 } 86 } else { 87 switch (card->info.type) { 88 case QETH_CARD_TYPE_OSD: 89 return " OSD Express"; 90 case QETH_CARD_TYPE_IQD: 91 return " HiperSockets"; 92 case QETH_CARD_TYPE_OSN: 93 return " OSN QDIO"; 94 case QETH_CARD_TYPE_OSM: 95 return " OSM QDIO"; 96 case QETH_CARD_TYPE_OSX: 97 return " OSX QDIO"; 98 default: 99 return " unknown"; 100 } 101 } 102 return " n/a"; 103 } 104 105 /* max length to be returned: 14 */ 106 const char *qeth_get_cardname_short(struct qeth_card *card) 107 { 108 if (card->info.guestlan) { 109 switch (card->info.type) { 110 case QETH_CARD_TYPE_OSD: 111 return "GuestLAN QDIO"; 112 case QETH_CARD_TYPE_IQD: 113 return "GuestLAN Hiper"; 114 case QETH_CARD_TYPE_OSM: 115 return "GuestLAN OSM"; 116 case QETH_CARD_TYPE_OSX: 117 return "GuestLAN OSX"; 118 default: 119 return "unknown"; 120 } 121 } else { 122 switch (card->info.type) { 123 case QETH_CARD_TYPE_OSD: 124 switch (card->info.link_type) { 125 case QETH_LINK_TYPE_FAST_ETH: 126 return "OSD_100"; 127 case QETH_LINK_TYPE_HSTR: 128 return "HSTR"; 129 case QETH_LINK_TYPE_GBIT_ETH: 130 return "OSD_1000"; 131 case QETH_LINK_TYPE_10GBIT_ETH: 132 return "OSD_10GIG"; 133 case QETH_LINK_TYPE_LANE_ETH100: 134 return "OSD_FE_LANE"; 135 case QETH_LINK_TYPE_LANE_TR: 136 return "OSD_TR_LANE"; 137 case QETH_LINK_TYPE_LANE_ETH1000: 138 return "OSD_GbE_LANE"; 139 case QETH_LINK_TYPE_LANE: 140 return "OSD_ATM_LANE"; 141 default: 142 return "OSD_Express"; 143 } 144 case QETH_CARD_TYPE_IQD: 145 return "HiperSockets"; 146 case QETH_CARD_TYPE_OSN: 147 return "OSN"; 148 case QETH_CARD_TYPE_OSM: 149 return "OSM_1000"; 150 case QETH_CARD_TYPE_OSX: 151 return "OSX_10GIG"; 152 default: 153 return "unknown"; 154 } 155 } 156 return "n/a"; 157 } 158 159 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 160 int clear_start_mask) 161 { 162 unsigned long flags; 163 164 spin_lock_irqsave(&card->thread_mask_lock, flags); 165 card->thread_allowed_mask = threads; 166 if (clear_start_mask) 167 card->thread_start_mask &= threads; 168 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 169 wake_up(&card->wait_q); 170 } 171 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 172 173 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 174 { 175 unsigned long flags; 176 int rc = 0; 177 178 spin_lock_irqsave(&card->thread_mask_lock, flags); 179 rc = (card->thread_running_mask & threads); 180 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 181 return rc; 182 } 183 EXPORT_SYMBOL_GPL(qeth_threads_running); 184 185 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 186 { 187 return wait_event_interruptible(card->wait_q, 188 qeth_threads_running(card, threads) == 0); 189 } 190 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 191 192 void qeth_clear_working_pool_list(struct qeth_card *card) 193 { 194 struct qeth_buffer_pool_entry *pool_entry, *tmp; 195 196 QETH_CARD_TEXT(card, 5, "clwrklst"); 197 list_for_each_entry_safe(pool_entry, tmp, 198 &card->qdio.in_buf_pool.entry_list, list){ 199 list_del(&pool_entry->list); 200 } 201 } 202 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 203 204 static int qeth_alloc_buffer_pool(struct qeth_card *card) 205 { 206 struct qeth_buffer_pool_entry *pool_entry; 207 void *ptr; 208 int i, j; 209 210 QETH_CARD_TEXT(card, 5, "alocpool"); 211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 213 if (!pool_entry) { 214 qeth_free_buffer_pool(card); 215 return -ENOMEM; 216 } 217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 218 ptr = (void *) __get_free_page(GFP_KERNEL); 219 if (!ptr) { 220 while (j > 0) 221 free_page((unsigned long) 222 pool_entry->elements[--j]); 223 kfree(pool_entry); 224 qeth_free_buffer_pool(card); 225 return -ENOMEM; 226 } 227 pool_entry->elements[j] = ptr; 228 } 229 list_add(&pool_entry->init_list, 230 &card->qdio.init_pool.entry_list); 231 } 232 return 0; 233 } 234 235 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 236 { 237 QETH_CARD_TEXT(card, 2, "realcbp"); 238 239 if ((card->state != CARD_STATE_DOWN) && 240 (card->state != CARD_STATE_RECOVER)) 241 return -EPERM; 242 243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 244 qeth_clear_working_pool_list(card); 245 qeth_free_buffer_pool(card); 246 card->qdio.in_buf_pool.buf_count = bufcnt; 247 card->qdio.init_pool.buf_count = bufcnt; 248 return qeth_alloc_buffer_pool(card); 249 } 250 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 251 252 static inline int qeth_cq_init(struct qeth_card *card) 253 { 254 int rc; 255 256 if (card->options.cq == QETH_CQ_ENABLED) { 257 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 258 memset(card->qdio.c_q->qdio_bufs, 0, 259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 260 card->qdio.c_q->next_buf_to_init = 127; 261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 262 card->qdio.no_in_queues - 1, 0, 263 127); 264 if (rc) { 265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 266 goto out; 267 } 268 } 269 rc = 0; 270 out: 271 return rc; 272 } 273 274 static inline int qeth_alloc_cq(struct qeth_card *card) 275 { 276 int rc; 277 278 if (card->options.cq == QETH_CQ_ENABLED) { 279 int i; 280 struct qdio_outbuf_state *outbuf_states; 281 282 QETH_DBF_TEXT(SETUP, 2, "cqon"); 283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q), 284 GFP_KERNEL); 285 if (!card->qdio.c_q) { 286 rc = -1; 287 goto kmsg_out; 288 } 289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *)); 290 291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 292 card->qdio.c_q->bufs[i].buffer = 293 &card->qdio.c_q->qdio_bufs[i]; 294 } 295 296 card->qdio.no_in_queues = 2; 297 298 card->qdio.out_bufstates = (struct qdio_outbuf_state *) 299 kzalloc(card->qdio.no_out_queues * 300 QDIO_MAX_BUFFERS_PER_Q * 301 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 302 outbuf_states = card->qdio.out_bufstates; 303 if (outbuf_states == NULL) { 304 rc = -1; 305 goto free_cq_out; 306 } 307 for (i = 0; i < card->qdio.no_out_queues; ++i) { 308 card->qdio.out_qs[i]->bufstates = outbuf_states; 309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 310 } 311 } else { 312 QETH_DBF_TEXT(SETUP, 2, "nocq"); 313 card->qdio.c_q = NULL; 314 card->qdio.no_in_queues = 1; 315 } 316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 317 rc = 0; 318 out: 319 return rc; 320 free_cq_out: 321 kfree(card->qdio.c_q); 322 card->qdio.c_q = NULL; 323 kmsg_out: 324 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 325 goto out; 326 } 327 328 static inline void qeth_free_cq(struct qeth_card *card) 329 { 330 if (card->qdio.c_q) { 331 --card->qdio.no_in_queues; 332 kfree(card->qdio.c_q); 333 card->qdio.c_q = NULL; 334 } 335 kfree(card->qdio.out_bufstates); 336 card->qdio.out_bufstates = NULL; 337 } 338 339 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 340 int delayed) { 341 enum iucv_tx_notify n; 342 343 switch (sbalf15) { 344 case 0: 345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 346 break; 347 case 4: 348 case 16: 349 case 17: 350 case 18: 351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 352 TX_NOTIFY_UNREACHABLE; 353 break; 354 default: 355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 356 TX_NOTIFY_GENERALERROR; 357 break; 358 } 359 360 return n; 361 } 362 363 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 364 int bidx, int forced_cleanup) 365 { 366 if (q->card->options.cq != QETH_CQ_ENABLED) 367 return; 368 369 if (q->bufs[bidx]->next_pending != NULL) { 370 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 371 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 372 373 while (c) { 374 if (forced_cleanup || 375 atomic_read(&c->state) == 376 QETH_QDIO_BUF_HANDLED_DELAYED) { 377 struct qeth_qdio_out_buffer *f = c; 378 QETH_CARD_TEXT(f->q->card, 5, "fp"); 379 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 380 /* release here to avoid interleaving between 381 outbound tasklet and inbound tasklet 382 regarding notifications and lifecycle */ 383 qeth_release_skbs(c); 384 385 c = f->next_pending; 386 BUG_ON(head->next_pending != f); 387 head->next_pending = c; 388 kmem_cache_free(qeth_qdio_outbuf_cache, f); 389 } else { 390 head = c; 391 c = c->next_pending; 392 } 393 394 } 395 } 396 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 397 QETH_QDIO_BUF_HANDLED_DELAYED)) { 398 /* for recovery situations */ 399 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 400 qeth_init_qdio_out_buf(q, bidx); 401 QETH_CARD_TEXT(q->card, 2, "clprecov"); 402 } 403 } 404 405 406 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 407 unsigned long phys_aob_addr) { 408 struct qaob *aob; 409 struct qeth_qdio_out_buffer *buffer; 410 enum iucv_tx_notify notification; 411 412 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 413 QETH_CARD_TEXT(card, 5, "haob"); 414 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 415 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 416 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 417 418 BUG_ON(buffer == NULL); 419 420 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 421 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 422 notification = TX_NOTIFY_OK; 423 } else { 424 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING); 425 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 426 notification = TX_NOTIFY_DELAYED_OK; 427 } 428 429 if (aob->aorc != 0) { 430 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 431 notification = qeth_compute_cq_notification(aob->aorc, 1); 432 } 433 qeth_notify_skbs(buffer->q, buffer, notification); 434 435 buffer->aob = NULL; 436 qeth_clear_output_buffer(buffer->q, buffer, 437 QETH_QDIO_BUF_HANDLED_DELAYED); 438 439 /* from here on: do not touch buffer anymore */ 440 qdio_release_aob(aob); 441 } 442 443 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 444 { 445 return card->options.cq == QETH_CQ_ENABLED && 446 card->qdio.c_q != NULL && 447 queue != 0 && 448 queue == card->qdio.no_in_queues - 1; 449 } 450 451 452 static int qeth_issue_next_read(struct qeth_card *card) 453 { 454 int rc; 455 struct qeth_cmd_buffer *iob; 456 457 QETH_CARD_TEXT(card, 5, "issnxrd"); 458 if (card->read.state != CH_STATE_UP) 459 return -EIO; 460 iob = qeth_get_buffer(&card->read); 461 if (!iob) { 462 dev_warn(&card->gdev->dev, "The qeth device driver " 463 "failed to recover an error on the device\n"); 464 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 465 "available\n", dev_name(&card->gdev->dev)); 466 return -ENOMEM; 467 } 468 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 469 QETH_CARD_TEXT(card, 6, "noirqpnd"); 470 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 471 (addr_t) iob, 0, 0); 472 if (rc) { 473 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 474 "rc=%i\n", dev_name(&card->gdev->dev), rc); 475 atomic_set(&card->read.irq_pending, 0); 476 card->read_or_write_problem = 1; 477 qeth_schedule_recovery(card); 478 wake_up(&card->wait_q); 479 } 480 return rc; 481 } 482 483 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 484 { 485 struct qeth_reply *reply; 486 487 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 488 if (reply) { 489 atomic_set(&reply->refcnt, 1); 490 atomic_set(&reply->received, 0); 491 reply->card = card; 492 } 493 return reply; 494 } 495 496 static void qeth_get_reply(struct qeth_reply *reply) 497 { 498 WARN_ON(atomic_read(&reply->refcnt) <= 0); 499 atomic_inc(&reply->refcnt); 500 } 501 502 static void qeth_put_reply(struct qeth_reply *reply) 503 { 504 WARN_ON(atomic_read(&reply->refcnt) <= 0); 505 if (atomic_dec_and_test(&reply->refcnt)) 506 kfree(reply); 507 } 508 509 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 510 struct qeth_card *card) 511 { 512 char *ipa_name; 513 int com = cmd->hdr.command; 514 ipa_name = qeth_get_ipa_cmd_name(com); 515 if (rc) 516 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 517 "x%X \"%s\"\n", 518 ipa_name, com, dev_name(&card->gdev->dev), 519 QETH_CARD_IFNAME(card), rc, 520 qeth_get_ipa_msg(rc)); 521 else 522 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 523 ipa_name, com, dev_name(&card->gdev->dev), 524 QETH_CARD_IFNAME(card)); 525 } 526 527 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 528 struct qeth_cmd_buffer *iob) 529 { 530 struct qeth_ipa_cmd *cmd = NULL; 531 532 QETH_CARD_TEXT(card, 5, "chkipad"); 533 if (IS_IPA(iob->data)) { 534 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 535 if (IS_IPA_REPLY(cmd)) { 536 if (cmd->hdr.command != IPA_CMD_SETCCID && 537 cmd->hdr.command != IPA_CMD_DELCCID && 538 cmd->hdr.command != IPA_CMD_MODCCID && 539 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 540 qeth_issue_ipa_msg(cmd, 541 cmd->hdr.return_code, card); 542 return cmd; 543 } else { 544 switch (cmd->hdr.command) { 545 case IPA_CMD_STOPLAN: 546 dev_warn(&card->gdev->dev, 547 "The link for interface %s on CHPID" 548 " 0x%X failed\n", 549 QETH_CARD_IFNAME(card), 550 card->info.chpid); 551 card->lan_online = 0; 552 if (card->dev && netif_carrier_ok(card->dev)) 553 netif_carrier_off(card->dev); 554 return NULL; 555 case IPA_CMD_STARTLAN: 556 dev_info(&card->gdev->dev, 557 "The link for %s on CHPID 0x%X has" 558 " been restored\n", 559 QETH_CARD_IFNAME(card), 560 card->info.chpid); 561 netif_carrier_on(card->dev); 562 card->lan_online = 1; 563 if (card->info.hwtrap) 564 card->info.hwtrap = 2; 565 qeth_schedule_recovery(card); 566 return NULL; 567 case IPA_CMD_MODCCID: 568 return cmd; 569 case IPA_CMD_REGISTER_LOCAL_ADDR: 570 QETH_CARD_TEXT(card, 3, "irla"); 571 break; 572 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 573 QETH_CARD_TEXT(card, 3, "urla"); 574 break; 575 default: 576 QETH_DBF_MESSAGE(2, "Received data is IPA " 577 "but not a reply!\n"); 578 break; 579 } 580 } 581 } 582 return cmd; 583 } 584 585 void qeth_clear_ipacmd_list(struct qeth_card *card) 586 { 587 struct qeth_reply *reply, *r; 588 unsigned long flags; 589 590 QETH_CARD_TEXT(card, 4, "clipalst"); 591 592 spin_lock_irqsave(&card->lock, flags); 593 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 594 qeth_get_reply(reply); 595 reply->rc = -EIO; 596 atomic_inc(&reply->received); 597 list_del_init(&reply->list); 598 wake_up(&reply->wait_q); 599 qeth_put_reply(reply); 600 } 601 spin_unlock_irqrestore(&card->lock, flags); 602 atomic_set(&card->write.irq_pending, 0); 603 } 604 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 605 606 static int qeth_check_idx_response(struct qeth_card *card, 607 unsigned char *buffer) 608 { 609 if (!buffer) 610 return 0; 611 612 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 613 if ((buffer[2] & 0xc0) == 0xc0) { 614 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 615 "with cause code 0x%02x%s\n", 616 buffer[4], 617 ((buffer[4] == 0x22) ? 618 " -- try another portname" : "")); 619 QETH_CARD_TEXT(card, 2, "ckidxres"); 620 QETH_CARD_TEXT(card, 2, " idxterm"); 621 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 622 if (buffer[4] == 0xf6) { 623 dev_err(&card->gdev->dev, 624 "The qeth device is not configured " 625 "for the OSI layer required by z/VM\n"); 626 return -EPERM; 627 } 628 return -EIO; 629 } 630 return 0; 631 } 632 633 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 634 __u32 len) 635 { 636 struct qeth_card *card; 637 638 card = CARD_FROM_CDEV(channel->ccwdev); 639 QETH_CARD_TEXT(card, 4, "setupccw"); 640 if (channel == &card->read) 641 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 642 else 643 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 644 channel->ccw.count = len; 645 channel->ccw.cda = (__u32) __pa(iob); 646 } 647 648 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 649 { 650 __u8 index; 651 652 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 653 index = channel->io_buf_no; 654 do { 655 if (channel->iob[index].state == BUF_STATE_FREE) { 656 channel->iob[index].state = BUF_STATE_LOCKED; 657 channel->io_buf_no = (channel->io_buf_no + 1) % 658 QETH_CMD_BUFFER_NO; 659 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 660 return channel->iob + index; 661 } 662 index = (index + 1) % QETH_CMD_BUFFER_NO; 663 } while (index != channel->io_buf_no); 664 665 return NULL; 666 } 667 668 void qeth_release_buffer(struct qeth_channel *channel, 669 struct qeth_cmd_buffer *iob) 670 { 671 unsigned long flags; 672 673 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 674 spin_lock_irqsave(&channel->iob_lock, flags); 675 memset(iob->data, 0, QETH_BUFSIZE); 676 iob->state = BUF_STATE_FREE; 677 iob->callback = qeth_send_control_data_cb; 678 iob->rc = 0; 679 spin_unlock_irqrestore(&channel->iob_lock, flags); 680 wake_up(&channel->wait_q); 681 } 682 EXPORT_SYMBOL_GPL(qeth_release_buffer); 683 684 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 685 { 686 struct qeth_cmd_buffer *buffer = NULL; 687 unsigned long flags; 688 689 spin_lock_irqsave(&channel->iob_lock, flags); 690 buffer = __qeth_get_buffer(channel); 691 spin_unlock_irqrestore(&channel->iob_lock, flags); 692 return buffer; 693 } 694 695 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 696 { 697 struct qeth_cmd_buffer *buffer; 698 wait_event(channel->wait_q, 699 ((buffer = qeth_get_buffer(channel)) != NULL)); 700 return buffer; 701 } 702 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 703 704 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 705 { 706 int cnt; 707 708 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 709 qeth_release_buffer(channel, &channel->iob[cnt]); 710 channel->buf_no = 0; 711 channel->io_buf_no = 0; 712 } 713 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 714 715 static void qeth_send_control_data_cb(struct qeth_channel *channel, 716 struct qeth_cmd_buffer *iob) 717 { 718 struct qeth_card *card; 719 struct qeth_reply *reply, *r; 720 struct qeth_ipa_cmd *cmd; 721 unsigned long flags; 722 int keep_reply; 723 int rc = 0; 724 725 card = CARD_FROM_CDEV(channel->ccwdev); 726 QETH_CARD_TEXT(card, 4, "sndctlcb"); 727 rc = qeth_check_idx_response(card, iob->data); 728 switch (rc) { 729 case 0: 730 break; 731 case -EIO: 732 qeth_clear_ipacmd_list(card); 733 qeth_schedule_recovery(card); 734 /* fall through */ 735 default: 736 goto out; 737 } 738 739 cmd = qeth_check_ipa_data(card, iob); 740 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 741 goto out; 742 /*in case of OSN : check if cmd is set */ 743 if (card->info.type == QETH_CARD_TYPE_OSN && 744 cmd && 745 cmd->hdr.command != IPA_CMD_STARTLAN && 746 card->osn_info.assist_cb != NULL) { 747 card->osn_info.assist_cb(card->dev, cmd); 748 goto out; 749 } 750 751 spin_lock_irqsave(&card->lock, flags); 752 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 753 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 754 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 755 qeth_get_reply(reply); 756 list_del_init(&reply->list); 757 spin_unlock_irqrestore(&card->lock, flags); 758 keep_reply = 0; 759 if (reply->callback != NULL) { 760 if (cmd) { 761 reply->offset = (__u16)((char *)cmd - 762 (char *)iob->data); 763 keep_reply = reply->callback(card, 764 reply, 765 (unsigned long)cmd); 766 } else 767 keep_reply = reply->callback(card, 768 reply, 769 (unsigned long)iob); 770 } 771 if (cmd) 772 reply->rc = (u16) cmd->hdr.return_code; 773 else if (iob->rc) 774 reply->rc = iob->rc; 775 if (keep_reply) { 776 spin_lock_irqsave(&card->lock, flags); 777 list_add_tail(&reply->list, 778 &card->cmd_waiter_list); 779 spin_unlock_irqrestore(&card->lock, flags); 780 } else { 781 atomic_inc(&reply->received); 782 wake_up(&reply->wait_q); 783 } 784 qeth_put_reply(reply); 785 goto out; 786 } 787 } 788 spin_unlock_irqrestore(&card->lock, flags); 789 out: 790 memcpy(&card->seqno.pdu_hdr_ack, 791 QETH_PDU_HEADER_SEQ_NO(iob->data), 792 QETH_SEQ_NO_LENGTH); 793 qeth_release_buffer(channel, iob); 794 } 795 796 static int qeth_setup_channel(struct qeth_channel *channel) 797 { 798 int cnt; 799 800 QETH_DBF_TEXT(SETUP, 2, "setupch"); 801 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 802 channel->iob[cnt].data = 803 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 804 if (channel->iob[cnt].data == NULL) 805 break; 806 channel->iob[cnt].state = BUF_STATE_FREE; 807 channel->iob[cnt].channel = channel; 808 channel->iob[cnt].callback = qeth_send_control_data_cb; 809 channel->iob[cnt].rc = 0; 810 } 811 if (cnt < QETH_CMD_BUFFER_NO) { 812 while (cnt-- > 0) 813 kfree(channel->iob[cnt].data); 814 return -ENOMEM; 815 } 816 channel->buf_no = 0; 817 channel->io_buf_no = 0; 818 atomic_set(&channel->irq_pending, 0); 819 spin_lock_init(&channel->iob_lock); 820 821 init_waitqueue_head(&channel->wait_q); 822 return 0; 823 } 824 825 static int qeth_set_thread_start_bit(struct qeth_card *card, 826 unsigned long thread) 827 { 828 unsigned long flags; 829 830 spin_lock_irqsave(&card->thread_mask_lock, flags); 831 if (!(card->thread_allowed_mask & thread) || 832 (card->thread_start_mask & thread)) { 833 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 834 return -EPERM; 835 } 836 card->thread_start_mask |= thread; 837 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 838 return 0; 839 } 840 841 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 842 { 843 unsigned long flags; 844 845 spin_lock_irqsave(&card->thread_mask_lock, flags); 846 card->thread_start_mask &= ~thread; 847 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 848 wake_up(&card->wait_q); 849 } 850 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 851 852 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 853 { 854 unsigned long flags; 855 856 spin_lock_irqsave(&card->thread_mask_lock, flags); 857 card->thread_running_mask &= ~thread; 858 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 859 wake_up(&card->wait_q); 860 } 861 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 862 863 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 864 { 865 unsigned long flags; 866 int rc = 0; 867 868 spin_lock_irqsave(&card->thread_mask_lock, flags); 869 if (card->thread_start_mask & thread) { 870 if ((card->thread_allowed_mask & thread) && 871 !(card->thread_running_mask & thread)) { 872 rc = 1; 873 card->thread_start_mask &= ~thread; 874 card->thread_running_mask |= thread; 875 } else 876 rc = -EPERM; 877 } 878 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 879 return rc; 880 } 881 882 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 883 { 884 int rc = 0; 885 886 wait_event(card->wait_q, 887 (rc = __qeth_do_run_thread(card, thread)) >= 0); 888 return rc; 889 } 890 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 891 892 void qeth_schedule_recovery(struct qeth_card *card) 893 { 894 QETH_CARD_TEXT(card, 2, "startrec"); 895 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 896 schedule_work(&card->kernel_thread_starter); 897 } 898 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 899 900 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 901 { 902 int dstat, cstat; 903 char *sense; 904 struct qeth_card *card; 905 906 sense = (char *) irb->ecw; 907 cstat = irb->scsw.cmd.cstat; 908 dstat = irb->scsw.cmd.dstat; 909 card = CARD_FROM_CDEV(cdev); 910 911 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 912 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 913 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 914 QETH_CARD_TEXT(card, 2, "CGENCHK"); 915 dev_warn(&cdev->dev, "The qeth device driver " 916 "failed to recover an error on the device\n"); 917 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 918 dev_name(&cdev->dev), dstat, cstat); 919 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 920 16, 1, irb, 64, 1); 921 return 1; 922 } 923 924 if (dstat & DEV_STAT_UNIT_CHECK) { 925 if (sense[SENSE_RESETTING_EVENT_BYTE] & 926 SENSE_RESETTING_EVENT_FLAG) { 927 QETH_CARD_TEXT(card, 2, "REVIND"); 928 return 1; 929 } 930 if (sense[SENSE_COMMAND_REJECT_BYTE] & 931 SENSE_COMMAND_REJECT_FLAG) { 932 QETH_CARD_TEXT(card, 2, "CMDREJi"); 933 return 1; 934 } 935 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 936 QETH_CARD_TEXT(card, 2, "AFFE"); 937 return 1; 938 } 939 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 940 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 941 return 0; 942 } 943 QETH_CARD_TEXT(card, 2, "DGENCHK"); 944 return 1; 945 } 946 return 0; 947 } 948 949 static long __qeth_check_irb_error(struct ccw_device *cdev, 950 unsigned long intparm, struct irb *irb) 951 { 952 struct qeth_card *card; 953 954 card = CARD_FROM_CDEV(cdev); 955 956 if (!IS_ERR(irb)) 957 return 0; 958 959 switch (PTR_ERR(irb)) { 960 case -EIO: 961 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 962 dev_name(&cdev->dev)); 963 QETH_CARD_TEXT(card, 2, "ckirberr"); 964 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 965 break; 966 case -ETIMEDOUT: 967 dev_warn(&cdev->dev, "A hardware operation timed out" 968 " on the device\n"); 969 QETH_CARD_TEXT(card, 2, "ckirberr"); 970 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 971 if (intparm == QETH_RCD_PARM) { 972 if (card && (card->data.ccwdev == cdev)) { 973 card->data.state = CH_STATE_DOWN; 974 wake_up(&card->wait_q); 975 } 976 } 977 break; 978 default: 979 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 980 dev_name(&cdev->dev), PTR_ERR(irb)); 981 QETH_CARD_TEXT(card, 2, "ckirberr"); 982 QETH_CARD_TEXT(card, 2, " rc???"); 983 } 984 return PTR_ERR(irb); 985 } 986 987 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 988 struct irb *irb) 989 { 990 int rc; 991 int cstat, dstat; 992 struct qeth_cmd_buffer *buffer; 993 struct qeth_channel *channel; 994 struct qeth_card *card; 995 struct qeth_cmd_buffer *iob; 996 __u8 index; 997 998 if (__qeth_check_irb_error(cdev, intparm, irb)) 999 return; 1000 cstat = irb->scsw.cmd.cstat; 1001 dstat = irb->scsw.cmd.dstat; 1002 1003 card = CARD_FROM_CDEV(cdev); 1004 if (!card) 1005 return; 1006 1007 QETH_CARD_TEXT(card, 5, "irq"); 1008 1009 if (card->read.ccwdev == cdev) { 1010 channel = &card->read; 1011 QETH_CARD_TEXT(card, 5, "read"); 1012 } else if (card->write.ccwdev == cdev) { 1013 channel = &card->write; 1014 QETH_CARD_TEXT(card, 5, "write"); 1015 } else { 1016 channel = &card->data; 1017 QETH_CARD_TEXT(card, 5, "data"); 1018 } 1019 atomic_set(&channel->irq_pending, 0); 1020 1021 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1022 channel->state = CH_STATE_STOPPED; 1023 1024 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1025 channel->state = CH_STATE_HALTED; 1026 1027 /*let's wake up immediately on data channel*/ 1028 if ((channel == &card->data) && (intparm != 0) && 1029 (intparm != QETH_RCD_PARM)) 1030 goto out; 1031 1032 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1033 QETH_CARD_TEXT(card, 6, "clrchpar"); 1034 /* we don't have to handle this further */ 1035 intparm = 0; 1036 } 1037 if (intparm == QETH_HALT_CHANNEL_PARM) { 1038 QETH_CARD_TEXT(card, 6, "hltchpar"); 1039 /* we don't have to handle this further */ 1040 intparm = 0; 1041 } 1042 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1043 (dstat & DEV_STAT_UNIT_CHECK) || 1044 (cstat)) { 1045 if (irb->esw.esw0.erw.cons) { 1046 dev_warn(&channel->ccwdev->dev, 1047 "The qeth device driver failed to recover " 1048 "an error on the device\n"); 1049 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1050 "0x%X dstat 0x%X\n", 1051 dev_name(&channel->ccwdev->dev), cstat, dstat); 1052 print_hex_dump(KERN_WARNING, "qeth: irb ", 1053 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1054 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1055 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1056 } 1057 if (intparm == QETH_RCD_PARM) { 1058 channel->state = CH_STATE_DOWN; 1059 goto out; 1060 } 1061 rc = qeth_get_problem(cdev, irb); 1062 if (rc) { 1063 qeth_clear_ipacmd_list(card); 1064 qeth_schedule_recovery(card); 1065 goto out; 1066 } 1067 } 1068 1069 if (intparm == QETH_RCD_PARM) { 1070 channel->state = CH_STATE_RCD_DONE; 1071 goto out; 1072 } 1073 if (intparm) { 1074 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1075 buffer->state = BUF_STATE_PROCESSED; 1076 } 1077 if (channel == &card->data) 1078 return; 1079 if (channel == &card->read && 1080 channel->state == CH_STATE_UP) 1081 qeth_issue_next_read(card); 1082 1083 iob = channel->iob; 1084 index = channel->buf_no; 1085 while (iob[index].state == BUF_STATE_PROCESSED) { 1086 if (iob[index].callback != NULL) 1087 iob[index].callback(channel, iob + index); 1088 1089 index = (index + 1) % QETH_CMD_BUFFER_NO; 1090 } 1091 channel->buf_no = index; 1092 out: 1093 wake_up(&card->wait_q); 1094 return; 1095 } 1096 1097 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1098 struct qeth_qdio_out_buffer *buf, 1099 enum iucv_tx_notify notification) 1100 { 1101 struct sk_buff *skb; 1102 1103 if (skb_queue_empty(&buf->skb_list)) 1104 goto out; 1105 skb = skb_peek(&buf->skb_list); 1106 while (skb) { 1107 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1108 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1109 if (skb->protocol == ETH_P_AF_IUCV) { 1110 if (skb->sk) { 1111 struct iucv_sock *iucv = iucv_sk(skb->sk); 1112 iucv->sk_txnotify(skb, notification); 1113 } 1114 } 1115 if (skb_queue_is_last(&buf->skb_list, skb)) 1116 skb = NULL; 1117 else 1118 skb = skb_queue_next(&buf->skb_list, skb); 1119 } 1120 out: 1121 return; 1122 } 1123 1124 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1125 { 1126 struct sk_buff *skb; 1127 struct iucv_sock *iucv; 1128 int notify_general_error = 0; 1129 1130 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1131 notify_general_error = 1; 1132 1133 /* release may never happen from within CQ tasklet scope */ 1134 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1135 1136 skb = skb_dequeue(&buf->skb_list); 1137 while (skb) { 1138 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1139 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1140 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1141 if (skb->sk) { 1142 iucv = iucv_sk(skb->sk); 1143 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1144 } 1145 } 1146 atomic_dec(&skb->users); 1147 dev_kfree_skb_any(skb); 1148 skb = skb_dequeue(&buf->skb_list); 1149 } 1150 } 1151 1152 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1153 struct qeth_qdio_out_buffer *buf, 1154 enum qeth_qdio_buffer_states newbufstate) 1155 { 1156 int i; 1157 1158 /* is PCI flag set on buffer? */ 1159 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1160 atomic_dec(&queue->set_pci_flags_count); 1161 1162 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1163 qeth_release_skbs(buf); 1164 } 1165 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1166 if (buf->buffer->element[i].addr && buf->is_header[i]) 1167 kmem_cache_free(qeth_core_header_cache, 1168 buf->buffer->element[i].addr); 1169 buf->is_header[i] = 0; 1170 buf->buffer->element[i].length = 0; 1171 buf->buffer->element[i].addr = NULL; 1172 buf->buffer->element[i].eflags = 0; 1173 buf->buffer->element[i].sflags = 0; 1174 } 1175 buf->buffer->element[15].eflags = 0; 1176 buf->buffer->element[15].sflags = 0; 1177 buf->next_element_to_fill = 0; 1178 atomic_set(&buf->state, newbufstate); 1179 } 1180 1181 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1182 { 1183 int j; 1184 1185 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1186 if (!q->bufs[j]) 1187 continue; 1188 qeth_cleanup_handled_pending(q, j, 1); 1189 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1190 if (free) { 1191 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1192 q->bufs[j] = NULL; 1193 } 1194 } 1195 } 1196 1197 void qeth_clear_qdio_buffers(struct qeth_card *card) 1198 { 1199 int i; 1200 1201 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1202 /* clear outbound buffers to free skbs */ 1203 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1204 if (card->qdio.out_qs[i]) { 1205 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1206 } 1207 } 1208 } 1209 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1210 1211 static void qeth_free_buffer_pool(struct qeth_card *card) 1212 { 1213 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1214 int i = 0; 1215 list_for_each_entry_safe(pool_entry, tmp, 1216 &card->qdio.init_pool.entry_list, init_list){ 1217 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1218 free_page((unsigned long)pool_entry->elements[i]); 1219 list_del(&pool_entry->init_list); 1220 kfree(pool_entry); 1221 } 1222 } 1223 1224 static void qeth_free_qdio_buffers(struct qeth_card *card) 1225 { 1226 int i, j; 1227 1228 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 1229 QETH_QDIO_UNINITIALIZED) 1230 return; 1231 1232 qeth_free_cq(card); 1233 cancel_delayed_work_sync(&card->buffer_reclaim_work); 1234 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 1235 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 1236 kfree(card->qdio.in_q); 1237 card->qdio.in_q = NULL; 1238 /* inbound buffer pool */ 1239 qeth_free_buffer_pool(card); 1240 /* free outbound qdio_qs */ 1241 if (card->qdio.out_qs) { 1242 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1243 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 1244 kfree(card->qdio.out_qs[i]); 1245 } 1246 kfree(card->qdio.out_qs); 1247 card->qdio.out_qs = NULL; 1248 } 1249 } 1250 1251 static void qeth_clean_channel(struct qeth_channel *channel) 1252 { 1253 int cnt; 1254 1255 QETH_DBF_TEXT(SETUP, 2, "freech"); 1256 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1257 kfree(channel->iob[cnt].data); 1258 } 1259 1260 static void qeth_set_single_write_queues(struct qeth_card *card) 1261 { 1262 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1263 (card->qdio.no_out_queues == 4)) 1264 qeth_free_qdio_buffers(card); 1265 1266 card->qdio.no_out_queues = 1; 1267 if (card->qdio.default_out_queue != 0) 1268 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1269 1270 card->qdio.default_out_queue = 0; 1271 } 1272 1273 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1274 { 1275 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1276 (card->qdio.no_out_queues == 1)) { 1277 qeth_free_qdio_buffers(card); 1278 card->qdio.default_out_queue = 2; 1279 } 1280 card->qdio.no_out_queues = 4; 1281 } 1282 1283 static void qeth_update_from_chp_desc(struct qeth_card *card) 1284 { 1285 struct ccw_device *ccwdev; 1286 struct channelPath_dsc { 1287 u8 flags; 1288 u8 lsn; 1289 u8 desc; 1290 u8 chpid; 1291 u8 swla; 1292 u8 zeroes; 1293 u8 chla; 1294 u8 chpp; 1295 } *chp_dsc; 1296 1297 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1298 1299 ccwdev = card->data.ccwdev; 1300 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1301 if (!chp_dsc) 1302 goto out; 1303 1304 card->info.func_level = 0x4100 + chp_dsc->desc; 1305 if (card->info.type == QETH_CARD_TYPE_IQD) 1306 goto out; 1307 1308 /* CHPP field bit 6 == 1 -> single queue */ 1309 if ((chp_dsc->chpp & 0x02) == 0x02) 1310 qeth_set_single_write_queues(card); 1311 else 1312 qeth_set_multiple_write_queues(card); 1313 out: 1314 kfree(chp_dsc); 1315 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1316 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1317 } 1318 1319 static void qeth_init_qdio_info(struct qeth_card *card) 1320 { 1321 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1322 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1323 /* inbound */ 1324 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1325 if (card->info.type == QETH_CARD_TYPE_IQD) 1326 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1327 else 1328 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1329 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1330 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1331 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1332 } 1333 1334 static void qeth_set_intial_options(struct qeth_card *card) 1335 { 1336 card->options.route4.type = NO_ROUTER; 1337 card->options.route6.type = NO_ROUTER; 1338 card->options.fake_broadcast = 0; 1339 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1340 card->options.performance_stats = 0; 1341 card->options.rx_sg_cb = QETH_RX_SG_CB; 1342 card->options.isolation = ISOLATION_MODE_NONE; 1343 card->options.cq = QETH_CQ_DISABLED; 1344 } 1345 1346 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1347 { 1348 unsigned long flags; 1349 int rc = 0; 1350 1351 spin_lock_irqsave(&card->thread_mask_lock, flags); 1352 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1353 (u8) card->thread_start_mask, 1354 (u8) card->thread_allowed_mask, 1355 (u8) card->thread_running_mask); 1356 rc = (card->thread_start_mask & thread); 1357 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1358 return rc; 1359 } 1360 1361 static void qeth_start_kernel_thread(struct work_struct *work) 1362 { 1363 struct task_struct *ts; 1364 struct qeth_card *card = container_of(work, struct qeth_card, 1365 kernel_thread_starter); 1366 QETH_CARD_TEXT(card , 2, "strthrd"); 1367 1368 if (card->read.state != CH_STATE_UP && 1369 card->write.state != CH_STATE_UP) 1370 return; 1371 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1372 ts = kthread_run(card->discipline->recover, (void *)card, 1373 "qeth_recover"); 1374 if (IS_ERR(ts)) { 1375 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1376 qeth_clear_thread_running_bit(card, 1377 QETH_RECOVER_THREAD); 1378 } 1379 } 1380 } 1381 1382 static int qeth_setup_card(struct qeth_card *card) 1383 { 1384 1385 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1386 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1387 1388 card->read.state = CH_STATE_DOWN; 1389 card->write.state = CH_STATE_DOWN; 1390 card->data.state = CH_STATE_DOWN; 1391 card->state = CARD_STATE_DOWN; 1392 card->lan_online = 0; 1393 card->read_or_write_problem = 0; 1394 card->dev = NULL; 1395 spin_lock_init(&card->vlanlock); 1396 spin_lock_init(&card->mclock); 1397 spin_lock_init(&card->lock); 1398 spin_lock_init(&card->ip_lock); 1399 spin_lock_init(&card->thread_mask_lock); 1400 mutex_init(&card->conf_mutex); 1401 mutex_init(&card->discipline_mutex); 1402 card->thread_start_mask = 0; 1403 card->thread_allowed_mask = 0; 1404 card->thread_running_mask = 0; 1405 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1406 INIT_LIST_HEAD(&card->ip_list); 1407 INIT_LIST_HEAD(card->ip_tbd_list); 1408 INIT_LIST_HEAD(&card->cmd_waiter_list); 1409 init_waitqueue_head(&card->wait_q); 1410 /* initial options */ 1411 qeth_set_intial_options(card); 1412 /* IP address takeover */ 1413 INIT_LIST_HEAD(&card->ipato.entries); 1414 card->ipato.enabled = 0; 1415 card->ipato.invert4 = 0; 1416 card->ipato.invert6 = 0; 1417 /* init QDIO stuff */ 1418 qeth_init_qdio_info(card); 1419 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1420 return 0; 1421 } 1422 1423 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1424 { 1425 struct qeth_card *card = container_of(slr, struct qeth_card, 1426 qeth_service_level); 1427 if (card->info.mcl_level[0]) 1428 seq_printf(m, "qeth: %s firmware level %s\n", 1429 CARD_BUS_ID(card), card->info.mcl_level); 1430 } 1431 1432 static struct qeth_card *qeth_alloc_card(void) 1433 { 1434 struct qeth_card *card; 1435 1436 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1437 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1438 if (!card) 1439 goto out; 1440 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1441 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1442 if (!card->ip_tbd_list) { 1443 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1444 goto out_card; 1445 } 1446 if (qeth_setup_channel(&card->read)) 1447 goto out_ip; 1448 if (qeth_setup_channel(&card->write)) 1449 goto out_channel; 1450 card->options.layer2 = -1; 1451 card->qeth_service_level.seq_print = qeth_core_sl_print; 1452 register_service_level(&card->qeth_service_level); 1453 return card; 1454 1455 out_channel: 1456 qeth_clean_channel(&card->read); 1457 out_ip: 1458 kfree(card->ip_tbd_list); 1459 out_card: 1460 kfree(card); 1461 out: 1462 return NULL; 1463 } 1464 1465 static int qeth_determine_card_type(struct qeth_card *card) 1466 { 1467 int i = 0; 1468 1469 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1470 1471 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1472 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1473 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1474 if ((CARD_RDEV(card)->id.dev_type == 1475 known_devices[i][QETH_DEV_TYPE_IND]) && 1476 (CARD_RDEV(card)->id.dev_model == 1477 known_devices[i][QETH_DEV_MODEL_IND])) { 1478 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1479 card->qdio.no_out_queues = 1480 known_devices[i][QETH_QUEUE_NO_IND]; 1481 card->qdio.no_in_queues = 1; 1482 card->info.is_multicast_different = 1483 known_devices[i][QETH_MULTICAST_IND]; 1484 qeth_update_from_chp_desc(card); 1485 return 0; 1486 } 1487 i++; 1488 } 1489 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1490 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1491 "unknown type\n"); 1492 return -ENOENT; 1493 } 1494 1495 static int qeth_clear_channel(struct qeth_channel *channel) 1496 { 1497 unsigned long flags; 1498 struct qeth_card *card; 1499 int rc; 1500 1501 card = CARD_FROM_CDEV(channel->ccwdev); 1502 QETH_CARD_TEXT(card, 3, "clearch"); 1503 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1504 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1505 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1506 1507 if (rc) 1508 return rc; 1509 rc = wait_event_interruptible_timeout(card->wait_q, 1510 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1511 if (rc == -ERESTARTSYS) 1512 return rc; 1513 if (channel->state != CH_STATE_STOPPED) 1514 return -ETIME; 1515 channel->state = CH_STATE_DOWN; 1516 return 0; 1517 } 1518 1519 static int qeth_halt_channel(struct qeth_channel *channel) 1520 { 1521 unsigned long flags; 1522 struct qeth_card *card; 1523 int rc; 1524 1525 card = CARD_FROM_CDEV(channel->ccwdev); 1526 QETH_CARD_TEXT(card, 3, "haltch"); 1527 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1528 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1529 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1530 1531 if (rc) 1532 return rc; 1533 rc = wait_event_interruptible_timeout(card->wait_q, 1534 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1535 if (rc == -ERESTARTSYS) 1536 return rc; 1537 if (channel->state != CH_STATE_HALTED) 1538 return -ETIME; 1539 return 0; 1540 } 1541 1542 static int qeth_halt_channels(struct qeth_card *card) 1543 { 1544 int rc1 = 0, rc2 = 0, rc3 = 0; 1545 1546 QETH_CARD_TEXT(card, 3, "haltchs"); 1547 rc1 = qeth_halt_channel(&card->read); 1548 rc2 = qeth_halt_channel(&card->write); 1549 rc3 = qeth_halt_channel(&card->data); 1550 if (rc1) 1551 return rc1; 1552 if (rc2) 1553 return rc2; 1554 return rc3; 1555 } 1556 1557 static int qeth_clear_channels(struct qeth_card *card) 1558 { 1559 int rc1 = 0, rc2 = 0, rc3 = 0; 1560 1561 QETH_CARD_TEXT(card, 3, "clearchs"); 1562 rc1 = qeth_clear_channel(&card->read); 1563 rc2 = qeth_clear_channel(&card->write); 1564 rc3 = qeth_clear_channel(&card->data); 1565 if (rc1) 1566 return rc1; 1567 if (rc2) 1568 return rc2; 1569 return rc3; 1570 } 1571 1572 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1573 { 1574 int rc = 0; 1575 1576 QETH_CARD_TEXT(card, 3, "clhacrd"); 1577 1578 if (halt) 1579 rc = qeth_halt_channels(card); 1580 if (rc) 1581 return rc; 1582 return qeth_clear_channels(card); 1583 } 1584 1585 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1586 { 1587 int rc = 0; 1588 1589 QETH_CARD_TEXT(card, 3, "qdioclr"); 1590 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1591 QETH_QDIO_CLEANING)) { 1592 case QETH_QDIO_ESTABLISHED: 1593 if (card->info.type == QETH_CARD_TYPE_IQD) 1594 rc = qdio_shutdown(CARD_DDEV(card), 1595 QDIO_FLAG_CLEANUP_USING_HALT); 1596 else 1597 rc = qdio_shutdown(CARD_DDEV(card), 1598 QDIO_FLAG_CLEANUP_USING_CLEAR); 1599 if (rc) 1600 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1601 qdio_free(CARD_DDEV(card)); 1602 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1603 break; 1604 case QETH_QDIO_CLEANING: 1605 return rc; 1606 default: 1607 break; 1608 } 1609 rc = qeth_clear_halt_card(card, use_halt); 1610 if (rc) 1611 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1612 card->state = CARD_STATE_DOWN; 1613 return rc; 1614 } 1615 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1616 1617 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1618 int *length) 1619 { 1620 struct ciw *ciw; 1621 char *rcd_buf; 1622 int ret; 1623 struct qeth_channel *channel = &card->data; 1624 unsigned long flags; 1625 1626 /* 1627 * scan for RCD command in extended SenseID data 1628 */ 1629 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1630 if (!ciw || ciw->cmd == 0) 1631 return -EOPNOTSUPP; 1632 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1633 if (!rcd_buf) 1634 return -ENOMEM; 1635 1636 channel->ccw.cmd_code = ciw->cmd; 1637 channel->ccw.cda = (__u32) __pa(rcd_buf); 1638 channel->ccw.count = ciw->count; 1639 channel->ccw.flags = CCW_FLAG_SLI; 1640 channel->state = CH_STATE_RCD; 1641 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1642 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1643 QETH_RCD_PARM, LPM_ANYPATH, 0, 1644 QETH_RCD_TIMEOUT); 1645 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1646 if (!ret) 1647 wait_event(card->wait_q, 1648 (channel->state == CH_STATE_RCD_DONE || 1649 channel->state == CH_STATE_DOWN)); 1650 if (channel->state == CH_STATE_DOWN) 1651 ret = -EIO; 1652 else 1653 channel->state = CH_STATE_DOWN; 1654 if (ret) { 1655 kfree(rcd_buf); 1656 *buffer = NULL; 1657 *length = 0; 1658 } else { 1659 *length = ciw->count; 1660 *buffer = rcd_buf; 1661 } 1662 return ret; 1663 } 1664 1665 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1666 { 1667 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1668 card->info.chpid = prcd[30]; 1669 card->info.unit_addr2 = prcd[31]; 1670 card->info.cula = prcd[63]; 1671 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1672 (prcd[0x11] == _ascebc['M'])); 1673 } 1674 1675 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1676 { 1677 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1678 1679 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1680 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) { 1681 card->info.blkt.time_total = 250; 1682 card->info.blkt.inter_packet = 5; 1683 card->info.blkt.inter_packet_jumbo = 15; 1684 } else { 1685 card->info.blkt.time_total = 0; 1686 card->info.blkt.inter_packet = 0; 1687 card->info.blkt.inter_packet_jumbo = 0; 1688 } 1689 } 1690 1691 static void qeth_init_tokens(struct qeth_card *card) 1692 { 1693 card->token.issuer_rm_w = 0x00010103UL; 1694 card->token.cm_filter_w = 0x00010108UL; 1695 card->token.cm_connection_w = 0x0001010aUL; 1696 card->token.ulp_filter_w = 0x0001010bUL; 1697 card->token.ulp_connection_w = 0x0001010dUL; 1698 } 1699 1700 static void qeth_init_func_level(struct qeth_card *card) 1701 { 1702 switch (card->info.type) { 1703 case QETH_CARD_TYPE_IQD: 1704 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1705 break; 1706 case QETH_CARD_TYPE_OSD: 1707 case QETH_CARD_TYPE_OSN: 1708 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1709 break; 1710 default: 1711 break; 1712 } 1713 } 1714 1715 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1716 void (*idx_reply_cb)(struct qeth_channel *, 1717 struct qeth_cmd_buffer *)) 1718 { 1719 struct qeth_cmd_buffer *iob; 1720 unsigned long flags; 1721 int rc; 1722 struct qeth_card *card; 1723 1724 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1725 card = CARD_FROM_CDEV(channel->ccwdev); 1726 iob = qeth_get_buffer(channel); 1727 iob->callback = idx_reply_cb; 1728 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1729 channel->ccw.count = QETH_BUFSIZE; 1730 channel->ccw.cda = (__u32) __pa(iob->data); 1731 1732 wait_event(card->wait_q, 1733 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1734 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1735 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1736 rc = ccw_device_start(channel->ccwdev, 1737 &channel->ccw, (addr_t) iob, 0, 0); 1738 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1739 1740 if (rc) { 1741 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1742 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1743 atomic_set(&channel->irq_pending, 0); 1744 wake_up(&card->wait_q); 1745 return rc; 1746 } 1747 rc = wait_event_interruptible_timeout(card->wait_q, 1748 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1749 if (rc == -ERESTARTSYS) 1750 return rc; 1751 if (channel->state != CH_STATE_UP) { 1752 rc = -ETIME; 1753 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1754 qeth_clear_cmd_buffers(channel); 1755 } else 1756 rc = 0; 1757 return rc; 1758 } 1759 1760 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1761 void (*idx_reply_cb)(struct qeth_channel *, 1762 struct qeth_cmd_buffer *)) 1763 { 1764 struct qeth_card *card; 1765 struct qeth_cmd_buffer *iob; 1766 unsigned long flags; 1767 __u16 temp; 1768 __u8 tmp; 1769 int rc; 1770 struct ccw_dev_id temp_devid; 1771 1772 card = CARD_FROM_CDEV(channel->ccwdev); 1773 1774 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1775 1776 iob = qeth_get_buffer(channel); 1777 iob->callback = idx_reply_cb; 1778 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1779 channel->ccw.count = IDX_ACTIVATE_SIZE; 1780 channel->ccw.cda = (__u32) __pa(iob->data); 1781 if (channel == &card->write) { 1782 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1783 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1784 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1785 card->seqno.trans_hdr++; 1786 } else { 1787 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1788 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1789 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1790 } 1791 tmp = ((__u8)card->info.portno) | 0x80; 1792 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1793 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1794 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1795 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1796 &card->info.func_level, sizeof(__u16)); 1797 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1798 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1799 temp = (card->info.cula << 8) + card->info.unit_addr2; 1800 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1801 1802 wait_event(card->wait_q, 1803 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1804 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1805 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1806 rc = ccw_device_start(channel->ccwdev, 1807 &channel->ccw, (addr_t) iob, 0, 0); 1808 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1809 1810 if (rc) { 1811 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1812 rc); 1813 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1814 atomic_set(&channel->irq_pending, 0); 1815 wake_up(&card->wait_q); 1816 return rc; 1817 } 1818 rc = wait_event_interruptible_timeout(card->wait_q, 1819 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1820 if (rc == -ERESTARTSYS) 1821 return rc; 1822 if (channel->state != CH_STATE_ACTIVATING) { 1823 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1824 " failed to recover an error on the device\n"); 1825 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1826 dev_name(&channel->ccwdev->dev)); 1827 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1828 qeth_clear_cmd_buffers(channel); 1829 return -ETIME; 1830 } 1831 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1832 } 1833 1834 static int qeth_peer_func_level(int level) 1835 { 1836 if ((level & 0xff) == 8) 1837 return (level & 0xff) + 0x400; 1838 if (((level >> 8) & 3) == 1) 1839 return (level & 0xff) + 0x200; 1840 return level; 1841 } 1842 1843 static void qeth_idx_write_cb(struct qeth_channel *channel, 1844 struct qeth_cmd_buffer *iob) 1845 { 1846 struct qeth_card *card; 1847 __u16 temp; 1848 1849 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1850 1851 if (channel->state == CH_STATE_DOWN) { 1852 channel->state = CH_STATE_ACTIVATING; 1853 goto out; 1854 } 1855 card = CARD_FROM_CDEV(channel->ccwdev); 1856 1857 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1858 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1859 dev_err(&card->write.ccwdev->dev, 1860 "The adapter is used exclusively by another " 1861 "host\n"); 1862 else 1863 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1864 " negative reply\n", 1865 dev_name(&card->write.ccwdev->dev)); 1866 goto out; 1867 } 1868 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1869 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1870 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1871 "function level mismatch (sent: 0x%x, received: " 1872 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1873 card->info.func_level, temp); 1874 goto out; 1875 } 1876 channel->state = CH_STATE_UP; 1877 out: 1878 qeth_release_buffer(channel, iob); 1879 } 1880 1881 static void qeth_idx_read_cb(struct qeth_channel *channel, 1882 struct qeth_cmd_buffer *iob) 1883 { 1884 struct qeth_card *card; 1885 __u16 temp; 1886 1887 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1888 if (channel->state == CH_STATE_DOWN) { 1889 channel->state = CH_STATE_ACTIVATING; 1890 goto out; 1891 } 1892 1893 card = CARD_FROM_CDEV(channel->ccwdev); 1894 if (qeth_check_idx_response(card, iob->data)) 1895 goto out; 1896 1897 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1898 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1899 case QETH_IDX_ACT_ERR_EXCL: 1900 dev_err(&card->write.ccwdev->dev, 1901 "The adapter is used exclusively by another " 1902 "host\n"); 1903 break; 1904 case QETH_IDX_ACT_ERR_AUTH: 1905 case QETH_IDX_ACT_ERR_AUTH_USER: 1906 dev_err(&card->read.ccwdev->dev, 1907 "Setting the device online failed because of " 1908 "insufficient authorization\n"); 1909 break; 1910 default: 1911 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1912 " negative reply\n", 1913 dev_name(&card->read.ccwdev->dev)); 1914 } 1915 QETH_CARD_TEXT_(card, 2, "idxread%c", 1916 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1917 goto out; 1918 } 1919 1920 /** 1921 * * temporary fix for microcode bug 1922 * * to revert it,replace OR by AND 1923 * */ 1924 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1925 (card->info.type == QETH_CARD_TYPE_OSD)) 1926 card->info.portname_required = 1; 1927 1928 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1929 if (temp != qeth_peer_func_level(card->info.func_level)) { 1930 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1931 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1932 dev_name(&card->read.ccwdev->dev), 1933 card->info.func_level, temp); 1934 goto out; 1935 } 1936 memcpy(&card->token.issuer_rm_r, 1937 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1938 QETH_MPC_TOKEN_LENGTH); 1939 memcpy(&card->info.mcl_level[0], 1940 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1941 channel->state = CH_STATE_UP; 1942 out: 1943 qeth_release_buffer(channel, iob); 1944 } 1945 1946 void qeth_prepare_control_data(struct qeth_card *card, int len, 1947 struct qeth_cmd_buffer *iob) 1948 { 1949 qeth_setup_ccw(&card->write, iob->data, len); 1950 iob->callback = qeth_release_buffer; 1951 1952 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1953 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1954 card->seqno.trans_hdr++; 1955 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1956 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1957 card->seqno.pdu_hdr++; 1958 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1959 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1960 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1961 } 1962 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1963 1964 int qeth_send_control_data(struct qeth_card *card, int len, 1965 struct qeth_cmd_buffer *iob, 1966 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1967 unsigned long), 1968 void *reply_param) 1969 { 1970 int rc; 1971 unsigned long flags; 1972 struct qeth_reply *reply = NULL; 1973 unsigned long timeout, event_timeout; 1974 struct qeth_ipa_cmd *cmd; 1975 1976 QETH_CARD_TEXT(card, 2, "sendctl"); 1977 1978 if (card->read_or_write_problem) { 1979 qeth_release_buffer(iob->channel, iob); 1980 return -EIO; 1981 } 1982 reply = qeth_alloc_reply(card); 1983 if (!reply) { 1984 return -ENOMEM; 1985 } 1986 reply->callback = reply_cb; 1987 reply->param = reply_param; 1988 if (card->state == CARD_STATE_DOWN) 1989 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1990 else 1991 reply->seqno = card->seqno.ipa++; 1992 init_waitqueue_head(&reply->wait_q); 1993 spin_lock_irqsave(&card->lock, flags); 1994 list_add_tail(&reply->list, &card->cmd_waiter_list); 1995 spin_unlock_irqrestore(&card->lock, flags); 1996 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1997 1998 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1999 qeth_prepare_control_data(card, len, iob); 2000 2001 if (IS_IPA(iob->data)) 2002 event_timeout = QETH_IPA_TIMEOUT; 2003 else 2004 event_timeout = QETH_TIMEOUT; 2005 timeout = jiffies + event_timeout; 2006 2007 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2008 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2009 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2010 (addr_t) iob, 0, 0); 2011 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2012 if (rc) { 2013 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2014 "ccw_device_start rc = %i\n", 2015 dev_name(&card->write.ccwdev->dev), rc); 2016 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2017 spin_lock_irqsave(&card->lock, flags); 2018 list_del_init(&reply->list); 2019 qeth_put_reply(reply); 2020 spin_unlock_irqrestore(&card->lock, flags); 2021 qeth_release_buffer(iob->channel, iob); 2022 atomic_set(&card->write.irq_pending, 0); 2023 wake_up(&card->wait_q); 2024 return rc; 2025 } 2026 2027 /* we have only one long running ipassist, since we can ensure 2028 process context of this command we can sleep */ 2029 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2030 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2031 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2032 if (!wait_event_timeout(reply->wait_q, 2033 atomic_read(&reply->received), event_timeout)) 2034 goto time_err; 2035 } else { 2036 while (!atomic_read(&reply->received)) { 2037 if (time_after(jiffies, timeout)) 2038 goto time_err; 2039 cpu_relax(); 2040 } 2041 } 2042 2043 if (reply->rc == -EIO) 2044 goto error; 2045 rc = reply->rc; 2046 qeth_put_reply(reply); 2047 return rc; 2048 2049 time_err: 2050 reply->rc = -ETIME; 2051 spin_lock_irqsave(&reply->card->lock, flags); 2052 list_del_init(&reply->list); 2053 spin_unlock_irqrestore(&reply->card->lock, flags); 2054 atomic_inc(&reply->received); 2055 error: 2056 atomic_set(&card->write.irq_pending, 0); 2057 qeth_release_buffer(iob->channel, iob); 2058 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2059 rc = reply->rc; 2060 qeth_put_reply(reply); 2061 return rc; 2062 } 2063 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2064 2065 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2066 unsigned long data) 2067 { 2068 struct qeth_cmd_buffer *iob; 2069 2070 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2071 2072 iob = (struct qeth_cmd_buffer *) data; 2073 memcpy(&card->token.cm_filter_r, 2074 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2075 QETH_MPC_TOKEN_LENGTH); 2076 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2077 return 0; 2078 } 2079 2080 static int qeth_cm_enable(struct qeth_card *card) 2081 { 2082 int rc; 2083 struct qeth_cmd_buffer *iob; 2084 2085 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2086 2087 iob = qeth_wait_for_buffer(&card->write); 2088 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2089 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2090 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2091 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2092 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2093 2094 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2095 qeth_cm_enable_cb, NULL); 2096 return rc; 2097 } 2098 2099 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2100 unsigned long data) 2101 { 2102 2103 struct qeth_cmd_buffer *iob; 2104 2105 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2106 2107 iob = (struct qeth_cmd_buffer *) data; 2108 memcpy(&card->token.cm_connection_r, 2109 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2110 QETH_MPC_TOKEN_LENGTH); 2111 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2112 return 0; 2113 } 2114 2115 static int qeth_cm_setup(struct qeth_card *card) 2116 { 2117 int rc; 2118 struct qeth_cmd_buffer *iob; 2119 2120 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2121 2122 iob = qeth_wait_for_buffer(&card->write); 2123 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2124 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2125 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2126 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2127 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2128 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2129 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2130 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2131 qeth_cm_setup_cb, NULL); 2132 return rc; 2133 2134 } 2135 2136 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2137 { 2138 switch (card->info.type) { 2139 case QETH_CARD_TYPE_UNKNOWN: 2140 return 1500; 2141 case QETH_CARD_TYPE_IQD: 2142 return card->info.max_mtu; 2143 case QETH_CARD_TYPE_OSD: 2144 switch (card->info.link_type) { 2145 case QETH_LINK_TYPE_HSTR: 2146 case QETH_LINK_TYPE_LANE_TR: 2147 return 2000; 2148 default: 2149 return 1492; 2150 } 2151 case QETH_CARD_TYPE_OSM: 2152 case QETH_CARD_TYPE_OSX: 2153 return 1492; 2154 default: 2155 return 1500; 2156 } 2157 } 2158 2159 static inline int qeth_get_mtu_outof_framesize(int framesize) 2160 { 2161 switch (framesize) { 2162 case 0x4000: 2163 return 8192; 2164 case 0x6000: 2165 return 16384; 2166 case 0xa000: 2167 return 32768; 2168 case 0xffff: 2169 return 57344; 2170 default: 2171 return 0; 2172 } 2173 } 2174 2175 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2176 { 2177 switch (card->info.type) { 2178 case QETH_CARD_TYPE_OSD: 2179 case QETH_CARD_TYPE_OSM: 2180 case QETH_CARD_TYPE_OSX: 2181 case QETH_CARD_TYPE_IQD: 2182 return ((mtu >= 576) && 2183 (mtu <= card->info.max_mtu)); 2184 case QETH_CARD_TYPE_OSN: 2185 case QETH_CARD_TYPE_UNKNOWN: 2186 default: 2187 return 1; 2188 } 2189 } 2190 2191 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2192 unsigned long data) 2193 { 2194 2195 __u16 mtu, framesize; 2196 __u16 len; 2197 __u8 link_type; 2198 struct qeth_cmd_buffer *iob; 2199 2200 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2201 2202 iob = (struct qeth_cmd_buffer *) data; 2203 memcpy(&card->token.ulp_filter_r, 2204 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2205 QETH_MPC_TOKEN_LENGTH); 2206 if (card->info.type == QETH_CARD_TYPE_IQD) { 2207 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2208 mtu = qeth_get_mtu_outof_framesize(framesize); 2209 if (!mtu) { 2210 iob->rc = -EINVAL; 2211 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2212 return 0; 2213 } 2214 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2215 /* frame size has changed */ 2216 if (card->dev && 2217 ((card->dev->mtu == card->info.initial_mtu) || 2218 (card->dev->mtu > mtu))) 2219 card->dev->mtu = mtu; 2220 qeth_free_qdio_buffers(card); 2221 } 2222 card->info.initial_mtu = mtu; 2223 card->info.max_mtu = mtu; 2224 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2225 } else { 2226 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 2227 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2228 iob->data); 2229 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2230 } 2231 2232 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2233 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2234 memcpy(&link_type, 2235 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2236 card->info.link_type = link_type; 2237 } else 2238 card->info.link_type = 0; 2239 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2240 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2241 return 0; 2242 } 2243 2244 static int qeth_ulp_enable(struct qeth_card *card) 2245 { 2246 int rc; 2247 char prot_type; 2248 struct qeth_cmd_buffer *iob; 2249 2250 /*FIXME: trace view callbacks*/ 2251 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2252 2253 iob = qeth_wait_for_buffer(&card->write); 2254 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2255 2256 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2257 (__u8) card->info.portno; 2258 if (card->options.layer2) 2259 if (card->info.type == QETH_CARD_TYPE_OSN) 2260 prot_type = QETH_PROT_OSN2; 2261 else 2262 prot_type = QETH_PROT_LAYER2; 2263 else 2264 prot_type = QETH_PROT_TCPIP; 2265 2266 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2267 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2268 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2269 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2270 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2271 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2272 card->info.portname, 9); 2273 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2274 qeth_ulp_enable_cb, NULL); 2275 return rc; 2276 2277 } 2278 2279 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2280 unsigned long data) 2281 { 2282 struct qeth_cmd_buffer *iob; 2283 int rc = 0; 2284 2285 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2286 2287 iob = (struct qeth_cmd_buffer *) data; 2288 memcpy(&card->token.ulp_connection_r, 2289 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2290 QETH_MPC_TOKEN_LENGTH); 2291 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2292 3)) { 2293 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2294 dev_err(&card->gdev->dev, "A connection could not be " 2295 "established because of an OLM limit\n"); 2296 iob->rc = -EMLINK; 2297 } 2298 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2299 return rc; 2300 } 2301 2302 static int qeth_ulp_setup(struct qeth_card *card) 2303 { 2304 int rc; 2305 __u16 temp; 2306 struct qeth_cmd_buffer *iob; 2307 struct ccw_dev_id dev_id; 2308 2309 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2310 2311 iob = qeth_wait_for_buffer(&card->write); 2312 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2313 2314 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2315 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2316 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2317 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2318 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2319 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2320 2321 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2322 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2323 temp = (card->info.cula << 8) + card->info.unit_addr2; 2324 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2325 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2326 qeth_ulp_setup_cb, NULL); 2327 return rc; 2328 } 2329 2330 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2331 { 2332 int rc; 2333 struct qeth_qdio_out_buffer *newbuf; 2334 2335 rc = 0; 2336 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2337 if (!newbuf) { 2338 rc = -ENOMEM; 2339 goto out; 2340 } 2341 newbuf->buffer = &q->qdio_bufs[bidx]; 2342 skb_queue_head_init(&newbuf->skb_list); 2343 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2344 newbuf->q = q; 2345 newbuf->aob = NULL; 2346 newbuf->next_pending = q->bufs[bidx]; 2347 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2348 q->bufs[bidx] = newbuf; 2349 if (q->bufstates) { 2350 q->bufstates[bidx].user = newbuf; 2351 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2352 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2353 QETH_CARD_TEXT_(q->card, 2, "%lx", 2354 (long) newbuf->next_pending); 2355 } 2356 out: 2357 return rc; 2358 } 2359 2360 2361 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2362 { 2363 int i, j; 2364 2365 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2366 2367 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2368 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2369 return 0; 2370 2371 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q), 2372 GFP_KERNEL); 2373 if (!card->qdio.in_q) 2374 goto out_nomem; 2375 QETH_DBF_TEXT(SETUP, 2, "inq"); 2376 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2377 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2378 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2379 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 2380 card->qdio.in_q->bufs[i].buffer = 2381 &card->qdio.in_q->qdio_bufs[i]; 2382 card->qdio.in_q->bufs[i].rx_skb = NULL; 2383 } 2384 /* inbound buffer pool */ 2385 if (qeth_alloc_buffer_pool(card)) 2386 goto out_freeinq; 2387 2388 /* outbound */ 2389 card->qdio.out_qs = 2390 kzalloc(card->qdio.no_out_queues * 2391 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2392 if (!card->qdio.out_qs) 2393 goto out_freepool; 2394 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2395 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q), 2396 GFP_KERNEL); 2397 if (!card->qdio.out_qs[i]) 2398 goto out_freeoutq; 2399 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2400 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2401 card->qdio.out_qs[i]->queue_no = i; 2402 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2403 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2404 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2405 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2406 goto out_freeoutqbufs; 2407 } 2408 } 2409 2410 /* completion */ 2411 if (qeth_alloc_cq(card)) 2412 goto out_freeoutq; 2413 2414 return 0; 2415 2416 out_freeoutqbufs: 2417 while (j > 0) { 2418 --j; 2419 kmem_cache_free(qeth_qdio_outbuf_cache, 2420 card->qdio.out_qs[i]->bufs[j]); 2421 card->qdio.out_qs[i]->bufs[j] = NULL; 2422 } 2423 out_freeoutq: 2424 while (i > 0) { 2425 kfree(card->qdio.out_qs[--i]); 2426 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2427 } 2428 kfree(card->qdio.out_qs); 2429 card->qdio.out_qs = NULL; 2430 out_freepool: 2431 qeth_free_buffer_pool(card); 2432 out_freeinq: 2433 kfree(card->qdio.in_q); 2434 card->qdio.in_q = NULL; 2435 out_nomem: 2436 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2437 return -ENOMEM; 2438 } 2439 2440 static void qeth_create_qib_param_field(struct qeth_card *card, 2441 char *param_field) 2442 { 2443 2444 param_field[0] = _ascebc['P']; 2445 param_field[1] = _ascebc['C']; 2446 param_field[2] = _ascebc['I']; 2447 param_field[3] = _ascebc['T']; 2448 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2449 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2450 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2451 } 2452 2453 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2454 char *param_field) 2455 { 2456 param_field[16] = _ascebc['B']; 2457 param_field[17] = _ascebc['L']; 2458 param_field[18] = _ascebc['K']; 2459 param_field[19] = _ascebc['T']; 2460 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2461 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2462 *((unsigned int *) (¶m_field[28])) = 2463 card->info.blkt.inter_packet_jumbo; 2464 } 2465 2466 static int qeth_qdio_activate(struct qeth_card *card) 2467 { 2468 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2469 return qdio_activate(CARD_DDEV(card)); 2470 } 2471 2472 static int qeth_dm_act(struct qeth_card *card) 2473 { 2474 int rc; 2475 struct qeth_cmd_buffer *iob; 2476 2477 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2478 2479 iob = qeth_wait_for_buffer(&card->write); 2480 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2481 2482 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2483 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2484 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2485 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2486 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2487 return rc; 2488 } 2489 2490 static int qeth_mpc_initialize(struct qeth_card *card) 2491 { 2492 int rc; 2493 2494 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2495 2496 rc = qeth_issue_next_read(card); 2497 if (rc) { 2498 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2499 return rc; 2500 } 2501 rc = qeth_cm_enable(card); 2502 if (rc) { 2503 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2504 goto out_qdio; 2505 } 2506 rc = qeth_cm_setup(card); 2507 if (rc) { 2508 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2509 goto out_qdio; 2510 } 2511 rc = qeth_ulp_enable(card); 2512 if (rc) { 2513 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2514 goto out_qdio; 2515 } 2516 rc = qeth_ulp_setup(card); 2517 if (rc) { 2518 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2519 goto out_qdio; 2520 } 2521 rc = qeth_alloc_qdio_buffers(card); 2522 if (rc) { 2523 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2524 goto out_qdio; 2525 } 2526 rc = qeth_qdio_establish(card); 2527 if (rc) { 2528 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2529 qeth_free_qdio_buffers(card); 2530 goto out_qdio; 2531 } 2532 rc = qeth_qdio_activate(card); 2533 if (rc) { 2534 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2535 goto out_qdio; 2536 } 2537 rc = qeth_dm_act(card); 2538 if (rc) { 2539 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2540 goto out_qdio; 2541 } 2542 2543 return 0; 2544 out_qdio: 2545 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2546 return rc; 2547 } 2548 2549 static void qeth_print_status_with_portname(struct qeth_card *card) 2550 { 2551 char dbf_text[15]; 2552 int i; 2553 2554 sprintf(dbf_text, "%s", card->info.portname + 1); 2555 for (i = 0; i < 8; i++) 2556 dbf_text[i] = 2557 (char) _ebcasc[(__u8) dbf_text[i]]; 2558 dbf_text[8] = 0; 2559 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2560 "with link type %s (portname: %s)\n", 2561 qeth_get_cardname(card), 2562 (card->info.mcl_level[0]) ? " (level: " : "", 2563 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2564 (card->info.mcl_level[0]) ? ")" : "", 2565 qeth_get_cardname_short(card), 2566 dbf_text); 2567 2568 } 2569 2570 static void qeth_print_status_no_portname(struct qeth_card *card) 2571 { 2572 if (card->info.portname[0]) 2573 dev_info(&card->gdev->dev, "Device is a%s " 2574 "card%s%s%s\nwith link type %s " 2575 "(no portname needed by interface).\n", 2576 qeth_get_cardname(card), 2577 (card->info.mcl_level[0]) ? " (level: " : "", 2578 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2579 (card->info.mcl_level[0]) ? ")" : "", 2580 qeth_get_cardname_short(card)); 2581 else 2582 dev_info(&card->gdev->dev, "Device is a%s " 2583 "card%s%s%s\nwith link type %s.\n", 2584 qeth_get_cardname(card), 2585 (card->info.mcl_level[0]) ? " (level: " : "", 2586 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2587 (card->info.mcl_level[0]) ? ")" : "", 2588 qeth_get_cardname_short(card)); 2589 } 2590 2591 void qeth_print_status_message(struct qeth_card *card) 2592 { 2593 switch (card->info.type) { 2594 case QETH_CARD_TYPE_OSD: 2595 case QETH_CARD_TYPE_OSM: 2596 case QETH_CARD_TYPE_OSX: 2597 /* VM will use a non-zero first character 2598 * to indicate a HiperSockets like reporting 2599 * of the level OSA sets the first character to zero 2600 * */ 2601 if (!card->info.mcl_level[0]) { 2602 sprintf(card->info.mcl_level, "%02x%02x", 2603 card->info.mcl_level[2], 2604 card->info.mcl_level[3]); 2605 2606 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2607 break; 2608 } 2609 /* fallthrough */ 2610 case QETH_CARD_TYPE_IQD: 2611 if ((card->info.guestlan) || 2612 (card->info.mcl_level[0] & 0x80)) { 2613 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2614 card->info.mcl_level[0]]; 2615 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2616 card->info.mcl_level[1]]; 2617 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2618 card->info.mcl_level[2]]; 2619 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2620 card->info.mcl_level[3]]; 2621 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2622 } 2623 break; 2624 default: 2625 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2626 } 2627 if (card->info.portname_required) 2628 qeth_print_status_with_portname(card); 2629 else 2630 qeth_print_status_no_portname(card); 2631 } 2632 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2633 2634 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2635 { 2636 struct qeth_buffer_pool_entry *entry; 2637 2638 QETH_CARD_TEXT(card, 5, "inwrklst"); 2639 2640 list_for_each_entry(entry, 2641 &card->qdio.init_pool.entry_list, init_list) { 2642 qeth_put_buffer_pool_entry(card, entry); 2643 } 2644 } 2645 2646 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2647 struct qeth_card *card) 2648 { 2649 struct list_head *plh; 2650 struct qeth_buffer_pool_entry *entry; 2651 int i, free; 2652 struct page *page; 2653 2654 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2655 return NULL; 2656 2657 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2658 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2659 free = 1; 2660 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2661 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2662 free = 0; 2663 break; 2664 } 2665 } 2666 if (free) { 2667 list_del_init(&entry->list); 2668 return entry; 2669 } 2670 } 2671 2672 /* no free buffer in pool so take first one and swap pages */ 2673 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2674 struct qeth_buffer_pool_entry, list); 2675 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2676 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2677 page = alloc_page(GFP_ATOMIC); 2678 if (!page) { 2679 return NULL; 2680 } else { 2681 free_page((unsigned long)entry->elements[i]); 2682 entry->elements[i] = page_address(page); 2683 if (card->options.performance_stats) 2684 card->perf_stats.sg_alloc_page_rx++; 2685 } 2686 } 2687 } 2688 list_del_init(&entry->list); 2689 return entry; 2690 } 2691 2692 static int qeth_init_input_buffer(struct qeth_card *card, 2693 struct qeth_qdio_buffer *buf) 2694 { 2695 struct qeth_buffer_pool_entry *pool_entry; 2696 int i; 2697 2698 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2699 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2700 if (!buf->rx_skb) 2701 return 1; 2702 } 2703 2704 pool_entry = qeth_find_free_buffer_pool_entry(card); 2705 if (!pool_entry) 2706 return 1; 2707 2708 /* 2709 * since the buffer is accessed only from the input_tasklet 2710 * there shouldn't be a need to synchronize; also, since we use 2711 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2712 * buffers 2713 */ 2714 2715 buf->pool_entry = pool_entry; 2716 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2717 buf->buffer->element[i].length = PAGE_SIZE; 2718 buf->buffer->element[i].addr = pool_entry->elements[i]; 2719 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2720 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2721 else 2722 buf->buffer->element[i].eflags = 0; 2723 buf->buffer->element[i].sflags = 0; 2724 } 2725 return 0; 2726 } 2727 2728 int qeth_init_qdio_queues(struct qeth_card *card) 2729 { 2730 int i, j; 2731 int rc; 2732 2733 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2734 2735 /* inbound queue */ 2736 memset(card->qdio.in_q->qdio_bufs, 0, 2737 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2738 qeth_initialize_working_pool_list(card); 2739 /*give only as many buffers to hardware as we have buffer pool entries*/ 2740 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2741 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2742 card->qdio.in_q->next_buf_to_init = 2743 card->qdio.in_buf_pool.buf_count - 1; 2744 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2745 card->qdio.in_buf_pool.buf_count - 1); 2746 if (rc) { 2747 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2748 return rc; 2749 } 2750 2751 /* completion */ 2752 rc = qeth_cq_init(card); 2753 if (rc) { 2754 return rc; 2755 } 2756 2757 /* outbound queue */ 2758 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2759 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2760 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2761 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2762 qeth_clear_output_buffer(card->qdio.out_qs[i], 2763 card->qdio.out_qs[i]->bufs[j], 2764 QETH_QDIO_BUF_EMPTY); 2765 } 2766 card->qdio.out_qs[i]->card = card; 2767 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2768 card->qdio.out_qs[i]->do_pack = 0; 2769 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2770 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2771 atomic_set(&card->qdio.out_qs[i]->state, 2772 QETH_OUT_Q_UNLOCKED); 2773 } 2774 return 0; 2775 } 2776 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2777 2778 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2779 { 2780 switch (link_type) { 2781 case QETH_LINK_TYPE_HSTR: 2782 return 2; 2783 default: 2784 return 1; 2785 } 2786 } 2787 2788 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2789 struct qeth_ipa_cmd *cmd, __u8 command, 2790 enum qeth_prot_versions prot) 2791 { 2792 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2793 cmd->hdr.command = command; 2794 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2795 cmd->hdr.seqno = card->seqno.ipa; 2796 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2797 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2798 if (card->options.layer2) 2799 cmd->hdr.prim_version_no = 2; 2800 else 2801 cmd->hdr.prim_version_no = 1; 2802 cmd->hdr.param_count = 1; 2803 cmd->hdr.prot_version = prot; 2804 cmd->hdr.ipa_supported = 0; 2805 cmd->hdr.ipa_enabled = 0; 2806 } 2807 2808 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2809 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2810 { 2811 struct qeth_cmd_buffer *iob; 2812 struct qeth_ipa_cmd *cmd; 2813 2814 iob = qeth_wait_for_buffer(&card->write); 2815 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2816 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2817 2818 return iob; 2819 } 2820 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2821 2822 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2823 char prot_type) 2824 { 2825 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2826 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2827 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2828 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2829 } 2830 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2831 2832 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2833 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2834 unsigned long), 2835 void *reply_param) 2836 { 2837 int rc; 2838 char prot_type; 2839 2840 QETH_CARD_TEXT(card, 4, "sendipa"); 2841 2842 if (card->options.layer2) 2843 if (card->info.type == QETH_CARD_TYPE_OSN) 2844 prot_type = QETH_PROT_OSN2; 2845 else 2846 prot_type = QETH_PROT_LAYER2; 2847 else 2848 prot_type = QETH_PROT_TCPIP; 2849 qeth_prepare_ipa_cmd(card, iob, prot_type); 2850 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2851 iob, reply_cb, reply_param); 2852 if (rc == -ETIME) { 2853 qeth_clear_ipacmd_list(card); 2854 qeth_schedule_recovery(card); 2855 } 2856 return rc; 2857 } 2858 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2859 2860 int qeth_send_startlan(struct qeth_card *card) 2861 { 2862 int rc; 2863 struct qeth_cmd_buffer *iob; 2864 2865 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2866 2867 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2868 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2869 return rc; 2870 } 2871 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2872 2873 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2874 struct qeth_reply *reply, unsigned long data) 2875 { 2876 struct qeth_ipa_cmd *cmd; 2877 2878 QETH_CARD_TEXT(card, 4, "defadpcb"); 2879 2880 cmd = (struct qeth_ipa_cmd *) data; 2881 if (cmd->hdr.return_code == 0) 2882 cmd->hdr.return_code = 2883 cmd->data.setadapterparms.hdr.return_code; 2884 return 0; 2885 } 2886 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2887 2888 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2889 struct qeth_reply *reply, unsigned long data) 2890 { 2891 struct qeth_ipa_cmd *cmd; 2892 2893 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2894 2895 cmd = (struct qeth_ipa_cmd *) data; 2896 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2897 card->info.link_type = 2898 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2899 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2900 } 2901 card->options.adp.supported_funcs = 2902 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2903 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2904 } 2905 2906 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2907 __u32 command, __u32 cmdlen) 2908 { 2909 struct qeth_cmd_buffer *iob; 2910 struct qeth_ipa_cmd *cmd; 2911 2912 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2913 QETH_PROT_IPV4); 2914 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2915 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2916 cmd->data.setadapterparms.hdr.command_code = command; 2917 cmd->data.setadapterparms.hdr.used_total = 1; 2918 cmd->data.setadapterparms.hdr.seq_no = 1; 2919 2920 return iob; 2921 } 2922 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2923 2924 int qeth_query_setadapterparms(struct qeth_card *card) 2925 { 2926 int rc; 2927 struct qeth_cmd_buffer *iob; 2928 2929 QETH_CARD_TEXT(card, 3, "queryadp"); 2930 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2931 sizeof(struct qeth_ipacmd_setadpparms)); 2932 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2933 return rc; 2934 } 2935 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2936 2937 static int qeth_query_ipassists_cb(struct qeth_card *card, 2938 struct qeth_reply *reply, unsigned long data) 2939 { 2940 struct qeth_ipa_cmd *cmd; 2941 2942 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 2943 2944 cmd = (struct qeth_ipa_cmd *) data; 2945 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 2946 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 2947 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 2948 } else { 2949 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 2950 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 2951 } 2952 QETH_DBF_TEXT(SETUP, 2, "suppenbl"); 2953 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported); 2954 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled); 2955 return 0; 2956 } 2957 2958 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 2959 { 2960 int rc; 2961 struct qeth_cmd_buffer *iob; 2962 2963 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 2964 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 2965 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 2966 return rc; 2967 } 2968 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 2969 2970 static int qeth_query_setdiagass_cb(struct qeth_card *card, 2971 struct qeth_reply *reply, unsigned long data) 2972 { 2973 struct qeth_ipa_cmd *cmd; 2974 __u16 rc; 2975 2976 cmd = (struct qeth_ipa_cmd *)data; 2977 rc = cmd->hdr.return_code; 2978 if (rc) 2979 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 2980 else 2981 card->info.diagass_support = cmd->data.diagass.ext; 2982 return 0; 2983 } 2984 2985 static int qeth_query_setdiagass(struct qeth_card *card) 2986 { 2987 struct qeth_cmd_buffer *iob; 2988 struct qeth_ipa_cmd *cmd; 2989 2990 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 2991 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 2992 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2993 cmd->data.diagass.subcmd_len = 16; 2994 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 2995 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 2996 } 2997 2998 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 2999 { 3000 unsigned long info = get_zeroed_page(GFP_KERNEL); 3001 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3002 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3003 struct ccw_dev_id ccwid; 3004 int level; 3005 3006 tid->chpid = card->info.chpid; 3007 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3008 tid->ssid = ccwid.ssid; 3009 tid->devno = ccwid.devno; 3010 if (!info) 3011 return; 3012 level = stsi(NULL, 0, 0, 0); 3013 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3014 tid->lparnr = info222->lpar_number; 3015 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3016 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3017 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3018 } 3019 free_page(info); 3020 return; 3021 } 3022 3023 static int qeth_hw_trap_cb(struct qeth_card *card, 3024 struct qeth_reply *reply, unsigned long data) 3025 { 3026 struct qeth_ipa_cmd *cmd; 3027 __u16 rc; 3028 3029 cmd = (struct qeth_ipa_cmd *)data; 3030 rc = cmd->hdr.return_code; 3031 if (rc) 3032 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3033 return 0; 3034 } 3035 3036 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3037 { 3038 struct qeth_cmd_buffer *iob; 3039 struct qeth_ipa_cmd *cmd; 3040 3041 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3042 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3043 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3044 cmd->data.diagass.subcmd_len = 80; 3045 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3046 cmd->data.diagass.type = 1; 3047 cmd->data.diagass.action = action; 3048 switch (action) { 3049 case QETH_DIAGS_TRAP_ARM: 3050 cmd->data.diagass.options = 0x0003; 3051 cmd->data.diagass.ext = 0x00010000 + 3052 sizeof(struct qeth_trap_id); 3053 qeth_get_trap_id(card, 3054 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3055 break; 3056 case QETH_DIAGS_TRAP_DISARM: 3057 cmd->data.diagass.options = 0x0001; 3058 break; 3059 case QETH_DIAGS_TRAP_CAPTURE: 3060 break; 3061 } 3062 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3063 } 3064 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3065 3066 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3067 unsigned int qdio_error, const char *dbftext) 3068 { 3069 if (qdio_error) { 3070 QETH_CARD_TEXT(card, 2, dbftext); 3071 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3072 buf->element[15].sflags); 3073 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3074 buf->element[14].sflags); 3075 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3076 if ((buf->element[15].sflags) == 0x12) { 3077 card->stats.rx_dropped++; 3078 return 0; 3079 } else 3080 return 1; 3081 } 3082 return 0; 3083 } 3084 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3085 3086 void qeth_buffer_reclaim_work(struct work_struct *work) 3087 { 3088 struct qeth_card *card = container_of(work, struct qeth_card, 3089 buffer_reclaim_work.work); 3090 3091 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3092 qeth_queue_input_buffer(card, card->reclaim_index); 3093 } 3094 3095 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3096 { 3097 struct qeth_qdio_q *queue = card->qdio.in_q; 3098 struct list_head *lh; 3099 int count; 3100 int i; 3101 int rc; 3102 int newcount = 0; 3103 3104 count = (index < queue->next_buf_to_init)? 3105 card->qdio.in_buf_pool.buf_count - 3106 (queue->next_buf_to_init - index) : 3107 card->qdio.in_buf_pool.buf_count - 3108 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3109 /* only requeue at a certain threshold to avoid SIGAs */ 3110 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3111 for (i = queue->next_buf_to_init; 3112 i < queue->next_buf_to_init + count; ++i) { 3113 if (qeth_init_input_buffer(card, 3114 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3115 break; 3116 } else { 3117 newcount++; 3118 } 3119 } 3120 3121 if (newcount < count) { 3122 /* we are in memory shortage so we switch back to 3123 traditional skb allocation and drop packages */ 3124 atomic_set(&card->force_alloc_skb, 3); 3125 count = newcount; 3126 } else { 3127 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3128 } 3129 3130 if (!count) { 3131 i = 0; 3132 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3133 i++; 3134 if (i == card->qdio.in_buf_pool.buf_count) { 3135 QETH_CARD_TEXT(card, 2, "qsarbw"); 3136 card->reclaim_index = index; 3137 schedule_delayed_work( 3138 &card->buffer_reclaim_work, 3139 QETH_RECLAIM_WORK_TIME); 3140 } 3141 return; 3142 } 3143 3144 /* 3145 * according to old code it should be avoided to requeue all 3146 * 128 buffers in order to benefit from PCI avoidance. 3147 * this function keeps at least one buffer (the buffer at 3148 * 'index') un-requeued -> this buffer is the first buffer that 3149 * will be requeued the next time 3150 */ 3151 if (card->options.performance_stats) { 3152 card->perf_stats.inbound_do_qdio_cnt++; 3153 card->perf_stats.inbound_do_qdio_start_time = 3154 qeth_get_micros(); 3155 } 3156 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3157 queue->next_buf_to_init, count); 3158 if (card->options.performance_stats) 3159 card->perf_stats.inbound_do_qdio_time += 3160 qeth_get_micros() - 3161 card->perf_stats.inbound_do_qdio_start_time; 3162 if (rc) { 3163 QETH_CARD_TEXT(card, 2, "qinberr"); 3164 } 3165 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3166 QDIO_MAX_BUFFERS_PER_Q; 3167 } 3168 } 3169 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3170 3171 static int qeth_handle_send_error(struct qeth_card *card, 3172 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3173 { 3174 int sbalf15 = buffer->buffer->element[15].sflags; 3175 3176 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3177 if (card->info.type == QETH_CARD_TYPE_IQD) { 3178 if (sbalf15 == 0) { 3179 qdio_err = 0; 3180 } else { 3181 qdio_err = 1; 3182 } 3183 } 3184 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3185 3186 if (!qdio_err) 3187 return QETH_SEND_ERROR_NONE; 3188 3189 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3190 return QETH_SEND_ERROR_RETRY; 3191 3192 QETH_CARD_TEXT(card, 1, "lnkfail"); 3193 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3194 (u16)qdio_err, (u8)sbalf15); 3195 return QETH_SEND_ERROR_LINK_FAILURE; 3196 } 3197 3198 /* 3199 * Switched to packing state if the number of used buffers on a queue 3200 * reaches a certain limit. 3201 */ 3202 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3203 { 3204 if (!queue->do_pack) { 3205 if (atomic_read(&queue->used_buffers) 3206 >= QETH_HIGH_WATERMARK_PACK){ 3207 /* switch non-PACKING -> PACKING */ 3208 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3209 if (queue->card->options.performance_stats) 3210 queue->card->perf_stats.sc_dp_p++; 3211 queue->do_pack = 1; 3212 } 3213 } 3214 } 3215 3216 /* 3217 * Switches from packing to non-packing mode. If there is a packing 3218 * buffer on the queue this buffer will be prepared to be flushed. 3219 * In that case 1 is returned to inform the caller. If no buffer 3220 * has to be flushed, zero is returned. 3221 */ 3222 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3223 { 3224 struct qeth_qdio_out_buffer *buffer; 3225 int flush_count = 0; 3226 3227 if (queue->do_pack) { 3228 if (atomic_read(&queue->used_buffers) 3229 <= QETH_LOW_WATERMARK_PACK) { 3230 /* switch PACKING -> non-PACKING */ 3231 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3232 if (queue->card->options.performance_stats) 3233 queue->card->perf_stats.sc_p_dp++; 3234 queue->do_pack = 0; 3235 /* flush packing buffers */ 3236 buffer = queue->bufs[queue->next_buf_to_fill]; 3237 if ((atomic_read(&buffer->state) == 3238 QETH_QDIO_BUF_EMPTY) && 3239 (buffer->next_element_to_fill > 0)) { 3240 atomic_set(&buffer->state, 3241 QETH_QDIO_BUF_PRIMED); 3242 flush_count++; 3243 queue->next_buf_to_fill = 3244 (queue->next_buf_to_fill + 1) % 3245 QDIO_MAX_BUFFERS_PER_Q; 3246 } 3247 } 3248 } 3249 return flush_count; 3250 } 3251 3252 3253 /* 3254 * Called to flush a packing buffer if no more pci flags are on the queue. 3255 * Checks if there is a packing buffer and prepares it to be flushed. 3256 * In that case returns 1, otherwise zero. 3257 */ 3258 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3259 { 3260 struct qeth_qdio_out_buffer *buffer; 3261 3262 buffer = queue->bufs[queue->next_buf_to_fill]; 3263 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3264 (buffer->next_element_to_fill > 0)) { 3265 /* it's a packing buffer */ 3266 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3267 queue->next_buf_to_fill = 3268 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3269 return 1; 3270 } 3271 return 0; 3272 } 3273 3274 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3275 int count) 3276 { 3277 struct qeth_qdio_out_buffer *buf; 3278 int rc; 3279 int i; 3280 unsigned int qdio_flags; 3281 3282 for (i = index; i < index + count; ++i) { 3283 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3284 buf = queue->bufs[bidx]; 3285 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3286 SBAL_EFLAGS_LAST_ENTRY; 3287 3288 if (queue->bufstates) 3289 queue->bufstates[bidx].user = buf; 3290 3291 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3292 continue; 3293 3294 if (!queue->do_pack) { 3295 if ((atomic_read(&queue->used_buffers) >= 3296 (QETH_HIGH_WATERMARK_PACK - 3297 QETH_WATERMARK_PACK_FUZZ)) && 3298 !atomic_read(&queue->set_pci_flags_count)) { 3299 /* it's likely that we'll go to packing 3300 * mode soon */ 3301 atomic_inc(&queue->set_pci_flags_count); 3302 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3303 } 3304 } else { 3305 if (!atomic_read(&queue->set_pci_flags_count)) { 3306 /* 3307 * there's no outstanding PCI any more, so we 3308 * have to request a PCI to be sure the the PCI 3309 * will wake at some time in the future then we 3310 * can flush packed buffers that might still be 3311 * hanging around, which can happen if no 3312 * further send was requested by the stack 3313 */ 3314 atomic_inc(&queue->set_pci_flags_count); 3315 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3316 } 3317 } 3318 } 3319 3320 queue->card->dev->trans_start = jiffies; 3321 if (queue->card->options.performance_stats) { 3322 queue->card->perf_stats.outbound_do_qdio_cnt++; 3323 queue->card->perf_stats.outbound_do_qdio_start_time = 3324 qeth_get_micros(); 3325 } 3326 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3327 if (atomic_read(&queue->set_pci_flags_count)) 3328 qdio_flags |= QDIO_FLAG_PCI_OUT; 3329 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3330 queue->queue_no, index, count); 3331 if (queue->card->options.performance_stats) 3332 queue->card->perf_stats.outbound_do_qdio_time += 3333 qeth_get_micros() - 3334 queue->card->perf_stats.outbound_do_qdio_start_time; 3335 atomic_add(count, &queue->used_buffers); 3336 if (rc) { 3337 queue->card->stats.tx_errors += count; 3338 /* ignore temporary SIGA errors without busy condition */ 3339 if (rc == -ENOBUFS) 3340 return; 3341 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3342 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3343 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3344 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3345 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3346 3347 /* this must not happen under normal circumstances. if it 3348 * happens something is really wrong -> recover */ 3349 qeth_schedule_recovery(queue->card); 3350 return; 3351 } 3352 if (queue->card->options.performance_stats) 3353 queue->card->perf_stats.bufs_sent += count; 3354 } 3355 3356 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3357 { 3358 int index; 3359 int flush_cnt = 0; 3360 int q_was_packing = 0; 3361 3362 /* 3363 * check if weed have to switch to non-packing mode or if 3364 * we have to get a pci flag out on the queue 3365 */ 3366 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3367 !atomic_read(&queue->set_pci_flags_count)) { 3368 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3369 QETH_OUT_Q_UNLOCKED) { 3370 /* 3371 * If we get in here, there was no action in 3372 * do_send_packet. So, we check if there is a 3373 * packing buffer to be flushed here. 3374 */ 3375 netif_stop_queue(queue->card->dev); 3376 index = queue->next_buf_to_fill; 3377 q_was_packing = queue->do_pack; 3378 /* queue->do_pack may change */ 3379 barrier(); 3380 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3381 if (!flush_cnt && 3382 !atomic_read(&queue->set_pci_flags_count)) 3383 flush_cnt += 3384 qeth_flush_buffers_on_no_pci(queue); 3385 if (queue->card->options.performance_stats && 3386 q_was_packing) 3387 queue->card->perf_stats.bufs_sent_pack += 3388 flush_cnt; 3389 if (flush_cnt) 3390 qeth_flush_buffers(queue, index, flush_cnt); 3391 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3392 } 3393 } 3394 } 3395 3396 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3397 unsigned long card_ptr) 3398 { 3399 struct qeth_card *card = (struct qeth_card *)card_ptr; 3400 3401 if (card->dev && (card->dev->flags & IFF_UP)) 3402 napi_schedule(&card->napi); 3403 } 3404 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3405 3406 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3407 { 3408 int rc; 3409 3410 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3411 rc = -1; 3412 goto out; 3413 } else { 3414 if (card->options.cq == cq) { 3415 rc = 0; 3416 goto out; 3417 } 3418 3419 if (card->state != CARD_STATE_DOWN && 3420 card->state != CARD_STATE_RECOVER) { 3421 rc = -1; 3422 goto out; 3423 } 3424 3425 qeth_free_qdio_buffers(card); 3426 card->options.cq = cq; 3427 rc = 0; 3428 } 3429 out: 3430 return rc; 3431 3432 } 3433 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3434 3435 3436 static void qeth_qdio_cq_handler(struct qeth_card *card, 3437 unsigned int qdio_err, 3438 unsigned int queue, int first_element, int count) { 3439 struct qeth_qdio_q *cq = card->qdio.c_q; 3440 int i; 3441 int rc; 3442 3443 if (!qeth_is_cq(card, queue)) 3444 goto out; 3445 3446 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3447 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3448 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3449 3450 if (qdio_err) { 3451 netif_stop_queue(card->dev); 3452 qeth_schedule_recovery(card); 3453 goto out; 3454 } 3455 3456 if (card->options.performance_stats) { 3457 card->perf_stats.cq_cnt++; 3458 card->perf_stats.cq_start_time = qeth_get_micros(); 3459 } 3460 3461 for (i = first_element; i < first_element + count; ++i) { 3462 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3463 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx]; 3464 int e; 3465 3466 e = 0; 3467 while (buffer->element[e].addr) { 3468 unsigned long phys_aob_addr; 3469 3470 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3471 qeth_qdio_handle_aob(card, phys_aob_addr); 3472 buffer->element[e].addr = NULL; 3473 buffer->element[e].eflags = 0; 3474 buffer->element[e].sflags = 0; 3475 buffer->element[e].length = 0; 3476 3477 ++e; 3478 } 3479 3480 buffer->element[15].eflags = 0; 3481 buffer->element[15].sflags = 0; 3482 } 3483 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3484 card->qdio.c_q->next_buf_to_init, 3485 count); 3486 if (rc) { 3487 dev_warn(&card->gdev->dev, 3488 "QDIO reported an error, rc=%i\n", rc); 3489 QETH_CARD_TEXT(card, 2, "qcqherr"); 3490 } 3491 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3492 + count) % QDIO_MAX_BUFFERS_PER_Q; 3493 3494 netif_wake_queue(card->dev); 3495 3496 if (card->options.performance_stats) { 3497 int delta_t = qeth_get_micros(); 3498 delta_t -= card->perf_stats.cq_start_time; 3499 card->perf_stats.cq_time += delta_t; 3500 } 3501 out: 3502 return; 3503 } 3504 3505 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3506 unsigned int queue, int first_elem, int count, 3507 unsigned long card_ptr) 3508 { 3509 struct qeth_card *card = (struct qeth_card *)card_ptr; 3510 3511 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3512 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3513 3514 if (qeth_is_cq(card, queue)) 3515 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3516 else if (qdio_err) 3517 qeth_schedule_recovery(card); 3518 3519 3520 } 3521 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3522 3523 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3524 unsigned int qdio_error, int __queue, int first_element, 3525 int count, unsigned long card_ptr) 3526 { 3527 struct qeth_card *card = (struct qeth_card *) card_ptr; 3528 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3529 struct qeth_qdio_out_buffer *buffer; 3530 int i; 3531 3532 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3533 if (qdio_error & QDIO_ERROR_FATAL) { 3534 QETH_CARD_TEXT(card, 2, "achkcond"); 3535 netif_stop_queue(card->dev); 3536 qeth_schedule_recovery(card); 3537 return; 3538 } 3539 if (card->options.performance_stats) { 3540 card->perf_stats.outbound_handler_cnt++; 3541 card->perf_stats.outbound_handler_start_time = 3542 qeth_get_micros(); 3543 } 3544 for (i = first_element; i < (first_element + count); ++i) { 3545 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3546 buffer = queue->bufs[bidx]; 3547 qeth_handle_send_error(card, buffer, qdio_error); 3548 3549 if (queue->bufstates && 3550 (queue->bufstates[bidx].flags & 3551 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3552 BUG_ON(card->options.cq != QETH_CQ_ENABLED); 3553 3554 if (atomic_cmpxchg(&buffer->state, 3555 QETH_QDIO_BUF_PRIMED, 3556 QETH_QDIO_BUF_PENDING) == 3557 QETH_QDIO_BUF_PRIMED) { 3558 qeth_notify_skbs(queue, buffer, 3559 TX_NOTIFY_PENDING); 3560 } 3561 buffer->aob = queue->bufstates[bidx].aob; 3562 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3563 QETH_CARD_TEXT(queue->card, 5, "aob"); 3564 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3565 virt_to_phys(buffer->aob)); 3566 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q); 3567 if (qeth_init_qdio_out_buf(queue, bidx)) { 3568 QETH_CARD_TEXT(card, 2, "outofbuf"); 3569 qeth_schedule_recovery(card); 3570 } 3571 } else { 3572 if (card->options.cq == QETH_CQ_ENABLED) { 3573 enum iucv_tx_notify n; 3574 3575 n = qeth_compute_cq_notification( 3576 buffer->buffer->element[15].sflags, 0); 3577 qeth_notify_skbs(queue, buffer, n); 3578 } 3579 3580 qeth_clear_output_buffer(queue, buffer, 3581 QETH_QDIO_BUF_EMPTY); 3582 } 3583 qeth_cleanup_handled_pending(queue, bidx, 0); 3584 } 3585 atomic_sub(count, &queue->used_buffers); 3586 /* check if we need to do something on this outbound queue */ 3587 if (card->info.type != QETH_CARD_TYPE_IQD) 3588 qeth_check_outbound_queue(queue); 3589 3590 netif_wake_queue(queue->card->dev); 3591 if (card->options.performance_stats) 3592 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3593 card->perf_stats.outbound_handler_start_time; 3594 } 3595 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3596 3597 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3598 int ipv, int cast_type) 3599 { 3600 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 3601 card->info.type == QETH_CARD_TYPE_OSX)) 3602 return card->qdio.default_out_queue; 3603 switch (card->qdio.no_out_queues) { 3604 case 4: 3605 if (cast_type && card->info.is_multicast_different) 3606 return card->info.is_multicast_different & 3607 (card->qdio.no_out_queues - 1); 3608 if (card->qdio.do_prio_queueing && (ipv == 4)) { 3609 const u8 tos = ip_hdr(skb)->tos; 3610 3611 if (card->qdio.do_prio_queueing == 3612 QETH_PRIO_Q_ING_TOS) { 3613 if (tos & IP_TOS_NOTIMPORTANT) 3614 return 3; 3615 if (tos & IP_TOS_HIGHRELIABILITY) 3616 return 2; 3617 if (tos & IP_TOS_HIGHTHROUGHPUT) 3618 return 1; 3619 if (tos & IP_TOS_LOWDELAY) 3620 return 0; 3621 } 3622 if (card->qdio.do_prio_queueing == 3623 QETH_PRIO_Q_ING_PREC) 3624 return 3 - (tos >> 6); 3625 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3626 /* TODO: IPv6!!! */ 3627 } 3628 return card->qdio.default_out_queue; 3629 case 1: /* fallthrough for single-out-queue 1920-device */ 3630 default: 3631 return card->qdio.default_out_queue; 3632 } 3633 } 3634 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3635 3636 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 3637 struct sk_buff *skb, int elems) 3638 { 3639 int dlen = skb->len - skb->data_len; 3640 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3641 PFN_DOWN((unsigned long)skb->data); 3642 3643 elements_needed += skb_shinfo(skb)->nr_frags; 3644 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3645 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3646 "(Number=%d / Length=%d). Discarded.\n", 3647 (elements_needed+elems), skb->len); 3648 return 0; 3649 } 3650 return elements_needed; 3651 } 3652 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3653 3654 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len) 3655 { 3656 int hroom, inpage, rest; 3657 3658 if (((unsigned long)skb->data & PAGE_MASK) != 3659 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3660 hroom = skb_headroom(skb); 3661 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3662 rest = len - inpage; 3663 if (rest > hroom) 3664 return 1; 3665 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3666 skb->data -= rest; 3667 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3668 } 3669 return 0; 3670 } 3671 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3672 3673 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3674 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3675 int offset) 3676 { 3677 int length = skb->len - skb->data_len; 3678 int length_here; 3679 int element; 3680 char *data; 3681 int first_lap, cnt; 3682 struct skb_frag_struct *frag; 3683 3684 element = *next_element_to_fill; 3685 data = skb->data; 3686 first_lap = (is_tso == 0 ? 1 : 0); 3687 3688 if (offset >= 0) { 3689 data = skb->data + offset; 3690 length -= offset; 3691 first_lap = 0; 3692 } 3693 3694 while (length > 0) { 3695 /* length_here is the remaining amount of data in this page */ 3696 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3697 if (length < length_here) 3698 length_here = length; 3699 3700 buffer->element[element].addr = data; 3701 buffer->element[element].length = length_here; 3702 length -= length_here; 3703 if (!length) { 3704 if (first_lap) 3705 if (skb_shinfo(skb)->nr_frags) 3706 buffer->element[element].eflags = 3707 SBAL_EFLAGS_FIRST_FRAG; 3708 else 3709 buffer->element[element].eflags = 0; 3710 else 3711 buffer->element[element].eflags = 3712 SBAL_EFLAGS_MIDDLE_FRAG; 3713 } else { 3714 if (first_lap) 3715 buffer->element[element].eflags = 3716 SBAL_EFLAGS_FIRST_FRAG; 3717 else 3718 buffer->element[element].eflags = 3719 SBAL_EFLAGS_MIDDLE_FRAG; 3720 } 3721 data += length_here; 3722 element++; 3723 first_lap = 0; 3724 } 3725 3726 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3727 frag = &skb_shinfo(skb)->frags[cnt]; 3728 buffer->element[element].addr = (char *) 3729 page_to_phys(skb_frag_page(frag)) 3730 + frag->page_offset; 3731 buffer->element[element].length = frag->size; 3732 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG; 3733 element++; 3734 } 3735 3736 if (buffer->element[element - 1].eflags) 3737 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3738 *next_element_to_fill = element; 3739 } 3740 3741 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3742 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3743 struct qeth_hdr *hdr, int offset, int hd_len) 3744 { 3745 struct qdio_buffer *buffer; 3746 int flush_cnt = 0, hdr_len, large_send = 0; 3747 3748 buffer = buf->buffer; 3749 atomic_inc(&skb->users); 3750 skb_queue_tail(&buf->skb_list, skb); 3751 3752 /*check first on TSO ....*/ 3753 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3754 int element = buf->next_element_to_fill; 3755 3756 hdr_len = sizeof(struct qeth_hdr_tso) + 3757 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3758 /*fill first buffer entry only with header information */ 3759 buffer->element[element].addr = skb->data; 3760 buffer->element[element].length = hdr_len; 3761 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3762 buf->next_element_to_fill++; 3763 skb->data += hdr_len; 3764 skb->len -= hdr_len; 3765 large_send = 1; 3766 } 3767 3768 if (offset >= 0) { 3769 int element = buf->next_element_to_fill; 3770 buffer->element[element].addr = hdr; 3771 buffer->element[element].length = sizeof(struct qeth_hdr) + 3772 hd_len; 3773 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3774 buf->is_header[element] = 1; 3775 buf->next_element_to_fill++; 3776 } 3777 3778 __qeth_fill_buffer(skb, buffer, large_send, 3779 (int *)&buf->next_element_to_fill, offset); 3780 3781 if (!queue->do_pack) { 3782 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3783 /* set state to PRIMED -> will be flushed */ 3784 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3785 flush_cnt = 1; 3786 } else { 3787 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3788 if (queue->card->options.performance_stats) 3789 queue->card->perf_stats.skbs_sent_pack++; 3790 if (buf->next_element_to_fill >= 3791 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3792 /* 3793 * packed buffer if full -> set state PRIMED 3794 * -> will be flushed 3795 */ 3796 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3797 flush_cnt = 1; 3798 } 3799 } 3800 return flush_cnt; 3801 } 3802 3803 int qeth_do_send_packet_fast(struct qeth_card *card, 3804 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3805 struct qeth_hdr *hdr, int elements_needed, 3806 int offset, int hd_len) 3807 { 3808 struct qeth_qdio_out_buffer *buffer; 3809 int index; 3810 3811 /* spin until we get the queue ... */ 3812 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3813 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3814 /* ... now we've got the queue */ 3815 index = queue->next_buf_to_fill; 3816 buffer = queue->bufs[queue->next_buf_to_fill]; 3817 /* 3818 * check if buffer is empty to make sure that we do not 'overtake' 3819 * ourselves and try to fill a buffer that is already primed 3820 */ 3821 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3822 goto out; 3823 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3824 QDIO_MAX_BUFFERS_PER_Q; 3825 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3826 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3827 qeth_flush_buffers(queue, index, 1); 3828 return 0; 3829 out: 3830 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3831 return -EBUSY; 3832 } 3833 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3834 3835 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3836 struct sk_buff *skb, struct qeth_hdr *hdr, 3837 int elements_needed) 3838 { 3839 struct qeth_qdio_out_buffer *buffer; 3840 int start_index; 3841 int flush_count = 0; 3842 int do_pack = 0; 3843 int tmp; 3844 int rc = 0; 3845 3846 /* spin until we get the queue ... */ 3847 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3848 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3849 start_index = queue->next_buf_to_fill; 3850 buffer = queue->bufs[queue->next_buf_to_fill]; 3851 /* 3852 * check if buffer is empty to make sure that we do not 'overtake' 3853 * ourselves and try to fill a buffer that is already primed 3854 */ 3855 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3856 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3857 return -EBUSY; 3858 } 3859 /* check if we need to switch packing state of this queue */ 3860 qeth_switch_to_packing_if_needed(queue); 3861 if (queue->do_pack) { 3862 do_pack = 1; 3863 /* does packet fit in current buffer? */ 3864 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3865 buffer->next_element_to_fill) < elements_needed) { 3866 /* ... no -> set state PRIMED */ 3867 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3868 flush_count++; 3869 queue->next_buf_to_fill = 3870 (queue->next_buf_to_fill + 1) % 3871 QDIO_MAX_BUFFERS_PER_Q; 3872 buffer = queue->bufs[queue->next_buf_to_fill]; 3873 /* we did a step forward, so check buffer state 3874 * again */ 3875 if (atomic_read(&buffer->state) != 3876 QETH_QDIO_BUF_EMPTY) { 3877 qeth_flush_buffers(queue, start_index, 3878 flush_count); 3879 atomic_set(&queue->state, 3880 QETH_OUT_Q_UNLOCKED); 3881 return -EBUSY; 3882 } 3883 } 3884 } 3885 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3886 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3887 QDIO_MAX_BUFFERS_PER_Q; 3888 flush_count += tmp; 3889 if (flush_count) 3890 qeth_flush_buffers(queue, start_index, flush_count); 3891 else if (!atomic_read(&queue->set_pci_flags_count)) 3892 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3893 /* 3894 * queue->state will go from LOCKED -> UNLOCKED or from 3895 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3896 * (switch packing state or flush buffer to get another pci flag out). 3897 * In that case we will enter this loop 3898 */ 3899 while (atomic_dec_return(&queue->state)) { 3900 flush_count = 0; 3901 start_index = queue->next_buf_to_fill; 3902 /* check if we can go back to non-packing state */ 3903 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3904 /* 3905 * check if we need to flush a packing buffer to get a pci 3906 * flag out on the queue 3907 */ 3908 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3909 flush_count += qeth_flush_buffers_on_no_pci(queue); 3910 if (flush_count) 3911 qeth_flush_buffers(queue, start_index, flush_count); 3912 } 3913 /* at this point the queue is UNLOCKED again */ 3914 if (queue->card->options.performance_stats && do_pack) 3915 queue->card->perf_stats.bufs_sent_pack += flush_count; 3916 3917 return rc; 3918 } 3919 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3920 3921 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3922 struct qeth_reply *reply, unsigned long data) 3923 { 3924 struct qeth_ipa_cmd *cmd; 3925 struct qeth_ipacmd_setadpparms *setparms; 3926 3927 QETH_CARD_TEXT(card, 4, "prmadpcb"); 3928 3929 cmd = (struct qeth_ipa_cmd *) data; 3930 setparms = &(cmd->data.setadapterparms); 3931 3932 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3933 if (cmd->hdr.return_code) { 3934 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 3935 setparms->data.mode = SET_PROMISC_MODE_OFF; 3936 } 3937 card->info.promisc_mode = setparms->data.mode; 3938 return 0; 3939 } 3940 3941 void qeth_setadp_promisc_mode(struct qeth_card *card) 3942 { 3943 enum qeth_ipa_promisc_modes mode; 3944 struct net_device *dev = card->dev; 3945 struct qeth_cmd_buffer *iob; 3946 struct qeth_ipa_cmd *cmd; 3947 3948 QETH_CARD_TEXT(card, 4, "setprom"); 3949 3950 if (((dev->flags & IFF_PROMISC) && 3951 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3952 (!(dev->flags & IFF_PROMISC) && 3953 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3954 return; 3955 mode = SET_PROMISC_MODE_OFF; 3956 if (dev->flags & IFF_PROMISC) 3957 mode = SET_PROMISC_MODE_ON; 3958 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 3959 3960 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3961 sizeof(struct qeth_ipacmd_setadpparms)); 3962 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3963 cmd->data.setadapterparms.data.mode = mode; 3964 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3965 } 3966 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3967 3968 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3969 { 3970 struct qeth_card *card; 3971 char dbf_text[15]; 3972 3973 card = dev->ml_priv; 3974 3975 QETH_CARD_TEXT(card, 4, "chgmtu"); 3976 sprintf(dbf_text, "%8x", new_mtu); 3977 QETH_CARD_TEXT(card, 4, dbf_text); 3978 3979 if (new_mtu < 64) 3980 return -EINVAL; 3981 if (new_mtu > 65535) 3982 return -EINVAL; 3983 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3984 (!qeth_mtu_is_valid(card, new_mtu))) 3985 return -EINVAL; 3986 dev->mtu = new_mtu; 3987 return 0; 3988 } 3989 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3990 3991 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3992 { 3993 struct qeth_card *card; 3994 3995 card = dev->ml_priv; 3996 3997 QETH_CARD_TEXT(card, 5, "getstat"); 3998 3999 return &card->stats; 4000 } 4001 EXPORT_SYMBOL_GPL(qeth_get_stats); 4002 4003 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4004 struct qeth_reply *reply, unsigned long data) 4005 { 4006 struct qeth_ipa_cmd *cmd; 4007 4008 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4009 4010 cmd = (struct qeth_ipa_cmd *) data; 4011 if (!card->options.layer2 || 4012 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4013 memcpy(card->dev->dev_addr, 4014 &cmd->data.setadapterparms.data.change_addr.addr, 4015 OSA_ADDR_LEN); 4016 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4017 } 4018 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4019 return 0; 4020 } 4021 4022 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4023 { 4024 int rc; 4025 struct qeth_cmd_buffer *iob; 4026 struct qeth_ipa_cmd *cmd; 4027 4028 QETH_CARD_TEXT(card, 4, "chgmac"); 4029 4030 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4031 sizeof(struct qeth_ipacmd_setadpparms)); 4032 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4033 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4034 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4035 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4036 card->dev->dev_addr, OSA_ADDR_LEN); 4037 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4038 NULL); 4039 return rc; 4040 } 4041 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4042 4043 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4044 struct qeth_reply *reply, unsigned long data) 4045 { 4046 struct qeth_ipa_cmd *cmd; 4047 struct qeth_set_access_ctrl *access_ctrl_req; 4048 4049 QETH_CARD_TEXT(card, 4, "setaccb"); 4050 4051 cmd = (struct qeth_ipa_cmd *) data; 4052 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4053 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4054 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4055 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4056 cmd->data.setadapterparms.hdr.return_code); 4057 switch (cmd->data.setadapterparms.hdr.return_code) { 4058 case SET_ACCESS_CTRL_RC_SUCCESS: 4059 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4060 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4061 { 4062 card->options.isolation = access_ctrl_req->subcmd_code; 4063 if (card->options.isolation == ISOLATION_MODE_NONE) { 4064 dev_info(&card->gdev->dev, 4065 "QDIO data connection isolation is deactivated\n"); 4066 } else { 4067 dev_info(&card->gdev->dev, 4068 "QDIO data connection isolation is activated\n"); 4069 } 4070 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n", 4071 card->gdev->dev.kobj.name, 4072 access_ctrl_req->subcmd_code, 4073 cmd->data.setadapterparms.hdr.return_code); 4074 break; 4075 } 4076 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4077 { 4078 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4079 card->gdev->dev.kobj.name, 4080 access_ctrl_req->subcmd_code, 4081 cmd->data.setadapterparms.hdr.return_code); 4082 dev_err(&card->gdev->dev, "Adapter does not " 4083 "support QDIO data connection isolation\n"); 4084 4085 /* ensure isolation mode is "none" */ 4086 card->options.isolation = ISOLATION_MODE_NONE; 4087 break; 4088 } 4089 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4090 { 4091 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 4092 card->gdev->dev.kobj.name, 4093 access_ctrl_req->subcmd_code, 4094 cmd->data.setadapterparms.hdr.return_code); 4095 dev_err(&card->gdev->dev, 4096 "Adapter is dedicated. " 4097 "QDIO data connection isolation not supported\n"); 4098 4099 /* ensure isolation mode is "none" */ 4100 card->options.isolation = ISOLATION_MODE_NONE; 4101 break; 4102 } 4103 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4104 { 4105 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 4106 card->gdev->dev.kobj.name, 4107 access_ctrl_req->subcmd_code, 4108 cmd->data.setadapterparms.hdr.return_code); 4109 dev_err(&card->gdev->dev, 4110 "TSO does not permit QDIO data connection isolation\n"); 4111 4112 /* ensure isolation mode is "none" */ 4113 card->options.isolation = ISOLATION_MODE_NONE; 4114 break; 4115 } 4116 default: 4117 { 4118 /* this should never happen */ 4119 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d" 4120 "==UNKNOWN\n", 4121 card->gdev->dev.kobj.name, 4122 access_ctrl_req->subcmd_code, 4123 cmd->data.setadapterparms.hdr.return_code); 4124 4125 /* ensure isolation mode is "none" */ 4126 card->options.isolation = ISOLATION_MODE_NONE; 4127 break; 4128 } 4129 } 4130 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4131 return 0; 4132 } 4133 4134 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4135 enum qeth_ipa_isolation_modes isolation) 4136 { 4137 int rc; 4138 struct qeth_cmd_buffer *iob; 4139 struct qeth_ipa_cmd *cmd; 4140 struct qeth_set_access_ctrl *access_ctrl_req; 4141 4142 QETH_CARD_TEXT(card, 4, "setacctl"); 4143 4144 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4145 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4146 4147 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4148 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4149 sizeof(struct qeth_set_access_ctrl)); 4150 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4151 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4152 access_ctrl_req->subcmd_code = isolation; 4153 4154 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4155 NULL); 4156 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4157 return rc; 4158 } 4159 4160 int qeth_set_access_ctrl_online(struct qeth_card *card) 4161 { 4162 int rc = 0; 4163 4164 QETH_CARD_TEXT(card, 4, "setactlo"); 4165 4166 if ((card->info.type == QETH_CARD_TYPE_OSD || 4167 card->info.type == QETH_CARD_TYPE_OSX) && 4168 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4169 rc = qeth_setadpparms_set_access_ctrl(card, 4170 card->options.isolation); 4171 if (rc) { 4172 QETH_DBF_MESSAGE(3, 4173 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4174 card->gdev->dev.kobj.name, 4175 rc); 4176 } 4177 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4178 card->options.isolation = ISOLATION_MODE_NONE; 4179 4180 dev_err(&card->gdev->dev, "Adapter does not " 4181 "support QDIO data connection isolation\n"); 4182 rc = -EOPNOTSUPP; 4183 } 4184 return rc; 4185 } 4186 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4187 4188 void qeth_tx_timeout(struct net_device *dev) 4189 { 4190 struct qeth_card *card; 4191 4192 card = dev->ml_priv; 4193 QETH_CARD_TEXT(card, 4, "txtimeo"); 4194 card->stats.tx_errors++; 4195 qeth_schedule_recovery(card); 4196 } 4197 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4198 4199 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4200 { 4201 struct qeth_card *card = dev->ml_priv; 4202 int rc = 0; 4203 4204 switch (regnum) { 4205 case MII_BMCR: /* Basic mode control register */ 4206 rc = BMCR_FULLDPLX; 4207 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4208 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4209 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4210 rc |= BMCR_SPEED100; 4211 break; 4212 case MII_BMSR: /* Basic mode status register */ 4213 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4214 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4215 BMSR_100BASE4; 4216 break; 4217 case MII_PHYSID1: /* PHYS ID 1 */ 4218 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4219 dev->dev_addr[2]; 4220 rc = (rc >> 5) & 0xFFFF; 4221 break; 4222 case MII_PHYSID2: /* PHYS ID 2 */ 4223 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4224 break; 4225 case MII_ADVERTISE: /* Advertisement control reg */ 4226 rc = ADVERTISE_ALL; 4227 break; 4228 case MII_LPA: /* Link partner ability reg */ 4229 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4230 LPA_100BASE4 | LPA_LPACK; 4231 break; 4232 case MII_EXPANSION: /* Expansion register */ 4233 break; 4234 case MII_DCOUNTER: /* disconnect counter */ 4235 break; 4236 case MII_FCSCOUNTER: /* false carrier counter */ 4237 break; 4238 case MII_NWAYTEST: /* N-way auto-neg test register */ 4239 break; 4240 case MII_RERRCOUNTER: /* rx error counter */ 4241 rc = card->stats.rx_errors; 4242 break; 4243 case MII_SREVISION: /* silicon revision */ 4244 break; 4245 case MII_RESV1: /* reserved 1 */ 4246 break; 4247 case MII_LBRERROR: /* loopback, rx, bypass error */ 4248 break; 4249 case MII_PHYADDR: /* physical address */ 4250 break; 4251 case MII_RESV2: /* reserved 2 */ 4252 break; 4253 case MII_TPISTATUS: /* TPI status for 10mbps */ 4254 break; 4255 case MII_NCONFIG: /* network interface config */ 4256 break; 4257 default: 4258 break; 4259 } 4260 return rc; 4261 } 4262 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4263 4264 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4265 struct qeth_cmd_buffer *iob, int len, 4266 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4267 unsigned long), 4268 void *reply_param) 4269 { 4270 u16 s1, s2; 4271 4272 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4273 4274 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4275 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4276 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4277 /* adjust PDU length fields in IPA_PDU_HEADER */ 4278 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4279 s2 = (u32) len; 4280 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4281 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4282 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4283 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4284 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4285 reply_cb, reply_param); 4286 } 4287 4288 static int qeth_snmp_command_cb(struct qeth_card *card, 4289 struct qeth_reply *reply, unsigned long sdata) 4290 { 4291 struct qeth_ipa_cmd *cmd; 4292 struct qeth_arp_query_info *qinfo; 4293 struct qeth_snmp_cmd *snmp; 4294 unsigned char *data; 4295 __u16 data_len; 4296 4297 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4298 4299 cmd = (struct qeth_ipa_cmd *) sdata; 4300 data = (unsigned char *)((char *)cmd - reply->offset); 4301 qinfo = (struct qeth_arp_query_info *) reply->param; 4302 snmp = &cmd->data.setadapterparms.data.snmp; 4303 4304 if (cmd->hdr.return_code) { 4305 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 4306 return 0; 4307 } 4308 if (cmd->data.setadapterparms.hdr.return_code) { 4309 cmd->hdr.return_code = 4310 cmd->data.setadapterparms.hdr.return_code; 4311 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 4312 return 0; 4313 } 4314 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4315 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4316 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4317 else 4318 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4319 4320 /* check if there is enough room in userspace */ 4321 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4322 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4323 cmd->hdr.return_code = IPA_RC_ENOMEM; 4324 return 0; 4325 } 4326 QETH_CARD_TEXT_(card, 4, "snore%i", 4327 cmd->data.setadapterparms.hdr.used_total); 4328 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4329 cmd->data.setadapterparms.hdr.seq_no); 4330 /*copy entries to user buffer*/ 4331 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4332 memcpy(qinfo->udata + qinfo->udata_offset, 4333 (char *)snmp, 4334 data_len + offsetof(struct qeth_snmp_cmd, data)); 4335 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4336 } else { 4337 memcpy(qinfo->udata + qinfo->udata_offset, 4338 (char *)&snmp->request, data_len); 4339 } 4340 qinfo->udata_offset += data_len; 4341 /* check if all replies received ... */ 4342 QETH_CARD_TEXT_(card, 4, "srtot%i", 4343 cmd->data.setadapterparms.hdr.used_total); 4344 QETH_CARD_TEXT_(card, 4, "srseq%i", 4345 cmd->data.setadapterparms.hdr.seq_no); 4346 if (cmd->data.setadapterparms.hdr.seq_no < 4347 cmd->data.setadapterparms.hdr.used_total) 4348 return 1; 4349 return 0; 4350 } 4351 4352 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4353 { 4354 struct qeth_cmd_buffer *iob; 4355 struct qeth_ipa_cmd *cmd; 4356 struct qeth_snmp_ureq *ureq; 4357 int req_len; 4358 struct qeth_arp_query_info qinfo = {0, }; 4359 int rc = 0; 4360 4361 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4362 4363 if (card->info.guestlan) 4364 return -EOPNOTSUPP; 4365 4366 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4367 (!card->options.layer2)) { 4368 return -EOPNOTSUPP; 4369 } 4370 /* skip 4 bytes (data_len struct member) to get req_len */ 4371 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4372 return -EFAULT; 4373 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4374 if (IS_ERR(ureq)) { 4375 QETH_CARD_TEXT(card, 2, "snmpnome"); 4376 return PTR_ERR(ureq); 4377 } 4378 qinfo.udata_len = ureq->hdr.data_len; 4379 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4380 if (!qinfo.udata) { 4381 kfree(ureq); 4382 return -ENOMEM; 4383 } 4384 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4385 4386 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4387 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4388 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4389 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4390 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4391 qeth_snmp_command_cb, (void *)&qinfo); 4392 if (rc) 4393 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4394 QETH_CARD_IFNAME(card), rc); 4395 else { 4396 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4397 rc = -EFAULT; 4398 } 4399 4400 kfree(ureq); 4401 kfree(qinfo.udata); 4402 return rc; 4403 } 4404 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4405 4406 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4407 struct qeth_reply *reply, unsigned long data) 4408 { 4409 struct qeth_ipa_cmd *cmd; 4410 struct qeth_qoat_priv *priv; 4411 char *resdata; 4412 int resdatalen; 4413 4414 QETH_CARD_TEXT(card, 3, "qoatcb"); 4415 4416 cmd = (struct qeth_ipa_cmd *)data; 4417 priv = (struct qeth_qoat_priv *)reply->param; 4418 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4419 resdata = (char *)data + 28; 4420 4421 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4422 cmd->hdr.return_code = IPA_RC_FFFF; 4423 return 0; 4424 } 4425 4426 memcpy((priv->buffer + priv->response_len), resdata, 4427 resdatalen); 4428 priv->response_len += resdatalen; 4429 4430 if (cmd->data.setadapterparms.hdr.seq_no < 4431 cmd->data.setadapterparms.hdr.used_total) 4432 return 1; 4433 return 0; 4434 } 4435 4436 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4437 { 4438 int rc = 0; 4439 struct qeth_cmd_buffer *iob; 4440 struct qeth_ipa_cmd *cmd; 4441 struct qeth_query_oat *oat_req; 4442 struct qeth_query_oat_data oat_data; 4443 struct qeth_qoat_priv priv; 4444 void __user *tmp; 4445 4446 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4447 4448 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4449 rc = -EOPNOTSUPP; 4450 goto out; 4451 } 4452 4453 if (copy_from_user(&oat_data, udata, 4454 sizeof(struct qeth_query_oat_data))) { 4455 rc = -EFAULT; 4456 goto out; 4457 } 4458 4459 priv.buffer_len = oat_data.buffer_len; 4460 priv.response_len = 0; 4461 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4462 if (!priv.buffer) { 4463 rc = -ENOMEM; 4464 goto out; 4465 } 4466 4467 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4468 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4469 sizeof(struct qeth_query_oat)); 4470 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4471 oat_req = &cmd->data.setadapterparms.data.query_oat; 4472 oat_req->subcmd_code = oat_data.command; 4473 4474 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4475 &priv); 4476 if (!rc) { 4477 if (is_compat_task()) 4478 tmp = compat_ptr(oat_data.ptr); 4479 else 4480 tmp = (void __user *)(unsigned long)oat_data.ptr; 4481 4482 if (copy_to_user(tmp, priv.buffer, 4483 priv.response_len)) { 4484 rc = -EFAULT; 4485 goto out_free; 4486 } 4487 4488 oat_data.response_len = priv.response_len; 4489 4490 if (copy_to_user(udata, &oat_data, 4491 sizeof(struct qeth_query_oat_data))) 4492 rc = -EFAULT; 4493 } else 4494 if (rc == IPA_RC_FFFF) 4495 rc = -EFAULT; 4496 4497 out_free: 4498 kfree(priv.buffer); 4499 out: 4500 return rc; 4501 } 4502 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4503 4504 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4505 { 4506 switch (card->info.type) { 4507 case QETH_CARD_TYPE_IQD: 4508 return 2; 4509 default: 4510 return 0; 4511 } 4512 } 4513 4514 static void qeth_determine_capabilities(struct qeth_card *card) 4515 { 4516 int rc; 4517 int length; 4518 char *prcd; 4519 struct ccw_device *ddev; 4520 int ddev_offline = 0; 4521 4522 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4523 ddev = CARD_DDEV(card); 4524 if (!ddev->online) { 4525 ddev_offline = 1; 4526 rc = ccw_device_set_online(ddev); 4527 if (rc) { 4528 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4529 goto out; 4530 } 4531 } 4532 4533 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4534 if (rc) { 4535 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4536 dev_name(&card->gdev->dev), rc); 4537 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4538 goto out_offline; 4539 } 4540 qeth_configure_unitaddr(card, prcd); 4541 if (ddev_offline) 4542 qeth_configure_blkt_default(card, prcd); 4543 kfree(prcd); 4544 4545 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4546 if (rc) 4547 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4548 4549 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4550 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4551 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4552 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4553 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4554 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4555 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4556 dev_info(&card->gdev->dev, 4557 "Completion Queueing supported\n"); 4558 } else { 4559 card->options.cq = QETH_CQ_NOTAVAILABLE; 4560 } 4561 4562 4563 out_offline: 4564 if (ddev_offline == 1) 4565 ccw_device_set_offline(ddev); 4566 out: 4567 return; 4568 } 4569 4570 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4571 struct qdio_buffer **in_sbal_ptrs, 4572 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4573 int i; 4574 4575 if (card->options.cq == QETH_CQ_ENABLED) { 4576 int offset = QDIO_MAX_BUFFERS_PER_Q * 4577 (card->qdio.no_in_queues - 1); 4578 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4579 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4580 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4581 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4582 } 4583 4584 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4585 } 4586 } 4587 4588 static int qeth_qdio_establish(struct qeth_card *card) 4589 { 4590 struct qdio_initialize init_data; 4591 char *qib_param_field; 4592 struct qdio_buffer **in_sbal_ptrs; 4593 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4594 struct qdio_buffer **out_sbal_ptrs; 4595 int i, j, k; 4596 int rc = 0; 4597 4598 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4599 4600 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4601 GFP_KERNEL); 4602 if (!qib_param_field) { 4603 rc = -ENOMEM; 4604 goto out_free_nothing; 4605 } 4606 4607 qeth_create_qib_param_field(card, qib_param_field); 4608 qeth_create_qib_param_field_blkt(card, qib_param_field); 4609 4610 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4611 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4612 GFP_KERNEL); 4613 if (!in_sbal_ptrs) { 4614 rc = -ENOMEM; 4615 goto out_free_qib_param; 4616 } 4617 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4618 in_sbal_ptrs[i] = (struct qdio_buffer *) 4619 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4620 } 4621 4622 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4623 GFP_KERNEL); 4624 if (!queue_start_poll) { 4625 rc = -ENOMEM; 4626 goto out_free_in_sbals; 4627 } 4628 for (i = 0; i < card->qdio.no_in_queues; ++i) 4629 queue_start_poll[i] = card->discipline->start_poll; 4630 4631 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4632 4633 out_sbal_ptrs = 4634 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4635 sizeof(void *), GFP_KERNEL); 4636 if (!out_sbal_ptrs) { 4637 rc = -ENOMEM; 4638 goto out_free_queue_start_poll; 4639 } 4640 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4641 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4642 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4643 card->qdio.out_qs[i]->bufs[j]->buffer); 4644 } 4645 4646 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4647 init_data.cdev = CARD_DDEV(card); 4648 init_data.q_format = qeth_get_qdio_q_format(card); 4649 init_data.qib_param_field_format = 0; 4650 init_data.qib_param_field = qib_param_field; 4651 init_data.no_input_qs = card->qdio.no_in_queues; 4652 init_data.no_output_qs = card->qdio.no_out_queues; 4653 init_data.input_handler = card->discipline->input_handler; 4654 init_data.output_handler = card->discipline->output_handler; 4655 init_data.queue_start_poll_array = queue_start_poll; 4656 init_data.int_parm = (unsigned long) card; 4657 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4658 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4659 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4660 init_data.scan_threshold = 4661 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32; 4662 4663 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4664 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4665 rc = qdio_allocate(&init_data); 4666 if (rc) { 4667 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4668 goto out; 4669 } 4670 rc = qdio_establish(&init_data); 4671 if (rc) { 4672 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4673 qdio_free(CARD_DDEV(card)); 4674 } 4675 } 4676 4677 switch (card->options.cq) { 4678 case QETH_CQ_ENABLED: 4679 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4680 break; 4681 case QETH_CQ_DISABLED: 4682 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4683 break; 4684 default: 4685 break; 4686 } 4687 out: 4688 kfree(out_sbal_ptrs); 4689 out_free_queue_start_poll: 4690 kfree(queue_start_poll); 4691 out_free_in_sbals: 4692 kfree(in_sbal_ptrs); 4693 out_free_qib_param: 4694 kfree(qib_param_field); 4695 out_free_nothing: 4696 return rc; 4697 } 4698 4699 static void qeth_core_free_card(struct qeth_card *card) 4700 { 4701 4702 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4703 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4704 qeth_clean_channel(&card->read); 4705 qeth_clean_channel(&card->write); 4706 if (card->dev) 4707 free_netdev(card->dev); 4708 kfree(card->ip_tbd_list); 4709 qeth_free_qdio_buffers(card); 4710 unregister_service_level(&card->qeth_service_level); 4711 kfree(card); 4712 } 4713 4714 static struct ccw_device_id qeth_ids[] = { 4715 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4716 .driver_info = QETH_CARD_TYPE_OSD}, 4717 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4718 .driver_info = QETH_CARD_TYPE_IQD}, 4719 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4720 .driver_info = QETH_CARD_TYPE_OSN}, 4721 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4722 .driver_info = QETH_CARD_TYPE_OSM}, 4723 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4724 .driver_info = QETH_CARD_TYPE_OSX}, 4725 {}, 4726 }; 4727 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4728 4729 static struct ccw_driver qeth_ccw_driver = { 4730 .driver = { 4731 .owner = THIS_MODULE, 4732 .name = "qeth", 4733 }, 4734 .ids = qeth_ids, 4735 .probe = ccwgroup_probe_ccwdev, 4736 .remove = ccwgroup_remove_ccwdev, 4737 }; 4738 4739 int qeth_core_hardsetup_card(struct qeth_card *card) 4740 { 4741 int retries = 0; 4742 int rc; 4743 4744 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4745 atomic_set(&card->force_alloc_skb, 0); 4746 qeth_update_from_chp_desc(card); 4747 retry: 4748 if (retries) 4749 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4750 dev_name(&card->gdev->dev)); 4751 ccw_device_set_offline(CARD_DDEV(card)); 4752 ccw_device_set_offline(CARD_WDEV(card)); 4753 ccw_device_set_offline(CARD_RDEV(card)); 4754 rc = ccw_device_set_online(CARD_RDEV(card)); 4755 if (rc) 4756 goto retriable; 4757 rc = ccw_device_set_online(CARD_WDEV(card)); 4758 if (rc) 4759 goto retriable; 4760 rc = ccw_device_set_online(CARD_DDEV(card)); 4761 if (rc) 4762 goto retriable; 4763 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4764 retriable: 4765 if (rc == -ERESTARTSYS) { 4766 QETH_DBF_TEXT(SETUP, 2, "break1"); 4767 return rc; 4768 } else if (rc) { 4769 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4770 if (++retries > 3) 4771 goto out; 4772 else 4773 goto retry; 4774 } 4775 qeth_determine_capabilities(card); 4776 qeth_init_tokens(card); 4777 qeth_init_func_level(card); 4778 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4779 if (rc == -ERESTARTSYS) { 4780 QETH_DBF_TEXT(SETUP, 2, "break2"); 4781 return rc; 4782 } else if (rc) { 4783 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4784 if (--retries < 0) 4785 goto out; 4786 else 4787 goto retry; 4788 } 4789 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4790 if (rc == -ERESTARTSYS) { 4791 QETH_DBF_TEXT(SETUP, 2, "break3"); 4792 return rc; 4793 } else if (rc) { 4794 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4795 if (--retries < 0) 4796 goto out; 4797 else 4798 goto retry; 4799 } 4800 card->read_or_write_problem = 0; 4801 rc = qeth_mpc_initialize(card); 4802 if (rc) { 4803 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4804 goto out; 4805 } 4806 4807 card->options.ipa4.supported_funcs = 0; 4808 card->options.adp.supported_funcs = 0; 4809 card->info.diagass_support = 0; 4810 qeth_query_ipassists(card, QETH_PROT_IPV4); 4811 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4812 qeth_query_setadapterparms(card); 4813 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4814 qeth_query_setdiagass(card); 4815 return 0; 4816 out: 4817 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4818 "an error on the device\n"); 4819 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4820 dev_name(&card->gdev->dev), rc); 4821 return rc; 4822 } 4823 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4824 4825 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 4826 struct qdio_buffer_element *element, 4827 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4828 { 4829 struct page *page = virt_to_page(element->addr); 4830 if (*pskb == NULL) { 4831 if (qethbuffer->rx_skb) { 4832 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 4833 *pskb = qethbuffer->rx_skb; 4834 qethbuffer->rx_skb = NULL; 4835 } else { 4836 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 4837 if (!(*pskb)) 4838 return -ENOMEM; 4839 } 4840 4841 skb_reserve(*pskb, ETH_HLEN); 4842 if (data_len <= QETH_RX_PULL_LEN) { 4843 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4844 data_len); 4845 } else { 4846 get_page(page); 4847 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 4848 element->addr + offset, QETH_RX_PULL_LEN); 4849 skb_fill_page_desc(*pskb, *pfrag, page, 4850 offset + QETH_RX_PULL_LEN, 4851 data_len - QETH_RX_PULL_LEN); 4852 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 4853 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 4854 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 4855 (*pfrag)++; 4856 } 4857 } else { 4858 get_page(page); 4859 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4860 (*pskb)->data_len += data_len; 4861 (*pskb)->len += data_len; 4862 (*pskb)->truesize += data_len; 4863 (*pfrag)++; 4864 } 4865 4866 4867 return 0; 4868 } 4869 4870 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4871 struct qeth_qdio_buffer *qethbuffer, 4872 struct qdio_buffer_element **__element, int *__offset, 4873 struct qeth_hdr **hdr) 4874 { 4875 struct qdio_buffer_element *element = *__element; 4876 struct qdio_buffer *buffer = qethbuffer->buffer; 4877 int offset = *__offset; 4878 struct sk_buff *skb = NULL; 4879 int skb_len = 0; 4880 void *data_ptr; 4881 int data_len; 4882 int headroom = 0; 4883 int use_rx_sg = 0; 4884 int frag = 0; 4885 4886 /* qeth_hdr must not cross element boundaries */ 4887 if (element->length < offset + sizeof(struct qeth_hdr)) { 4888 if (qeth_is_last_sbale(element)) 4889 return NULL; 4890 element++; 4891 offset = 0; 4892 if (element->length < sizeof(struct qeth_hdr)) 4893 return NULL; 4894 } 4895 *hdr = element->addr + offset; 4896 4897 offset += sizeof(struct qeth_hdr); 4898 switch ((*hdr)->hdr.l2.id) { 4899 case QETH_HEADER_TYPE_LAYER2: 4900 skb_len = (*hdr)->hdr.l2.pkt_length; 4901 break; 4902 case QETH_HEADER_TYPE_LAYER3: 4903 skb_len = (*hdr)->hdr.l3.length; 4904 headroom = ETH_HLEN; 4905 break; 4906 case QETH_HEADER_TYPE_OSN: 4907 skb_len = (*hdr)->hdr.osn.pdu_length; 4908 headroom = sizeof(struct qeth_hdr); 4909 break; 4910 default: 4911 break; 4912 } 4913 4914 if (!skb_len) 4915 return NULL; 4916 4917 if (((skb_len >= card->options.rx_sg_cb) && 4918 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4919 (!atomic_read(&card->force_alloc_skb))) || 4920 (card->options.cq == QETH_CQ_ENABLED)) { 4921 use_rx_sg = 1; 4922 } else { 4923 skb = dev_alloc_skb(skb_len + headroom); 4924 if (!skb) 4925 goto no_mem; 4926 if (headroom) 4927 skb_reserve(skb, headroom); 4928 } 4929 4930 data_ptr = element->addr + offset; 4931 while (skb_len) { 4932 data_len = min(skb_len, (int)(element->length - offset)); 4933 if (data_len) { 4934 if (use_rx_sg) { 4935 if (qeth_create_skb_frag(qethbuffer, element, 4936 &skb, offset, &frag, data_len)) 4937 goto no_mem; 4938 } else { 4939 memcpy(skb_put(skb, data_len), data_ptr, 4940 data_len); 4941 } 4942 } 4943 skb_len -= data_len; 4944 if (skb_len) { 4945 if (qeth_is_last_sbale(element)) { 4946 QETH_CARD_TEXT(card, 4, "unexeob"); 4947 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 4948 dev_kfree_skb_any(skb); 4949 card->stats.rx_errors++; 4950 return NULL; 4951 } 4952 element++; 4953 offset = 0; 4954 data_ptr = element->addr; 4955 } else { 4956 offset += data_len; 4957 } 4958 } 4959 *__element = element; 4960 *__offset = offset; 4961 if (use_rx_sg && card->options.performance_stats) { 4962 card->perf_stats.sg_skbs_rx++; 4963 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 4964 } 4965 return skb; 4966 no_mem: 4967 if (net_ratelimit()) { 4968 QETH_CARD_TEXT(card, 2, "noskbmem"); 4969 } 4970 card->stats.rx_dropped++; 4971 return NULL; 4972 } 4973 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 4974 4975 static void qeth_unregister_dbf_views(void) 4976 { 4977 int x; 4978 for (x = 0; x < QETH_DBF_INFOS; x++) { 4979 debug_unregister(qeth_dbf[x].id); 4980 qeth_dbf[x].id = NULL; 4981 } 4982 } 4983 4984 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 4985 { 4986 char dbf_txt_buf[32]; 4987 va_list args; 4988 4989 if (level > id->level) 4990 return; 4991 va_start(args, fmt); 4992 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 4993 va_end(args); 4994 debug_text_event(id, level, dbf_txt_buf); 4995 } 4996 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 4997 4998 static int qeth_register_dbf_views(void) 4999 { 5000 int ret; 5001 int x; 5002 5003 for (x = 0; x < QETH_DBF_INFOS; x++) { 5004 /* register the areas */ 5005 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5006 qeth_dbf[x].pages, 5007 qeth_dbf[x].areas, 5008 qeth_dbf[x].len); 5009 if (qeth_dbf[x].id == NULL) { 5010 qeth_unregister_dbf_views(); 5011 return -ENOMEM; 5012 } 5013 5014 /* register a view */ 5015 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5016 if (ret) { 5017 qeth_unregister_dbf_views(); 5018 return ret; 5019 } 5020 5021 /* set a passing level */ 5022 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5023 } 5024 5025 return 0; 5026 } 5027 5028 int qeth_core_load_discipline(struct qeth_card *card, 5029 enum qeth_discipline_id discipline) 5030 { 5031 int rc = 0; 5032 mutex_lock(&qeth_mod_mutex); 5033 switch (discipline) { 5034 case QETH_DISCIPLINE_LAYER3: 5035 card->discipline = try_then_request_module( 5036 symbol_get(qeth_l3_discipline), "qeth_l3"); 5037 break; 5038 case QETH_DISCIPLINE_LAYER2: 5039 card->discipline = try_then_request_module( 5040 symbol_get(qeth_l2_discipline), "qeth_l2"); 5041 break; 5042 } 5043 if (!card->discipline) { 5044 dev_err(&card->gdev->dev, "There is no kernel module to " 5045 "support discipline %d\n", discipline); 5046 rc = -EINVAL; 5047 } 5048 mutex_unlock(&qeth_mod_mutex); 5049 return rc; 5050 } 5051 5052 void qeth_core_free_discipline(struct qeth_card *card) 5053 { 5054 if (card->options.layer2) 5055 symbol_put(qeth_l2_discipline); 5056 else 5057 symbol_put(qeth_l3_discipline); 5058 card->discipline = NULL; 5059 } 5060 5061 static const struct device_type qeth_generic_devtype = { 5062 .name = "qeth_generic", 5063 .groups = qeth_generic_attr_groups, 5064 }; 5065 static const struct device_type qeth_osn_devtype = { 5066 .name = "qeth_osn", 5067 .groups = qeth_osn_attr_groups, 5068 }; 5069 5070 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5071 { 5072 struct qeth_card *card; 5073 struct device *dev; 5074 int rc; 5075 unsigned long flags; 5076 char dbf_name[20]; 5077 5078 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5079 5080 dev = &gdev->dev; 5081 if (!get_device(dev)) 5082 return -ENODEV; 5083 5084 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5085 5086 card = qeth_alloc_card(); 5087 if (!card) { 5088 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5089 rc = -ENOMEM; 5090 goto err_dev; 5091 } 5092 5093 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5094 dev_name(&gdev->dev)); 5095 card->debug = debug_register(dbf_name, 2, 1, 8); 5096 if (!card->debug) { 5097 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5098 rc = -ENOMEM; 5099 goto err_card; 5100 } 5101 debug_register_view(card->debug, &debug_hex_ascii_view); 5102 5103 card->read.ccwdev = gdev->cdev[0]; 5104 card->write.ccwdev = gdev->cdev[1]; 5105 card->data.ccwdev = gdev->cdev[2]; 5106 dev_set_drvdata(&gdev->dev, card); 5107 card->gdev = gdev; 5108 gdev->cdev[0]->handler = qeth_irq; 5109 gdev->cdev[1]->handler = qeth_irq; 5110 gdev->cdev[2]->handler = qeth_irq; 5111 5112 rc = qeth_determine_card_type(card); 5113 if (rc) { 5114 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5115 goto err_dbf; 5116 } 5117 rc = qeth_setup_card(card); 5118 if (rc) { 5119 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5120 goto err_dbf; 5121 } 5122 5123 if (card->info.type == QETH_CARD_TYPE_OSN) 5124 gdev->dev.type = &qeth_osn_devtype; 5125 else 5126 gdev->dev.type = &qeth_generic_devtype; 5127 5128 switch (card->info.type) { 5129 case QETH_CARD_TYPE_OSN: 5130 case QETH_CARD_TYPE_OSM: 5131 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5132 if (rc) 5133 goto err_dbf; 5134 rc = card->discipline->setup(card->gdev); 5135 if (rc) 5136 goto err_disc; 5137 case QETH_CARD_TYPE_OSD: 5138 case QETH_CARD_TYPE_OSX: 5139 default: 5140 break; 5141 } 5142 5143 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5144 list_add_tail(&card->list, &qeth_core_card_list.list); 5145 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5146 5147 qeth_determine_capabilities(card); 5148 return 0; 5149 5150 err_disc: 5151 qeth_core_free_discipline(card); 5152 err_dbf: 5153 debug_unregister(card->debug); 5154 err_card: 5155 qeth_core_free_card(card); 5156 err_dev: 5157 put_device(dev); 5158 return rc; 5159 } 5160 5161 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5162 { 5163 unsigned long flags; 5164 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5165 5166 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5167 5168 if (card->discipline) { 5169 card->discipline->remove(gdev); 5170 qeth_core_free_discipline(card); 5171 } 5172 5173 debug_unregister(card->debug); 5174 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5175 list_del(&card->list); 5176 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5177 qeth_core_free_card(card); 5178 dev_set_drvdata(&gdev->dev, NULL); 5179 put_device(&gdev->dev); 5180 return; 5181 } 5182 5183 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5184 { 5185 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5186 int rc = 0; 5187 int def_discipline; 5188 5189 if (!card->discipline) { 5190 if (card->info.type == QETH_CARD_TYPE_IQD) 5191 def_discipline = QETH_DISCIPLINE_LAYER3; 5192 else 5193 def_discipline = QETH_DISCIPLINE_LAYER2; 5194 rc = qeth_core_load_discipline(card, def_discipline); 5195 if (rc) 5196 goto err; 5197 rc = card->discipline->setup(card->gdev); 5198 if (rc) 5199 goto err; 5200 } 5201 rc = card->discipline->set_online(gdev); 5202 err: 5203 return rc; 5204 } 5205 5206 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5207 { 5208 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5209 return card->discipline->set_offline(gdev); 5210 } 5211 5212 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5213 { 5214 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5215 if (card->discipline && card->discipline->shutdown) 5216 card->discipline->shutdown(gdev); 5217 } 5218 5219 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5220 { 5221 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5222 if (card->discipline && card->discipline->prepare) 5223 return card->discipline->prepare(gdev); 5224 return 0; 5225 } 5226 5227 static void qeth_core_complete(struct ccwgroup_device *gdev) 5228 { 5229 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5230 if (card->discipline && card->discipline->complete) 5231 card->discipline->complete(gdev); 5232 } 5233 5234 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5235 { 5236 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5237 if (card->discipline && card->discipline->freeze) 5238 return card->discipline->freeze(gdev); 5239 return 0; 5240 } 5241 5242 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5243 { 5244 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5245 if (card->discipline && card->discipline->thaw) 5246 return card->discipline->thaw(gdev); 5247 return 0; 5248 } 5249 5250 static int qeth_core_restore(struct ccwgroup_device *gdev) 5251 { 5252 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5253 if (card->discipline && card->discipline->restore) 5254 return card->discipline->restore(gdev); 5255 return 0; 5256 } 5257 5258 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5259 .driver = { 5260 .owner = THIS_MODULE, 5261 .name = "qeth", 5262 }, 5263 .setup = qeth_core_probe_device, 5264 .remove = qeth_core_remove_device, 5265 .set_online = qeth_core_set_online, 5266 .set_offline = qeth_core_set_offline, 5267 .shutdown = qeth_core_shutdown, 5268 .prepare = qeth_core_prepare, 5269 .complete = qeth_core_complete, 5270 .freeze = qeth_core_freeze, 5271 .thaw = qeth_core_thaw, 5272 .restore = qeth_core_restore, 5273 }; 5274 5275 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv, 5276 const char *buf, size_t count) 5277 { 5278 int err; 5279 5280 err = ccwgroup_create_dev(qeth_core_root_dev, 5281 &qeth_core_ccwgroup_driver, 3, buf); 5282 5283 return err ? err : count; 5284 } 5285 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5286 5287 static struct attribute *qeth_drv_attrs[] = { 5288 &driver_attr_group.attr, 5289 NULL, 5290 }; 5291 static struct attribute_group qeth_drv_attr_group = { 5292 .attrs = qeth_drv_attrs, 5293 }; 5294 static const struct attribute_group *qeth_drv_attr_groups[] = { 5295 &qeth_drv_attr_group, 5296 NULL, 5297 }; 5298 5299 static struct { 5300 const char str[ETH_GSTRING_LEN]; 5301 } qeth_ethtool_stats_keys[] = { 5302 /* 0 */{"rx skbs"}, 5303 {"rx buffers"}, 5304 {"tx skbs"}, 5305 {"tx buffers"}, 5306 {"tx skbs no packing"}, 5307 {"tx buffers no packing"}, 5308 {"tx skbs packing"}, 5309 {"tx buffers packing"}, 5310 {"tx sg skbs"}, 5311 {"tx sg frags"}, 5312 /* 10 */{"rx sg skbs"}, 5313 {"rx sg frags"}, 5314 {"rx sg page allocs"}, 5315 {"tx large kbytes"}, 5316 {"tx large count"}, 5317 {"tx pk state ch n->p"}, 5318 {"tx pk state ch p->n"}, 5319 {"tx pk watermark low"}, 5320 {"tx pk watermark high"}, 5321 {"queue 0 buffer usage"}, 5322 /* 20 */{"queue 1 buffer usage"}, 5323 {"queue 2 buffer usage"}, 5324 {"queue 3 buffer usage"}, 5325 {"rx poll time"}, 5326 {"rx poll count"}, 5327 {"rx do_QDIO time"}, 5328 {"rx do_QDIO count"}, 5329 {"tx handler time"}, 5330 {"tx handler count"}, 5331 {"tx time"}, 5332 /* 30 */{"tx count"}, 5333 {"tx do_QDIO time"}, 5334 {"tx do_QDIO count"}, 5335 {"tx csum"}, 5336 {"tx lin"}, 5337 {"cq handler count"}, 5338 {"cq handler time"} 5339 }; 5340 5341 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5342 { 5343 switch (stringset) { 5344 case ETH_SS_STATS: 5345 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5346 default: 5347 return -EINVAL; 5348 } 5349 } 5350 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5351 5352 void qeth_core_get_ethtool_stats(struct net_device *dev, 5353 struct ethtool_stats *stats, u64 *data) 5354 { 5355 struct qeth_card *card = dev->ml_priv; 5356 data[0] = card->stats.rx_packets - 5357 card->perf_stats.initial_rx_packets; 5358 data[1] = card->perf_stats.bufs_rec; 5359 data[2] = card->stats.tx_packets - 5360 card->perf_stats.initial_tx_packets; 5361 data[3] = card->perf_stats.bufs_sent; 5362 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5363 - card->perf_stats.skbs_sent_pack; 5364 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5365 data[6] = card->perf_stats.skbs_sent_pack; 5366 data[7] = card->perf_stats.bufs_sent_pack; 5367 data[8] = card->perf_stats.sg_skbs_sent; 5368 data[9] = card->perf_stats.sg_frags_sent; 5369 data[10] = card->perf_stats.sg_skbs_rx; 5370 data[11] = card->perf_stats.sg_frags_rx; 5371 data[12] = card->perf_stats.sg_alloc_page_rx; 5372 data[13] = (card->perf_stats.large_send_bytes >> 10); 5373 data[14] = card->perf_stats.large_send_cnt; 5374 data[15] = card->perf_stats.sc_dp_p; 5375 data[16] = card->perf_stats.sc_p_dp; 5376 data[17] = QETH_LOW_WATERMARK_PACK; 5377 data[18] = QETH_HIGH_WATERMARK_PACK; 5378 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5379 data[20] = (card->qdio.no_out_queues > 1) ? 5380 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5381 data[21] = (card->qdio.no_out_queues > 2) ? 5382 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5383 data[22] = (card->qdio.no_out_queues > 3) ? 5384 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5385 data[23] = card->perf_stats.inbound_time; 5386 data[24] = card->perf_stats.inbound_cnt; 5387 data[25] = card->perf_stats.inbound_do_qdio_time; 5388 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5389 data[27] = card->perf_stats.outbound_handler_time; 5390 data[28] = card->perf_stats.outbound_handler_cnt; 5391 data[29] = card->perf_stats.outbound_time; 5392 data[30] = card->perf_stats.outbound_cnt; 5393 data[31] = card->perf_stats.outbound_do_qdio_time; 5394 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5395 data[33] = card->perf_stats.tx_csum; 5396 data[34] = card->perf_stats.tx_lin; 5397 data[35] = card->perf_stats.cq_cnt; 5398 data[36] = card->perf_stats.cq_time; 5399 } 5400 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5401 5402 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5403 { 5404 switch (stringset) { 5405 case ETH_SS_STATS: 5406 memcpy(data, &qeth_ethtool_stats_keys, 5407 sizeof(qeth_ethtool_stats_keys)); 5408 break; 5409 default: 5410 WARN_ON(1); 5411 break; 5412 } 5413 } 5414 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5415 5416 void qeth_core_get_drvinfo(struct net_device *dev, 5417 struct ethtool_drvinfo *info) 5418 { 5419 struct qeth_card *card = dev->ml_priv; 5420 if (card->options.layer2) 5421 strcpy(info->driver, "qeth_l2"); 5422 else 5423 strcpy(info->driver, "qeth_l3"); 5424 5425 strcpy(info->version, "1.0"); 5426 strcpy(info->fw_version, card->info.mcl_level); 5427 sprintf(info->bus_info, "%s/%s/%s", 5428 CARD_RDEV_ID(card), 5429 CARD_WDEV_ID(card), 5430 CARD_DDEV_ID(card)); 5431 } 5432 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5433 5434 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5435 struct ethtool_cmd *ecmd) 5436 { 5437 struct qeth_card *card = netdev->ml_priv; 5438 enum qeth_link_types link_type; 5439 5440 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5441 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5442 else 5443 link_type = card->info.link_type; 5444 5445 ecmd->transceiver = XCVR_INTERNAL; 5446 ecmd->supported = SUPPORTED_Autoneg; 5447 ecmd->advertising = ADVERTISED_Autoneg; 5448 ecmd->duplex = DUPLEX_FULL; 5449 ecmd->autoneg = AUTONEG_ENABLE; 5450 5451 switch (link_type) { 5452 case QETH_LINK_TYPE_FAST_ETH: 5453 case QETH_LINK_TYPE_LANE_ETH100: 5454 ecmd->supported |= SUPPORTED_10baseT_Half | 5455 SUPPORTED_10baseT_Full | 5456 SUPPORTED_100baseT_Half | 5457 SUPPORTED_100baseT_Full | 5458 SUPPORTED_TP; 5459 ecmd->advertising |= ADVERTISED_10baseT_Half | 5460 ADVERTISED_10baseT_Full | 5461 ADVERTISED_100baseT_Half | 5462 ADVERTISED_100baseT_Full | 5463 ADVERTISED_TP; 5464 ecmd->speed = SPEED_100; 5465 ecmd->port = PORT_TP; 5466 break; 5467 5468 case QETH_LINK_TYPE_GBIT_ETH: 5469 case QETH_LINK_TYPE_LANE_ETH1000: 5470 ecmd->supported |= SUPPORTED_10baseT_Half | 5471 SUPPORTED_10baseT_Full | 5472 SUPPORTED_100baseT_Half | 5473 SUPPORTED_100baseT_Full | 5474 SUPPORTED_1000baseT_Half | 5475 SUPPORTED_1000baseT_Full | 5476 SUPPORTED_FIBRE; 5477 ecmd->advertising |= ADVERTISED_10baseT_Half | 5478 ADVERTISED_10baseT_Full | 5479 ADVERTISED_100baseT_Half | 5480 ADVERTISED_100baseT_Full | 5481 ADVERTISED_1000baseT_Half | 5482 ADVERTISED_1000baseT_Full | 5483 ADVERTISED_FIBRE; 5484 ecmd->speed = SPEED_1000; 5485 ecmd->port = PORT_FIBRE; 5486 break; 5487 5488 case QETH_LINK_TYPE_10GBIT_ETH: 5489 ecmd->supported |= SUPPORTED_10baseT_Half | 5490 SUPPORTED_10baseT_Full | 5491 SUPPORTED_100baseT_Half | 5492 SUPPORTED_100baseT_Full | 5493 SUPPORTED_1000baseT_Half | 5494 SUPPORTED_1000baseT_Full | 5495 SUPPORTED_10000baseT_Full | 5496 SUPPORTED_FIBRE; 5497 ecmd->advertising |= ADVERTISED_10baseT_Half | 5498 ADVERTISED_10baseT_Full | 5499 ADVERTISED_100baseT_Half | 5500 ADVERTISED_100baseT_Full | 5501 ADVERTISED_1000baseT_Half | 5502 ADVERTISED_1000baseT_Full | 5503 ADVERTISED_10000baseT_Full | 5504 ADVERTISED_FIBRE; 5505 ecmd->speed = SPEED_10000; 5506 ecmd->port = PORT_FIBRE; 5507 break; 5508 5509 default: 5510 ecmd->supported |= SUPPORTED_10baseT_Half | 5511 SUPPORTED_10baseT_Full | 5512 SUPPORTED_TP; 5513 ecmd->advertising |= ADVERTISED_10baseT_Half | 5514 ADVERTISED_10baseT_Full | 5515 ADVERTISED_TP; 5516 ecmd->speed = SPEED_10; 5517 ecmd->port = PORT_TP; 5518 } 5519 5520 return 0; 5521 } 5522 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 5523 5524 static int __init qeth_core_init(void) 5525 { 5526 int rc; 5527 5528 pr_info("loading core functions\n"); 5529 INIT_LIST_HEAD(&qeth_core_card_list.list); 5530 rwlock_init(&qeth_core_card_list.rwlock); 5531 mutex_init(&qeth_mod_mutex); 5532 5533 rc = qeth_register_dbf_views(); 5534 if (rc) 5535 goto out_err; 5536 qeth_core_root_dev = root_device_register("qeth"); 5537 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 5538 if (rc) 5539 goto register_err; 5540 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 5541 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 5542 if (!qeth_core_header_cache) { 5543 rc = -ENOMEM; 5544 goto slab_err; 5545 } 5546 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 5547 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 5548 if (!qeth_qdio_outbuf_cache) { 5549 rc = -ENOMEM; 5550 goto cqslab_err; 5551 } 5552 rc = ccw_driver_register(&qeth_ccw_driver); 5553 if (rc) 5554 goto ccw_err; 5555 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 5556 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 5557 if (rc) 5558 goto ccwgroup_err; 5559 5560 return 0; 5561 5562 ccwgroup_err: 5563 ccw_driver_unregister(&qeth_ccw_driver); 5564 ccw_err: 5565 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5566 cqslab_err: 5567 kmem_cache_destroy(qeth_core_header_cache); 5568 slab_err: 5569 root_device_unregister(qeth_core_root_dev); 5570 register_err: 5571 qeth_unregister_dbf_views(); 5572 out_err: 5573 pr_err("Initializing the qeth device driver failed\n"); 5574 return rc; 5575 } 5576 5577 static void __exit qeth_core_exit(void) 5578 { 5579 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5580 ccw_driver_unregister(&qeth_ccw_driver); 5581 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5582 kmem_cache_destroy(qeth_core_header_cache); 5583 root_device_unregister(qeth_core_root_dev); 5584 qeth_unregister_dbf_views(); 5585 pr_info("core functions removed\n"); 5586 } 5587 5588 module_init(qeth_core_init); 5589 module_exit(qeth_core_exit); 5590 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 5591 MODULE_DESCRIPTION("qeth core functions"); 5592 MODULE_LICENSE("GPL"); 5593