1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 #include <net/dsfield.h> 24 25 #include <asm/ebcdic.h> 26 #include <asm/chpid.h> 27 #include <asm/io.h> 28 #include <asm/sysinfo.h> 29 #include <asm/compat.h> 30 31 #include "qeth_core.h" 32 33 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 35 /* N P A M L V H */ 36 [QETH_DBF_SETUP] = {"qeth_setup", 37 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3, 39 &debug_sprintf_view, NULL}, 40 [QETH_DBF_CTRL] = {"qeth_control", 41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 42 }; 43 EXPORT_SYMBOL_GPL(qeth_dbf); 44 45 struct qeth_card_list_struct qeth_core_card_list; 46 EXPORT_SYMBOL_GPL(qeth_core_card_list); 47 struct kmem_cache *qeth_core_header_cache; 48 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 49 static struct kmem_cache *qeth_qdio_outbuf_cache; 50 51 static struct device *qeth_core_root_dev; 52 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 53 static struct lock_class_key qdio_out_skb_queue_key; 54 static struct mutex qeth_mod_mutex; 55 56 static void qeth_send_control_data_cb(struct qeth_channel *, 57 struct qeth_cmd_buffer *); 58 static int qeth_issue_next_read(struct qeth_card *); 59 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 60 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 61 static void qeth_free_buffer_pool(struct qeth_card *); 62 static int qeth_qdio_establish(struct qeth_card *); 63 static void qeth_free_qdio_buffers(struct qeth_card *); 64 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 65 struct qeth_qdio_out_buffer *buf, 66 enum iucv_tx_notify notification); 67 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 68 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 69 struct qeth_qdio_out_buffer *buf, 70 enum qeth_qdio_buffer_states newbufstate); 71 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 72 73 struct workqueue_struct *qeth_wq; 74 EXPORT_SYMBOL_GPL(qeth_wq); 75 76 int qeth_card_hw_is_reachable(struct qeth_card *card) 77 { 78 return (card->state == CARD_STATE_SOFTSETUP) || 79 (card->state == CARD_STATE_UP); 80 } 81 EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable); 82 83 static void qeth_close_dev_handler(struct work_struct *work) 84 { 85 struct qeth_card *card; 86 87 card = container_of(work, struct qeth_card, close_dev_work); 88 QETH_CARD_TEXT(card, 2, "cldevhdl"); 89 rtnl_lock(); 90 dev_close(card->dev); 91 rtnl_unlock(); 92 ccwgroup_set_offline(card->gdev); 93 } 94 95 void qeth_close_dev(struct qeth_card *card) 96 { 97 QETH_CARD_TEXT(card, 2, "cldevsubm"); 98 queue_work(qeth_wq, &card->close_dev_work); 99 } 100 EXPORT_SYMBOL_GPL(qeth_close_dev); 101 102 static inline const char *qeth_get_cardname(struct qeth_card *card) 103 { 104 if (card->info.guestlan) { 105 switch (card->info.type) { 106 case QETH_CARD_TYPE_OSD: 107 return " Virtual NIC QDIO"; 108 case QETH_CARD_TYPE_IQD: 109 return " Virtual NIC Hiper"; 110 case QETH_CARD_TYPE_OSM: 111 return " Virtual NIC QDIO - OSM"; 112 case QETH_CARD_TYPE_OSX: 113 return " Virtual NIC QDIO - OSX"; 114 default: 115 return " unknown"; 116 } 117 } else { 118 switch (card->info.type) { 119 case QETH_CARD_TYPE_OSD: 120 return " OSD Express"; 121 case QETH_CARD_TYPE_IQD: 122 return " HiperSockets"; 123 case QETH_CARD_TYPE_OSN: 124 return " OSN QDIO"; 125 case QETH_CARD_TYPE_OSM: 126 return " OSM QDIO"; 127 case QETH_CARD_TYPE_OSX: 128 return " OSX QDIO"; 129 default: 130 return " unknown"; 131 } 132 } 133 return " n/a"; 134 } 135 136 /* max length to be returned: 14 */ 137 const char *qeth_get_cardname_short(struct qeth_card *card) 138 { 139 if (card->info.guestlan) { 140 switch (card->info.type) { 141 case QETH_CARD_TYPE_OSD: 142 return "Virt.NIC QDIO"; 143 case QETH_CARD_TYPE_IQD: 144 return "Virt.NIC Hiper"; 145 case QETH_CARD_TYPE_OSM: 146 return "Virt.NIC OSM"; 147 case QETH_CARD_TYPE_OSX: 148 return "Virt.NIC OSX"; 149 default: 150 return "unknown"; 151 } 152 } else { 153 switch (card->info.type) { 154 case QETH_CARD_TYPE_OSD: 155 switch (card->info.link_type) { 156 case QETH_LINK_TYPE_FAST_ETH: 157 return "OSD_100"; 158 case QETH_LINK_TYPE_HSTR: 159 return "HSTR"; 160 case QETH_LINK_TYPE_GBIT_ETH: 161 return "OSD_1000"; 162 case QETH_LINK_TYPE_10GBIT_ETH: 163 return "OSD_10GIG"; 164 case QETH_LINK_TYPE_LANE_ETH100: 165 return "OSD_FE_LANE"; 166 case QETH_LINK_TYPE_LANE_TR: 167 return "OSD_TR_LANE"; 168 case QETH_LINK_TYPE_LANE_ETH1000: 169 return "OSD_GbE_LANE"; 170 case QETH_LINK_TYPE_LANE: 171 return "OSD_ATM_LANE"; 172 default: 173 return "OSD_Express"; 174 } 175 case QETH_CARD_TYPE_IQD: 176 return "HiperSockets"; 177 case QETH_CARD_TYPE_OSN: 178 return "OSN"; 179 case QETH_CARD_TYPE_OSM: 180 return "OSM_1000"; 181 case QETH_CARD_TYPE_OSX: 182 return "OSX_10GIG"; 183 default: 184 return "unknown"; 185 } 186 } 187 return "n/a"; 188 } 189 190 void qeth_set_recovery_task(struct qeth_card *card) 191 { 192 card->recovery_task = current; 193 } 194 EXPORT_SYMBOL_GPL(qeth_set_recovery_task); 195 196 void qeth_clear_recovery_task(struct qeth_card *card) 197 { 198 card->recovery_task = NULL; 199 } 200 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task); 201 202 static bool qeth_is_recovery_task(const struct qeth_card *card) 203 { 204 return card->recovery_task == current; 205 } 206 207 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 208 int clear_start_mask) 209 { 210 unsigned long flags; 211 212 spin_lock_irqsave(&card->thread_mask_lock, flags); 213 card->thread_allowed_mask = threads; 214 if (clear_start_mask) 215 card->thread_start_mask &= threads; 216 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 217 wake_up(&card->wait_q); 218 } 219 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 220 221 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 222 { 223 unsigned long flags; 224 int rc = 0; 225 226 spin_lock_irqsave(&card->thread_mask_lock, flags); 227 rc = (card->thread_running_mask & threads); 228 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 229 return rc; 230 } 231 EXPORT_SYMBOL_GPL(qeth_threads_running); 232 233 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 234 { 235 if (qeth_is_recovery_task(card)) 236 return 0; 237 return wait_event_interruptible(card->wait_q, 238 qeth_threads_running(card, threads) == 0); 239 } 240 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 241 242 void qeth_clear_working_pool_list(struct qeth_card *card) 243 { 244 struct qeth_buffer_pool_entry *pool_entry, *tmp; 245 246 QETH_CARD_TEXT(card, 5, "clwrklst"); 247 list_for_each_entry_safe(pool_entry, tmp, 248 &card->qdio.in_buf_pool.entry_list, list){ 249 list_del(&pool_entry->list); 250 } 251 } 252 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 253 254 static int qeth_alloc_buffer_pool(struct qeth_card *card) 255 { 256 struct qeth_buffer_pool_entry *pool_entry; 257 void *ptr; 258 int i, j; 259 260 QETH_CARD_TEXT(card, 5, "alocpool"); 261 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 262 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 263 if (!pool_entry) { 264 qeth_free_buffer_pool(card); 265 return -ENOMEM; 266 } 267 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 268 ptr = (void *) __get_free_page(GFP_KERNEL); 269 if (!ptr) { 270 while (j > 0) 271 free_page((unsigned long) 272 pool_entry->elements[--j]); 273 kfree(pool_entry); 274 qeth_free_buffer_pool(card); 275 return -ENOMEM; 276 } 277 pool_entry->elements[j] = ptr; 278 } 279 list_add(&pool_entry->init_list, 280 &card->qdio.init_pool.entry_list); 281 } 282 return 0; 283 } 284 285 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 286 { 287 QETH_CARD_TEXT(card, 2, "realcbp"); 288 289 if ((card->state != CARD_STATE_DOWN) && 290 (card->state != CARD_STATE_RECOVER)) 291 return -EPERM; 292 293 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 294 qeth_clear_working_pool_list(card); 295 qeth_free_buffer_pool(card); 296 card->qdio.in_buf_pool.buf_count = bufcnt; 297 card->qdio.init_pool.buf_count = bufcnt; 298 return qeth_alloc_buffer_pool(card); 299 } 300 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 301 302 static void qeth_free_qdio_queue(struct qeth_qdio_q *q) 303 { 304 if (!q) 305 return; 306 307 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q); 308 kfree(q); 309 } 310 311 static struct qeth_qdio_q *qeth_alloc_qdio_queue(void) 312 { 313 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL); 314 int i; 315 316 if (!q) 317 return NULL; 318 319 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) { 320 kfree(q); 321 return NULL; 322 } 323 324 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 325 q->bufs[i].buffer = q->qdio_bufs[i]; 326 327 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *)); 328 return q; 329 } 330 331 static inline int qeth_cq_init(struct qeth_card *card) 332 { 333 int rc; 334 335 if (card->options.cq == QETH_CQ_ENABLED) { 336 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 337 qdio_reset_buffers(card->qdio.c_q->qdio_bufs, 338 QDIO_MAX_BUFFERS_PER_Q); 339 card->qdio.c_q->next_buf_to_init = 127; 340 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 341 card->qdio.no_in_queues - 1, 0, 342 127); 343 if (rc) { 344 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 345 goto out; 346 } 347 } 348 rc = 0; 349 out: 350 return rc; 351 } 352 353 static inline int qeth_alloc_cq(struct qeth_card *card) 354 { 355 int rc; 356 357 if (card->options.cq == QETH_CQ_ENABLED) { 358 int i; 359 struct qdio_outbuf_state *outbuf_states; 360 361 QETH_DBF_TEXT(SETUP, 2, "cqon"); 362 card->qdio.c_q = qeth_alloc_qdio_queue(); 363 if (!card->qdio.c_q) { 364 rc = -1; 365 goto kmsg_out; 366 } 367 card->qdio.no_in_queues = 2; 368 card->qdio.out_bufstates = 369 kzalloc(card->qdio.no_out_queues * 370 QDIO_MAX_BUFFERS_PER_Q * 371 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 372 outbuf_states = card->qdio.out_bufstates; 373 if (outbuf_states == NULL) { 374 rc = -1; 375 goto free_cq_out; 376 } 377 for (i = 0; i < card->qdio.no_out_queues; ++i) { 378 card->qdio.out_qs[i]->bufstates = outbuf_states; 379 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 380 } 381 } else { 382 QETH_DBF_TEXT(SETUP, 2, "nocq"); 383 card->qdio.c_q = NULL; 384 card->qdio.no_in_queues = 1; 385 } 386 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 387 rc = 0; 388 out: 389 return rc; 390 free_cq_out: 391 qeth_free_qdio_queue(card->qdio.c_q); 392 card->qdio.c_q = NULL; 393 kmsg_out: 394 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 395 goto out; 396 } 397 398 static inline void qeth_free_cq(struct qeth_card *card) 399 { 400 if (card->qdio.c_q) { 401 --card->qdio.no_in_queues; 402 qeth_free_qdio_queue(card->qdio.c_q); 403 card->qdio.c_q = NULL; 404 } 405 kfree(card->qdio.out_bufstates); 406 card->qdio.out_bufstates = NULL; 407 } 408 409 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 410 int delayed) { 411 enum iucv_tx_notify n; 412 413 switch (sbalf15) { 414 case 0: 415 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 416 break; 417 case 4: 418 case 16: 419 case 17: 420 case 18: 421 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 422 TX_NOTIFY_UNREACHABLE; 423 break; 424 default: 425 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 426 TX_NOTIFY_GENERALERROR; 427 break; 428 } 429 430 return n; 431 } 432 433 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 434 int bidx, int forced_cleanup) 435 { 436 if (q->card->options.cq != QETH_CQ_ENABLED) 437 return; 438 439 if (q->bufs[bidx]->next_pending != NULL) { 440 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 441 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 442 443 while (c) { 444 if (forced_cleanup || 445 atomic_read(&c->state) == 446 QETH_QDIO_BUF_HANDLED_DELAYED) { 447 struct qeth_qdio_out_buffer *f = c; 448 QETH_CARD_TEXT(f->q->card, 5, "fp"); 449 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 450 /* release here to avoid interleaving between 451 outbound tasklet and inbound tasklet 452 regarding notifications and lifecycle */ 453 qeth_release_skbs(c); 454 455 c = f->next_pending; 456 WARN_ON_ONCE(head->next_pending != f); 457 head->next_pending = c; 458 kmem_cache_free(qeth_qdio_outbuf_cache, f); 459 } else { 460 head = c; 461 c = c->next_pending; 462 } 463 464 } 465 } 466 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 467 QETH_QDIO_BUF_HANDLED_DELAYED)) { 468 /* for recovery situations */ 469 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 470 qeth_init_qdio_out_buf(q, bidx); 471 QETH_CARD_TEXT(q->card, 2, "clprecov"); 472 } 473 } 474 475 476 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 477 unsigned long phys_aob_addr) { 478 struct qaob *aob; 479 struct qeth_qdio_out_buffer *buffer; 480 enum iucv_tx_notify notification; 481 482 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 483 QETH_CARD_TEXT(card, 5, "haob"); 484 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 485 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 486 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 487 488 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 489 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 490 notification = TX_NOTIFY_OK; 491 } else { 492 WARN_ON_ONCE(atomic_read(&buffer->state) != 493 QETH_QDIO_BUF_PENDING); 494 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 495 notification = TX_NOTIFY_DELAYED_OK; 496 } 497 498 if (aob->aorc != 0) { 499 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 500 notification = qeth_compute_cq_notification(aob->aorc, 1); 501 } 502 qeth_notify_skbs(buffer->q, buffer, notification); 503 504 buffer->aob = NULL; 505 qeth_clear_output_buffer(buffer->q, buffer, 506 QETH_QDIO_BUF_HANDLED_DELAYED); 507 508 /* from here on: do not touch buffer anymore */ 509 qdio_release_aob(aob); 510 } 511 512 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 513 { 514 return card->options.cq == QETH_CQ_ENABLED && 515 card->qdio.c_q != NULL && 516 queue != 0 && 517 queue == card->qdio.no_in_queues - 1; 518 } 519 520 521 static int qeth_issue_next_read(struct qeth_card *card) 522 { 523 int rc; 524 struct qeth_cmd_buffer *iob; 525 526 QETH_CARD_TEXT(card, 5, "issnxrd"); 527 if (card->read.state != CH_STATE_UP) 528 return -EIO; 529 iob = qeth_get_buffer(&card->read); 530 if (!iob) { 531 dev_warn(&card->gdev->dev, "The qeth device driver " 532 "failed to recover an error on the device\n"); 533 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 534 "available\n", dev_name(&card->gdev->dev)); 535 return -ENOMEM; 536 } 537 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 538 QETH_CARD_TEXT(card, 6, "noirqpnd"); 539 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 540 (addr_t) iob, 0, 0); 541 if (rc) { 542 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 543 "rc=%i\n", dev_name(&card->gdev->dev), rc); 544 atomic_set(&card->read.irq_pending, 0); 545 card->read_or_write_problem = 1; 546 qeth_schedule_recovery(card); 547 wake_up(&card->wait_q); 548 } 549 return rc; 550 } 551 552 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 553 { 554 struct qeth_reply *reply; 555 556 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 557 if (reply) { 558 atomic_set(&reply->refcnt, 1); 559 atomic_set(&reply->received, 0); 560 reply->card = card; 561 } 562 return reply; 563 } 564 565 static void qeth_get_reply(struct qeth_reply *reply) 566 { 567 WARN_ON(atomic_read(&reply->refcnt) <= 0); 568 atomic_inc(&reply->refcnt); 569 } 570 571 static void qeth_put_reply(struct qeth_reply *reply) 572 { 573 WARN_ON(atomic_read(&reply->refcnt) <= 0); 574 if (atomic_dec_and_test(&reply->refcnt)) 575 kfree(reply); 576 } 577 578 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 579 struct qeth_card *card) 580 { 581 char *ipa_name; 582 int com = cmd->hdr.command; 583 ipa_name = qeth_get_ipa_cmd_name(com); 584 if (rc) 585 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 586 "x%X \"%s\"\n", 587 ipa_name, com, dev_name(&card->gdev->dev), 588 QETH_CARD_IFNAME(card), rc, 589 qeth_get_ipa_msg(rc)); 590 else 591 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 592 ipa_name, com, dev_name(&card->gdev->dev), 593 QETH_CARD_IFNAME(card)); 594 } 595 596 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 597 struct qeth_cmd_buffer *iob) 598 { 599 struct qeth_ipa_cmd *cmd = NULL; 600 601 QETH_CARD_TEXT(card, 5, "chkipad"); 602 if (IS_IPA(iob->data)) { 603 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 604 if (IS_IPA_REPLY(cmd)) { 605 if (cmd->hdr.command != IPA_CMD_SETCCID && 606 cmd->hdr.command != IPA_CMD_DELCCID && 607 cmd->hdr.command != IPA_CMD_MODCCID && 608 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 609 qeth_issue_ipa_msg(cmd, 610 cmd->hdr.return_code, card); 611 return cmd; 612 } else { 613 switch (cmd->hdr.command) { 614 case IPA_CMD_STOPLAN: 615 if (cmd->hdr.return_code == 616 IPA_RC_VEPA_TO_VEB_TRANSITION) { 617 dev_err(&card->gdev->dev, 618 "Interface %s is down because the " 619 "adjacent port is no longer in " 620 "reflective relay mode\n", 621 QETH_CARD_IFNAME(card)); 622 qeth_close_dev(card); 623 } else { 624 dev_warn(&card->gdev->dev, 625 "The link for interface %s on CHPID" 626 " 0x%X failed\n", 627 QETH_CARD_IFNAME(card), 628 card->info.chpid); 629 qeth_issue_ipa_msg(cmd, 630 cmd->hdr.return_code, card); 631 } 632 card->lan_online = 0; 633 if (card->dev && netif_carrier_ok(card->dev)) 634 netif_carrier_off(card->dev); 635 return NULL; 636 case IPA_CMD_STARTLAN: 637 dev_info(&card->gdev->dev, 638 "The link for %s on CHPID 0x%X has" 639 " been restored\n", 640 QETH_CARD_IFNAME(card), 641 card->info.chpid); 642 netif_carrier_on(card->dev); 643 card->lan_online = 1; 644 if (card->info.hwtrap) 645 card->info.hwtrap = 2; 646 qeth_schedule_recovery(card); 647 return NULL; 648 case IPA_CMD_SETBRIDGEPORT_IQD: 649 case IPA_CMD_SETBRIDGEPORT_OSA: 650 case IPA_CMD_ADDRESS_CHANGE_NOTIF: 651 if (card->discipline->control_event_handler 652 (card, cmd)) 653 return cmd; 654 else 655 return NULL; 656 case IPA_CMD_MODCCID: 657 return cmd; 658 case IPA_CMD_REGISTER_LOCAL_ADDR: 659 QETH_CARD_TEXT(card, 3, "irla"); 660 break; 661 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 662 QETH_CARD_TEXT(card, 3, "urla"); 663 break; 664 default: 665 QETH_DBF_MESSAGE(2, "Received data is IPA " 666 "but not a reply!\n"); 667 break; 668 } 669 } 670 } 671 return cmd; 672 } 673 674 void qeth_clear_ipacmd_list(struct qeth_card *card) 675 { 676 struct qeth_reply *reply, *r; 677 unsigned long flags; 678 679 QETH_CARD_TEXT(card, 4, "clipalst"); 680 681 spin_lock_irqsave(&card->lock, flags); 682 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 683 qeth_get_reply(reply); 684 reply->rc = -EIO; 685 atomic_inc(&reply->received); 686 list_del_init(&reply->list); 687 wake_up(&reply->wait_q); 688 qeth_put_reply(reply); 689 } 690 spin_unlock_irqrestore(&card->lock, flags); 691 atomic_set(&card->write.irq_pending, 0); 692 } 693 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 694 695 static int qeth_check_idx_response(struct qeth_card *card, 696 unsigned char *buffer) 697 { 698 if (!buffer) 699 return 0; 700 701 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 702 if ((buffer[2] & 0xc0) == 0xc0) { 703 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 704 "with cause code 0x%02x%s\n", 705 buffer[4], 706 ((buffer[4] == 0x22) ? 707 " -- try another portname" : "")); 708 QETH_CARD_TEXT(card, 2, "ckidxres"); 709 QETH_CARD_TEXT(card, 2, " idxterm"); 710 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 711 if (buffer[4] == 0xf6) { 712 dev_err(&card->gdev->dev, 713 "The qeth device is not configured " 714 "for the OSI layer required by z/VM\n"); 715 return -EPERM; 716 } 717 return -EIO; 718 } 719 return 0; 720 } 721 722 static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev) 723 { 724 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *) 725 dev_get_drvdata(&cdev->dev))->dev); 726 return card; 727 } 728 729 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 730 __u32 len) 731 { 732 struct qeth_card *card; 733 734 card = CARD_FROM_CDEV(channel->ccwdev); 735 QETH_CARD_TEXT(card, 4, "setupccw"); 736 if (channel == &card->read) 737 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 738 else 739 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 740 channel->ccw.count = len; 741 channel->ccw.cda = (__u32) __pa(iob); 742 } 743 744 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 745 { 746 __u8 index; 747 748 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 749 index = channel->io_buf_no; 750 do { 751 if (channel->iob[index].state == BUF_STATE_FREE) { 752 channel->iob[index].state = BUF_STATE_LOCKED; 753 channel->io_buf_no = (channel->io_buf_no + 1) % 754 QETH_CMD_BUFFER_NO; 755 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 756 return channel->iob + index; 757 } 758 index = (index + 1) % QETH_CMD_BUFFER_NO; 759 } while (index != channel->io_buf_no); 760 761 return NULL; 762 } 763 764 void qeth_release_buffer(struct qeth_channel *channel, 765 struct qeth_cmd_buffer *iob) 766 { 767 unsigned long flags; 768 769 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 770 spin_lock_irqsave(&channel->iob_lock, flags); 771 memset(iob->data, 0, QETH_BUFSIZE); 772 iob->state = BUF_STATE_FREE; 773 iob->callback = qeth_send_control_data_cb; 774 iob->rc = 0; 775 spin_unlock_irqrestore(&channel->iob_lock, flags); 776 wake_up(&channel->wait_q); 777 } 778 EXPORT_SYMBOL_GPL(qeth_release_buffer); 779 780 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 781 { 782 struct qeth_cmd_buffer *buffer = NULL; 783 unsigned long flags; 784 785 spin_lock_irqsave(&channel->iob_lock, flags); 786 buffer = __qeth_get_buffer(channel); 787 spin_unlock_irqrestore(&channel->iob_lock, flags); 788 return buffer; 789 } 790 791 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 792 { 793 struct qeth_cmd_buffer *buffer; 794 wait_event(channel->wait_q, 795 ((buffer = qeth_get_buffer(channel)) != NULL)); 796 return buffer; 797 } 798 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 799 800 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 801 { 802 int cnt; 803 804 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 805 qeth_release_buffer(channel, &channel->iob[cnt]); 806 channel->buf_no = 0; 807 channel->io_buf_no = 0; 808 } 809 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 810 811 static void qeth_send_control_data_cb(struct qeth_channel *channel, 812 struct qeth_cmd_buffer *iob) 813 { 814 struct qeth_card *card; 815 struct qeth_reply *reply, *r; 816 struct qeth_ipa_cmd *cmd; 817 unsigned long flags; 818 int keep_reply; 819 int rc = 0; 820 821 card = CARD_FROM_CDEV(channel->ccwdev); 822 QETH_CARD_TEXT(card, 4, "sndctlcb"); 823 rc = qeth_check_idx_response(card, iob->data); 824 switch (rc) { 825 case 0: 826 break; 827 case -EIO: 828 qeth_clear_ipacmd_list(card); 829 qeth_schedule_recovery(card); 830 /* fall through */ 831 default: 832 goto out; 833 } 834 835 cmd = qeth_check_ipa_data(card, iob); 836 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 837 goto out; 838 /*in case of OSN : check if cmd is set */ 839 if (card->info.type == QETH_CARD_TYPE_OSN && 840 cmd && 841 cmd->hdr.command != IPA_CMD_STARTLAN && 842 card->osn_info.assist_cb != NULL) { 843 card->osn_info.assist_cb(card->dev, cmd); 844 goto out; 845 } 846 847 spin_lock_irqsave(&card->lock, flags); 848 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 849 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 850 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 851 qeth_get_reply(reply); 852 list_del_init(&reply->list); 853 spin_unlock_irqrestore(&card->lock, flags); 854 keep_reply = 0; 855 if (reply->callback != NULL) { 856 if (cmd) { 857 reply->offset = (__u16)((char *)cmd - 858 (char *)iob->data); 859 keep_reply = reply->callback(card, 860 reply, 861 (unsigned long)cmd); 862 } else 863 keep_reply = reply->callback(card, 864 reply, 865 (unsigned long)iob); 866 } 867 if (cmd) 868 reply->rc = (u16) cmd->hdr.return_code; 869 else if (iob->rc) 870 reply->rc = iob->rc; 871 if (keep_reply) { 872 spin_lock_irqsave(&card->lock, flags); 873 list_add_tail(&reply->list, 874 &card->cmd_waiter_list); 875 spin_unlock_irqrestore(&card->lock, flags); 876 } else { 877 atomic_inc(&reply->received); 878 wake_up(&reply->wait_q); 879 } 880 qeth_put_reply(reply); 881 goto out; 882 } 883 } 884 spin_unlock_irqrestore(&card->lock, flags); 885 out: 886 memcpy(&card->seqno.pdu_hdr_ack, 887 QETH_PDU_HEADER_SEQ_NO(iob->data), 888 QETH_SEQ_NO_LENGTH); 889 qeth_release_buffer(channel, iob); 890 } 891 892 static int qeth_setup_channel(struct qeth_channel *channel) 893 { 894 int cnt; 895 896 QETH_DBF_TEXT(SETUP, 2, "setupch"); 897 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 898 channel->iob[cnt].data = 899 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 900 if (channel->iob[cnt].data == NULL) 901 break; 902 channel->iob[cnt].state = BUF_STATE_FREE; 903 channel->iob[cnt].channel = channel; 904 channel->iob[cnt].callback = qeth_send_control_data_cb; 905 channel->iob[cnt].rc = 0; 906 } 907 if (cnt < QETH_CMD_BUFFER_NO) { 908 while (cnt-- > 0) 909 kfree(channel->iob[cnt].data); 910 return -ENOMEM; 911 } 912 channel->buf_no = 0; 913 channel->io_buf_no = 0; 914 atomic_set(&channel->irq_pending, 0); 915 spin_lock_init(&channel->iob_lock); 916 917 init_waitqueue_head(&channel->wait_q); 918 return 0; 919 } 920 921 static int qeth_set_thread_start_bit(struct qeth_card *card, 922 unsigned long thread) 923 { 924 unsigned long flags; 925 926 spin_lock_irqsave(&card->thread_mask_lock, flags); 927 if (!(card->thread_allowed_mask & thread) || 928 (card->thread_start_mask & thread)) { 929 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 930 return -EPERM; 931 } 932 card->thread_start_mask |= thread; 933 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 934 return 0; 935 } 936 937 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 938 { 939 unsigned long flags; 940 941 spin_lock_irqsave(&card->thread_mask_lock, flags); 942 card->thread_start_mask &= ~thread; 943 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 944 wake_up(&card->wait_q); 945 } 946 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 947 948 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 949 { 950 unsigned long flags; 951 952 spin_lock_irqsave(&card->thread_mask_lock, flags); 953 card->thread_running_mask &= ~thread; 954 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 955 wake_up(&card->wait_q); 956 } 957 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 958 959 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 960 { 961 unsigned long flags; 962 int rc = 0; 963 964 spin_lock_irqsave(&card->thread_mask_lock, flags); 965 if (card->thread_start_mask & thread) { 966 if ((card->thread_allowed_mask & thread) && 967 !(card->thread_running_mask & thread)) { 968 rc = 1; 969 card->thread_start_mask &= ~thread; 970 card->thread_running_mask |= thread; 971 } else 972 rc = -EPERM; 973 } 974 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 975 return rc; 976 } 977 978 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 979 { 980 int rc = 0; 981 982 wait_event(card->wait_q, 983 (rc = __qeth_do_run_thread(card, thread)) >= 0); 984 return rc; 985 } 986 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 987 988 void qeth_schedule_recovery(struct qeth_card *card) 989 { 990 QETH_CARD_TEXT(card, 2, "startrec"); 991 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 992 schedule_work(&card->kernel_thread_starter); 993 } 994 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 995 996 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 997 { 998 int dstat, cstat; 999 char *sense; 1000 struct qeth_card *card; 1001 1002 sense = (char *) irb->ecw; 1003 cstat = irb->scsw.cmd.cstat; 1004 dstat = irb->scsw.cmd.dstat; 1005 card = CARD_FROM_CDEV(cdev); 1006 1007 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 1008 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 1009 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 1010 QETH_CARD_TEXT(card, 2, "CGENCHK"); 1011 dev_warn(&cdev->dev, "The qeth device driver " 1012 "failed to recover an error on the device\n"); 1013 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 1014 dev_name(&cdev->dev), dstat, cstat); 1015 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 1016 16, 1, irb, 64, 1); 1017 return 1; 1018 } 1019 1020 if (dstat & DEV_STAT_UNIT_CHECK) { 1021 if (sense[SENSE_RESETTING_EVENT_BYTE] & 1022 SENSE_RESETTING_EVENT_FLAG) { 1023 QETH_CARD_TEXT(card, 2, "REVIND"); 1024 return 1; 1025 } 1026 if (sense[SENSE_COMMAND_REJECT_BYTE] & 1027 SENSE_COMMAND_REJECT_FLAG) { 1028 QETH_CARD_TEXT(card, 2, "CMDREJi"); 1029 return 1; 1030 } 1031 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 1032 QETH_CARD_TEXT(card, 2, "AFFE"); 1033 return 1; 1034 } 1035 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 1036 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 1037 return 0; 1038 } 1039 QETH_CARD_TEXT(card, 2, "DGENCHK"); 1040 return 1; 1041 } 1042 return 0; 1043 } 1044 1045 static long __qeth_check_irb_error(struct ccw_device *cdev, 1046 unsigned long intparm, struct irb *irb) 1047 { 1048 struct qeth_card *card; 1049 1050 card = CARD_FROM_CDEV(cdev); 1051 1052 if (!card || !IS_ERR(irb)) 1053 return 0; 1054 1055 switch (PTR_ERR(irb)) { 1056 case -EIO: 1057 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 1058 dev_name(&cdev->dev)); 1059 QETH_CARD_TEXT(card, 2, "ckirberr"); 1060 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 1061 break; 1062 case -ETIMEDOUT: 1063 dev_warn(&cdev->dev, "A hardware operation timed out" 1064 " on the device\n"); 1065 QETH_CARD_TEXT(card, 2, "ckirberr"); 1066 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1067 if (intparm == QETH_RCD_PARM) { 1068 if (card->data.ccwdev == cdev) { 1069 card->data.state = CH_STATE_DOWN; 1070 wake_up(&card->wait_q); 1071 } 1072 } 1073 break; 1074 default: 1075 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1076 dev_name(&cdev->dev), PTR_ERR(irb)); 1077 QETH_CARD_TEXT(card, 2, "ckirberr"); 1078 QETH_CARD_TEXT(card, 2, " rc???"); 1079 } 1080 return PTR_ERR(irb); 1081 } 1082 1083 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1084 struct irb *irb) 1085 { 1086 int rc; 1087 int cstat, dstat; 1088 struct qeth_cmd_buffer *buffer; 1089 struct qeth_channel *channel; 1090 struct qeth_card *card; 1091 struct qeth_cmd_buffer *iob; 1092 __u8 index; 1093 1094 if (__qeth_check_irb_error(cdev, intparm, irb)) 1095 return; 1096 cstat = irb->scsw.cmd.cstat; 1097 dstat = irb->scsw.cmd.dstat; 1098 1099 card = CARD_FROM_CDEV(cdev); 1100 if (!card) 1101 return; 1102 1103 QETH_CARD_TEXT(card, 5, "irq"); 1104 1105 if (card->read.ccwdev == cdev) { 1106 channel = &card->read; 1107 QETH_CARD_TEXT(card, 5, "read"); 1108 } else if (card->write.ccwdev == cdev) { 1109 channel = &card->write; 1110 QETH_CARD_TEXT(card, 5, "write"); 1111 } else { 1112 channel = &card->data; 1113 QETH_CARD_TEXT(card, 5, "data"); 1114 } 1115 atomic_set(&channel->irq_pending, 0); 1116 1117 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1118 channel->state = CH_STATE_STOPPED; 1119 1120 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1121 channel->state = CH_STATE_HALTED; 1122 1123 /*let's wake up immediately on data channel*/ 1124 if ((channel == &card->data) && (intparm != 0) && 1125 (intparm != QETH_RCD_PARM)) 1126 goto out; 1127 1128 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1129 QETH_CARD_TEXT(card, 6, "clrchpar"); 1130 /* we don't have to handle this further */ 1131 intparm = 0; 1132 } 1133 if (intparm == QETH_HALT_CHANNEL_PARM) { 1134 QETH_CARD_TEXT(card, 6, "hltchpar"); 1135 /* we don't have to handle this further */ 1136 intparm = 0; 1137 } 1138 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1139 (dstat & DEV_STAT_UNIT_CHECK) || 1140 (cstat)) { 1141 if (irb->esw.esw0.erw.cons) { 1142 dev_warn(&channel->ccwdev->dev, 1143 "The qeth device driver failed to recover " 1144 "an error on the device\n"); 1145 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1146 "0x%X dstat 0x%X\n", 1147 dev_name(&channel->ccwdev->dev), cstat, dstat); 1148 print_hex_dump(KERN_WARNING, "qeth: irb ", 1149 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1150 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1151 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1152 } 1153 if (intparm == QETH_RCD_PARM) { 1154 channel->state = CH_STATE_DOWN; 1155 goto out; 1156 } 1157 rc = qeth_get_problem(cdev, irb); 1158 if (rc) { 1159 qeth_clear_ipacmd_list(card); 1160 qeth_schedule_recovery(card); 1161 goto out; 1162 } 1163 } 1164 1165 if (intparm == QETH_RCD_PARM) { 1166 channel->state = CH_STATE_RCD_DONE; 1167 goto out; 1168 } 1169 if (intparm) { 1170 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1171 buffer->state = BUF_STATE_PROCESSED; 1172 } 1173 if (channel == &card->data) 1174 return; 1175 if (channel == &card->read && 1176 channel->state == CH_STATE_UP) 1177 qeth_issue_next_read(card); 1178 1179 iob = channel->iob; 1180 index = channel->buf_no; 1181 while (iob[index].state == BUF_STATE_PROCESSED) { 1182 if (iob[index].callback != NULL) 1183 iob[index].callback(channel, iob + index); 1184 1185 index = (index + 1) % QETH_CMD_BUFFER_NO; 1186 } 1187 channel->buf_no = index; 1188 out: 1189 wake_up(&card->wait_q); 1190 return; 1191 } 1192 1193 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1194 struct qeth_qdio_out_buffer *buf, 1195 enum iucv_tx_notify notification) 1196 { 1197 struct sk_buff *skb; 1198 1199 if (skb_queue_empty(&buf->skb_list)) 1200 goto out; 1201 skb = skb_peek(&buf->skb_list); 1202 while (skb) { 1203 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1204 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1205 if (skb->protocol == ETH_P_AF_IUCV) { 1206 if (skb->sk) { 1207 struct iucv_sock *iucv = iucv_sk(skb->sk); 1208 iucv->sk_txnotify(skb, notification); 1209 } 1210 } 1211 if (skb_queue_is_last(&buf->skb_list, skb)) 1212 skb = NULL; 1213 else 1214 skb = skb_queue_next(&buf->skb_list, skb); 1215 } 1216 out: 1217 return; 1218 } 1219 1220 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1221 { 1222 struct sk_buff *skb; 1223 struct iucv_sock *iucv; 1224 int notify_general_error = 0; 1225 1226 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1227 notify_general_error = 1; 1228 1229 /* release may never happen from within CQ tasklet scope */ 1230 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1231 1232 skb = skb_dequeue(&buf->skb_list); 1233 while (skb) { 1234 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1235 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1236 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1237 if (skb->sk) { 1238 iucv = iucv_sk(skb->sk); 1239 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1240 } 1241 } 1242 atomic_dec(&skb->users); 1243 dev_kfree_skb_any(skb); 1244 skb = skb_dequeue(&buf->skb_list); 1245 } 1246 } 1247 1248 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1249 struct qeth_qdio_out_buffer *buf, 1250 enum qeth_qdio_buffer_states newbufstate) 1251 { 1252 int i; 1253 1254 /* is PCI flag set on buffer? */ 1255 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1256 atomic_dec(&queue->set_pci_flags_count); 1257 1258 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1259 qeth_release_skbs(buf); 1260 } 1261 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1262 if (buf->buffer->element[i].addr && buf->is_header[i]) 1263 kmem_cache_free(qeth_core_header_cache, 1264 buf->buffer->element[i].addr); 1265 buf->is_header[i] = 0; 1266 buf->buffer->element[i].length = 0; 1267 buf->buffer->element[i].addr = NULL; 1268 buf->buffer->element[i].eflags = 0; 1269 buf->buffer->element[i].sflags = 0; 1270 } 1271 buf->buffer->element[15].eflags = 0; 1272 buf->buffer->element[15].sflags = 0; 1273 buf->next_element_to_fill = 0; 1274 atomic_set(&buf->state, newbufstate); 1275 } 1276 1277 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1278 { 1279 int j; 1280 1281 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1282 if (!q->bufs[j]) 1283 continue; 1284 qeth_cleanup_handled_pending(q, j, 1); 1285 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1286 if (free) { 1287 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1288 q->bufs[j] = NULL; 1289 } 1290 } 1291 } 1292 1293 void qeth_clear_qdio_buffers(struct qeth_card *card) 1294 { 1295 int i; 1296 1297 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1298 /* clear outbound buffers to free skbs */ 1299 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1300 if (card->qdio.out_qs[i]) { 1301 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1302 } 1303 } 1304 } 1305 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1306 1307 static void qeth_free_buffer_pool(struct qeth_card *card) 1308 { 1309 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1310 int i = 0; 1311 list_for_each_entry_safe(pool_entry, tmp, 1312 &card->qdio.init_pool.entry_list, init_list){ 1313 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1314 free_page((unsigned long)pool_entry->elements[i]); 1315 list_del(&pool_entry->init_list); 1316 kfree(pool_entry); 1317 } 1318 } 1319 1320 static void qeth_clean_channel(struct qeth_channel *channel) 1321 { 1322 int cnt; 1323 1324 QETH_DBF_TEXT(SETUP, 2, "freech"); 1325 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1326 kfree(channel->iob[cnt].data); 1327 } 1328 1329 static void qeth_set_single_write_queues(struct qeth_card *card) 1330 { 1331 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1332 (card->qdio.no_out_queues == 4)) 1333 qeth_free_qdio_buffers(card); 1334 1335 card->qdio.no_out_queues = 1; 1336 if (card->qdio.default_out_queue != 0) 1337 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1338 1339 card->qdio.default_out_queue = 0; 1340 } 1341 1342 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1343 { 1344 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1345 (card->qdio.no_out_queues == 1)) { 1346 qeth_free_qdio_buffers(card); 1347 card->qdio.default_out_queue = 2; 1348 } 1349 card->qdio.no_out_queues = 4; 1350 } 1351 1352 static void qeth_update_from_chp_desc(struct qeth_card *card) 1353 { 1354 struct ccw_device *ccwdev; 1355 struct channel_path_desc *chp_dsc; 1356 1357 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1358 1359 ccwdev = card->data.ccwdev; 1360 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1361 if (!chp_dsc) 1362 goto out; 1363 1364 card->info.func_level = 0x4100 + chp_dsc->desc; 1365 if (card->info.type == QETH_CARD_TYPE_IQD) 1366 goto out; 1367 1368 /* CHPP field bit 6 == 1 -> single queue */ 1369 if ((chp_dsc->chpp & 0x02) == 0x02) 1370 qeth_set_single_write_queues(card); 1371 else 1372 qeth_set_multiple_write_queues(card); 1373 out: 1374 kfree(chp_dsc); 1375 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1376 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1377 } 1378 1379 static void qeth_init_qdio_info(struct qeth_card *card) 1380 { 1381 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1382 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1383 /* inbound */ 1384 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1385 if (card->info.type == QETH_CARD_TYPE_IQD) 1386 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1387 else 1388 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1389 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1390 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1391 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1392 } 1393 1394 static void qeth_set_intial_options(struct qeth_card *card) 1395 { 1396 card->options.route4.type = NO_ROUTER; 1397 card->options.route6.type = NO_ROUTER; 1398 card->options.fake_broadcast = 0; 1399 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1400 card->options.performance_stats = 0; 1401 card->options.rx_sg_cb = QETH_RX_SG_CB; 1402 card->options.isolation = ISOLATION_MODE_NONE; 1403 card->options.cq = QETH_CQ_DISABLED; 1404 } 1405 1406 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1407 { 1408 unsigned long flags; 1409 int rc = 0; 1410 1411 spin_lock_irqsave(&card->thread_mask_lock, flags); 1412 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1413 (u8) card->thread_start_mask, 1414 (u8) card->thread_allowed_mask, 1415 (u8) card->thread_running_mask); 1416 rc = (card->thread_start_mask & thread); 1417 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1418 return rc; 1419 } 1420 1421 static void qeth_start_kernel_thread(struct work_struct *work) 1422 { 1423 struct task_struct *ts; 1424 struct qeth_card *card = container_of(work, struct qeth_card, 1425 kernel_thread_starter); 1426 QETH_CARD_TEXT(card , 2, "strthrd"); 1427 1428 if (card->read.state != CH_STATE_UP && 1429 card->write.state != CH_STATE_UP) 1430 return; 1431 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1432 ts = kthread_run(card->discipline->recover, (void *)card, 1433 "qeth_recover"); 1434 if (IS_ERR(ts)) { 1435 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1436 qeth_clear_thread_running_bit(card, 1437 QETH_RECOVER_THREAD); 1438 } 1439 } 1440 } 1441 1442 static void qeth_buffer_reclaim_work(struct work_struct *); 1443 static int qeth_setup_card(struct qeth_card *card) 1444 { 1445 1446 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1447 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1448 1449 card->read.state = CH_STATE_DOWN; 1450 card->write.state = CH_STATE_DOWN; 1451 card->data.state = CH_STATE_DOWN; 1452 card->state = CARD_STATE_DOWN; 1453 card->lan_online = 0; 1454 card->read_or_write_problem = 0; 1455 card->dev = NULL; 1456 spin_lock_init(&card->vlanlock); 1457 spin_lock_init(&card->mclock); 1458 spin_lock_init(&card->lock); 1459 spin_lock_init(&card->ip_lock); 1460 spin_lock_init(&card->thread_mask_lock); 1461 mutex_init(&card->conf_mutex); 1462 mutex_init(&card->discipline_mutex); 1463 card->thread_start_mask = 0; 1464 card->thread_allowed_mask = 0; 1465 card->thread_running_mask = 0; 1466 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1467 INIT_LIST_HEAD(&card->ip_list); 1468 INIT_LIST_HEAD(card->ip_tbd_list); 1469 INIT_LIST_HEAD(&card->cmd_waiter_list); 1470 init_waitqueue_head(&card->wait_q); 1471 /* initial options */ 1472 qeth_set_intial_options(card); 1473 /* IP address takeover */ 1474 INIT_LIST_HEAD(&card->ipato.entries); 1475 card->ipato.enabled = 0; 1476 card->ipato.invert4 = 0; 1477 card->ipato.invert6 = 0; 1478 /* init QDIO stuff */ 1479 qeth_init_qdio_info(card); 1480 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1481 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1482 return 0; 1483 } 1484 1485 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1486 { 1487 struct qeth_card *card = container_of(slr, struct qeth_card, 1488 qeth_service_level); 1489 if (card->info.mcl_level[0]) 1490 seq_printf(m, "qeth: %s firmware level %s\n", 1491 CARD_BUS_ID(card), card->info.mcl_level); 1492 } 1493 1494 static struct qeth_card *qeth_alloc_card(void) 1495 { 1496 struct qeth_card *card; 1497 1498 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1499 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1500 if (!card) 1501 goto out; 1502 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1503 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1504 if (!card->ip_tbd_list) { 1505 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1506 goto out_card; 1507 } 1508 if (qeth_setup_channel(&card->read)) 1509 goto out_ip; 1510 if (qeth_setup_channel(&card->write)) 1511 goto out_channel; 1512 card->options.layer2 = -1; 1513 card->qeth_service_level.seq_print = qeth_core_sl_print; 1514 register_service_level(&card->qeth_service_level); 1515 return card; 1516 1517 out_channel: 1518 qeth_clean_channel(&card->read); 1519 out_ip: 1520 kfree(card->ip_tbd_list); 1521 out_card: 1522 kfree(card); 1523 out: 1524 return NULL; 1525 } 1526 1527 static int qeth_determine_card_type(struct qeth_card *card) 1528 { 1529 int i = 0; 1530 1531 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1532 1533 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1534 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1535 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1536 if ((CARD_RDEV(card)->id.dev_type == 1537 known_devices[i][QETH_DEV_TYPE_IND]) && 1538 (CARD_RDEV(card)->id.dev_model == 1539 known_devices[i][QETH_DEV_MODEL_IND])) { 1540 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1541 card->qdio.no_out_queues = 1542 known_devices[i][QETH_QUEUE_NO_IND]; 1543 card->qdio.no_in_queues = 1; 1544 card->info.is_multicast_different = 1545 known_devices[i][QETH_MULTICAST_IND]; 1546 qeth_update_from_chp_desc(card); 1547 return 0; 1548 } 1549 i++; 1550 } 1551 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1552 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1553 "unknown type\n"); 1554 return -ENOENT; 1555 } 1556 1557 static int qeth_clear_channel(struct qeth_channel *channel) 1558 { 1559 unsigned long flags; 1560 struct qeth_card *card; 1561 int rc; 1562 1563 card = CARD_FROM_CDEV(channel->ccwdev); 1564 QETH_CARD_TEXT(card, 3, "clearch"); 1565 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1566 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1567 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1568 1569 if (rc) 1570 return rc; 1571 rc = wait_event_interruptible_timeout(card->wait_q, 1572 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1573 if (rc == -ERESTARTSYS) 1574 return rc; 1575 if (channel->state != CH_STATE_STOPPED) 1576 return -ETIME; 1577 channel->state = CH_STATE_DOWN; 1578 return 0; 1579 } 1580 1581 static int qeth_halt_channel(struct qeth_channel *channel) 1582 { 1583 unsigned long flags; 1584 struct qeth_card *card; 1585 int rc; 1586 1587 card = CARD_FROM_CDEV(channel->ccwdev); 1588 QETH_CARD_TEXT(card, 3, "haltch"); 1589 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1590 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1591 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1592 1593 if (rc) 1594 return rc; 1595 rc = wait_event_interruptible_timeout(card->wait_q, 1596 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1597 if (rc == -ERESTARTSYS) 1598 return rc; 1599 if (channel->state != CH_STATE_HALTED) 1600 return -ETIME; 1601 return 0; 1602 } 1603 1604 static int qeth_halt_channels(struct qeth_card *card) 1605 { 1606 int rc1 = 0, rc2 = 0, rc3 = 0; 1607 1608 QETH_CARD_TEXT(card, 3, "haltchs"); 1609 rc1 = qeth_halt_channel(&card->read); 1610 rc2 = qeth_halt_channel(&card->write); 1611 rc3 = qeth_halt_channel(&card->data); 1612 if (rc1) 1613 return rc1; 1614 if (rc2) 1615 return rc2; 1616 return rc3; 1617 } 1618 1619 static int qeth_clear_channels(struct qeth_card *card) 1620 { 1621 int rc1 = 0, rc2 = 0, rc3 = 0; 1622 1623 QETH_CARD_TEXT(card, 3, "clearchs"); 1624 rc1 = qeth_clear_channel(&card->read); 1625 rc2 = qeth_clear_channel(&card->write); 1626 rc3 = qeth_clear_channel(&card->data); 1627 if (rc1) 1628 return rc1; 1629 if (rc2) 1630 return rc2; 1631 return rc3; 1632 } 1633 1634 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1635 { 1636 int rc = 0; 1637 1638 QETH_CARD_TEXT(card, 3, "clhacrd"); 1639 1640 if (halt) 1641 rc = qeth_halt_channels(card); 1642 if (rc) 1643 return rc; 1644 return qeth_clear_channels(card); 1645 } 1646 1647 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1648 { 1649 int rc = 0; 1650 1651 QETH_CARD_TEXT(card, 3, "qdioclr"); 1652 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1653 QETH_QDIO_CLEANING)) { 1654 case QETH_QDIO_ESTABLISHED: 1655 if (card->info.type == QETH_CARD_TYPE_IQD) 1656 rc = qdio_shutdown(CARD_DDEV(card), 1657 QDIO_FLAG_CLEANUP_USING_HALT); 1658 else 1659 rc = qdio_shutdown(CARD_DDEV(card), 1660 QDIO_FLAG_CLEANUP_USING_CLEAR); 1661 if (rc) 1662 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1663 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1664 break; 1665 case QETH_QDIO_CLEANING: 1666 return rc; 1667 default: 1668 break; 1669 } 1670 rc = qeth_clear_halt_card(card, use_halt); 1671 if (rc) 1672 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1673 card->state = CARD_STATE_DOWN; 1674 return rc; 1675 } 1676 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1677 1678 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1679 int *length) 1680 { 1681 struct ciw *ciw; 1682 char *rcd_buf; 1683 int ret; 1684 struct qeth_channel *channel = &card->data; 1685 unsigned long flags; 1686 1687 /* 1688 * scan for RCD command in extended SenseID data 1689 */ 1690 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1691 if (!ciw || ciw->cmd == 0) 1692 return -EOPNOTSUPP; 1693 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1694 if (!rcd_buf) 1695 return -ENOMEM; 1696 1697 channel->ccw.cmd_code = ciw->cmd; 1698 channel->ccw.cda = (__u32) __pa(rcd_buf); 1699 channel->ccw.count = ciw->count; 1700 channel->ccw.flags = CCW_FLAG_SLI; 1701 channel->state = CH_STATE_RCD; 1702 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1703 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1704 QETH_RCD_PARM, LPM_ANYPATH, 0, 1705 QETH_RCD_TIMEOUT); 1706 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1707 if (!ret) 1708 wait_event(card->wait_q, 1709 (channel->state == CH_STATE_RCD_DONE || 1710 channel->state == CH_STATE_DOWN)); 1711 if (channel->state == CH_STATE_DOWN) 1712 ret = -EIO; 1713 else 1714 channel->state = CH_STATE_DOWN; 1715 if (ret) { 1716 kfree(rcd_buf); 1717 *buffer = NULL; 1718 *length = 0; 1719 } else { 1720 *length = ciw->count; 1721 *buffer = rcd_buf; 1722 } 1723 return ret; 1724 } 1725 1726 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1727 { 1728 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1729 card->info.chpid = prcd[30]; 1730 card->info.unit_addr2 = prcd[31]; 1731 card->info.cula = prcd[63]; 1732 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1733 (prcd[0x11] == _ascebc['M'])); 1734 } 1735 1736 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1737 { 1738 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1739 1740 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1741 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) { 1742 card->info.blkt.time_total = 0; 1743 card->info.blkt.inter_packet = 0; 1744 card->info.blkt.inter_packet_jumbo = 0; 1745 } else { 1746 card->info.blkt.time_total = 250; 1747 card->info.blkt.inter_packet = 5; 1748 card->info.blkt.inter_packet_jumbo = 15; 1749 } 1750 } 1751 1752 static void qeth_init_tokens(struct qeth_card *card) 1753 { 1754 card->token.issuer_rm_w = 0x00010103UL; 1755 card->token.cm_filter_w = 0x00010108UL; 1756 card->token.cm_connection_w = 0x0001010aUL; 1757 card->token.ulp_filter_w = 0x0001010bUL; 1758 card->token.ulp_connection_w = 0x0001010dUL; 1759 } 1760 1761 static void qeth_init_func_level(struct qeth_card *card) 1762 { 1763 switch (card->info.type) { 1764 case QETH_CARD_TYPE_IQD: 1765 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1766 break; 1767 case QETH_CARD_TYPE_OSD: 1768 case QETH_CARD_TYPE_OSN: 1769 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1770 break; 1771 default: 1772 break; 1773 } 1774 } 1775 1776 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1777 void (*idx_reply_cb)(struct qeth_channel *, 1778 struct qeth_cmd_buffer *)) 1779 { 1780 struct qeth_cmd_buffer *iob; 1781 unsigned long flags; 1782 int rc; 1783 struct qeth_card *card; 1784 1785 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1786 card = CARD_FROM_CDEV(channel->ccwdev); 1787 iob = qeth_get_buffer(channel); 1788 if (!iob) 1789 return -ENOMEM; 1790 iob->callback = idx_reply_cb; 1791 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1792 channel->ccw.count = QETH_BUFSIZE; 1793 channel->ccw.cda = (__u32) __pa(iob->data); 1794 1795 wait_event(card->wait_q, 1796 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1797 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1798 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1799 rc = ccw_device_start(channel->ccwdev, 1800 &channel->ccw, (addr_t) iob, 0, 0); 1801 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1802 1803 if (rc) { 1804 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1805 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1806 atomic_set(&channel->irq_pending, 0); 1807 wake_up(&card->wait_q); 1808 return rc; 1809 } 1810 rc = wait_event_interruptible_timeout(card->wait_q, 1811 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1812 if (rc == -ERESTARTSYS) 1813 return rc; 1814 if (channel->state != CH_STATE_UP) { 1815 rc = -ETIME; 1816 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1817 qeth_clear_cmd_buffers(channel); 1818 } else 1819 rc = 0; 1820 return rc; 1821 } 1822 1823 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1824 void (*idx_reply_cb)(struct qeth_channel *, 1825 struct qeth_cmd_buffer *)) 1826 { 1827 struct qeth_card *card; 1828 struct qeth_cmd_buffer *iob; 1829 unsigned long flags; 1830 __u16 temp; 1831 __u8 tmp; 1832 int rc; 1833 struct ccw_dev_id temp_devid; 1834 1835 card = CARD_FROM_CDEV(channel->ccwdev); 1836 1837 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1838 1839 iob = qeth_get_buffer(channel); 1840 if (!iob) 1841 return -ENOMEM; 1842 iob->callback = idx_reply_cb; 1843 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1844 channel->ccw.count = IDX_ACTIVATE_SIZE; 1845 channel->ccw.cda = (__u32) __pa(iob->data); 1846 if (channel == &card->write) { 1847 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1848 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1849 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1850 card->seqno.trans_hdr++; 1851 } else { 1852 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1853 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1854 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1855 } 1856 tmp = ((__u8)card->info.portno) | 0x80; 1857 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1858 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1859 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1860 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1861 &card->info.func_level, sizeof(__u16)); 1862 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1863 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1864 temp = (card->info.cula << 8) + card->info.unit_addr2; 1865 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1866 1867 wait_event(card->wait_q, 1868 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1869 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1870 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1871 rc = ccw_device_start(channel->ccwdev, 1872 &channel->ccw, (addr_t) iob, 0, 0); 1873 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1874 1875 if (rc) { 1876 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1877 rc); 1878 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1879 atomic_set(&channel->irq_pending, 0); 1880 wake_up(&card->wait_q); 1881 return rc; 1882 } 1883 rc = wait_event_interruptible_timeout(card->wait_q, 1884 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1885 if (rc == -ERESTARTSYS) 1886 return rc; 1887 if (channel->state != CH_STATE_ACTIVATING) { 1888 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1889 " failed to recover an error on the device\n"); 1890 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1891 dev_name(&channel->ccwdev->dev)); 1892 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1893 qeth_clear_cmd_buffers(channel); 1894 return -ETIME; 1895 } 1896 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1897 } 1898 1899 static int qeth_peer_func_level(int level) 1900 { 1901 if ((level & 0xff) == 8) 1902 return (level & 0xff) + 0x400; 1903 if (((level >> 8) & 3) == 1) 1904 return (level & 0xff) + 0x200; 1905 return level; 1906 } 1907 1908 static void qeth_idx_write_cb(struct qeth_channel *channel, 1909 struct qeth_cmd_buffer *iob) 1910 { 1911 struct qeth_card *card; 1912 __u16 temp; 1913 1914 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1915 1916 if (channel->state == CH_STATE_DOWN) { 1917 channel->state = CH_STATE_ACTIVATING; 1918 goto out; 1919 } 1920 card = CARD_FROM_CDEV(channel->ccwdev); 1921 1922 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1923 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1924 dev_err(&card->write.ccwdev->dev, 1925 "The adapter is used exclusively by another " 1926 "host\n"); 1927 else 1928 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1929 " negative reply\n", 1930 dev_name(&card->write.ccwdev->dev)); 1931 goto out; 1932 } 1933 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1934 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1935 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1936 "function level mismatch (sent: 0x%x, received: " 1937 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1938 card->info.func_level, temp); 1939 goto out; 1940 } 1941 channel->state = CH_STATE_UP; 1942 out: 1943 qeth_release_buffer(channel, iob); 1944 } 1945 1946 static void qeth_idx_read_cb(struct qeth_channel *channel, 1947 struct qeth_cmd_buffer *iob) 1948 { 1949 struct qeth_card *card; 1950 __u16 temp; 1951 1952 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1953 if (channel->state == CH_STATE_DOWN) { 1954 channel->state = CH_STATE_ACTIVATING; 1955 goto out; 1956 } 1957 1958 card = CARD_FROM_CDEV(channel->ccwdev); 1959 if (qeth_check_idx_response(card, iob->data)) 1960 goto out; 1961 1962 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1963 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1964 case QETH_IDX_ACT_ERR_EXCL: 1965 dev_err(&card->write.ccwdev->dev, 1966 "The adapter is used exclusively by another " 1967 "host\n"); 1968 break; 1969 case QETH_IDX_ACT_ERR_AUTH: 1970 case QETH_IDX_ACT_ERR_AUTH_USER: 1971 dev_err(&card->read.ccwdev->dev, 1972 "Setting the device online failed because of " 1973 "insufficient authorization\n"); 1974 break; 1975 default: 1976 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1977 " negative reply\n", 1978 dev_name(&card->read.ccwdev->dev)); 1979 } 1980 QETH_CARD_TEXT_(card, 2, "idxread%c", 1981 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1982 goto out; 1983 } 1984 1985 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1986 if (temp != qeth_peer_func_level(card->info.func_level)) { 1987 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1988 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1989 dev_name(&card->read.ccwdev->dev), 1990 card->info.func_level, temp); 1991 goto out; 1992 } 1993 memcpy(&card->token.issuer_rm_r, 1994 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1995 QETH_MPC_TOKEN_LENGTH); 1996 memcpy(&card->info.mcl_level[0], 1997 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1998 channel->state = CH_STATE_UP; 1999 out: 2000 qeth_release_buffer(channel, iob); 2001 } 2002 2003 void qeth_prepare_control_data(struct qeth_card *card, int len, 2004 struct qeth_cmd_buffer *iob) 2005 { 2006 qeth_setup_ccw(&card->write, iob->data, len); 2007 iob->callback = qeth_release_buffer; 2008 2009 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 2010 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 2011 card->seqno.trans_hdr++; 2012 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 2013 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 2014 card->seqno.pdu_hdr++; 2015 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 2016 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 2017 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2018 } 2019 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 2020 2021 /** 2022 * qeth_send_control_data() - send control command to the card 2023 * @card: qeth_card structure pointer 2024 * @len: size of the command buffer 2025 * @iob: qeth_cmd_buffer pointer 2026 * @reply_cb: callback function pointer 2027 * @cb_card: pointer to the qeth_card structure 2028 * @cb_reply: pointer to the qeth_reply structure 2029 * @cb_cmd: pointer to the original iob for non-IPA 2030 * commands, or to the qeth_ipa_cmd structure 2031 * for the IPA commands. 2032 * @reply_param: private pointer passed to the callback 2033 * 2034 * Returns the value of the `return_code' field of the response 2035 * block returned from the hardware, or other error indication. 2036 * Value of zero indicates successful execution of the command. 2037 * 2038 * Callback function gets called one or more times, with cb_cmd 2039 * pointing to the response returned by the hardware. Callback 2040 * function must return non-zero if more reply blocks are expected, 2041 * and zero if the last or only reply block is received. Callback 2042 * function can get the value of the reply_param pointer from the 2043 * field 'param' of the structure qeth_reply. 2044 */ 2045 2046 int qeth_send_control_data(struct qeth_card *card, int len, 2047 struct qeth_cmd_buffer *iob, 2048 int (*reply_cb)(struct qeth_card *cb_card, 2049 struct qeth_reply *cb_reply, 2050 unsigned long cb_cmd), 2051 void *reply_param) 2052 { 2053 int rc; 2054 unsigned long flags; 2055 struct qeth_reply *reply = NULL; 2056 unsigned long timeout, event_timeout; 2057 struct qeth_ipa_cmd *cmd; 2058 2059 QETH_CARD_TEXT(card, 2, "sendctl"); 2060 2061 if (card->read_or_write_problem) { 2062 qeth_release_buffer(iob->channel, iob); 2063 return -EIO; 2064 } 2065 reply = qeth_alloc_reply(card); 2066 if (!reply) { 2067 return -ENOMEM; 2068 } 2069 reply->callback = reply_cb; 2070 reply->param = reply_param; 2071 if (card->state == CARD_STATE_DOWN) 2072 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2073 else 2074 reply->seqno = card->seqno.ipa++; 2075 init_waitqueue_head(&reply->wait_q); 2076 spin_lock_irqsave(&card->lock, flags); 2077 list_add_tail(&reply->list, &card->cmd_waiter_list); 2078 spin_unlock_irqrestore(&card->lock, flags); 2079 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2080 2081 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2082 qeth_prepare_control_data(card, len, iob); 2083 2084 if (IS_IPA(iob->data)) 2085 event_timeout = QETH_IPA_TIMEOUT; 2086 else 2087 event_timeout = QETH_TIMEOUT; 2088 timeout = jiffies + event_timeout; 2089 2090 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2091 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2092 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2093 (addr_t) iob, 0, 0); 2094 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2095 if (rc) { 2096 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2097 "ccw_device_start rc = %i\n", 2098 dev_name(&card->write.ccwdev->dev), rc); 2099 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2100 spin_lock_irqsave(&card->lock, flags); 2101 list_del_init(&reply->list); 2102 qeth_put_reply(reply); 2103 spin_unlock_irqrestore(&card->lock, flags); 2104 qeth_release_buffer(iob->channel, iob); 2105 atomic_set(&card->write.irq_pending, 0); 2106 wake_up(&card->wait_q); 2107 return rc; 2108 } 2109 2110 /* we have only one long running ipassist, since we can ensure 2111 process context of this command we can sleep */ 2112 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2113 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2114 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2115 if (!wait_event_timeout(reply->wait_q, 2116 atomic_read(&reply->received), event_timeout)) 2117 goto time_err; 2118 } else { 2119 while (!atomic_read(&reply->received)) { 2120 if (time_after(jiffies, timeout)) 2121 goto time_err; 2122 cpu_relax(); 2123 } 2124 } 2125 2126 if (reply->rc == -EIO) 2127 goto error; 2128 rc = reply->rc; 2129 qeth_put_reply(reply); 2130 return rc; 2131 2132 time_err: 2133 reply->rc = -ETIME; 2134 spin_lock_irqsave(&reply->card->lock, flags); 2135 list_del_init(&reply->list); 2136 spin_unlock_irqrestore(&reply->card->lock, flags); 2137 atomic_inc(&reply->received); 2138 error: 2139 atomic_set(&card->write.irq_pending, 0); 2140 qeth_release_buffer(iob->channel, iob); 2141 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2142 rc = reply->rc; 2143 qeth_put_reply(reply); 2144 return rc; 2145 } 2146 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2147 2148 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2149 unsigned long data) 2150 { 2151 struct qeth_cmd_buffer *iob; 2152 2153 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2154 2155 iob = (struct qeth_cmd_buffer *) data; 2156 memcpy(&card->token.cm_filter_r, 2157 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2158 QETH_MPC_TOKEN_LENGTH); 2159 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2160 return 0; 2161 } 2162 2163 static int qeth_cm_enable(struct qeth_card *card) 2164 { 2165 int rc; 2166 struct qeth_cmd_buffer *iob; 2167 2168 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2169 2170 iob = qeth_wait_for_buffer(&card->write); 2171 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2172 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2173 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2174 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2175 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2176 2177 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2178 qeth_cm_enable_cb, NULL); 2179 return rc; 2180 } 2181 2182 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2183 unsigned long data) 2184 { 2185 2186 struct qeth_cmd_buffer *iob; 2187 2188 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2189 2190 iob = (struct qeth_cmd_buffer *) data; 2191 memcpy(&card->token.cm_connection_r, 2192 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2193 QETH_MPC_TOKEN_LENGTH); 2194 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2195 return 0; 2196 } 2197 2198 static int qeth_cm_setup(struct qeth_card *card) 2199 { 2200 int rc; 2201 struct qeth_cmd_buffer *iob; 2202 2203 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2204 2205 iob = qeth_wait_for_buffer(&card->write); 2206 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2207 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2208 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2209 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2210 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2211 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2212 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2213 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2214 qeth_cm_setup_cb, NULL); 2215 return rc; 2216 2217 } 2218 2219 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2220 { 2221 switch (card->info.type) { 2222 case QETH_CARD_TYPE_UNKNOWN: 2223 return 1500; 2224 case QETH_CARD_TYPE_IQD: 2225 return card->info.max_mtu; 2226 case QETH_CARD_TYPE_OSD: 2227 switch (card->info.link_type) { 2228 case QETH_LINK_TYPE_HSTR: 2229 case QETH_LINK_TYPE_LANE_TR: 2230 return 2000; 2231 default: 2232 return card->options.layer2 ? 1500 : 1492; 2233 } 2234 case QETH_CARD_TYPE_OSM: 2235 case QETH_CARD_TYPE_OSX: 2236 return card->options.layer2 ? 1500 : 1492; 2237 default: 2238 return 1500; 2239 } 2240 } 2241 2242 static inline int qeth_get_mtu_outof_framesize(int framesize) 2243 { 2244 switch (framesize) { 2245 case 0x4000: 2246 return 8192; 2247 case 0x6000: 2248 return 16384; 2249 case 0xa000: 2250 return 32768; 2251 case 0xffff: 2252 return 57344; 2253 default: 2254 return 0; 2255 } 2256 } 2257 2258 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2259 { 2260 switch (card->info.type) { 2261 case QETH_CARD_TYPE_OSD: 2262 case QETH_CARD_TYPE_OSM: 2263 case QETH_CARD_TYPE_OSX: 2264 case QETH_CARD_TYPE_IQD: 2265 return ((mtu >= 576) && 2266 (mtu <= card->info.max_mtu)); 2267 case QETH_CARD_TYPE_OSN: 2268 case QETH_CARD_TYPE_UNKNOWN: 2269 default: 2270 return 1; 2271 } 2272 } 2273 2274 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2275 unsigned long data) 2276 { 2277 2278 __u16 mtu, framesize; 2279 __u16 len; 2280 __u8 link_type; 2281 struct qeth_cmd_buffer *iob; 2282 2283 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2284 2285 iob = (struct qeth_cmd_buffer *) data; 2286 memcpy(&card->token.ulp_filter_r, 2287 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2288 QETH_MPC_TOKEN_LENGTH); 2289 if (card->info.type == QETH_CARD_TYPE_IQD) { 2290 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2291 mtu = qeth_get_mtu_outof_framesize(framesize); 2292 if (!mtu) { 2293 iob->rc = -EINVAL; 2294 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2295 return 0; 2296 } 2297 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2298 /* frame size has changed */ 2299 if (card->dev && 2300 ((card->dev->mtu == card->info.initial_mtu) || 2301 (card->dev->mtu > mtu))) 2302 card->dev->mtu = mtu; 2303 qeth_free_qdio_buffers(card); 2304 } 2305 card->info.initial_mtu = mtu; 2306 card->info.max_mtu = mtu; 2307 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2308 } else { 2309 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2310 iob->data); 2311 card->info.initial_mtu = min(card->info.max_mtu, 2312 qeth_get_initial_mtu_for_card(card)); 2313 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2314 } 2315 2316 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2317 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2318 memcpy(&link_type, 2319 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2320 card->info.link_type = link_type; 2321 } else 2322 card->info.link_type = 0; 2323 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2324 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2325 return 0; 2326 } 2327 2328 static int qeth_ulp_enable(struct qeth_card *card) 2329 { 2330 int rc; 2331 char prot_type; 2332 struct qeth_cmd_buffer *iob; 2333 2334 /*FIXME: trace view callbacks*/ 2335 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2336 2337 iob = qeth_wait_for_buffer(&card->write); 2338 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2339 2340 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2341 (__u8) card->info.portno; 2342 if (card->options.layer2) 2343 if (card->info.type == QETH_CARD_TYPE_OSN) 2344 prot_type = QETH_PROT_OSN2; 2345 else 2346 prot_type = QETH_PROT_LAYER2; 2347 else 2348 prot_type = QETH_PROT_TCPIP; 2349 2350 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2351 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2352 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2353 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2354 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2355 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2356 qeth_ulp_enable_cb, NULL); 2357 return rc; 2358 2359 } 2360 2361 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2362 unsigned long data) 2363 { 2364 struct qeth_cmd_buffer *iob; 2365 2366 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2367 2368 iob = (struct qeth_cmd_buffer *) data; 2369 memcpy(&card->token.ulp_connection_r, 2370 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2371 QETH_MPC_TOKEN_LENGTH); 2372 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2373 3)) { 2374 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2375 dev_err(&card->gdev->dev, "A connection could not be " 2376 "established because of an OLM limit\n"); 2377 iob->rc = -EMLINK; 2378 } 2379 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2380 return 0; 2381 } 2382 2383 static int qeth_ulp_setup(struct qeth_card *card) 2384 { 2385 int rc; 2386 __u16 temp; 2387 struct qeth_cmd_buffer *iob; 2388 struct ccw_dev_id dev_id; 2389 2390 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2391 2392 iob = qeth_wait_for_buffer(&card->write); 2393 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2394 2395 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2396 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2397 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2398 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2399 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2400 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2401 2402 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2403 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2404 temp = (card->info.cula << 8) + card->info.unit_addr2; 2405 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2406 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2407 qeth_ulp_setup_cb, NULL); 2408 return rc; 2409 } 2410 2411 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2412 { 2413 int rc; 2414 struct qeth_qdio_out_buffer *newbuf; 2415 2416 rc = 0; 2417 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2418 if (!newbuf) { 2419 rc = -ENOMEM; 2420 goto out; 2421 } 2422 newbuf->buffer = q->qdio_bufs[bidx]; 2423 skb_queue_head_init(&newbuf->skb_list); 2424 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2425 newbuf->q = q; 2426 newbuf->aob = NULL; 2427 newbuf->next_pending = q->bufs[bidx]; 2428 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2429 q->bufs[bidx] = newbuf; 2430 if (q->bufstates) { 2431 q->bufstates[bidx].user = newbuf; 2432 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2433 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2434 QETH_CARD_TEXT_(q->card, 2, "%lx", 2435 (long) newbuf->next_pending); 2436 } 2437 out: 2438 return rc; 2439 } 2440 2441 static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q) 2442 { 2443 if (!q) 2444 return; 2445 2446 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q); 2447 kfree(q); 2448 } 2449 2450 static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void) 2451 { 2452 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL); 2453 2454 if (!q) 2455 return NULL; 2456 2457 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) { 2458 kfree(q); 2459 return NULL; 2460 } 2461 return q; 2462 } 2463 2464 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2465 { 2466 int i, j; 2467 2468 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2469 2470 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2471 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2472 return 0; 2473 2474 QETH_DBF_TEXT(SETUP, 2, "inq"); 2475 card->qdio.in_q = qeth_alloc_qdio_queue(); 2476 if (!card->qdio.in_q) 2477 goto out_nomem; 2478 2479 /* inbound buffer pool */ 2480 if (qeth_alloc_buffer_pool(card)) 2481 goto out_freeinq; 2482 2483 /* outbound */ 2484 card->qdio.out_qs = 2485 kzalloc(card->qdio.no_out_queues * 2486 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2487 if (!card->qdio.out_qs) 2488 goto out_freepool; 2489 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2490 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf(); 2491 if (!card->qdio.out_qs[i]) 2492 goto out_freeoutq; 2493 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2494 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2495 card->qdio.out_qs[i]->queue_no = i; 2496 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2497 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2498 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2499 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2500 goto out_freeoutqbufs; 2501 } 2502 } 2503 2504 /* completion */ 2505 if (qeth_alloc_cq(card)) 2506 goto out_freeoutq; 2507 2508 return 0; 2509 2510 out_freeoutqbufs: 2511 while (j > 0) { 2512 --j; 2513 kmem_cache_free(qeth_qdio_outbuf_cache, 2514 card->qdio.out_qs[i]->bufs[j]); 2515 card->qdio.out_qs[i]->bufs[j] = NULL; 2516 } 2517 out_freeoutq: 2518 while (i > 0) { 2519 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]); 2520 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2521 } 2522 kfree(card->qdio.out_qs); 2523 card->qdio.out_qs = NULL; 2524 out_freepool: 2525 qeth_free_buffer_pool(card); 2526 out_freeinq: 2527 qeth_free_qdio_queue(card->qdio.in_q); 2528 card->qdio.in_q = NULL; 2529 out_nomem: 2530 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2531 return -ENOMEM; 2532 } 2533 2534 static void qeth_free_qdio_buffers(struct qeth_card *card) 2535 { 2536 int i, j; 2537 2538 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 2539 QETH_QDIO_UNINITIALIZED) 2540 return; 2541 2542 qeth_free_cq(card); 2543 cancel_delayed_work_sync(&card->buffer_reclaim_work); 2544 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2545 if (card->qdio.in_q->bufs[j].rx_skb) 2546 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 2547 } 2548 qeth_free_qdio_queue(card->qdio.in_q); 2549 card->qdio.in_q = NULL; 2550 /* inbound buffer pool */ 2551 qeth_free_buffer_pool(card); 2552 /* free outbound qdio_qs */ 2553 if (card->qdio.out_qs) { 2554 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2555 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2556 qeth_free_qdio_out_buf(card->qdio.out_qs[i]); 2557 } 2558 kfree(card->qdio.out_qs); 2559 card->qdio.out_qs = NULL; 2560 } 2561 } 2562 2563 static void qeth_create_qib_param_field(struct qeth_card *card, 2564 char *param_field) 2565 { 2566 2567 param_field[0] = _ascebc['P']; 2568 param_field[1] = _ascebc['C']; 2569 param_field[2] = _ascebc['I']; 2570 param_field[3] = _ascebc['T']; 2571 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2572 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2573 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2574 } 2575 2576 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2577 char *param_field) 2578 { 2579 param_field[16] = _ascebc['B']; 2580 param_field[17] = _ascebc['L']; 2581 param_field[18] = _ascebc['K']; 2582 param_field[19] = _ascebc['T']; 2583 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2584 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2585 *((unsigned int *) (¶m_field[28])) = 2586 card->info.blkt.inter_packet_jumbo; 2587 } 2588 2589 static int qeth_qdio_activate(struct qeth_card *card) 2590 { 2591 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2592 return qdio_activate(CARD_DDEV(card)); 2593 } 2594 2595 static int qeth_dm_act(struct qeth_card *card) 2596 { 2597 int rc; 2598 struct qeth_cmd_buffer *iob; 2599 2600 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2601 2602 iob = qeth_wait_for_buffer(&card->write); 2603 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2604 2605 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2606 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2607 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2608 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2609 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2610 return rc; 2611 } 2612 2613 static int qeth_mpc_initialize(struct qeth_card *card) 2614 { 2615 int rc; 2616 2617 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2618 2619 rc = qeth_issue_next_read(card); 2620 if (rc) { 2621 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2622 return rc; 2623 } 2624 rc = qeth_cm_enable(card); 2625 if (rc) { 2626 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2627 goto out_qdio; 2628 } 2629 rc = qeth_cm_setup(card); 2630 if (rc) { 2631 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2632 goto out_qdio; 2633 } 2634 rc = qeth_ulp_enable(card); 2635 if (rc) { 2636 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2637 goto out_qdio; 2638 } 2639 rc = qeth_ulp_setup(card); 2640 if (rc) { 2641 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2642 goto out_qdio; 2643 } 2644 rc = qeth_alloc_qdio_buffers(card); 2645 if (rc) { 2646 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2647 goto out_qdio; 2648 } 2649 rc = qeth_qdio_establish(card); 2650 if (rc) { 2651 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2652 qeth_free_qdio_buffers(card); 2653 goto out_qdio; 2654 } 2655 rc = qeth_qdio_activate(card); 2656 if (rc) { 2657 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2658 goto out_qdio; 2659 } 2660 rc = qeth_dm_act(card); 2661 if (rc) { 2662 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2663 goto out_qdio; 2664 } 2665 2666 return 0; 2667 out_qdio: 2668 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2669 qdio_free(CARD_DDEV(card)); 2670 return rc; 2671 } 2672 2673 void qeth_print_status_message(struct qeth_card *card) 2674 { 2675 switch (card->info.type) { 2676 case QETH_CARD_TYPE_OSD: 2677 case QETH_CARD_TYPE_OSM: 2678 case QETH_CARD_TYPE_OSX: 2679 /* VM will use a non-zero first character 2680 * to indicate a HiperSockets like reporting 2681 * of the level OSA sets the first character to zero 2682 * */ 2683 if (!card->info.mcl_level[0]) { 2684 sprintf(card->info.mcl_level, "%02x%02x", 2685 card->info.mcl_level[2], 2686 card->info.mcl_level[3]); 2687 break; 2688 } 2689 /* fallthrough */ 2690 case QETH_CARD_TYPE_IQD: 2691 if ((card->info.guestlan) || 2692 (card->info.mcl_level[0] & 0x80)) { 2693 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2694 card->info.mcl_level[0]]; 2695 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2696 card->info.mcl_level[1]]; 2697 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2698 card->info.mcl_level[2]]; 2699 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2700 card->info.mcl_level[3]]; 2701 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2702 } 2703 break; 2704 default: 2705 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2706 } 2707 dev_info(&card->gdev->dev, 2708 "Device is a%s card%s%s%s\nwith link type %s.\n", 2709 qeth_get_cardname(card), 2710 (card->info.mcl_level[0]) ? " (level: " : "", 2711 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2712 (card->info.mcl_level[0]) ? ")" : "", 2713 qeth_get_cardname_short(card)); 2714 } 2715 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2716 2717 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2718 { 2719 struct qeth_buffer_pool_entry *entry; 2720 2721 QETH_CARD_TEXT(card, 5, "inwrklst"); 2722 2723 list_for_each_entry(entry, 2724 &card->qdio.init_pool.entry_list, init_list) { 2725 qeth_put_buffer_pool_entry(card, entry); 2726 } 2727 } 2728 2729 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2730 struct qeth_card *card) 2731 { 2732 struct list_head *plh; 2733 struct qeth_buffer_pool_entry *entry; 2734 int i, free; 2735 struct page *page; 2736 2737 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2738 return NULL; 2739 2740 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2741 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2742 free = 1; 2743 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2744 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2745 free = 0; 2746 break; 2747 } 2748 } 2749 if (free) { 2750 list_del_init(&entry->list); 2751 return entry; 2752 } 2753 } 2754 2755 /* no free buffer in pool so take first one and swap pages */ 2756 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2757 struct qeth_buffer_pool_entry, list); 2758 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2759 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2760 page = alloc_page(GFP_ATOMIC); 2761 if (!page) { 2762 return NULL; 2763 } else { 2764 free_page((unsigned long)entry->elements[i]); 2765 entry->elements[i] = page_address(page); 2766 if (card->options.performance_stats) 2767 card->perf_stats.sg_alloc_page_rx++; 2768 } 2769 } 2770 } 2771 list_del_init(&entry->list); 2772 return entry; 2773 } 2774 2775 static int qeth_init_input_buffer(struct qeth_card *card, 2776 struct qeth_qdio_buffer *buf) 2777 { 2778 struct qeth_buffer_pool_entry *pool_entry; 2779 int i; 2780 2781 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2782 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2783 if (!buf->rx_skb) 2784 return 1; 2785 } 2786 2787 pool_entry = qeth_find_free_buffer_pool_entry(card); 2788 if (!pool_entry) 2789 return 1; 2790 2791 /* 2792 * since the buffer is accessed only from the input_tasklet 2793 * there shouldn't be a need to synchronize; also, since we use 2794 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2795 * buffers 2796 */ 2797 2798 buf->pool_entry = pool_entry; 2799 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2800 buf->buffer->element[i].length = PAGE_SIZE; 2801 buf->buffer->element[i].addr = pool_entry->elements[i]; 2802 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2803 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2804 else 2805 buf->buffer->element[i].eflags = 0; 2806 buf->buffer->element[i].sflags = 0; 2807 } 2808 return 0; 2809 } 2810 2811 int qeth_init_qdio_queues(struct qeth_card *card) 2812 { 2813 int i, j; 2814 int rc; 2815 2816 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2817 2818 /* inbound queue */ 2819 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, 2820 QDIO_MAX_BUFFERS_PER_Q); 2821 qeth_initialize_working_pool_list(card); 2822 /*give only as many buffers to hardware as we have buffer pool entries*/ 2823 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2824 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2825 card->qdio.in_q->next_buf_to_init = 2826 card->qdio.in_buf_pool.buf_count - 1; 2827 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2828 card->qdio.in_buf_pool.buf_count - 1); 2829 if (rc) { 2830 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2831 return rc; 2832 } 2833 2834 /* completion */ 2835 rc = qeth_cq_init(card); 2836 if (rc) { 2837 return rc; 2838 } 2839 2840 /* outbound queue */ 2841 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2842 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs, 2843 QDIO_MAX_BUFFERS_PER_Q); 2844 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2845 qeth_clear_output_buffer(card->qdio.out_qs[i], 2846 card->qdio.out_qs[i]->bufs[j], 2847 QETH_QDIO_BUF_EMPTY); 2848 } 2849 card->qdio.out_qs[i]->card = card; 2850 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2851 card->qdio.out_qs[i]->do_pack = 0; 2852 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2853 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2854 atomic_set(&card->qdio.out_qs[i]->state, 2855 QETH_OUT_Q_UNLOCKED); 2856 } 2857 return 0; 2858 } 2859 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2860 2861 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2862 { 2863 switch (link_type) { 2864 case QETH_LINK_TYPE_HSTR: 2865 return 2; 2866 default: 2867 return 1; 2868 } 2869 } 2870 2871 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2872 struct qeth_ipa_cmd *cmd, __u8 command, 2873 enum qeth_prot_versions prot) 2874 { 2875 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2876 cmd->hdr.command = command; 2877 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2878 cmd->hdr.seqno = card->seqno.ipa; 2879 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2880 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2881 if (card->options.layer2) 2882 cmd->hdr.prim_version_no = 2; 2883 else 2884 cmd->hdr.prim_version_no = 1; 2885 cmd->hdr.param_count = 1; 2886 cmd->hdr.prot_version = prot; 2887 cmd->hdr.ipa_supported = 0; 2888 cmd->hdr.ipa_enabled = 0; 2889 } 2890 2891 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2892 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2893 { 2894 struct qeth_cmd_buffer *iob; 2895 struct qeth_ipa_cmd *cmd; 2896 2897 iob = qeth_get_buffer(&card->write); 2898 if (iob) { 2899 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2900 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2901 } else { 2902 dev_warn(&card->gdev->dev, 2903 "The qeth driver ran out of channel command buffers\n"); 2904 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers", 2905 dev_name(&card->gdev->dev)); 2906 } 2907 2908 return iob; 2909 } 2910 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2911 2912 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2913 char prot_type) 2914 { 2915 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2916 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2917 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2918 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2919 } 2920 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2921 2922 /** 2923 * qeth_send_ipa_cmd() - send an IPA command 2924 * 2925 * See qeth_send_control_data() for explanation of the arguments. 2926 */ 2927 2928 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2929 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2930 unsigned long), 2931 void *reply_param) 2932 { 2933 int rc; 2934 char prot_type; 2935 2936 QETH_CARD_TEXT(card, 4, "sendipa"); 2937 2938 if (card->options.layer2) 2939 if (card->info.type == QETH_CARD_TYPE_OSN) 2940 prot_type = QETH_PROT_OSN2; 2941 else 2942 prot_type = QETH_PROT_LAYER2; 2943 else 2944 prot_type = QETH_PROT_TCPIP; 2945 qeth_prepare_ipa_cmd(card, iob, prot_type); 2946 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2947 iob, reply_cb, reply_param); 2948 if (rc == -ETIME) { 2949 qeth_clear_ipacmd_list(card); 2950 qeth_schedule_recovery(card); 2951 } 2952 return rc; 2953 } 2954 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2955 2956 int qeth_send_startlan(struct qeth_card *card) 2957 { 2958 int rc; 2959 struct qeth_cmd_buffer *iob; 2960 2961 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2962 2963 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2964 if (!iob) 2965 return -ENOMEM; 2966 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2967 return rc; 2968 } 2969 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2970 2971 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 2972 struct qeth_reply *reply, unsigned long data) 2973 { 2974 struct qeth_ipa_cmd *cmd; 2975 2976 QETH_CARD_TEXT(card, 4, "defadpcb"); 2977 2978 cmd = (struct qeth_ipa_cmd *) data; 2979 if (cmd->hdr.return_code == 0) 2980 cmd->hdr.return_code = 2981 cmd->data.setadapterparms.hdr.return_code; 2982 return 0; 2983 } 2984 2985 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2986 struct qeth_reply *reply, unsigned long data) 2987 { 2988 struct qeth_ipa_cmd *cmd; 2989 2990 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2991 2992 cmd = (struct qeth_ipa_cmd *) data; 2993 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2994 card->info.link_type = 2995 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2996 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2997 } 2998 card->options.adp.supported_funcs = 2999 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 3000 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3001 } 3002 3003 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 3004 __u32 command, __u32 cmdlen) 3005 { 3006 struct qeth_cmd_buffer *iob; 3007 struct qeth_ipa_cmd *cmd; 3008 3009 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 3010 QETH_PROT_IPV4); 3011 if (iob) { 3012 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3013 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 3014 cmd->data.setadapterparms.hdr.command_code = command; 3015 cmd->data.setadapterparms.hdr.used_total = 1; 3016 cmd->data.setadapterparms.hdr.seq_no = 1; 3017 } 3018 3019 return iob; 3020 } 3021 3022 int qeth_query_setadapterparms(struct qeth_card *card) 3023 { 3024 int rc; 3025 struct qeth_cmd_buffer *iob; 3026 3027 QETH_CARD_TEXT(card, 3, "queryadp"); 3028 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 3029 sizeof(struct qeth_ipacmd_setadpparms)); 3030 if (!iob) 3031 return -ENOMEM; 3032 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 3033 return rc; 3034 } 3035 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 3036 3037 static int qeth_query_ipassists_cb(struct qeth_card *card, 3038 struct qeth_reply *reply, unsigned long data) 3039 { 3040 struct qeth_ipa_cmd *cmd; 3041 3042 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 3043 3044 cmd = (struct qeth_ipa_cmd *) data; 3045 3046 switch (cmd->hdr.return_code) { 3047 case IPA_RC_NOTSUPP: 3048 case IPA_RC_L2_UNSUPPORTED_CMD: 3049 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 3050 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 3051 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 3052 return -0; 3053 default: 3054 if (cmd->hdr.return_code) { 3055 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 3056 "rc=%d\n", 3057 dev_name(&card->gdev->dev), 3058 cmd->hdr.return_code); 3059 return 0; 3060 } 3061 } 3062 3063 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 3064 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 3065 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 3066 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 3067 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 3068 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 3069 } else 3070 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3071 "\n", dev_name(&card->gdev->dev)); 3072 return 0; 3073 } 3074 3075 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3076 { 3077 int rc; 3078 struct qeth_cmd_buffer *iob; 3079 3080 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3081 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3082 if (!iob) 3083 return -ENOMEM; 3084 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3085 return rc; 3086 } 3087 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3088 3089 static int qeth_query_switch_attributes_cb(struct qeth_card *card, 3090 struct qeth_reply *reply, unsigned long data) 3091 { 3092 struct qeth_ipa_cmd *cmd; 3093 struct qeth_switch_info *sw_info; 3094 struct qeth_query_switch_attributes *attrs; 3095 3096 QETH_CARD_TEXT(card, 2, "qswiatcb"); 3097 cmd = (struct qeth_ipa_cmd *) data; 3098 sw_info = (struct qeth_switch_info *)reply->param; 3099 if (cmd->data.setadapterparms.hdr.return_code == 0) { 3100 attrs = &cmd->data.setadapterparms.data.query_switch_attributes; 3101 sw_info->capabilities = attrs->capabilities; 3102 sw_info->settings = attrs->settings; 3103 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities, 3104 sw_info->settings); 3105 } 3106 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3107 3108 return 0; 3109 } 3110 3111 int qeth_query_switch_attributes(struct qeth_card *card, 3112 struct qeth_switch_info *sw_info) 3113 { 3114 struct qeth_cmd_buffer *iob; 3115 3116 QETH_CARD_TEXT(card, 2, "qswiattr"); 3117 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES)) 3118 return -EOPNOTSUPP; 3119 if (!netif_carrier_ok(card->dev)) 3120 return -ENOMEDIUM; 3121 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES, 3122 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 3123 if (!iob) 3124 return -ENOMEM; 3125 return qeth_send_ipa_cmd(card, iob, 3126 qeth_query_switch_attributes_cb, sw_info); 3127 } 3128 EXPORT_SYMBOL_GPL(qeth_query_switch_attributes); 3129 3130 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3131 struct qeth_reply *reply, unsigned long data) 3132 { 3133 struct qeth_ipa_cmd *cmd; 3134 __u16 rc; 3135 3136 cmd = (struct qeth_ipa_cmd *)data; 3137 rc = cmd->hdr.return_code; 3138 if (rc) 3139 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3140 else 3141 card->info.diagass_support = cmd->data.diagass.ext; 3142 return 0; 3143 } 3144 3145 static int qeth_query_setdiagass(struct qeth_card *card) 3146 { 3147 struct qeth_cmd_buffer *iob; 3148 struct qeth_ipa_cmd *cmd; 3149 3150 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3151 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3152 if (!iob) 3153 return -ENOMEM; 3154 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3155 cmd->data.diagass.subcmd_len = 16; 3156 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3157 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3158 } 3159 3160 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3161 { 3162 unsigned long info = get_zeroed_page(GFP_KERNEL); 3163 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3164 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3165 struct ccw_dev_id ccwid; 3166 int level; 3167 3168 tid->chpid = card->info.chpid; 3169 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3170 tid->ssid = ccwid.ssid; 3171 tid->devno = ccwid.devno; 3172 if (!info) 3173 return; 3174 level = stsi(NULL, 0, 0, 0); 3175 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3176 tid->lparnr = info222->lpar_number; 3177 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3178 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3179 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3180 } 3181 free_page(info); 3182 return; 3183 } 3184 3185 static int qeth_hw_trap_cb(struct qeth_card *card, 3186 struct qeth_reply *reply, unsigned long data) 3187 { 3188 struct qeth_ipa_cmd *cmd; 3189 __u16 rc; 3190 3191 cmd = (struct qeth_ipa_cmd *)data; 3192 rc = cmd->hdr.return_code; 3193 if (rc) 3194 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3195 return 0; 3196 } 3197 3198 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3199 { 3200 struct qeth_cmd_buffer *iob; 3201 struct qeth_ipa_cmd *cmd; 3202 3203 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3204 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3205 if (!iob) 3206 return -ENOMEM; 3207 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3208 cmd->data.diagass.subcmd_len = 80; 3209 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3210 cmd->data.diagass.type = 1; 3211 cmd->data.diagass.action = action; 3212 switch (action) { 3213 case QETH_DIAGS_TRAP_ARM: 3214 cmd->data.diagass.options = 0x0003; 3215 cmd->data.diagass.ext = 0x00010000 + 3216 sizeof(struct qeth_trap_id); 3217 qeth_get_trap_id(card, 3218 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3219 break; 3220 case QETH_DIAGS_TRAP_DISARM: 3221 cmd->data.diagass.options = 0x0001; 3222 break; 3223 case QETH_DIAGS_TRAP_CAPTURE: 3224 break; 3225 } 3226 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3227 } 3228 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3229 3230 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3231 unsigned int qdio_error, const char *dbftext) 3232 { 3233 if (qdio_error) { 3234 QETH_CARD_TEXT(card, 2, dbftext); 3235 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3236 buf->element[15].sflags); 3237 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3238 buf->element[14].sflags); 3239 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3240 if ((buf->element[15].sflags) == 0x12) { 3241 card->stats.rx_dropped++; 3242 return 0; 3243 } else 3244 return 1; 3245 } 3246 return 0; 3247 } 3248 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3249 3250 static void qeth_buffer_reclaim_work(struct work_struct *work) 3251 { 3252 struct qeth_card *card = container_of(work, struct qeth_card, 3253 buffer_reclaim_work.work); 3254 3255 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3256 qeth_queue_input_buffer(card, card->reclaim_index); 3257 } 3258 3259 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3260 { 3261 struct qeth_qdio_q *queue = card->qdio.in_q; 3262 struct list_head *lh; 3263 int count; 3264 int i; 3265 int rc; 3266 int newcount = 0; 3267 3268 count = (index < queue->next_buf_to_init)? 3269 card->qdio.in_buf_pool.buf_count - 3270 (queue->next_buf_to_init - index) : 3271 card->qdio.in_buf_pool.buf_count - 3272 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3273 /* only requeue at a certain threshold to avoid SIGAs */ 3274 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3275 for (i = queue->next_buf_to_init; 3276 i < queue->next_buf_to_init + count; ++i) { 3277 if (qeth_init_input_buffer(card, 3278 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3279 break; 3280 } else { 3281 newcount++; 3282 } 3283 } 3284 3285 if (newcount < count) { 3286 /* we are in memory shortage so we switch back to 3287 traditional skb allocation and drop packages */ 3288 atomic_set(&card->force_alloc_skb, 3); 3289 count = newcount; 3290 } else { 3291 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3292 } 3293 3294 if (!count) { 3295 i = 0; 3296 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3297 i++; 3298 if (i == card->qdio.in_buf_pool.buf_count) { 3299 QETH_CARD_TEXT(card, 2, "qsarbw"); 3300 card->reclaim_index = index; 3301 schedule_delayed_work( 3302 &card->buffer_reclaim_work, 3303 QETH_RECLAIM_WORK_TIME); 3304 } 3305 return; 3306 } 3307 3308 /* 3309 * according to old code it should be avoided to requeue all 3310 * 128 buffers in order to benefit from PCI avoidance. 3311 * this function keeps at least one buffer (the buffer at 3312 * 'index') un-requeued -> this buffer is the first buffer that 3313 * will be requeued the next time 3314 */ 3315 if (card->options.performance_stats) { 3316 card->perf_stats.inbound_do_qdio_cnt++; 3317 card->perf_stats.inbound_do_qdio_start_time = 3318 qeth_get_micros(); 3319 } 3320 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3321 queue->next_buf_to_init, count); 3322 if (card->options.performance_stats) 3323 card->perf_stats.inbound_do_qdio_time += 3324 qeth_get_micros() - 3325 card->perf_stats.inbound_do_qdio_start_time; 3326 if (rc) { 3327 QETH_CARD_TEXT(card, 2, "qinberr"); 3328 } 3329 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3330 QDIO_MAX_BUFFERS_PER_Q; 3331 } 3332 } 3333 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3334 3335 static int qeth_handle_send_error(struct qeth_card *card, 3336 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3337 { 3338 int sbalf15 = buffer->buffer->element[15].sflags; 3339 3340 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3341 if (card->info.type == QETH_CARD_TYPE_IQD) { 3342 if (sbalf15 == 0) { 3343 qdio_err = 0; 3344 } else { 3345 qdio_err = 1; 3346 } 3347 } 3348 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3349 3350 if (!qdio_err) 3351 return QETH_SEND_ERROR_NONE; 3352 3353 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3354 return QETH_SEND_ERROR_RETRY; 3355 3356 QETH_CARD_TEXT(card, 1, "lnkfail"); 3357 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3358 (u16)qdio_err, (u8)sbalf15); 3359 return QETH_SEND_ERROR_LINK_FAILURE; 3360 } 3361 3362 /* 3363 * Switched to packing state if the number of used buffers on a queue 3364 * reaches a certain limit. 3365 */ 3366 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3367 { 3368 if (!queue->do_pack) { 3369 if (atomic_read(&queue->used_buffers) 3370 >= QETH_HIGH_WATERMARK_PACK){ 3371 /* switch non-PACKING -> PACKING */ 3372 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3373 if (queue->card->options.performance_stats) 3374 queue->card->perf_stats.sc_dp_p++; 3375 queue->do_pack = 1; 3376 } 3377 } 3378 } 3379 3380 /* 3381 * Switches from packing to non-packing mode. If there is a packing 3382 * buffer on the queue this buffer will be prepared to be flushed. 3383 * In that case 1 is returned to inform the caller. If no buffer 3384 * has to be flushed, zero is returned. 3385 */ 3386 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3387 { 3388 struct qeth_qdio_out_buffer *buffer; 3389 int flush_count = 0; 3390 3391 if (queue->do_pack) { 3392 if (atomic_read(&queue->used_buffers) 3393 <= QETH_LOW_WATERMARK_PACK) { 3394 /* switch PACKING -> non-PACKING */ 3395 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3396 if (queue->card->options.performance_stats) 3397 queue->card->perf_stats.sc_p_dp++; 3398 queue->do_pack = 0; 3399 /* flush packing buffers */ 3400 buffer = queue->bufs[queue->next_buf_to_fill]; 3401 if ((atomic_read(&buffer->state) == 3402 QETH_QDIO_BUF_EMPTY) && 3403 (buffer->next_element_to_fill > 0)) { 3404 atomic_set(&buffer->state, 3405 QETH_QDIO_BUF_PRIMED); 3406 flush_count++; 3407 queue->next_buf_to_fill = 3408 (queue->next_buf_to_fill + 1) % 3409 QDIO_MAX_BUFFERS_PER_Q; 3410 } 3411 } 3412 } 3413 return flush_count; 3414 } 3415 3416 3417 /* 3418 * Called to flush a packing buffer if no more pci flags are on the queue. 3419 * Checks if there is a packing buffer and prepares it to be flushed. 3420 * In that case returns 1, otherwise zero. 3421 */ 3422 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3423 { 3424 struct qeth_qdio_out_buffer *buffer; 3425 3426 buffer = queue->bufs[queue->next_buf_to_fill]; 3427 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3428 (buffer->next_element_to_fill > 0)) { 3429 /* it's a packing buffer */ 3430 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3431 queue->next_buf_to_fill = 3432 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3433 return 1; 3434 } 3435 return 0; 3436 } 3437 3438 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3439 int count) 3440 { 3441 struct qeth_qdio_out_buffer *buf; 3442 int rc; 3443 int i; 3444 unsigned int qdio_flags; 3445 3446 for (i = index; i < index + count; ++i) { 3447 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3448 buf = queue->bufs[bidx]; 3449 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3450 SBAL_EFLAGS_LAST_ENTRY; 3451 3452 if (queue->bufstates) 3453 queue->bufstates[bidx].user = buf; 3454 3455 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3456 continue; 3457 3458 if (!queue->do_pack) { 3459 if ((atomic_read(&queue->used_buffers) >= 3460 (QETH_HIGH_WATERMARK_PACK - 3461 QETH_WATERMARK_PACK_FUZZ)) && 3462 !atomic_read(&queue->set_pci_flags_count)) { 3463 /* it's likely that we'll go to packing 3464 * mode soon */ 3465 atomic_inc(&queue->set_pci_flags_count); 3466 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3467 } 3468 } else { 3469 if (!atomic_read(&queue->set_pci_flags_count)) { 3470 /* 3471 * there's no outstanding PCI any more, so we 3472 * have to request a PCI to be sure the the PCI 3473 * will wake at some time in the future then we 3474 * can flush packed buffers that might still be 3475 * hanging around, which can happen if no 3476 * further send was requested by the stack 3477 */ 3478 atomic_inc(&queue->set_pci_flags_count); 3479 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3480 } 3481 } 3482 } 3483 3484 netif_trans_update(queue->card->dev); 3485 if (queue->card->options.performance_stats) { 3486 queue->card->perf_stats.outbound_do_qdio_cnt++; 3487 queue->card->perf_stats.outbound_do_qdio_start_time = 3488 qeth_get_micros(); 3489 } 3490 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3491 if (atomic_read(&queue->set_pci_flags_count)) 3492 qdio_flags |= QDIO_FLAG_PCI_OUT; 3493 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3494 queue->queue_no, index, count); 3495 if (queue->card->options.performance_stats) 3496 queue->card->perf_stats.outbound_do_qdio_time += 3497 qeth_get_micros() - 3498 queue->card->perf_stats.outbound_do_qdio_start_time; 3499 atomic_add(count, &queue->used_buffers); 3500 if (rc) { 3501 queue->card->stats.tx_errors += count; 3502 /* ignore temporary SIGA errors without busy condition */ 3503 if (rc == -ENOBUFS) 3504 return; 3505 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3506 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3507 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3508 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3509 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3510 3511 /* this must not happen under normal circumstances. if it 3512 * happens something is really wrong -> recover */ 3513 qeth_schedule_recovery(queue->card); 3514 return; 3515 } 3516 if (queue->card->options.performance_stats) 3517 queue->card->perf_stats.bufs_sent += count; 3518 } 3519 3520 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3521 { 3522 int index; 3523 int flush_cnt = 0; 3524 int q_was_packing = 0; 3525 3526 /* 3527 * check if weed have to switch to non-packing mode or if 3528 * we have to get a pci flag out on the queue 3529 */ 3530 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3531 !atomic_read(&queue->set_pci_flags_count)) { 3532 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3533 QETH_OUT_Q_UNLOCKED) { 3534 /* 3535 * If we get in here, there was no action in 3536 * do_send_packet. So, we check if there is a 3537 * packing buffer to be flushed here. 3538 */ 3539 netif_stop_queue(queue->card->dev); 3540 index = queue->next_buf_to_fill; 3541 q_was_packing = queue->do_pack; 3542 /* queue->do_pack may change */ 3543 barrier(); 3544 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3545 if (!flush_cnt && 3546 !atomic_read(&queue->set_pci_flags_count)) 3547 flush_cnt += 3548 qeth_flush_buffers_on_no_pci(queue); 3549 if (queue->card->options.performance_stats && 3550 q_was_packing) 3551 queue->card->perf_stats.bufs_sent_pack += 3552 flush_cnt; 3553 if (flush_cnt) 3554 qeth_flush_buffers(queue, index, flush_cnt); 3555 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3556 } 3557 } 3558 } 3559 3560 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3561 unsigned long card_ptr) 3562 { 3563 struct qeth_card *card = (struct qeth_card *)card_ptr; 3564 3565 if (card->dev && (card->dev->flags & IFF_UP)) 3566 napi_schedule(&card->napi); 3567 } 3568 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3569 3570 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3571 { 3572 int rc; 3573 3574 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3575 rc = -1; 3576 goto out; 3577 } else { 3578 if (card->options.cq == cq) { 3579 rc = 0; 3580 goto out; 3581 } 3582 3583 if (card->state != CARD_STATE_DOWN && 3584 card->state != CARD_STATE_RECOVER) { 3585 rc = -1; 3586 goto out; 3587 } 3588 3589 qeth_free_qdio_buffers(card); 3590 card->options.cq = cq; 3591 rc = 0; 3592 } 3593 out: 3594 return rc; 3595 3596 } 3597 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3598 3599 3600 static void qeth_qdio_cq_handler(struct qeth_card *card, 3601 unsigned int qdio_err, 3602 unsigned int queue, int first_element, int count) { 3603 struct qeth_qdio_q *cq = card->qdio.c_q; 3604 int i; 3605 int rc; 3606 3607 if (!qeth_is_cq(card, queue)) 3608 goto out; 3609 3610 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3611 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3612 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3613 3614 if (qdio_err) { 3615 netif_stop_queue(card->dev); 3616 qeth_schedule_recovery(card); 3617 goto out; 3618 } 3619 3620 if (card->options.performance_stats) { 3621 card->perf_stats.cq_cnt++; 3622 card->perf_stats.cq_start_time = qeth_get_micros(); 3623 } 3624 3625 for (i = first_element; i < first_element + count; ++i) { 3626 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3627 struct qdio_buffer *buffer = cq->qdio_bufs[bidx]; 3628 int e; 3629 3630 e = 0; 3631 while (buffer->element[e].addr) { 3632 unsigned long phys_aob_addr; 3633 3634 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3635 qeth_qdio_handle_aob(card, phys_aob_addr); 3636 buffer->element[e].addr = NULL; 3637 buffer->element[e].eflags = 0; 3638 buffer->element[e].sflags = 0; 3639 buffer->element[e].length = 0; 3640 3641 ++e; 3642 } 3643 3644 buffer->element[15].eflags = 0; 3645 buffer->element[15].sflags = 0; 3646 } 3647 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3648 card->qdio.c_q->next_buf_to_init, 3649 count); 3650 if (rc) { 3651 dev_warn(&card->gdev->dev, 3652 "QDIO reported an error, rc=%i\n", rc); 3653 QETH_CARD_TEXT(card, 2, "qcqherr"); 3654 } 3655 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3656 + count) % QDIO_MAX_BUFFERS_PER_Q; 3657 3658 netif_wake_queue(card->dev); 3659 3660 if (card->options.performance_stats) { 3661 int delta_t = qeth_get_micros(); 3662 delta_t -= card->perf_stats.cq_start_time; 3663 card->perf_stats.cq_time += delta_t; 3664 } 3665 out: 3666 return; 3667 } 3668 3669 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3670 unsigned int queue, int first_elem, int count, 3671 unsigned long card_ptr) 3672 { 3673 struct qeth_card *card = (struct qeth_card *)card_ptr; 3674 3675 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3676 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3677 3678 if (qeth_is_cq(card, queue)) 3679 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3680 else if (qdio_err) 3681 qeth_schedule_recovery(card); 3682 3683 3684 } 3685 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3686 3687 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3688 unsigned int qdio_error, int __queue, int first_element, 3689 int count, unsigned long card_ptr) 3690 { 3691 struct qeth_card *card = (struct qeth_card *) card_ptr; 3692 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3693 struct qeth_qdio_out_buffer *buffer; 3694 int i; 3695 3696 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3697 if (qdio_error & QDIO_ERROR_FATAL) { 3698 QETH_CARD_TEXT(card, 2, "achkcond"); 3699 netif_stop_queue(card->dev); 3700 qeth_schedule_recovery(card); 3701 return; 3702 } 3703 if (card->options.performance_stats) { 3704 card->perf_stats.outbound_handler_cnt++; 3705 card->perf_stats.outbound_handler_start_time = 3706 qeth_get_micros(); 3707 } 3708 for (i = first_element; i < (first_element + count); ++i) { 3709 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3710 buffer = queue->bufs[bidx]; 3711 qeth_handle_send_error(card, buffer, qdio_error); 3712 3713 if (queue->bufstates && 3714 (queue->bufstates[bidx].flags & 3715 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3716 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3717 3718 if (atomic_cmpxchg(&buffer->state, 3719 QETH_QDIO_BUF_PRIMED, 3720 QETH_QDIO_BUF_PENDING) == 3721 QETH_QDIO_BUF_PRIMED) { 3722 qeth_notify_skbs(queue, buffer, 3723 TX_NOTIFY_PENDING); 3724 } 3725 buffer->aob = queue->bufstates[bidx].aob; 3726 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3727 QETH_CARD_TEXT(queue->card, 5, "aob"); 3728 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3729 virt_to_phys(buffer->aob)); 3730 if (qeth_init_qdio_out_buf(queue, bidx)) { 3731 QETH_CARD_TEXT(card, 2, "outofbuf"); 3732 qeth_schedule_recovery(card); 3733 } 3734 } else { 3735 if (card->options.cq == QETH_CQ_ENABLED) { 3736 enum iucv_tx_notify n; 3737 3738 n = qeth_compute_cq_notification( 3739 buffer->buffer->element[15].sflags, 0); 3740 qeth_notify_skbs(queue, buffer, n); 3741 } 3742 3743 qeth_clear_output_buffer(queue, buffer, 3744 QETH_QDIO_BUF_EMPTY); 3745 } 3746 qeth_cleanup_handled_pending(queue, bidx, 0); 3747 } 3748 atomic_sub(count, &queue->used_buffers); 3749 /* check if we need to do something on this outbound queue */ 3750 if (card->info.type != QETH_CARD_TYPE_IQD) 3751 qeth_check_outbound_queue(queue); 3752 3753 netif_wake_queue(queue->card->dev); 3754 if (card->options.performance_stats) 3755 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3756 card->perf_stats.outbound_handler_start_time; 3757 } 3758 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3759 3760 /** 3761 * Note: Function assumes that we have 4 outbound queues. 3762 */ 3763 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3764 int ipv, int cast_type) 3765 { 3766 __be16 *tci; 3767 u8 tos; 3768 3769 if (cast_type && card->info.is_multicast_different) 3770 return card->info.is_multicast_different & 3771 (card->qdio.no_out_queues - 1); 3772 3773 switch (card->qdio.do_prio_queueing) { 3774 case QETH_PRIO_Q_ING_TOS: 3775 case QETH_PRIO_Q_ING_PREC: 3776 switch (ipv) { 3777 case 4: 3778 tos = ipv4_get_dsfield(ip_hdr(skb)); 3779 break; 3780 case 6: 3781 tos = ipv6_get_dsfield(ipv6_hdr(skb)); 3782 break; 3783 default: 3784 return card->qdio.default_out_queue; 3785 } 3786 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC) 3787 return ~tos >> 6 & 3; 3788 if (tos & IPTOS_MINCOST) 3789 return 3; 3790 if (tos & IPTOS_RELIABILITY) 3791 return 2; 3792 if (tos & IPTOS_THROUGHPUT) 3793 return 1; 3794 if (tos & IPTOS_LOWDELAY) 3795 return 0; 3796 break; 3797 case QETH_PRIO_Q_ING_SKB: 3798 if (skb->priority > 5) 3799 return 0; 3800 return ~skb->priority >> 1 & 3; 3801 case QETH_PRIO_Q_ING_VLAN: 3802 tci = &((struct ethhdr *)skb->data)->h_proto; 3803 if (*tci == ETH_P_8021Q) 3804 return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3; 3805 break; 3806 default: 3807 break; 3808 } 3809 return card->qdio.default_out_queue; 3810 } 3811 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3812 3813 int qeth_get_elements_for_frags(struct sk_buff *skb) 3814 { 3815 int cnt, length, e, elements = 0; 3816 struct skb_frag_struct *frag; 3817 char *data; 3818 3819 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3820 frag = &skb_shinfo(skb)->frags[cnt]; 3821 data = (char *)page_to_phys(skb_frag_page(frag)) + 3822 frag->page_offset; 3823 length = frag->size; 3824 e = PFN_UP((unsigned long)data + length - 1) - 3825 PFN_DOWN((unsigned long)data); 3826 elements += e; 3827 } 3828 return elements; 3829 } 3830 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); 3831 3832 int qeth_get_elements_no(struct qeth_card *card, 3833 struct sk_buff *skb, int elems) 3834 { 3835 int dlen = skb->len - skb->data_len; 3836 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3837 PFN_DOWN((unsigned long)skb->data); 3838 3839 elements_needed += qeth_get_elements_for_frags(skb); 3840 3841 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3842 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3843 "(Number=%d / Length=%d). Discarded.\n", 3844 (elements_needed+elems), skb->len); 3845 return 0; 3846 } 3847 return elements_needed; 3848 } 3849 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3850 3851 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len) 3852 { 3853 int hroom, inpage, rest; 3854 3855 if (((unsigned long)skb->data & PAGE_MASK) != 3856 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3857 hroom = skb_headroom(skb); 3858 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3859 rest = len - inpage; 3860 if (rest > hroom) 3861 return 1; 3862 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3863 skb->data -= rest; 3864 skb->tail -= rest; 3865 *hdr = (struct qeth_hdr *)skb->data; 3866 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3867 } 3868 return 0; 3869 } 3870 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3871 3872 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3873 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3874 int offset) 3875 { 3876 int length = skb->len - skb->data_len; 3877 int length_here; 3878 int element; 3879 char *data; 3880 int first_lap, cnt; 3881 struct skb_frag_struct *frag; 3882 3883 element = *next_element_to_fill; 3884 data = skb->data; 3885 first_lap = (is_tso == 0 ? 1 : 0); 3886 3887 if (offset >= 0) { 3888 data = skb->data + offset; 3889 length -= offset; 3890 first_lap = 0; 3891 } 3892 3893 while (length > 0) { 3894 /* length_here is the remaining amount of data in this page */ 3895 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3896 if (length < length_here) 3897 length_here = length; 3898 3899 buffer->element[element].addr = data; 3900 buffer->element[element].length = length_here; 3901 length -= length_here; 3902 if (!length) { 3903 if (first_lap) 3904 if (skb_shinfo(skb)->nr_frags) 3905 buffer->element[element].eflags = 3906 SBAL_EFLAGS_FIRST_FRAG; 3907 else 3908 buffer->element[element].eflags = 0; 3909 else 3910 buffer->element[element].eflags = 3911 SBAL_EFLAGS_MIDDLE_FRAG; 3912 } else { 3913 if (first_lap) 3914 buffer->element[element].eflags = 3915 SBAL_EFLAGS_FIRST_FRAG; 3916 else 3917 buffer->element[element].eflags = 3918 SBAL_EFLAGS_MIDDLE_FRAG; 3919 } 3920 data += length_here; 3921 element++; 3922 first_lap = 0; 3923 } 3924 3925 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3926 frag = &skb_shinfo(skb)->frags[cnt]; 3927 data = (char *)page_to_phys(skb_frag_page(frag)) + 3928 frag->page_offset; 3929 length = frag->size; 3930 while (length > 0) { 3931 length_here = PAGE_SIZE - 3932 ((unsigned long) data % PAGE_SIZE); 3933 if (length < length_here) 3934 length_here = length; 3935 3936 buffer->element[element].addr = data; 3937 buffer->element[element].length = length_here; 3938 buffer->element[element].eflags = 3939 SBAL_EFLAGS_MIDDLE_FRAG; 3940 length -= length_here; 3941 data += length_here; 3942 element++; 3943 } 3944 } 3945 3946 if (buffer->element[element - 1].eflags) 3947 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3948 *next_element_to_fill = element; 3949 } 3950 3951 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3952 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3953 struct qeth_hdr *hdr, int offset, int hd_len) 3954 { 3955 struct qdio_buffer *buffer; 3956 int flush_cnt = 0, hdr_len, large_send = 0; 3957 3958 buffer = buf->buffer; 3959 atomic_inc(&skb->users); 3960 skb_queue_tail(&buf->skb_list, skb); 3961 3962 /*check first on TSO ....*/ 3963 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3964 int element = buf->next_element_to_fill; 3965 3966 hdr_len = sizeof(struct qeth_hdr_tso) + 3967 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3968 /*fill first buffer entry only with header information */ 3969 buffer->element[element].addr = skb->data; 3970 buffer->element[element].length = hdr_len; 3971 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3972 buf->next_element_to_fill++; 3973 skb->data += hdr_len; 3974 skb->len -= hdr_len; 3975 large_send = 1; 3976 } 3977 3978 if (offset >= 0) { 3979 int element = buf->next_element_to_fill; 3980 buffer->element[element].addr = hdr; 3981 buffer->element[element].length = sizeof(struct qeth_hdr) + 3982 hd_len; 3983 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3984 buf->is_header[element] = 1; 3985 buf->next_element_to_fill++; 3986 } 3987 3988 __qeth_fill_buffer(skb, buffer, large_send, 3989 (int *)&buf->next_element_to_fill, offset); 3990 3991 if (!queue->do_pack) { 3992 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3993 /* set state to PRIMED -> will be flushed */ 3994 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3995 flush_cnt = 1; 3996 } else { 3997 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3998 if (queue->card->options.performance_stats) 3999 queue->card->perf_stats.skbs_sent_pack++; 4000 if (buf->next_element_to_fill >= 4001 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 4002 /* 4003 * packed buffer if full -> set state PRIMED 4004 * -> will be flushed 4005 */ 4006 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 4007 flush_cnt = 1; 4008 } 4009 } 4010 return flush_cnt; 4011 } 4012 4013 int qeth_do_send_packet_fast(struct qeth_card *card, 4014 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 4015 struct qeth_hdr *hdr, int elements_needed, 4016 int offset, int hd_len) 4017 { 4018 struct qeth_qdio_out_buffer *buffer; 4019 int index; 4020 4021 /* spin until we get the queue ... */ 4022 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 4023 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 4024 /* ... now we've got the queue */ 4025 index = queue->next_buf_to_fill; 4026 buffer = queue->bufs[queue->next_buf_to_fill]; 4027 /* 4028 * check if buffer is empty to make sure that we do not 'overtake' 4029 * ourselves and try to fill a buffer that is already primed 4030 */ 4031 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 4032 goto out; 4033 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 4034 QDIO_MAX_BUFFERS_PER_Q; 4035 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4036 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 4037 qeth_flush_buffers(queue, index, 1); 4038 return 0; 4039 out: 4040 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4041 return -EBUSY; 4042 } 4043 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 4044 4045 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 4046 struct sk_buff *skb, struct qeth_hdr *hdr, 4047 int elements_needed) 4048 { 4049 struct qeth_qdio_out_buffer *buffer; 4050 int start_index; 4051 int flush_count = 0; 4052 int do_pack = 0; 4053 int tmp; 4054 int rc = 0; 4055 4056 /* spin until we get the queue ... */ 4057 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 4058 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 4059 start_index = queue->next_buf_to_fill; 4060 buffer = queue->bufs[queue->next_buf_to_fill]; 4061 /* 4062 * check if buffer is empty to make sure that we do not 'overtake' 4063 * ourselves and try to fill a buffer that is already primed 4064 */ 4065 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 4066 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4067 return -EBUSY; 4068 } 4069 /* check if we need to switch packing state of this queue */ 4070 qeth_switch_to_packing_if_needed(queue); 4071 if (queue->do_pack) { 4072 do_pack = 1; 4073 /* does packet fit in current buffer? */ 4074 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 4075 buffer->next_element_to_fill) < elements_needed) { 4076 /* ... no -> set state PRIMED */ 4077 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 4078 flush_count++; 4079 queue->next_buf_to_fill = 4080 (queue->next_buf_to_fill + 1) % 4081 QDIO_MAX_BUFFERS_PER_Q; 4082 buffer = queue->bufs[queue->next_buf_to_fill]; 4083 /* we did a step forward, so check buffer state 4084 * again */ 4085 if (atomic_read(&buffer->state) != 4086 QETH_QDIO_BUF_EMPTY) { 4087 qeth_flush_buffers(queue, start_index, 4088 flush_count); 4089 atomic_set(&queue->state, 4090 QETH_OUT_Q_UNLOCKED); 4091 return -EBUSY; 4092 } 4093 } 4094 } 4095 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 4096 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 4097 QDIO_MAX_BUFFERS_PER_Q; 4098 flush_count += tmp; 4099 if (flush_count) 4100 qeth_flush_buffers(queue, start_index, flush_count); 4101 else if (!atomic_read(&queue->set_pci_flags_count)) 4102 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 4103 /* 4104 * queue->state will go from LOCKED -> UNLOCKED or from 4105 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 4106 * (switch packing state or flush buffer to get another pci flag out). 4107 * In that case we will enter this loop 4108 */ 4109 while (atomic_dec_return(&queue->state)) { 4110 flush_count = 0; 4111 start_index = queue->next_buf_to_fill; 4112 /* check if we can go back to non-packing state */ 4113 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 4114 /* 4115 * check if we need to flush a packing buffer to get a pci 4116 * flag out on the queue 4117 */ 4118 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 4119 flush_count += qeth_flush_buffers_on_no_pci(queue); 4120 if (flush_count) 4121 qeth_flush_buffers(queue, start_index, flush_count); 4122 } 4123 /* at this point the queue is UNLOCKED again */ 4124 if (queue->card->options.performance_stats && do_pack) 4125 queue->card->perf_stats.bufs_sent_pack += flush_count; 4126 4127 return rc; 4128 } 4129 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 4130 4131 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 4132 struct qeth_reply *reply, unsigned long data) 4133 { 4134 struct qeth_ipa_cmd *cmd; 4135 struct qeth_ipacmd_setadpparms *setparms; 4136 4137 QETH_CARD_TEXT(card, 4, "prmadpcb"); 4138 4139 cmd = (struct qeth_ipa_cmd *) data; 4140 setparms = &(cmd->data.setadapterparms); 4141 4142 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 4143 if (cmd->hdr.return_code) { 4144 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code); 4145 setparms->data.mode = SET_PROMISC_MODE_OFF; 4146 } 4147 card->info.promisc_mode = setparms->data.mode; 4148 return 0; 4149 } 4150 4151 void qeth_setadp_promisc_mode(struct qeth_card *card) 4152 { 4153 enum qeth_ipa_promisc_modes mode; 4154 struct net_device *dev = card->dev; 4155 struct qeth_cmd_buffer *iob; 4156 struct qeth_ipa_cmd *cmd; 4157 4158 QETH_CARD_TEXT(card, 4, "setprom"); 4159 4160 if (((dev->flags & IFF_PROMISC) && 4161 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 4162 (!(dev->flags & IFF_PROMISC) && 4163 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4164 return; 4165 mode = SET_PROMISC_MODE_OFF; 4166 if (dev->flags & IFF_PROMISC) 4167 mode = SET_PROMISC_MODE_ON; 4168 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4169 4170 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4171 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8); 4172 if (!iob) 4173 return; 4174 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4175 cmd->data.setadapterparms.data.mode = mode; 4176 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4177 } 4178 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4179 4180 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4181 { 4182 struct qeth_card *card; 4183 char dbf_text[15]; 4184 4185 card = dev->ml_priv; 4186 4187 QETH_CARD_TEXT(card, 4, "chgmtu"); 4188 sprintf(dbf_text, "%8x", new_mtu); 4189 QETH_CARD_TEXT(card, 4, dbf_text); 4190 4191 if (new_mtu < 64) 4192 return -EINVAL; 4193 if (new_mtu > 65535) 4194 return -EINVAL; 4195 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 4196 (!qeth_mtu_is_valid(card, new_mtu))) 4197 return -EINVAL; 4198 dev->mtu = new_mtu; 4199 return 0; 4200 } 4201 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4202 4203 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4204 { 4205 struct qeth_card *card; 4206 4207 card = dev->ml_priv; 4208 4209 QETH_CARD_TEXT(card, 5, "getstat"); 4210 4211 return &card->stats; 4212 } 4213 EXPORT_SYMBOL_GPL(qeth_get_stats); 4214 4215 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4216 struct qeth_reply *reply, unsigned long data) 4217 { 4218 struct qeth_ipa_cmd *cmd; 4219 4220 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4221 4222 cmd = (struct qeth_ipa_cmd *) data; 4223 if (!card->options.layer2 || 4224 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4225 memcpy(card->dev->dev_addr, 4226 &cmd->data.setadapterparms.data.change_addr.addr, 4227 OSA_ADDR_LEN); 4228 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4229 } 4230 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4231 return 0; 4232 } 4233 4234 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4235 { 4236 int rc; 4237 struct qeth_cmd_buffer *iob; 4238 struct qeth_ipa_cmd *cmd; 4239 4240 QETH_CARD_TEXT(card, 4, "chgmac"); 4241 4242 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4243 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4244 sizeof(struct qeth_change_addr)); 4245 if (!iob) 4246 return -ENOMEM; 4247 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4248 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4249 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4250 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4251 card->dev->dev_addr, OSA_ADDR_LEN); 4252 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4253 NULL); 4254 return rc; 4255 } 4256 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4257 4258 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4259 struct qeth_reply *reply, unsigned long data) 4260 { 4261 struct qeth_ipa_cmd *cmd; 4262 struct qeth_set_access_ctrl *access_ctrl_req; 4263 int fallback = *(int *)reply->param; 4264 4265 QETH_CARD_TEXT(card, 4, "setaccb"); 4266 4267 cmd = (struct qeth_ipa_cmd *) data; 4268 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4269 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4270 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4271 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4272 cmd->data.setadapterparms.hdr.return_code); 4273 if (cmd->data.setadapterparms.hdr.return_code != 4274 SET_ACCESS_CTRL_RC_SUCCESS) 4275 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4276 card->gdev->dev.kobj.name, 4277 access_ctrl_req->subcmd_code, 4278 cmd->data.setadapterparms.hdr.return_code); 4279 switch (cmd->data.setadapterparms.hdr.return_code) { 4280 case SET_ACCESS_CTRL_RC_SUCCESS: 4281 if (card->options.isolation == ISOLATION_MODE_NONE) { 4282 dev_info(&card->gdev->dev, 4283 "QDIO data connection isolation is deactivated\n"); 4284 } else { 4285 dev_info(&card->gdev->dev, 4286 "QDIO data connection isolation is activated\n"); 4287 } 4288 break; 4289 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4290 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4291 "deactivated\n", dev_name(&card->gdev->dev)); 4292 if (fallback) 4293 card->options.isolation = card->options.prev_isolation; 4294 break; 4295 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4296 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4297 " activated\n", dev_name(&card->gdev->dev)); 4298 if (fallback) 4299 card->options.isolation = card->options.prev_isolation; 4300 break; 4301 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4302 dev_err(&card->gdev->dev, "Adapter does not " 4303 "support QDIO data connection isolation\n"); 4304 break; 4305 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4306 dev_err(&card->gdev->dev, 4307 "Adapter is dedicated. " 4308 "QDIO data connection isolation not supported\n"); 4309 if (fallback) 4310 card->options.isolation = card->options.prev_isolation; 4311 break; 4312 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4313 dev_err(&card->gdev->dev, 4314 "TSO does not permit QDIO data connection isolation\n"); 4315 if (fallback) 4316 card->options.isolation = card->options.prev_isolation; 4317 break; 4318 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4319 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4320 "support reflective relay mode\n"); 4321 if (fallback) 4322 card->options.isolation = card->options.prev_isolation; 4323 break; 4324 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4325 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4326 "enabled at the adjacent switch port"); 4327 if (fallback) 4328 card->options.isolation = card->options.prev_isolation; 4329 break; 4330 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4331 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4332 "at the adjacent switch failed\n"); 4333 break; 4334 default: 4335 /* this should never happen */ 4336 if (fallback) 4337 card->options.isolation = card->options.prev_isolation; 4338 break; 4339 } 4340 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4341 return 0; 4342 } 4343 4344 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4345 enum qeth_ipa_isolation_modes isolation, int fallback) 4346 { 4347 int rc; 4348 struct qeth_cmd_buffer *iob; 4349 struct qeth_ipa_cmd *cmd; 4350 struct qeth_set_access_ctrl *access_ctrl_req; 4351 4352 QETH_CARD_TEXT(card, 4, "setacctl"); 4353 4354 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4355 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4356 4357 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4358 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4359 sizeof(struct qeth_set_access_ctrl)); 4360 if (!iob) 4361 return -ENOMEM; 4362 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4363 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4364 access_ctrl_req->subcmd_code = isolation; 4365 4366 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4367 &fallback); 4368 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4369 return rc; 4370 } 4371 4372 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4373 { 4374 int rc = 0; 4375 4376 QETH_CARD_TEXT(card, 4, "setactlo"); 4377 4378 if ((card->info.type == QETH_CARD_TYPE_OSD || 4379 card->info.type == QETH_CARD_TYPE_OSX) && 4380 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4381 rc = qeth_setadpparms_set_access_ctrl(card, 4382 card->options.isolation, fallback); 4383 if (rc) { 4384 QETH_DBF_MESSAGE(3, 4385 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4386 card->gdev->dev.kobj.name, 4387 rc); 4388 rc = -EOPNOTSUPP; 4389 } 4390 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4391 card->options.isolation = ISOLATION_MODE_NONE; 4392 4393 dev_err(&card->gdev->dev, "Adapter does not " 4394 "support QDIO data connection isolation\n"); 4395 rc = -EOPNOTSUPP; 4396 } 4397 return rc; 4398 } 4399 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4400 4401 void qeth_tx_timeout(struct net_device *dev) 4402 { 4403 struct qeth_card *card; 4404 4405 card = dev->ml_priv; 4406 QETH_CARD_TEXT(card, 4, "txtimeo"); 4407 card->stats.tx_errors++; 4408 qeth_schedule_recovery(card); 4409 } 4410 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4411 4412 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4413 { 4414 struct qeth_card *card = dev->ml_priv; 4415 int rc = 0; 4416 4417 switch (regnum) { 4418 case MII_BMCR: /* Basic mode control register */ 4419 rc = BMCR_FULLDPLX; 4420 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4421 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4422 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4423 rc |= BMCR_SPEED100; 4424 break; 4425 case MII_BMSR: /* Basic mode status register */ 4426 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4427 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4428 BMSR_100BASE4; 4429 break; 4430 case MII_PHYSID1: /* PHYS ID 1 */ 4431 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4432 dev->dev_addr[2]; 4433 rc = (rc >> 5) & 0xFFFF; 4434 break; 4435 case MII_PHYSID2: /* PHYS ID 2 */ 4436 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4437 break; 4438 case MII_ADVERTISE: /* Advertisement control reg */ 4439 rc = ADVERTISE_ALL; 4440 break; 4441 case MII_LPA: /* Link partner ability reg */ 4442 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4443 LPA_100BASE4 | LPA_LPACK; 4444 break; 4445 case MII_EXPANSION: /* Expansion register */ 4446 break; 4447 case MII_DCOUNTER: /* disconnect counter */ 4448 break; 4449 case MII_FCSCOUNTER: /* false carrier counter */ 4450 break; 4451 case MII_NWAYTEST: /* N-way auto-neg test register */ 4452 break; 4453 case MII_RERRCOUNTER: /* rx error counter */ 4454 rc = card->stats.rx_errors; 4455 break; 4456 case MII_SREVISION: /* silicon revision */ 4457 break; 4458 case MII_RESV1: /* reserved 1 */ 4459 break; 4460 case MII_LBRERROR: /* loopback, rx, bypass error */ 4461 break; 4462 case MII_PHYADDR: /* physical address */ 4463 break; 4464 case MII_RESV2: /* reserved 2 */ 4465 break; 4466 case MII_TPISTATUS: /* TPI status for 10mbps */ 4467 break; 4468 case MII_NCONFIG: /* network interface config */ 4469 break; 4470 default: 4471 break; 4472 } 4473 return rc; 4474 } 4475 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4476 4477 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4478 struct qeth_cmd_buffer *iob, int len, 4479 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4480 unsigned long), 4481 void *reply_param) 4482 { 4483 u16 s1, s2; 4484 4485 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4486 4487 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4488 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4489 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4490 /* adjust PDU length fields in IPA_PDU_HEADER */ 4491 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4492 s2 = (u32) len; 4493 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4494 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4495 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4496 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4497 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4498 reply_cb, reply_param); 4499 } 4500 4501 static int qeth_snmp_command_cb(struct qeth_card *card, 4502 struct qeth_reply *reply, unsigned long sdata) 4503 { 4504 struct qeth_ipa_cmd *cmd; 4505 struct qeth_arp_query_info *qinfo; 4506 struct qeth_snmp_cmd *snmp; 4507 unsigned char *data; 4508 __u16 data_len; 4509 4510 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4511 4512 cmd = (struct qeth_ipa_cmd *) sdata; 4513 data = (unsigned char *)((char *)cmd - reply->offset); 4514 qinfo = (struct qeth_arp_query_info *) reply->param; 4515 snmp = &cmd->data.setadapterparms.data.snmp; 4516 4517 if (cmd->hdr.return_code) { 4518 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code); 4519 return 0; 4520 } 4521 if (cmd->data.setadapterparms.hdr.return_code) { 4522 cmd->hdr.return_code = 4523 cmd->data.setadapterparms.hdr.return_code; 4524 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code); 4525 return 0; 4526 } 4527 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4528 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4529 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4530 else 4531 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4532 4533 /* check if there is enough room in userspace */ 4534 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4535 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4536 cmd->hdr.return_code = IPA_RC_ENOMEM; 4537 return 0; 4538 } 4539 QETH_CARD_TEXT_(card, 4, "snore%i", 4540 cmd->data.setadapterparms.hdr.used_total); 4541 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4542 cmd->data.setadapterparms.hdr.seq_no); 4543 /*copy entries to user buffer*/ 4544 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4545 memcpy(qinfo->udata + qinfo->udata_offset, 4546 (char *)snmp, 4547 data_len + offsetof(struct qeth_snmp_cmd, data)); 4548 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4549 } else { 4550 memcpy(qinfo->udata + qinfo->udata_offset, 4551 (char *)&snmp->request, data_len); 4552 } 4553 qinfo->udata_offset += data_len; 4554 /* check if all replies received ... */ 4555 QETH_CARD_TEXT_(card, 4, "srtot%i", 4556 cmd->data.setadapterparms.hdr.used_total); 4557 QETH_CARD_TEXT_(card, 4, "srseq%i", 4558 cmd->data.setadapterparms.hdr.seq_no); 4559 if (cmd->data.setadapterparms.hdr.seq_no < 4560 cmd->data.setadapterparms.hdr.used_total) 4561 return 1; 4562 return 0; 4563 } 4564 4565 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4566 { 4567 struct qeth_cmd_buffer *iob; 4568 struct qeth_ipa_cmd *cmd; 4569 struct qeth_snmp_ureq *ureq; 4570 unsigned int req_len; 4571 struct qeth_arp_query_info qinfo = {0, }; 4572 int rc = 0; 4573 4574 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4575 4576 if (card->info.guestlan) 4577 return -EOPNOTSUPP; 4578 4579 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4580 (!card->options.layer2)) { 4581 return -EOPNOTSUPP; 4582 } 4583 /* skip 4 bytes (data_len struct member) to get req_len */ 4584 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4585 return -EFAULT; 4586 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE - 4587 sizeof(struct qeth_ipacmd_hdr) - 4588 sizeof(struct qeth_ipacmd_setadpparms_hdr))) 4589 return -EINVAL; 4590 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4591 if (IS_ERR(ureq)) { 4592 QETH_CARD_TEXT(card, 2, "snmpnome"); 4593 return PTR_ERR(ureq); 4594 } 4595 qinfo.udata_len = ureq->hdr.data_len; 4596 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4597 if (!qinfo.udata) { 4598 kfree(ureq); 4599 return -ENOMEM; 4600 } 4601 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4602 4603 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4604 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4605 if (!iob) { 4606 rc = -ENOMEM; 4607 goto out; 4608 } 4609 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4610 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4611 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4612 qeth_snmp_command_cb, (void *)&qinfo); 4613 if (rc) 4614 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4615 QETH_CARD_IFNAME(card), rc); 4616 else { 4617 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4618 rc = -EFAULT; 4619 } 4620 out: 4621 kfree(ureq); 4622 kfree(qinfo.udata); 4623 return rc; 4624 } 4625 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4626 4627 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4628 struct qeth_reply *reply, unsigned long data) 4629 { 4630 struct qeth_ipa_cmd *cmd; 4631 struct qeth_qoat_priv *priv; 4632 char *resdata; 4633 int resdatalen; 4634 4635 QETH_CARD_TEXT(card, 3, "qoatcb"); 4636 4637 cmd = (struct qeth_ipa_cmd *)data; 4638 priv = (struct qeth_qoat_priv *)reply->param; 4639 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4640 resdata = (char *)data + 28; 4641 4642 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4643 cmd->hdr.return_code = IPA_RC_FFFF; 4644 return 0; 4645 } 4646 4647 memcpy((priv->buffer + priv->response_len), resdata, 4648 resdatalen); 4649 priv->response_len += resdatalen; 4650 4651 if (cmd->data.setadapterparms.hdr.seq_no < 4652 cmd->data.setadapterparms.hdr.used_total) 4653 return 1; 4654 return 0; 4655 } 4656 4657 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4658 { 4659 int rc = 0; 4660 struct qeth_cmd_buffer *iob; 4661 struct qeth_ipa_cmd *cmd; 4662 struct qeth_query_oat *oat_req; 4663 struct qeth_query_oat_data oat_data; 4664 struct qeth_qoat_priv priv; 4665 void __user *tmp; 4666 4667 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4668 4669 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4670 rc = -EOPNOTSUPP; 4671 goto out; 4672 } 4673 4674 if (copy_from_user(&oat_data, udata, 4675 sizeof(struct qeth_query_oat_data))) { 4676 rc = -EFAULT; 4677 goto out; 4678 } 4679 4680 priv.buffer_len = oat_data.buffer_len; 4681 priv.response_len = 0; 4682 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4683 if (!priv.buffer) { 4684 rc = -ENOMEM; 4685 goto out; 4686 } 4687 4688 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4689 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4690 sizeof(struct qeth_query_oat)); 4691 if (!iob) { 4692 rc = -ENOMEM; 4693 goto out_free; 4694 } 4695 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4696 oat_req = &cmd->data.setadapterparms.data.query_oat; 4697 oat_req->subcmd_code = oat_data.command; 4698 4699 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4700 &priv); 4701 if (!rc) { 4702 if (is_compat_task()) 4703 tmp = compat_ptr(oat_data.ptr); 4704 else 4705 tmp = (void __user *)(unsigned long)oat_data.ptr; 4706 4707 if (copy_to_user(tmp, priv.buffer, 4708 priv.response_len)) { 4709 rc = -EFAULT; 4710 goto out_free; 4711 } 4712 4713 oat_data.response_len = priv.response_len; 4714 4715 if (copy_to_user(udata, &oat_data, 4716 sizeof(struct qeth_query_oat_data))) 4717 rc = -EFAULT; 4718 } else 4719 if (rc == IPA_RC_FFFF) 4720 rc = -EFAULT; 4721 4722 out_free: 4723 kfree(priv.buffer); 4724 out: 4725 return rc; 4726 } 4727 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4728 4729 static int qeth_query_card_info_cb(struct qeth_card *card, 4730 struct qeth_reply *reply, unsigned long data) 4731 { 4732 struct qeth_ipa_cmd *cmd; 4733 struct qeth_query_card_info *card_info; 4734 struct carrier_info *carrier_info; 4735 4736 QETH_CARD_TEXT(card, 2, "qcrdincb"); 4737 carrier_info = (struct carrier_info *)reply->param; 4738 cmd = (struct qeth_ipa_cmd *)data; 4739 card_info = &cmd->data.setadapterparms.data.card_info; 4740 if (cmd->data.setadapterparms.hdr.return_code == 0) { 4741 carrier_info->card_type = card_info->card_type; 4742 carrier_info->port_mode = card_info->port_mode; 4743 carrier_info->port_speed = card_info->port_speed; 4744 } 4745 4746 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4747 return 0; 4748 } 4749 4750 static int qeth_query_card_info(struct qeth_card *card, 4751 struct carrier_info *carrier_info) 4752 { 4753 struct qeth_cmd_buffer *iob; 4754 4755 QETH_CARD_TEXT(card, 2, "qcrdinfo"); 4756 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO)) 4757 return -EOPNOTSUPP; 4758 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO, 4759 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 4760 if (!iob) 4761 return -ENOMEM; 4762 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb, 4763 (void *)carrier_info); 4764 } 4765 4766 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4767 { 4768 switch (card->info.type) { 4769 case QETH_CARD_TYPE_IQD: 4770 return 2; 4771 default: 4772 return 0; 4773 } 4774 } 4775 4776 static void qeth_determine_capabilities(struct qeth_card *card) 4777 { 4778 int rc; 4779 int length; 4780 char *prcd; 4781 struct ccw_device *ddev; 4782 int ddev_offline = 0; 4783 4784 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4785 ddev = CARD_DDEV(card); 4786 if (!ddev->online) { 4787 ddev_offline = 1; 4788 rc = ccw_device_set_online(ddev); 4789 if (rc) { 4790 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4791 goto out; 4792 } 4793 } 4794 4795 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4796 if (rc) { 4797 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4798 dev_name(&card->gdev->dev), rc); 4799 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4800 goto out_offline; 4801 } 4802 qeth_configure_unitaddr(card, prcd); 4803 if (ddev_offline) 4804 qeth_configure_blkt_default(card, prcd); 4805 kfree(prcd); 4806 4807 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4808 if (rc) 4809 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4810 4811 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4812 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4813 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4814 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4815 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4816 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4817 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4818 dev_info(&card->gdev->dev, 4819 "Completion Queueing supported\n"); 4820 } else { 4821 card->options.cq = QETH_CQ_NOTAVAILABLE; 4822 } 4823 4824 4825 out_offline: 4826 if (ddev_offline == 1) 4827 ccw_device_set_offline(ddev); 4828 out: 4829 return; 4830 } 4831 4832 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4833 struct qdio_buffer **in_sbal_ptrs, 4834 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4835 int i; 4836 4837 if (card->options.cq == QETH_CQ_ENABLED) { 4838 int offset = QDIO_MAX_BUFFERS_PER_Q * 4839 (card->qdio.no_in_queues - 1); 4840 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4841 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4842 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4843 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4844 } 4845 4846 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4847 } 4848 } 4849 4850 static int qeth_qdio_establish(struct qeth_card *card) 4851 { 4852 struct qdio_initialize init_data; 4853 char *qib_param_field; 4854 struct qdio_buffer **in_sbal_ptrs; 4855 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4856 struct qdio_buffer **out_sbal_ptrs; 4857 int i, j, k; 4858 int rc = 0; 4859 4860 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4861 4862 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4863 GFP_KERNEL); 4864 if (!qib_param_field) { 4865 rc = -ENOMEM; 4866 goto out_free_nothing; 4867 } 4868 4869 qeth_create_qib_param_field(card, qib_param_field); 4870 qeth_create_qib_param_field_blkt(card, qib_param_field); 4871 4872 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4873 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4874 GFP_KERNEL); 4875 if (!in_sbal_ptrs) { 4876 rc = -ENOMEM; 4877 goto out_free_qib_param; 4878 } 4879 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4880 in_sbal_ptrs[i] = (struct qdio_buffer *) 4881 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4882 } 4883 4884 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4885 GFP_KERNEL); 4886 if (!queue_start_poll) { 4887 rc = -ENOMEM; 4888 goto out_free_in_sbals; 4889 } 4890 for (i = 0; i < card->qdio.no_in_queues; ++i) 4891 queue_start_poll[i] = card->discipline->start_poll; 4892 4893 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4894 4895 out_sbal_ptrs = 4896 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4897 sizeof(void *), GFP_KERNEL); 4898 if (!out_sbal_ptrs) { 4899 rc = -ENOMEM; 4900 goto out_free_queue_start_poll; 4901 } 4902 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4903 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4904 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4905 card->qdio.out_qs[i]->bufs[j]->buffer); 4906 } 4907 4908 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4909 init_data.cdev = CARD_DDEV(card); 4910 init_data.q_format = qeth_get_qdio_q_format(card); 4911 init_data.qib_param_field_format = 0; 4912 init_data.qib_param_field = qib_param_field; 4913 init_data.no_input_qs = card->qdio.no_in_queues; 4914 init_data.no_output_qs = card->qdio.no_out_queues; 4915 init_data.input_handler = card->discipline->input_handler; 4916 init_data.output_handler = card->discipline->output_handler; 4917 init_data.queue_start_poll_array = queue_start_poll; 4918 init_data.int_parm = (unsigned long) card; 4919 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4920 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4921 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4922 init_data.scan_threshold = 4923 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 4924 4925 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4926 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4927 rc = qdio_allocate(&init_data); 4928 if (rc) { 4929 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4930 goto out; 4931 } 4932 rc = qdio_establish(&init_data); 4933 if (rc) { 4934 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4935 qdio_free(CARD_DDEV(card)); 4936 } 4937 } 4938 4939 switch (card->options.cq) { 4940 case QETH_CQ_ENABLED: 4941 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4942 break; 4943 case QETH_CQ_DISABLED: 4944 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4945 break; 4946 default: 4947 break; 4948 } 4949 out: 4950 kfree(out_sbal_ptrs); 4951 out_free_queue_start_poll: 4952 kfree(queue_start_poll); 4953 out_free_in_sbals: 4954 kfree(in_sbal_ptrs); 4955 out_free_qib_param: 4956 kfree(qib_param_field); 4957 out_free_nothing: 4958 return rc; 4959 } 4960 4961 static void qeth_core_free_card(struct qeth_card *card) 4962 { 4963 4964 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4965 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4966 qeth_clean_channel(&card->read); 4967 qeth_clean_channel(&card->write); 4968 if (card->dev) 4969 free_netdev(card->dev); 4970 kfree(card->ip_tbd_list); 4971 qeth_free_qdio_buffers(card); 4972 unregister_service_level(&card->qeth_service_level); 4973 kfree(card); 4974 } 4975 4976 void qeth_trace_features(struct qeth_card *card) 4977 { 4978 QETH_CARD_TEXT(card, 2, "features"); 4979 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4)); 4980 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6)); 4981 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp)); 4982 QETH_CARD_HEX(card, 2, &card->info.diagass_support, 4983 sizeof(card->info.diagass_support)); 4984 } 4985 EXPORT_SYMBOL_GPL(qeth_trace_features); 4986 4987 static struct ccw_device_id qeth_ids[] = { 4988 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4989 .driver_info = QETH_CARD_TYPE_OSD}, 4990 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4991 .driver_info = QETH_CARD_TYPE_IQD}, 4992 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4993 .driver_info = QETH_CARD_TYPE_OSN}, 4994 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4995 .driver_info = QETH_CARD_TYPE_OSM}, 4996 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4997 .driver_info = QETH_CARD_TYPE_OSX}, 4998 {}, 4999 }; 5000 MODULE_DEVICE_TABLE(ccw, qeth_ids); 5001 5002 static struct ccw_driver qeth_ccw_driver = { 5003 .driver = { 5004 .owner = THIS_MODULE, 5005 .name = "qeth", 5006 }, 5007 .ids = qeth_ids, 5008 .probe = ccwgroup_probe_ccwdev, 5009 .remove = ccwgroup_remove_ccwdev, 5010 }; 5011 5012 int qeth_core_hardsetup_card(struct qeth_card *card) 5013 { 5014 int retries = 3; 5015 int rc; 5016 5017 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 5018 atomic_set(&card->force_alloc_skb, 0); 5019 qeth_update_from_chp_desc(card); 5020 retry: 5021 if (retries < 3) 5022 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 5023 dev_name(&card->gdev->dev)); 5024 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 5025 ccw_device_set_offline(CARD_DDEV(card)); 5026 ccw_device_set_offline(CARD_WDEV(card)); 5027 ccw_device_set_offline(CARD_RDEV(card)); 5028 qdio_free(CARD_DDEV(card)); 5029 rc = ccw_device_set_online(CARD_RDEV(card)); 5030 if (rc) 5031 goto retriable; 5032 rc = ccw_device_set_online(CARD_WDEV(card)); 5033 if (rc) 5034 goto retriable; 5035 rc = ccw_device_set_online(CARD_DDEV(card)); 5036 if (rc) 5037 goto retriable; 5038 retriable: 5039 if (rc == -ERESTARTSYS) { 5040 QETH_DBF_TEXT(SETUP, 2, "break1"); 5041 return rc; 5042 } else if (rc) { 5043 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 5044 if (--retries < 0) 5045 goto out; 5046 else 5047 goto retry; 5048 } 5049 qeth_determine_capabilities(card); 5050 qeth_init_tokens(card); 5051 qeth_init_func_level(card); 5052 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 5053 if (rc == -ERESTARTSYS) { 5054 QETH_DBF_TEXT(SETUP, 2, "break2"); 5055 return rc; 5056 } else if (rc) { 5057 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5058 if (--retries < 0) 5059 goto out; 5060 else 5061 goto retry; 5062 } 5063 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 5064 if (rc == -ERESTARTSYS) { 5065 QETH_DBF_TEXT(SETUP, 2, "break3"); 5066 return rc; 5067 } else if (rc) { 5068 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 5069 if (--retries < 0) 5070 goto out; 5071 else 5072 goto retry; 5073 } 5074 card->read_or_write_problem = 0; 5075 rc = qeth_mpc_initialize(card); 5076 if (rc) { 5077 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 5078 goto out; 5079 } 5080 5081 card->options.ipa4.supported_funcs = 0; 5082 card->options.ipa6.supported_funcs = 0; 5083 card->options.adp.supported_funcs = 0; 5084 card->options.sbp.supported_funcs = 0; 5085 card->info.diagass_support = 0; 5086 rc = qeth_query_ipassists(card, QETH_PROT_IPV4); 5087 if (rc == -ENOMEM) 5088 goto out; 5089 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) { 5090 rc = qeth_query_setadapterparms(card); 5091 if (rc < 0) { 5092 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 5093 goto out; 5094 } 5095 } 5096 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) { 5097 rc = qeth_query_setdiagass(card); 5098 if (rc < 0) { 5099 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 5100 goto out; 5101 } 5102 } 5103 return 0; 5104 out: 5105 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 5106 "an error on the device\n"); 5107 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 5108 dev_name(&card->gdev->dev), rc); 5109 return rc; 5110 } 5111 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 5112 5113 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 5114 struct qdio_buffer_element *element, 5115 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 5116 { 5117 struct page *page = virt_to_page(element->addr); 5118 if (*pskb == NULL) { 5119 if (qethbuffer->rx_skb) { 5120 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 5121 *pskb = qethbuffer->rx_skb; 5122 qethbuffer->rx_skb = NULL; 5123 } else { 5124 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 5125 if (!(*pskb)) 5126 return -ENOMEM; 5127 } 5128 5129 skb_reserve(*pskb, ETH_HLEN); 5130 if (data_len <= QETH_RX_PULL_LEN) { 5131 memcpy(skb_put(*pskb, data_len), element->addr + offset, 5132 data_len); 5133 } else { 5134 get_page(page); 5135 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 5136 element->addr + offset, QETH_RX_PULL_LEN); 5137 skb_fill_page_desc(*pskb, *pfrag, page, 5138 offset + QETH_RX_PULL_LEN, 5139 data_len - QETH_RX_PULL_LEN); 5140 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 5141 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 5142 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 5143 (*pfrag)++; 5144 } 5145 } else { 5146 get_page(page); 5147 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 5148 (*pskb)->data_len += data_len; 5149 (*pskb)->len += data_len; 5150 (*pskb)->truesize += data_len; 5151 (*pfrag)++; 5152 } 5153 5154 5155 return 0; 5156 } 5157 5158 static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale) 5159 { 5160 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY); 5161 } 5162 5163 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 5164 struct qeth_qdio_buffer *qethbuffer, 5165 struct qdio_buffer_element **__element, int *__offset, 5166 struct qeth_hdr **hdr) 5167 { 5168 struct qdio_buffer_element *element = *__element; 5169 struct qdio_buffer *buffer = qethbuffer->buffer; 5170 int offset = *__offset; 5171 struct sk_buff *skb = NULL; 5172 int skb_len = 0; 5173 void *data_ptr; 5174 int data_len; 5175 int headroom = 0; 5176 int use_rx_sg = 0; 5177 int frag = 0; 5178 5179 /* qeth_hdr must not cross element boundaries */ 5180 if (element->length < offset + sizeof(struct qeth_hdr)) { 5181 if (qeth_is_last_sbale(element)) 5182 return NULL; 5183 element++; 5184 offset = 0; 5185 if (element->length < sizeof(struct qeth_hdr)) 5186 return NULL; 5187 } 5188 *hdr = element->addr + offset; 5189 5190 offset += sizeof(struct qeth_hdr); 5191 switch ((*hdr)->hdr.l2.id) { 5192 case QETH_HEADER_TYPE_LAYER2: 5193 skb_len = (*hdr)->hdr.l2.pkt_length; 5194 break; 5195 case QETH_HEADER_TYPE_LAYER3: 5196 skb_len = (*hdr)->hdr.l3.length; 5197 headroom = ETH_HLEN; 5198 break; 5199 case QETH_HEADER_TYPE_OSN: 5200 skb_len = (*hdr)->hdr.osn.pdu_length; 5201 headroom = sizeof(struct qeth_hdr); 5202 break; 5203 default: 5204 break; 5205 } 5206 5207 if (!skb_len) 5208 return NULL; 5209 5210 if (((skb_len >= card->options.rx_sg_cb) && 5211 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 5212 (!atomic_read(&card->force_alloc_skb))) || 5213 (card->options.cq == QETH_CQ_ENABLED)) { 5214 use_rx_sg = 1; 5215 } else { 5216 skb = dev_alloc_skb(skb_len + headroom); 5217 if (!skb) 5218 goto no_mem; 5219 if (headroom) 5220 skb_reserve(skb, headroom); 5221 } 5222 5223 data_ptr = element->addr + offset; 5224 while (skb_len) { 5225 data_len = min(skb_len, (int)(element->length - offset)); 5226 if (data_len) { 5227 if (use_rx_sg) { 5228 if (qeth_create_skb_frag(qethbuffer, element, 5229 &skb, offset, &frag, data_len)) 5230 goto no_mem; 5231 } else { 5232 memcpy(skb_put(skb, data_len), data_ptr, 5233 data_len); 5234 } 5235 } 5236 skb_len -= data_len; 5237 if (skb_len) { 5238 if (qeth_is_last_sbale(element)) { 5239 QETH_CARD_TEXT(card, 4, "unexeob"); 5240 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5241 dev_kfree_skb_any(skb); 5242 card->stats.rx_errors++; 5243 return NULL; 5244 } 5245 element++; 5246 offset = 0; 5247 data_ptr = element->addr; 5248 } else { 5249 offset += data_len; 5250 } 5251 } 5252 *__element = element; 5253 *__offset = offset; 5254 if (use_rx_sg && card->options.performance_stats) { 5255 card->perf_stats.sg_skbs_rx++; 5256 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5257 } 5258 return skb; 5259 no_mem: 5260 if (net_ratelimit()) { 5261 QETH_CARD_TEXT(card, 2, "noskbmem"); 5262 } 5263 card->stats.rx_dropped++; 5264 return NULL; 5265 } 5266 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5267 5268 static int qeth_setassparms_cb(struct qeth_card *card, 5269 struct qeth_reply *reply, unsigned long data) 5270 { 5271 struct qeth_ipa_cmd *cmd; 5272 5273 QETH_CARD_TEXT(card, 4, "defadpcb"); 5274 5275 cmd = (struct qeth_ipa_cmd *) data; 5276 if (cmd->hdr.return_code == 0) { 5277 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code; 5278 if (cmd->hdr.prot_version == QETH_PROT_IPV4) 5279 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 5280 if (cmd->hdr.prot_version == QETH_PROT_IPV6) 5281 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 5282 } 5283 if (cmd->data.setassparms.hdr.assist_no == IPA_INBOUND_CHECKSUM && 5284 cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) { 5285 card->info.csum_mask = cmd->data.setassparms.data.flags_32bit; 5286 QETH_CARD_TEXT_(card, 3, "csum:%d", card->info.csum_mask); 5287 } 5288 if (cmd->data.setassparms.hdr.assist_no == IPA_OUTBOUND_CHECKSUM && 5289 cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) { 5290 card->info.tx_csum_mask = 5291 cmd->data.setassparms.data.flags_32bit; 5292 QETH_CARD_TEXT_(card, 3, "tcsu:%d", card->info.tx_csum_mask); 5293 } 5294 5295 return 0; 5296 } 5297 5298 struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card, 5299 enum qeth_ipa_funcs ipa_func, 5300 __u16 cmd_code, __u16 len, 5301 enum qeth_prot_versions prot) 5302 { 5303 struct qeth_cmd_buffer *iob; 5304 struct qeth_ipa_cmd *cmd; 5305 5306 QETH_CARD_TEXT(card, 4, "getasscm"); 5307 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot); 5308 5309 if (iob) { 5310 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 5311 cmd->data.setassparms.hdr.assist_no = ipa_func; 5312 cmd->data.setassparms.hdr.length = 8 + len; 5313 cmd->data.setassparms.hdr.command_code = cmd_code; 5314 cmd->data.setassparms.hdr.return_code = 0; 5315 cmd->data.setassparms.hdr.seq_no = 0; 5316 } 5317 5318 return iob; 5319 } 5320 EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd); 5321 5322 int qeth_send_setassparms(struct qeth_card *card, 5323 struct qeth_cmd_buffer *iob, __u16 len, long data, 5324 int (*reply_cb)(struct qeth_card *, 5325 struct qeth_reply *, unsigned long), 5326 void *reply_param) 5327 { 5328 int rc; 5329 struct qeth_ipa_cmd *cmd; 5330 5331 QETH_CARD_TEXT(card, 4, "sendassp"); 5332 5333 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 5334 if (len <= sizeof(__u32)) 5335 cmd->data.setassparms.data.flags_32bit = (__u32) data; 5336 else /* (len > sizeof(__u32)) */ 5337 memcpy(&cmd->data.setassparms.data, (void *) data, len); 5338 5339 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param); 5340 return rc; 5341 } 5342 EXPORT_SYMBOL_GPL(qeth_send_setassparms); 5343 5344 int qeth_send_simple_setassparms(struct qeth_card *card, 5345 enum qeth_ipa_funcs ipa_func, 5346 __u16 cmd_code, long data) 5347 { 5348 int rc; 5349 int length = 0; 5350 struct qeth_cmd_buffer *iob; 5351 5352 QETH_CARD_TEXT(card, 4, "simassp4"); 5353 if (data) 5354 length = sizeof(__u32); 5355 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, 5356 length, QETH_PROT_IPV4); 5357 if (!iob) 5358 return -ENOMEM; 5359 rc = qeth_send_setassparms(card, iob, length, data, 5360 qeth_setassparms_cb, NULL); 5361 return rc; 5362 } 5363 EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms); 5364 5365 static void qeth_unregister_dbf_views(void) 5366 { 5367 int x; 5368 for (x = 0; x < QETH_DBF_INFOS; x++) { 5369 debug_unregister(qeth_dbf[x].id); 5370 qeth_dbf[x].id = NULL; 5371 } 5372 } 5373 5374 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5375 { 5376 char dbf_txt_buf[32]; 5377 va_list args; 5378 5379 if (!debug_level_enabled(id, level)) 5380 return; 5381 va_start(args, fmt); 5382 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5383 va_end(args); 5384 debug_text_event(id, level, dbf_txt_buf); 5385 } 5386 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5387 5388 static int qeth_register_dbf_views(void) 5389 { 5390 int ret; 5391 int x; 5392 5393 for (x = 0; x < QETH_DBF_INFOS; x++) { 5394 /* register the areas */ 5395 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5396 qeth_dbf[x].pages, 5397 qeth_dbf[x].areas, 5398 qeth_dbf[x].len); 5399 if (qeth_dbf[x].id == NULL) { 5400 qeth_unregister_dbf_views(); 5401 return -ENOMEM; 5402 } 5403 5404 /* register a view */ 5405 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5406 if (ret) { 5407 qeth_unregister_dbf_views(); 5408 return ret; 5409 } 5410 5411 /* set a passing level */ 5412 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5413 } 5414 5415 return 0; 5416 } 5417 5418 int qeth_core_load_discipline(struct qeth_card *card, 5419 enum qeth_discipline_id discipline) 5420 { 5421 int rc = 0; 5422 mutex_lock(&qeth_mod_mutex); 5423 switch (discipline) { 5424 case QETH_DISCIPLINE_LAYER3: 5425 card->discipline = try_then_request_module( 5426 symbol_get(qeth_l3_discipline), "qeth_l3"); 5427 break; 5428 case QETH_DISCIPLINE_LAYER2: 5429 card->discipline = try_then_request_module( 5430 symbol_get(qeth_l2_discipline), "qeth_l2"); 5431 break; 5432 } 5433 if (!card->discipline) { 5434 dev_err(&card->gdev->dev, "There is no kernel module to " 5435 "support discipline %d\n", discipline); 5436 rc = -EINVAL; 5437 } 5438 mutex_unlock(&qeth_mod_mutex); 5439 return rc; 5440 } 5441 5442 void qeth_core_free_discipline(struct qeth_card *card) 5443 { 5444 if (card->options.layer2) 5445 symbol_put(qeth_l2_discipline); 5446 else 5447 symbol_put(qeth_l3_discipline); 5448 card->discipline = NULL; 5449 } 5450 5451 static const struct device_type qeth_generic_devtype = { 5452 .name = "qeth_generic", 5453 .groups = qeth_generic_attr_groups, 5454 }; 5455 static const struct device_type qeth_osn_devtype = { 5456 .name = "qeth_osn", 5457 .groups = qeth_osn_attr_groups, 5458 }; 5459 5460 #define DBF_NAME_LEN 20 5461 5462 struct qeth_dbf_entry { 5463 char dbf_name[DBF_NAME_LEN]; 5464 debug_info_t *dbf_info; 5465 struct list_head dbf_list; 5466 }; 5467 5468 static LIST_HEAD(qeth_dbf_list); 5469 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5470 5471 static debug_info_t *qeth_get_dbf_entry(char *name) 5472 { 5473 struct qeth_dbf_entry *entry; 5474 debug_info_t *rc = NULL; 5475 5476 mutex_lock(&qeth_dbf_list_mutex); 5477 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5478 if (strcmp(entry->dbf_name, name) == 0) { 5479 rc = entry->dbf_info; 5480 break; 5481 } 5482 } 5483 mutex_unlock(&qeth_dbf_list_mutex); 5484 return rc; 5485 } 5486 5487 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5488 { 5489 struct qeth_dbf_entry *new_entry; 5490 5491 card->debug = debug_register(name, 2, 1, 8); 5492 if (!card->debug) { 5493 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5494 goto err; 5495 } 5496 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5497 goto err_dbg; 5498 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5499 if (!new_entry) 5500 goto err_dbg; 5501 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5502 new_entry->dbf_info = card->debug; 5503 mutex_lock(&qeth_dbf_list_mutex); 5504 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5505 mutex_unlock(&qeth_dbf_list_mutex); 5506 5507 return 0; 5508 5509 err_dbg: 5510 debug_unregister(card->debug); 5511 err: 5512 return -ENOMEM; 5513 } 5514 5515 static void qeth_clear_dbf_list(void) 5516 { 5517 struct qeth_dbf_entry *entry, *tmp; 5518 5519 mutex_lock(&qeth_dbf_list_mutex); 5520 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5521 list_del(&entry->dbf_list); 5522 debug_unregister(entry->dbf_info); 5523 kfree(entry); 5524 } 5525 mutex_unlock(&qeth_dbf_list_mutex); 5526 } 5527 5528 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5529 { 5530 struct qeth_card *card; 5531 struct device *dev; 5532 int rc; 5533 unsigned long flags; 5534 char dbf_name[DBF_NAME_LEN]; 5535 5536 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5537 5538 dev = &gdev->dev; 5539 if (!get_device(dev)) 5540 return -ENODEV; 5541 5542 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5543 5544 card = qeth_alloc_card(); 5545 if (!card) { 5546 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5547 rc = -ENOMEM; 5548 goto err_dev; 5549 } 5550 5551 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5552 dev_name(&gdev->dev)); 5553 card->debug = qeth_get_dbf_entry(dbf_name); 5554 if (!card->debug) { 5555 rc = qeth_add_dbf_entry(card, dbf_name); 5556 if (rc) 5557 goto err_card; 5558 } 5559 5560 card->read.ccwdev = gdev->cdev[0]; 5561 card->write.ccwdev = gdev->cdev[1]; 5562 card->data.ccwdev = gdev->cdev[2]; 5563 dev_set_drvdata(&gdev->dev, card); 5564 card->gdev = gdev; 5565 gdev->cdev[0]->handler = qeth_irq; 5566 gdev->cdev[1]->handler = qeth_irq; 5567 gdev->cdev[2]->handler = qeth_irq; 5568 5569 rc = qeth_determine_card_type(card); 5570 if (rc) { 5571 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5572 goto err_card; 5573 } 5574 rc = qeth_setup_card(card); 5575 if (rc) { 5576 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5577 goto err_card; 5578 } 5579 5580 if (card->info.type == QETH_CARD_TYPE_OSN) 5581 gdev->dev.type = &qeth_osn_devtype; 5582 else 5583 gdev->dev.type = &qeth_generic_devtype; 5584 5585 switch (card->info.type) { 5586 case QETH_CARD_TYPE_OSN: 5587 case QETH_CARD_TYPE_OSM: 5588 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5589 if (rc) 5590 goto err_card; 5591 rc = card->discipline->setup(card->gdev); 5592 if (rc) 5593 goto err_disc; 5594 case QETH_CARD_TYPE_OSD: 5595 case QETH_CARD_TYPE_OSX: 5596 default: 5597 break; 5598 } 5599 5600 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5601 list_add_tail(&card->list, &qeth_core_card_list.list); 5602 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5603 5604 qeth_determine_capabilities(card); 5605 return 0; 5606 5607 err_disc: 5608 qeth_core_free_discipline(card); 5609 err_card: 5610 qeth_core_free_card(card); 5611 err_dev: 5612 put_device(dev); 5613 return rc; 5614 } 5615 5616 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5617 { 5618 unsigned long flags; 5619 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5620 5621 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5622 5623 if (card->discipline) { 5624 card->discipline->remove(gdev); 5625 qeth_core_free_discipline(card); 5626 } 5627 5628 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5629 list_del(&card->list); 5630 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5631 qeth_core_free_card(card); 5632 dev_set_drvdata(&gdev->dev, NULL); 5633 put_device(&gdev->dev); 5634 return; 5635 } 5636 5637 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5638 { 5639 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5640 int rc = 0; 5641 int def_discipline; 5642 5643 if (!card->discipline) { 5644 if (card->info.type == QETH_CARD_TYPE_IQD) 5645 def_discipline = QETH_DISCIPLINE_LAYER3; 5646 else 5647 def_discipline = QETH_DISCIPLINE_LAYER2; 5648 rc = qeth_core_load_discipline(card, def_discipline); 5649 if (rc) 5650 goto err; 5651 rc = card->discipline->setup(card->gdev); 5652 if (rc) 5653 goto err; 5654 } 5655 rc = card->discipline->set_online(gdev); 5656 err: 5657 return rc; 5658 } 5659 5660 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5661 { 5662 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5663 return card->discipline->set_offline(gdev); 5664 } 5665 5666 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5667 { 5668 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5669 if (card->discipline && card->discipline->shutdown) 5670 card->discipline->shutdown(gdev); 5671 } 5672 5673 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5674 { 5675 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5676 if (card->discipline && card->discipline->prepare) 5677 return card->discipline->prepare(gdev); 5678 return 0; 5679 } 5680 5681 static void qeth_core_complete(struct ccwgroup_device *gdev) 5682 { 5683 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5684 if (card->discipline && card->discipline->complete) 5685 card->discipline->complete(gdev); 5686 } 5687 5688 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5689 { 5690 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5691 if (card->discipline && card->discipline->freeze) 5692 return card->discipline->freeze(gdev); 5693 return 0; 5694 } 5695 5696 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5697 { 5698 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5699 if (card->discipline && card->discipline->thaw) 5700 return card->discipline->thaw(gdev); 5701 return 0; 5702 } 5703 5704 static int qeth_core_restore(struct ccwgroup_device *gdev) 5705 { 5706 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5707 if (card->discipline && card->discipline->restore) 5708 return card->discipline->restore(gdev); 5709 return 0; 5710 } 5711 5712 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5713 .driver = { 5714 .owner = THIS_MODULE, 5715 .name = "qeth", 5716 }, 5717 .setup = qeth_core_probe_device, 5718 .remove = qeth_core_remove_device, 5719 .set_online = qeth_core_set_online, 5720 .set_offline = qeth_core_set_offline, 5721 .shutdown = qeth_core_shutdown, 5722 .prepare = qeth_core_prepare, 5723 .complete = qeth_core_complete, 5724 .freeze = qeth_core_freeze, 5725 .thaw = qeth_core_thaw, 5726 .restore = qeth_core_restore, 5727 }; 5728 5729 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv, 5730 const char *buf, size_t count) 5731 { 5732 int err; 5733 5734 err = ccwgroup_create_dev(qeth_core_root_dev, 5735 &qeth_core_ccwgroup_driver, 3, buf); 5736 5737 return err ? err : count; 5738 } 5739 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5740 5741 static struct attribute *qeth_drv_attrs[] = { 5742 &driver_attr_group.attr, 5743 NULL, 5744 }; 5745 static struct attribute_group qeth_drv_attr_group = { 5746 .attrs = qeth_drv_attrs, 5747 }; 5748 static const struct attribute_group *qeth_drv_attr_groups[] = { 5749 &qeth_drv_attr_group, 5750 NULL, 5751 }; 5752 5753 static struct { 5754 const char str[ETH_GSTRING_LEN]; 5755 } qeth_ethtool_stats_keys[] = { 5756 /* 0 */{"rx skbs"}, 5757 {"rx buffers"}, 5758 {"tx skbs"}, 5759 {"tx buffers"}, 5760 {"tx skbs no packing"}, 5761 {"tx buffers no packing"}, 5762 {"tx skbs packing"}, 5763 {"tx buffers packing"}, 5764 {"tx sg skbs"}, 5765 {"tx sg frags"}, 5766 /* 10 */{"rx sg skbs"}, 5767 {"rx sg frags"}, 5768 {"rx sg page allocs"}, 5769 {"tx large kbytes"}, 5770 {"tx large count"}, 5771 {"tx pk state ch n->p"}, 5772 {"tx pk state ch p->n"}, 5773 {"tx pk watermark low"}, 5774 {"tx pk watermark high"}, 5775 {"queue 0 buffer usage"}, 5776 /* 20 */{"queue 1 buffer usage"}, 5777 {"queue 2 buffer usage"}, 5778 {"queue 3 buffer usage"}, 5779 {"rx poll time"}, 5780 {"rx poll count"}, 5781 {"rx do_QDIO time"}, 5782 {"rx do_QDIO count"}, 5783 {"tx handler time"}, 5784 {"tx handler count"}, 5785 {"tx time"}, 5786 /* 30 */{"tx count"}, 5787 {"tx do_QDIO time"}, 5788 {"tx do_QDIO count"}, 5789 {"tx csum"}, 5790 {"tx lin"}, 5791 {"cq handler count"}, 5792 {"cq handler time"} 5793 }; 5794 5795 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5796 { 5797 switch (stringset) { 5798 case ETH_SS_STATS: 5799 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5800 default: 5801 return -EINVAL; 5802 } 5803 } 5804 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5805 5806 void qeth_core_get_ethtool_stats(struct net_device *dev, 5807 struct ethtool_stats *stats, u64 *data) 5808 { 5809 struct qeth_card *card = dev->ml_priv; 5810 data[0] = card->stats.rx_packets - 5811 card->perf_stats.initial_rx_packets; 5812 data[1] = card->perf_stats.bufs_rec; 5813 data[2] = card->stats.tx_packets - 5814 card->perf_stats.initial_tx_packets; 5815 data[3] = card->perf_stats.bufs_sent; 5816 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5817 - card->perf_stats.skbs_sent_pack; 5818 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5819 data[6] = card->perf_stats.skbs_sent_pack; 5820 data[7] = card->perf_stats.bufs_sent_pack; 5821 data[8] = card->perf_stats.sg_skbs_sent; 5822 data[9] = card->perf_stats.sg_frags_sent; 5823 data[10] = card->perf_stats.sg_skbs_rx; 5824 data[11] = card->perf_stats.sg_frags_rx; 5825 data[12] = card->perf_stats.sg_alloc_page_rx; 5826 data[13] = (card->perf_stats.large_send_bytes >> 10); 5827 data[14] = card->perf_stats.large_send_cnt; 5828 data[15] = card->perf_stats.sc_dp_p; 5829 data[16] = card->perf_stats.sc_p_dp; 5830 data[17] = QETH_LOW_WATERMARK_PACK; 5831 data[18] = QETH_HIGH_WATERMARK_PACK; 5832 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5833 data[20] = (card->qdio.no_out_queues > 1) ? 5834 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5835 data[21] = (card->qdio.no_out_queues > 2) ? 5836 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5837 data[22] = (card->qdio.no_out_queues > 3) ? 5838 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5839 data[23] = card->perf_stats.inbound_time; 5840 data[24] = card->perf_stats.inbound_cnt; 5841 data[25] = card->perf_stats.inbound_do_qdio_time; 5842 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5843 data[27] = card->perf_stats.outbound_handler_time; 5844 data[28] = card->perf_stats.outbound_handler_cnt; 5845 data[29] = card->perf_stats.outbound_time; 5846 data[30] = card->perf_stats.outbound_cnt; 5847 data[31] = card->perf_stats.outbound_do_qdio_time; 5848 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5849 data[33] = card->perf_stats.tx_csum; 5850 data[34] = card->perf_stats.tx_lin; 5851 data[35] = card->perf_stats.cq_cnt; 5852 data[36] = card->perf_stats.cq_time; 5853 } 5854 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5855 5856 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5857 { 5858 switch (stringset) { 5859 case ETH_SS_STATS: 5860 memcpy(data, &qeth_ethtool_stats_keys, 5861 sizeof(qeth_ethtool_stats_keys)); 5862 break; 5863 default: 5864 WARN_ON(1); 5865 break; 5866 } 5867 } 5868 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5869 5870 void qeth_core_get_drvinfo(struct net_device *dev, 5871 struct ethtool_drvinfo *info) 5872 { 5873 struct qeth_card *card = dev->ml_priv; 5874 5875 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 5876 sizeof(info->driver)); 5877 strlcpy(info->version, "1.0", sizeof(info->version)); 5878 strlcpy(info->fw_version, card->info.mcl_level, 5879 sizeof(info->fw_version)); 5880 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 5881 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 5882 } 5883 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5884 5885 /* Helper function to fill 'advertizing' and 'supported' which are the same. */ 5886 /* Autoneg and full-duplex are supported and advertized uncondionally. */ 5887 /* Always advertize and support all speeds up to specified, and only one */ 5888 /* specified port type. */ 5889 static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd, 5890 int maxspeed, int porttype) 5891 { 5892 int port_sup, port_adv, spd_sup, spd_adv; 5893 5894 switch (porttype) { 5895 case PORT_TP: 5896 port_sup = SUPPORTED_TP; 5897 port_adv = ADVERTISED_TP; 5898 break; 5899 case PORT_FIBRE: 5900 port_sup = SUPPORTED_FIBRE; 5901 port_adv = ADVERTISED_FIBRE; 5902 break; 5903 default: 5904 port_sup = SUPPORTED_TP; 5905 port_adv = ADVERTISED_TP; 5906 WARN_ON_ONCE(1); 5907 } 5908 5909 /* "Fallthrough" case'es ordered from high to low result in setting */ 5910 /* flags cumulatively, starting from the specified speed and down to */ 5911 /* the lowest possible. */ 5912 spd_sup = 0; 5913 spd_adv = 0; 5914 switch (maxspeed) { 5915 case SPEED_10000: 5916 spd_sup |= SUPPORTED_10000baseT_Full; 5917 spd_adv |= ADVERTISED_10000baseT_Full; 5918 case SPEED_1000: 5919 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full; 5920 spd_adv |= ADVERTISED_1000baseT_Half | 5921 ADVERTISED_1000baseT_Full; 5922 case SPEED_100: 5923 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full; 5924 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full; 5925 case SPEED_10: 5926 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5927 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5928 break; 5929 default: 5930 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5931 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5932 WARN_ON_ONCE(1); 5933 } 5934 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv; 5935 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup; 5936 } 5937 5938 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5939 struct ethtool_cmd *ecmd) 5940 { 5941 struct qeth_card *card = netdev->ml_priv; 5942 enum qeth_link_types link_type; 5943 struct carrier_info carrier_info; 5944 int rc; 5945 u32 speed; 5946 5947 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5948 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5949 else 5950 link_type = card->info.link_type; 5951 5952 ecmd->transceiver = XCVR_INTERNAL; 5953 ecmd->duplex = DUPLEX_FULL; 5954 ecmd->autoneg = AUTONEG_ENABLE; 5955 5956 switch (link_type) { 5957 case QETH_LINK_TYPE_FAST_ETH: 5958 case QETH_LINK_TYPE_LANE_ETH100: 5959 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP); 5960 speed = SPEED_100; 5961 ecmd->port = PORT_TP; 5962 break; 5963 5964 case QETH_LINK_TYPE_GBIT_ETH: 5965 case QETH_LINK_TYPE_LANE_ETH1000: 5966 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5967 speed = SPEED_1000; 5968 ecmd->port = PORT_FIBRE; 5969 break; 5970 5971 case QETH_LINK_TYPE_10GBIT_ETH: 5972 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5973 speed = SPEED_10000; 5974 ecmd->port = PORT_FIBRE; 5975 break; 5976 5977 default: 5978 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP); 5979 speed = SPEED_10; 5980 ecmd->port = PORT_TP; 5981 } 5982 ethtool_cmd_speed_set(ecmd, speed); 5983 5984 /* Check if we can obtain more accurate information. */ 5985 /* If QUERY_CARD_INFO command is not supported or fails, */ 5986 /* just return the heuristics that was filled above. */ 5987 if (!qeth_card_hw_is_reachable(card)) 5988 return -ENODEV; 5989 rc = qeth_query_card_info(card, &carrier_info); 5990 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */ 5991 return 0; 5992 if (rc) /* report error from the hardware operation */ 5993 return rc; 5994 /* on success, fill in the information got from the hardware */ 5995 5996 netdev_dbg(netdev, 5997 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n", 5998 carrier_info.card_type, 5999 carrier_info.port_mode, 6000 carrier_info.port_speed); 6001 6002 /* Update attributes for which we've obtained more authoritative */ 6003 /* information, leave the rest the way they where filled above. */ 6004 switch (carrier_info.card_type) { 6005 case CARD_INFO_TYPE_1G_COPPER_A: 6006 case CARD_INFO_TYPE_1G_COPPER_B: 6007 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP); 6008 ecmd->port = PORT_TP; 6009 break; 6010 case CARD_INFO_TYPE_1G_FIBRE_A: 6011 case CARD_INFO_TYPE_1G_FIBRE_B: 6012 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 6013 ecmd->port = PORT_FIBRE; 6014 break; 6015 case CARD_INFO_TYPE_10G_FIBRE_A: 6016 case CARD_INFO_TYPE_10G_FIBRE_B: 6017 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 6018 ecmd->port = PORT_FIBRE; 6019 break; 6020 } 6021 6022 switch (carrier_info.port_mode) { 6023 case CARD_INFO_PORTM_FULLDUPLEX: 6024 ecmd->duplex = DUPLEX_FULL; 6025 break; 6026 case CARD_INFO_PORTM_HALFDUPLEX: 6027 ecmd->duplex = DUPLEX_HALF; 6028 break; 6029 } 6030 6031 switch (carrier_info.port_speed) { 6032 case CARD_INFO_PORTS_10M: 6033 speed = SPEED_10; 6034 break; 6035 case CARD_INFO_PORTS_100M: 6036 speed = SPEED_100; 6037 break; 6038 case CARD_INFO_PORTS_1G: 6039 speed = SPEED_1000; 6040 break; 6041 case CARD_INFO_PORTS_10G: 6042 speed = SPEED_10000; 6043 break; 6044 } 6045 ethtool_cmd_speed_set(ecmd, speed); 6046 6047 return 0; 6048 } 6049 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 6050 6051 static int qeth_send_checksum_command(struct qeth_card *card) 6052 { 6053 int rc; 6054 6055 rc = qeth_send_simple_setassparms(card, IPA_INBOUND_CHECKSUM, 6056 IPA_CMD_ASS_START, 0); 6057 if (rc) { 6058 dev_warn(&card->gdev->dev, "Starting HW checksumming for %s " 6059 "failed, using SW checksumming\n", 6060 QETH_CARD_IFNAME(card)); 6061 return rc; 6062 } 6063 rc = qeth_send_simple_setassparms(card, IPA_INBOUND_CHECKSUM, 6064 IPA_CMD_ASS_ENABLE, 6065 card->info.csum_mask); 6066 if (rc) { 6067 dev_warn(&card->gdev->dev, "Enabling HW checksumming for %s " 6068 "failed, using SW checksumming\n", 6069 QETH_CARD_IFNAME(card)); 6070 return rc; 6071 } 6072 return 0; 6073 } 6074 6075 int qeth_set_rx_csum(struct qeth_card *card, int on) 6076 { 6077 int rc; 6078 6079 if (on) { 6080 rc = qeth_send_checksum_command(card); 6081 if (rc) 6082 return -EIO; 6083 dev_info(&card->gdev->dev, 6084 "HW Checksumming (inbound) enabled\n"); 6085 } else { 6086 rc = qeth_send_simple_setassparms(card, 6087 IPA_INBOUND_CHECKSUM, IPA_CMD_ASS_STOP, 0); 6088 if (rc) 6089 return -EIO; 6090 } 6091 return 0; 6092 } 6093 EXPORT_SYMBOL_GPL(qeth_set_rx_csum); 6094 6095 int qeth_start_ipa_tx_checksum(struct qeth_card *card) 6096 { 6097 int rc = 0; 6098 6099 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM)) 6100 return rc; 6101 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_CHECKSUM, 6102 IPA_CMD_ASS_START, 0); 6103 if (rc) 6104 goto err_out; 6105 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_CHECKSUM, 6106 IPA_CMD_ASS_ENABLE, 6107 card->info.tx_csum_mask); 6108 if (rc) 6109 goto err_out; 6110 6111 dev_info(&card->gdev->dev, "HW TX Checksumming enabled\n"); 6112 return rc; 6113 err_out: 6114 dev_warn(&card->gdev->dev, "Enabling HW TX checksumming for %s " 6115 "failed, using SW TX checksumming\n", QETH_CARD_IFNAME(card)); 6116 return rc; 6117 } 6118 EXPORT_SYMBOL_GPL(qeth_start_ipa_tx_checksum); 6119 6120 static int __init qeth_core_init(void) 6121 { 6122 int rc; 6123 6124 pr_info("loading core functions\n"); 6125 INIT_LIST_HEAD(&qeth_core_card_list.list); 6126 INIT_LIST_HEAD(&qeth_dbf_list); 6127 rwlock_init(&qeth_core_card_list.rwlock); 6128 mutex_init(&qeth_mod_mutex); 6129 6130 qeth_wq = create_singlethread_workqueue("qeth_wq"); 6131 6132 rc = qeth_register_dbf_views(); 6133 if (rc) 6134 goto out_err; 6135 qeth_core_root_dev = root_device_register("qeth"); 6136 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev); 6137 if (rc) 6138 goto register_err; 6139 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 6140 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 6141 if (!qeth_core_header_cache) { 6142 rc = -ENOMEM; 6143 goto slab_err; 6144 } 6145 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 6146 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 6147 if (!qeth_qdio_outbuf_cache) { 6148 rc = -ENOMEM; 6149 goto cqslab_err; 6150 } 6151 rc = ccw_driver_register(&qeth_ccw_driver); 6152 if (rc) 6153 goto ccw_err; 6154 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 6155 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 6156 if (rc) 6157 goto ccwgroup_err; 6158 6159 return 0; 6160 6161 ccwgroup_err: 6162 ccw_driver_unregister(&qeth_ccw_driver); 6163 ccw_err: 6164 kmem_cache_destroy(qeth_qdio_outbuf_cache); 6165 cqslab_err: 6166 kmem_cache_destroy(qeth_core_header_cache); 6167 slab_err: 6168 root_device_unregister(qeth_core_root_dev); 6169 register_err: 6170 qeth_unregister_dbf_views(); 6171 out_err: 6172 pr_err("Initializing the qeth device driver failed\n"); 6173 return rc; 6174 } 6175 6176 static void __exit qeth_core_exit(void) 6177 { 6178 qeth_clear_dbf_list(); 6179 destroy_workqueue(qeth_wq); 6180 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 6181 ccw_driver_unregister(&qeth_ccw_driver); 6182 kmem_cache_destroy(qeth_qdio_outbuf_cache); 6183 kmem_cache_destroy(qeth_core_header_cache); 6184 root_device_unregister(qeth_core_root_dev); 6185 qeth_unregister_dbf_views(); 6186 pr_info("core functions removed\n"); 6187 } 6188 6189 module_init(qeth_core_init); 6190 module_exit(qeth_core_exit); 6191 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 6192 MODULE_DESCRIPTION("qeth core functions"); 6193 MODULE_LICENSE("GPL"); 6194