1 /* 2 * driver/s390/cio/qdio_setup.c 3 * 4 * qdio queue initialization 5 * 6 * Copyright (C) IBM Corp. 2008 7 * Author(s): Jan Glauber <jang@linux.vnet.ibm.com> 8 */ 9 #include <linux/kernel.h> 10 #include <linux/slab.h> 11 #include <asm/qdio.h> 12 13 #include "cio.h" 14 #include "css.h" 15 #include "device.h" 16 #include "ioasm.h" 17 #include "chsc.h" 18 #include "qdio.h" 19 #include "qdio_debug.h" 20 21 static struct kmem_cache *qdio_q_cache; 22 23 /* 24 * qebsm is only available under 64bit but the adapter sets the feature 25 * flag anyway, so we manually override it. 26 */ 27 static inline int qebsm_possible(void) 28 { 29 #ifdef CONFIG_64BIT 30 return css_general_characteristics.qebsm; 31 #endif 32 return 0; 33 } 34 35 /* 36 * qib_param_field: pointer to 128 bytes or NULL, if no param field 37 * nr_input_qs: pointer to nr_queues*128 words of data or NULL 38 */ 39 static void set_impl_params(struct qdio_irq *irq_ptr, 40 unsigned int qib_param_field_format, 41 unsigned char *qib_param_field, 42 unsigned long *input_slib_elements, 43 unsigned long *output_slib_elements) 44 { 45 struct qdio_q *q; 46 int i, j; 47 48 if (!irq_ptr) 49 return; 50 51 WARN_ON((unsigned long)&irq_ptr->qib & 0xff); 52 irq_ptr->qib.pfmt = qib_param_field_format; 53 if (qib_param_field) 54 memcpy(irq_ptr->qib.parm, qib_param_field, 55 QDIO_MAX_BUFFERS_PER_Q); 56 57 if (!input_slib_elements) 58 goto output; 59 60 for_each_input_queue(irq_ptr, q, i) { 61 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 62 q->slib->slibe[j].parms = 63 input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j]; 64 } 65 output: 66 if (!output_slib_elements) 67 return; 68 69 for_each_output_queue(irq_ptr, q, i) { 70 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 71 q->slib->slibe[j].parms = 72 output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j]; 73 } 74 } 75 76 static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues) 77 { 78 struct qdio_q *q; 79 int i; 80 81 for (i = 0; i < nr_queues; i++) { 82 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL); 83 if (!q) 84 return -ENOMEM; 85 WARN_ON((unsigned long)q & 0xff); 86 87 q->slib = (struct slib *) __get_free_page(GFP_KERNEL); 88 if (!q->slib) { 89 kmem_cache_free(qdio_q_cache, q); 90 return -ENOMEM; 91 } 92 WARN_ON((unsigned long)q->slib & 0x7ff); 93 irq_ptr_qs[i] = q; 94 } 95 return 0; 96 } 97 98 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs) 99 { 100 int rc; 101 102 rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs); 103 if (rc) 104 return rc; 105 rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs); 106 return rc; 107 } 108 109 static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr, 110 qdio_handler_t *handler, int i) 111 { 112 /* must be cleared by every qdio_establish */ 113 memset(q, 0, ((char *)&q->slib) - ((char *)q)); 114 memset(q->slib, 0, PAGE_SIZE); 115 116 q->irq_ptr = irq_ptr; 117 q->mask = 1 << (31 - i); 118 q->nr = i; 119 q->handler = handler; 120 spin_lock_init(&q->lock); 121 } 122 123 static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr, 124 void **sbals_array, int i) 125 { 126 struct qdio_q *prev; 127 int j; 128 129 DBF_HEX(&q, sizeof(void *)); 130 q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2); 131 132 /* fill in sbal */ 133 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) { 134 q->sbal[j] = *sbals_array++; 135 WARN_ON((unsigned long)q->sbal[j] & 0xff); 136 } 137 138 /* fill in slib */ 139 if (i > 0) { 140 prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1] 141 : irq_ptr->output_qs[i - 1]; 142 prev->slib->nsliba = (unsigned long)q->slib; 143 } 144 145 q->slib->sla = (unsigned long)q->sl; 146 q->slib->slsba = (unsigned long)&q->slsb.val[0]; 147 148 /* fill in sl */ 149 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 150 q->sl->element[j].sbal = (unsigned long)q->sbal[j]; 151 152 DBF_EVENT("sl-slsb-sbal"); 153 DBF_HEX(q->sl, sizeof(void *)); 154 DBF_HEX(&q->slsb, sizeof(void *)); 155 DBF_HEX(q->sbal, sizeof(void *)); 156 } 157 158 static void setup_queues(struct qdio_irq *irq_ptr, 159 struct qdio_initialize *qdio_init) 160 { 161 struct qdio_q *q; 162 void **input_sbal_array = qdio_init->input_sbal_addr_array; 163 void **output_sbal_array = qdio_init->output_sbal_addr_array; 164 int i; 165 166 for_each_input_queue(irq_ptr, q, i) { 167 DBF_EVENT("in-q:%1d", i); 168 setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i); 169 170 q->is_input_q = 1; 171 setup_storage_lists(q, irq_ptr, input_sbal_array, i); 172 input_sbal_array += QDIO_MAX_BUFFERS_PER_Q; 173 174 if (is_thinint_irq(irq_ptr)) 175 tasklet_init(&q->tasklet, tiqdio_inbound_processing, 176 (unsigned long) q); 177 else 178 tasklet_init(&q->tasklet, qdio_inbound_processing, 179 (unsigned long) q); 180 } 181 182 for_each_output_queue(irq_ptr, q, i) { 183 DBF_EVENT("outq:%1d", i); 184 setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i); 185 186 q->is_input_q = 0; 187 setup_storage_lists(q, irq_ptr, output_sbal_array, i); 188 output_sbal_array += QDIO_MAX_BUFFERS_PER_Q; 189 190 tasklet_init(&q->tasklet, qdio_outbound_processing, 191 (unsigned long) q); 192 setup_timer(&q->u.out.timer, (void(*)(unsigned long)) 193 &qdio_outbound_timer, (unsigned long)q); 194 } 195 } 196 197 static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac) 198 { 199 if (qdioac & AC1_SIGA_INPUT_NEEDED) 200 irq_ptr->siga_flag.input = 1; 201 if (qdioac & AC1_SIGA_OUTPUT_NEEDED) 202 irq_ptr->siga_flag.output = 1; 203 if (qdioac & AC1_SIGA_SYNC_NEEDED) 204 irq_ptr->siga_flag.sync = 1; 205 if (qdioac & AC1_AUTOMATIC_SYNC_ON_THININT) 206 irq_ptr->siga_flag.no_sync_ti = 1; 207 if (qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI) 208 irq_ptr->siga_flag.no_sync_out_pci = 1; 209 210 if (irq_ptr->siga_flag.no_sync_out_pci && 211 irq_ptr->siga_flag.no_sync_ti) 212 irq_ptr->siga_flag.no_sync_out_ti = 1; 213 } 214 215 static void check_and_setup_qebsm(struct qdio_irq *irq_ptr, 216 unsigned char qdioac, unsigned long token) 217 { 218 if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM)) 219 goto no_qebsm; 220 if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) || 221 (!(qdioac & AC1_SC_QEBSM_ENABLED))) 222 goto no_qebsm; 223 224 irq_ptr->sch_token = token; 225 226 DBF_EVENT("V=V:1"); 227 DBF_EVENT("%8lx", irq_ptr->sch_token); 228 return; 229 230 no_qebsm: 231 irq_ptr->sch_token = 0; 232 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM; 233 DBF_EVENT("noV=V"); 234 } 235 236 /* 237 * If there is a qdio_irq we use the chsc_page and store the information 238 * in the qdio_irq, otherwise we copy it to the specified structure. 239 */ 240 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr, 241 struct subchannel_id *schid, 242 struct qdio_ssqd_desc *data) 243 { 244 struct chsc_ssqd_area *ssqd; 245 int rc; 246 247 DBF_EVENT("getssqd:%4x", schid->sch_no); 248 if (irq_ptr != NULL) 249 ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page; 250 else 251 ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL); 252 memset(ssqd, 0, PAGE_SIZE); 253 254 ssqd->request = (struct chsc_header) { 255 .length = 0x0010, 256 .code = 0x0024, 257 }; 258 ssqd->first_sch = schid->sch_no; 259 ssqd->last_sch = schid->sch_no; 260 ssqd->ssid = schid->ssid; 261 262 if (chsc(ssqd)) 263 return -EIO; 264 rc = chsc_error_from_response(ssqd->response.code); 265 if (rc) 266 return rc; 267 268 if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) || 269 !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) || 270 (ssqd->qdio_ssqd.sch != schid->sch_no)) 271 return -EINVAL; 272 273 if (irq_ptr != NULL) 274 memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd, 275 sizeof(struct qdio_ssqd_desc)); 276 else { 277 memcpy(data, &ssqd->qdio_ssqd, 278 sizeof(struct qdio_ssqd_desc)); 279 free_page((unsigned long)ssqd); 280 } 281 return 0; 282 } 283 284 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr) 285 { 286 unsigned char qdioac; 287 int rc; 288 289 rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL); 290 if (rc) { 291 DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no); 292 DBF_ERROR("rc:%x", rc); 293 /* all flags set, worst case */ 294 qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED | 295 AC1_SIGA_SYNC_NEEDED; 296 } else 297 qdioac = irq_ptr->ssqd_desc.qdioac1; 298 299 check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token); 300 process_ac_flags(irq_ptr, qdioac); 301 DBF_EVENT("qdioac:%4x", qdioac); 302 } 303 304 void qdio_release_memory(struct qdio_irq *irq_ptr) 305 { 306 struct qdio_q *q; 307 int i; 308 309 /* 310 * Must check queue array manually since irq_ptr->nr_input_queues / 311 * irq_ptr->nr_input_queues may not yet be set. 312 */ 313 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) { 314 q = irq_ptr->input_qs[i]; 315 if (q) { 316 free_page((unsigned long) q->slib); 317 kmem_cache_free(qdio_q_cache, q); 318 } 319 } 320 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) { 321 q = irq_ptr->output_qs[i]; 322 if (q) { 323 free_page((unsigned long) q->slib); 324 kmem_cache_free(qdio_q_cache, q); 325 } 326 } 327 free_page((unsigned long) irq_ptr->qdr); 328 free_page(irq_ptr->chsc_page); 329 free_page((unsigned long) irq_ptr); 330 } 331 332 static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr, 333 struct qdio_q **irq_ptr_qs, 334 int i, int nr) 335 { 336 irq_ptr->qdr->qdf0[i + nr].sliba = 337 (unsigned long)irq_ptr_qs[i]->slib; 338 339 irq_ptr->qdr->qdf0[i + nr].sla = 340 (unsigned long)irq_ptr_qs[i]->sl; 341 342 irq_ptr->qdr->qdf0[i + nr].slsba = 343 (unsigned long)&irq_ptr_qs[i]->slsb.val[0]; 344 345 irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY; 346 irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY; 347 irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY; 348 irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY; 349 } 350 351 static void setup_qdr(struct qdio_irq *irq_ptr, 352 struct qdio_initialize *qdio_init) 353 { 354 int i; 355 356 irq_ptr->qdr->qfmt = qdio_init->q_format; 357 irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs; 358 irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs; 359 irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */ 360 irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4; 361 irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib; 362 irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY; 363 364 for (i = 0; i < qdio_init->no_input_qs; i++) 365 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0); 366 367 for (i = 0; i < qdio_init->no_output_qs; i++) 368 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i, 369 qdio_init->no_input_qs); 370 } 371 372 static void setup_qib(struct qdio_irq *irq_ptr, 373 struct qdio_initialize *init_data) 374 { 375 if (qebsm_possible()) 376 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM; 377 378 irq_ptr->qib.qfmt = init_data->q_format; 379 if (init_data->no_input_qs) 380 irq_ptr->qib.isliba = 381 (unsigned long)(irq_ptr->input_qs[0]->slib); 382 if (init_data->no_output_qs) 383 irq_ptr->qib.osliba = 384 (unsigned long)(irq_ptr->output_qs[0]->slib); 385 memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8); 386 } 387 388 int qdio_setup_irq(struct qdio_initialize *init_data) 389 { 390 struct ciw *ciw; 391 struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data; 392 int rc; 393 394 memset(irq_ptr, 0, ((char *)&irq_ptr->qdr) - ((char *)irq_ptr)); 395 /* wipes qib.ac, required by ar7063 */ 396 memset(irq_ptr->qdr, 0, sizeof(struct qdr)); 397 398 irq_ptr->int_parm = init_data->int_parm; 399 irq_ptr->nr_input_qs = init_data->no_input_qs; 400 irq_ptr->nr_output_qs = init_data->no_output_qs; 401 402 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev); 403 irq_ptr->cdev = init_data->cdev; 404 setup_queues(irq_ptr, init_data); 405 406 setup_qib(irq_ptr, init_data); 407 qdio_setup_thinint(irq_ptr); 408 set_impl_params(irq_ptr, init_data->qib_param_field_format, 409 init_data->qib_param_field, 410 init_data->input_slib_elements, 411 init_data->output_slib_elements); 412 413 /* fill input and output descriptors */ 414 setup_qdr(irq_ptr, init_data); 415 416 /* qdr, qib, sls, slsbs, slibs, sbales are filled now */ 417 418 /* get qdio commands */ 419 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE); 420 if (!ciw) { 421 DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no); 422 rc = -EINVAL; 423 goto out_err; 424 } 425 irq_ptr->equeue = *ciw; 426 427 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE); 428 if (!ciw) { 429 DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no); 430 rc = -EINVAL; 431 goto out_err; 432 } 433 irq_ptr->aqueue = *ciw; 434 435 /* set new interrupt handler */ 436 irq_ptr->orig_handler = init_data->cdev->handler; 437 init_data->cdev->handler = qdio_int_handler; 438 return 0; 439 out_err: 440 qdio_release_memory(irq_ptr); 441 return rc; 442 } 443 444 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr, 445 struct ccw_device *cdev) 446 { 447 char s[80]; 448 449 snprintf(s, 80, "qdio: %s %s on SC %x using " 450 "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s%s\n", 451 dev_name(&cdev->dev), 452 (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" : 453 ((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"), 454 irq_ptr->schid.sch_no, 455 is_thinint_irq(irq_ptr), 456 (irq_ptr->sch_token) ? 1 : 0, 457 (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0, 458 css_general_characteristics.aif_tdd, 459 (irq_ptr->siga_flag.input) ? "R" : " ", 460 (irq_ptr->siga_flag.output) ? "W" : " ", 461 (irq_ptr->siga_flag.sync) ? "S" : " ", 462 (!irq_ptr->siga_flag.no_sync_ti) ? "A" : " ", 463 (!irq_ptr->siga_flag.no_sync_out_ti) ? "O" : " ", 464 (!irq_ptr->siga_flag.no_sync_out_pci) ? "P" : " "); 465 printk(KERN_INFO "%s", s); 466 } 467 468 int __init qdio_setup_init(void) 469 { 470 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q), 471 256, 0, NULL); 472 if (!qdio_q_cache) 473 return -ENOMEM; 474 475 /* Check for OSA/FCP thin interrupts (bit 67). */ 476 DBF_EVENT("thinint:%1d", 477 (css_general_characteristics.aif_osa) ? 1 : 0); 478 479 /* Check for QEBSM support in general (bit 58). */ 480 DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0); 481 return 0; 482 } 483 484 void qdio_setup_exit(void) 485 { 486 kmem_cache_destroy(qdio_q_cache); 487 } 488