xref: /linux/drivers/rtc/rtc-tps6586x.c (revision b77e0ce62d63a761ffb7f7245a215a49f5921c2f)
1 /*
2  * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X
3  *
4  * Copyright (c) 2012, NVIDIA Corporation.
5  *
6  * Author: Laxman Dewangan <ldewangan@nvidia.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation version 2.
11  *
12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13  * whether express or implied; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20  * 02111-1307, USA
21  */
22 
23 #include <linux/device.h>
24 #include <linux/err.h>
25 #include <linux/init.h>
26 #include <linux/irq.h>
27 #include <linux/kernel.h>
28 #include <linux/mfd/tps6586x.h>
29 #include <linux/module.h>
30 #include <linux/platform_device.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/rtc.h>
33 #include <linux/slab.h>
34 
35 #define RTC_CTRL			0xc0
36 #define POR_RESET_N			BIT(7)
37 #define OSC_SRC_SEL			BIT(6)
38 #define RTC_ENABLE			BIT(5)	/* enables alarm */
39 #define RTC_BUF_ENABLE			BIT(4)	/* 32 KHz buffer enable */
40 #define PRE_BYPASS			BIT(3)	/* 0=1KHz or 1=32KHz updates */
41 #define CL_SEL_MASK			(BIT(2)|BIT(1))
42 #define CL_SEL_POS			1
43 #define RTC_ALARM1_HI			0xc1
44 #define RTC_COUNT4			0xc6
45 
46 /* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */
47 #define RTC_COUNT4_DUMMYREAD		0xc5
48 
49 /*only 14-bits width in second*/
50 #define ALM1_VALID_RANGE_IN_SEC		0x3FFF
51 
52 #define TPS6586X_RTC_CL_SEL_1_5PF	0x0
53 #define TPS6586X_RTC_CL_SEL_6_5PF	0x1
54 #define TPS6586X_RTC_CL_SEL_7_5PF	0x2
55 #define TPS6586X_RTC_CL_SEL_12_5PF	0x3
56 
57 struct tps6586x_rtc {
58 	struct device		*dev;
59 	struct rtc_device	*rtc;
60 	int			irq;
61 	bool			irq_en;
62 };
63 
64 static inline struct device *to_tps6586x_dev(struct device *dev)
65 {
66 	return dev->parent;
67 }
68 
69 static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm)
70 {
71 	struct device *tps_dev = to_tps6586x_dev(dev);
72 	unsigned long long ticks = 0;
73 	time64_t seconds;
74 	u8 buff[6];
75 	int ret;
76 	int i;
77 
78 	ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff);
79 	if (ret < 0) {
80 		dev_err(dev, "read counter failed with err %d\n", ret);
81 		return ret;
82 	}
83 
84 	for (i = 1; i < sizeof(buff); i++) {
85 		ticks <<= 8;
86 		ticks |= buff[i];
87 	}
88 
89 	seconds = ticks >> 10;
90 	rtc_time64_to_tm(seconds, tm);
91 
92 	return 0;
93 }
94 
95 static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm)
96 {
97 	struct device *tps_dev = to_tps6586x_dev(dev);
98 	unsigned long long ticks;
99 	time64_t seconds;
100 	u8 buff[5];
101 	int ret;
102 
103 	seconds = rtc_tm_to_time64(tm);
104 
105 	ticks = (unsigned long long)seconds << 10;
106 	buff[0] = (ticks >> 32) & 0xff;
107 	buff[1] = (ticks >> 24) & 0xff;
108 	buff[2] = (ticks >> 16) & 0xff;
109 	buff[3] = (ticks >> 8) & 0xff;
110 	buff[4] = ticks & 0xff;
111 
112 	/* Disable RTC before changing time */
113 	ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
114 	if (ret < 0) {
115 		dev_err(dev, "failed to clear RTC_ENABLE\n");
116 		return ret;
117 	}
118 
119 	ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff);
120 	if (ret < 0) {
121 		dev_err(dev, "failed to program new time\n");
122 		return ret;
123 	}
124 
125 	/* Enable RTC */
126 	ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
127 	if (ret < 0) {
128 		dev_err(dev, "failed to set RTC_ENABLE\n");
129 		return ret;
130 	}
131 	return 0;
132 }
133 
134 static int tps6586x_rtc_alarm_irq_enable(struct device *dev,
135 			 unsigned int enabled)
136 {
137 	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
138 
139 	if (enabled && !rtc->irq_en) {
140 		enable_irq(rtc->irq);
141 		rtc->irq_en = true;
142 	} else if (!enabled && rtc->irq_en)  {
143 		disable_irq(rtc->irq);
144 		rtc->irq_en = false;
145 	}
146 	return 0;
147 }
148 
149 static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
150 {
151 	struct device *tps_dev = to_tps6586x_dev(dev);
152 	time64_t seconds;
153 	unsigned long ticks;
154 	unsigned long rtc_current_time;
155 	unsigned long long rticks = 0;
156 	u8 buff[3];
157 	u8 rbuff[6];
158 	int ret;
159 	int i;
160 
161 	seconds = rtc_tm_to_time64(&alrm->time);
162 
163 	ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled);
164 	if (ret < 0) {
165 		dev_err(dev, "can't set alarm irq, err %d\n", ret);
166 		return ret;
167 	}
168 
169 	ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD,
170 			sizeof(rbuff), rbuff);
171 	if (ret < 0) {
172 		dev_err(dev, "read counter failed with err %d\n", ret);
173 		return ret;
174 	}
175 
176 	for (i = 1; i < sizeof(rbuff); i++) {
177 		rticks <<= 8;
178 		rticks |= rbuff[i];
179 	}
180 
181 	rtc_current_time = rticks >> 10;
182 	if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC)
183 		seconds = rtc_current_time - 1;
184 
185 	ticks = (unsigned long long)seconds << 10;
186 	buff[0] = (ticks >> 16) & 0xff;
187 	buff[1] = (ticks >> 8) & 0xff;
188 	buff[2] = ticks & 0xff;
189 
190 	ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
191 	if (ret)
192 		dev_err(dev, "programming alarm failed with err %d\n", ret);
193 
194 	return ret;
195 }
196 
197 static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
198 {
199 	struct device *tps_dev = to_tps6586x_dev(dev);
200 	unsigned long ticks;
201 	time64_t seconds;
202 	u8 buff[3];
203 	int ret;
204 
205 	ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
206 	if (ret) {
207 		dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret);
208 		return ret;
209 	}
210 
211 	ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2];
212 	seconds = ticks >> 10;
213 
214 	rtc_time64_to_tm(seconds, &alrm->time);
215 	return 0;
216 }
217 
218 static const struct rtc_class_ops tps6586x_rtc_ops = {
219 	.read_time	= tps6586x_rtc_read_time,
220 	.set_time	= tps6586x_rtc_set_time,
221 	.set_alarm	= tps6586x_rtc_set_alarm,
222 	.read_alarm	= tps6586x_rtc_read_alarm,
223 	.alarm_irq_enable = tps6586x_rtc_alarm_irq_enable,
224 };
225 
226 static irqreturn_t tps6586x_rtc_irq(int irq, void *data)
227 {
228 	struct tps6586x_rtc *rtc = data;
229 
230 	rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
231 	return IRQ_HANDLED;
232 }
233 
234 static int tps6586x_rtc_probe(struct platform_device *pdev)
235 {
236 	struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
237 	struct tps6586x_rtc *rtc;
238 	int ret;
239 
240 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
241 	if (!rtc)
242 		return -ENOMEM;
243 
244 	rtc->dev = &pdev->dev;
245 	rtc->irq = platform_get_irq(pdev, 0);
246 
247 	/* 1 kHz tick mode, enable tick counting */
248 	ret = tps6586x_update(tps_dev, RTC_CTRL,
249 		RTC_ENABLE | OSC_SRC_SEL |
250 		((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK),
251 		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
252 	if (ret < 0) {
253 		dev_err(&pdev->dev, "unable to start counter\n");
254 		return ret;
255 	}
256 
257 	device_init_wakeup(&pdev->dev, 1);
258 
259 	platform_set_drvdata(pdev, rtc);
260 	rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
261 	if (IS_ERR(rtc->rtc)) {
262 		ret = PTR_ERR(rtc->rtc);
263 		goto fail_rtc_register;
264 	}
265 
266 	rtc->rtc->ops = &tps6586x_rtc_ops;
267 	rtc->rtc->range_max = (1ULL << 30) - 1; /* 30-bit seconds */
268 	rtc->rtc->start_secs = mktime64(2009, 1, 1, 0, 0, 0);
269 	rtc->rtc->set_start_time = true;
270 
271 	irq_set_status_flags(rtc->irq, IRQ_NOAUTOEN);
272 
273 	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
274 				tps6586x_rtc_irq,
275 				IRQF_ONESHOT,
276 				dev_name(&pdev->dev), rtc);
277 	if (ret < 0) {
278 		dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
279 				rtc->irq, ret);
280 		goto fail_rtc_register;
281 	}
282 
283 	ret = devm_rtc_register_device(rtc->rtc);
284 	if (ret)
285 		goto fail_rtc_register;
286 
287 	return 0;
288 
289 fail_rtc_register:
290 	tps6586x_update(tps_dev, RTC_CTRL, 0,
291 		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
292 	return ret;
293 };
294 
295 static int tps6586x_rtc_remove(struct platform_device *pdev)
296 {
297 	struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
298 
299 	tps6586x_update(tps_dev, RTC_CTRL, 0,
300 		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
301 	return 0;
302 }
303 
304 #ifdef CONFIG_PM_SLEEP
305 static int tps6586x_rtc_suspend(struct device *dev)
306 {
307 	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
308 
309 	if (device_may_wakeup(dev))
310 		enable_irq_wake(rtc->irq);
311 	return 0;
312 }
313 
314 static int tps6586x_rtc_resume(struct device *dev)
315 {
316 	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
317 
318 	if (device_may_wakeup(dev))
319 		disable_irq_wake(rtc->irq);
320 	return 0;
321 }
322 #endif
323 
324 static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_rtc_suspend,
325 			tps6586x_rtc_resume);
326 
327 static struct platform_driver tps6586x_rtc_driver = {
328 	.driver	= {
329 		.name	= "tps6586x-rtc",
330 		.pm	= &tps6586x_pm_ops,
331 	},
332 	.probe	= tps6586x_rtc_probe,
333 	.remove	= tps6586x_rtc_remove,
334 };
335 module_platform_driver(tps6586x_rtc_driver);
336 
337 MODULE_ALIAS("platform:tps6586x-rtc");
338 MODULE_DESCRIPTION("TI TPS6586x RTC driver");
339 MODULE_AUTHOR("Laxman dewangan <ldewangan@nvidia.com>");
340 MODULE_LICENSE("GPL v2");
341