xref: /linux/drivers/rtc/rtc-sh.c (revision 1553a1c48281243359a9529a10ddb551f3b967ab)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * SuperH On-Chip RTC Support
4  *
5  * Copyright (C) 2006 - 2009  Paul Mundt
6  * Copyright (C) 2006  Jamie Lenehan
7  * Copyright (C) 2008  Angelo Castello
8  *
9  * Based on the old arch/sh/kernel/cpu/rtc.c by:
10  *
11  *  Copyright (C) 2000  Philipp Rumpf <prumpf@tux.org>
12  *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
13  */
14 #include <linux/module.h>
15 #include <linux/mod_devicetable.h>
16 #include <linux/kernel.h>
17 #include <linux/bcd.h>
18 #include <linux/rtc.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/seq_file.h>
22 #include <linux/interrupt.h>
23 #include <linux/spinlock.h>
24 #include <linux/io.h>
25 #include <linux/log2.h>
26 #include <linux/clk.h>
27 #include <linux/slab.h>
28 #ifdef CONFIG_SUPERH
29 #include <asm/rtc.h>
30 #else
31 /* Default values for RZ/A RTC */
32 #define rtc_reg_size		sizeof(u16)
33 #define RTC_BIT_INVERTED        0	/* no chip bugs */
34 #define RTC_CAP_4_DIGIT_YEAR    (1 << 0)
35 #define RTC_DEF_CAPABILITIES    RTC_CAP_4_DIGIT_YEAR
36 #endif
37 
38 #define DRV_NAME	"sh-rtc"
39 
40 #define RTC_REG(r)	((r) * rtc_reg_size)
41 
42 #define R64CNT		RTC_REG(0)
43 
44 #define RSECCNT		RTC_REG(1)	/* RTC sec */
45 #define RMINCNT		RTC_REG(2)	/* RTC min */
46 #define RHRCNT		RTC_REG(3)	/* RTC hour */
47 #define RWKCNT		RTC_REG(4)	/* RTC week */
48 #define RDAYCNT		RTC_REG(5)	/* RTC day */
49 #define RMONCNT		RTC_REG(6)	/* RTC month */
50 #define RYRCNT		RTC_REG(7)	/* RTC year */
51 #define RSECAR		RTC_REG(8)	/* ALARM sec */
52 #define RMINAR		RTC_REG(9)	/* ALARM min */
53 #define RHRAR		RTC_REG(10)	/* ALARM hour */
54 #define RWKAR		RTC_REG(11)	/* ALARM week */
55 #define RDAYAR		RTC_REG(12)	/* ALARM day */
56 #define RMONAR		RTC_REG(13)	/* ALARM month */
57 #define RCR1		RTC_REG(14)	/* Control */
58 #define RCR2		RTC_REG(15)	/* Control */
59 
60 /*
61  * Note on RYRAR and RCR3: Up until this point most of the register
62  * definitions are consistent across all of the available parts. However,
63  * the placement of the optional RYRAR and RCR3 (the RYRAR control
64  * register used to control RYRCNT/RYRAR compare) varies considerably
65  * across various parts, occasionally being mapped in to a completely
66  * unrelated address space. For proper RYRAR support a separate resource
67  * would have to be handed off, but as this is purely optional in
68  * practice, we simply opt not to support it, thereby keeping the code
69  * quite a bit more simplified.
70  */
71 
72 /* ALARM Bits - or with BCD encoded value */
73 #define AR_ENB		0x80	/* Enable for alarm cmp   */
74 
75 /* Period Bits */
76 #define PF_HP		0x100	/* Enable Half Period to support 8,32,128Hz */
77 #define PF_COUNT	0x200	/* Half periodic counter */
78 #define PF_OXS		0x400	/* Periodic One x Second */
79 #define PF_KOU		0x800	/* Kernel or User periodic request 1=kernel */
80 #define PF_MASK		0xf00
81 
82 /* RCR1 Bits */
83 #define RCR1_CF		0x80	/* Carry Flag             */
84 #define RCR1_CIE	0x10	/* Carry Interrupt Enable */
85 #define RCR1_AIE	0x08	/* Alarm Interrupt Enable */
86 #define RCR1_AF		0x01	/* Alarm Flag             */
87 
88 /* RCR2 Bits */
89 #define RCR2_PEF	0x80	/* PEriodic interrupt Flag */
90 #define RCR2_PESMASK	0x70	/* Periodic interrupt Set  */
91 #define RCR2_RTCEN	0x08	/* ENable RTC              */
92 #define RCR2_ADJ	0x04	/* ADJustment (30-second)  */
93 #define RCR2_RESET	0x02	/* Reset bit               */
94 #define RCR2_START	0x01	/* Start bit               */
95 
96 struct sh_rtc {
97 	void __iomem		*regbase;
98 	unsigned long		regsize;
99 	struct resource		*res;
100 	int			alarm_irq;
101 	int			periodic_irq;
102 	int			carry_irq;
103 	struct clk		*clk;
104 	struct rtc_device	*rtc_dev;
105 	spinlock_t		lock;
106 	unsigned long		capabilities;	/* See asm/rtc.h for cap bits */
107 	unsigned short		periodic_freq;
108 };
109 
110 static int __sh_rtc_interrupt(struct sh_rtc *rtc)
111 {
112 	unsigned int tmp, pending;
113 
114 	tmp = readb(rtc->regbase + RCR1);
115 	pending = tmp & RCR1_CF;
116 	tmp &= ~RCR1_CF;
117 	writeb(tmp, rtc->regbase + RCR1);
118 
119 	/* Users have requested One x Second IRQ */
120 	if (pending && rtc->periodic_freq & PF_OXS)
121 		rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
122 
123 	return pending;
124 }
125 
126 static int __sh_rtc_alarm(struct sh_rtc *rtc)
127 {
128 	unsigned int tmp, pending;
129 
130 	tmp = readb(rtc->regbase + RCR1);
131 	pending = tmp & RCR1_AF;
132 	tmp &= ~(RCR1_AF | RCR1_AIE);
133 	writeb(tmp, rtc->regbase + RCR1);
134 
135 	if (pending)
136 		rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
137 
138 	return pending;
139 }
140 
141 static int __sh_rtc_periodic(struct sh_rtc *rtc)
142 {
143 	unsigned int tmp, pending;
144 
145 	tmp = readb(rtc->regbase + RCR2);
146 	pending = tmp & RCR2_PEF;
147 	tmp &= ~RCR2_PEF;
148 	writeb(tmp, rtc->regbase + RCR2);
149 
150 	if (!pending)
151 		return 0;
152 
153 	/* Half period enabled than one skipped and the next notified */
154 	if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
155 		rtc->periodic_freq &= ~PF_COUNT;
156 	else {
157 		if (rtc->periodic_freq & PF_HP)
158 			rtc->periodic_freq |= PF_COUNT;
159 		rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
160 	}
161 
162 	return pending;
163 }
164 
165 static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
166 {
167 	struct sh_rtc *rtc = dev_id;
168 	int ret;
169 
170 	spin_lock(&rtc->lock);
171 	ret = __sh_rtc_interrupt(rtc);
172 	spin_unlock(&rtc->lock);
173 
174 	return IRQ_RETVAL(ret);
175 }
176 
177 static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
178 {
179 	struct sh_rtc *rtc = dev_id;
180 	int ret;
181 
182 	spin_lock(&rtc->lock);
183 	ret = __sh_rtc_alarm(rtc);
184 	spin_unlock(&rtc->lock);
185 
186 	return IRQ_RETVAL(ret);
187 }
188 
189 static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
190 {
191 	struct sh_rtc *rtc = dev_id;
192 	int ret;
193 
194 	spin_lock(&rtc->lock);
195 	ret = __sh_rtc_periodic(rtc);
196 	spin_unlock(&rtc->lock);
197 
198 	return IRQ_RETVAL(ret);
199 }
200 
201 static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
202 {
203 	struct sh_rtc *rtc = dev_id;
204 	int ret;
205 
206 	spin_lock(&rtc->lock);
207 	ret = __sh_rtc_interrupt(rtc);
208 	ret |= __sh_rtc_alarm(rtc);
209 	ret |= __sh_rtc_periodic(rtc);
210 	spin_unlock(&rtc->lock);
211 
212 	return IRQ_RETVAL(ret);
213 }
214 
215 static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
216 {
217 	struct sh_rtc *rtc = dev_get_drvdata(dev);
218 	unsigned int tmp;
219 
220 	spin_lock_irq(&rtc->lock);
221 
222 	tmp = readb(rtc->regbase + RCR1);
223 
224 	if (enable)
225 		tmp |= RCR1_AIE;
226 	else
227 		tmp &= ~RCR1_AIE;
228 
229 	writeb(tmp, rtc->regbase + RCR1);
230 
231 	spin_unlock_irq(&rtc->lock);
232 }
233 
234 static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
235 {
236 	struct sh_rtc *rtc = dev_get_drvdata(dev);
237 	unsigned int tmp;
238 
239 	tmp = readb(rtc->regbase + RCR1);
240 	seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
241 
242 	tmp = readb(rtc->regbase + RCR2);
243 	seq_printf(seq, "periodic_IRQ\t: %s\n",
244 		   (tmp & RCR2_PESMASK) ? "yes" : "no");
245 
246 	return 0;
247 }
248 
249 static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
250 {
251 	struct sh_rtc *rtc = dev_get_drvdata(dev);
252 	unsigned int tmp;
253 
254 	spin_lock_irq(&rtc->lock);
255 
256 	tmp = readb(rtc->regbase + RCR1);
257 
258 	if (!enable)
259 		tmp &= ~RCR1_CIE;
260 	else
261 		tmp |= RCR1_CIE;
262 
263 	writeb(tmp, rtc->regbase + RCR1);
264 
265 	spin_unlock_irq(&rtc->lock);
266 }
267 
268 static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
269 {
270 	sh_rtc_setaie(dev, enabled);
271 	return 0;
272 }
273 
274 static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
275 {
276 	struct sh_rtc *rtc = dev_get_drvdata(dev);
277 	unsigned int sec128, sec2, yr, yr100, cf_bit;
278 
279 	if (!(readb(rtc->regbase + RCR2) & RCR2_RTCEN))
280 		return -EINVAL;
281 
282 	do {
283 		unsigned int tmp;
284 
285 		spin_lock_irq(&rtc->lock);
286 
287 		tmp = readb(rtc->regbase + RCR1);
288 		tmp &= ~RCR1_CF; /* Clear CF-bit */
289 		tmp |= RCR1_CIE;
290 		writeb(tmp, rtc->regbase + RCR1);
291 
292 		sec128 = readb(rtc->regbase + R64CNT);
293 
294 		tm->tm_sec	= bcd2bin(readb(rtc->regbase + RSECCNT));
295 		tm->tm_min	= bcd2bin(readb(rtc->regbase + RMINCNT));
296 		tm->tm_hour	= bcd2bin(readb(rtc->regbase + RHRCNT));
297 		tm->tm_wday	= bcd2bin(readb(rtc->regbase + RWKCNT));
298 		tm->tm_mday	= bcd2bin(readb(rtc->regbase + RDAYCNT));
299 		tm->tm_mon	= bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
300 
301 		if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
302 			yr  = readw(rtc->regbase + RYRCNT);
303 			yr100 = bcd2bin(yr >> 8);
304 			yr &= 0xff;
305 		} else {
306 			yr  = readb(rtc->regbase + RYRCNT);
307 			yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
308 		}
309 
310 		tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
311 
312 		sec2 = readb(rtc->regbase + R64CNT);
313 		cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
314 
315 		spin_unlock_irq(&rtc->lock);
316 	} while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
317 
318 #if RTC_BIT_INVERTED != 0
319 	if ((sec128 & RTC_BIT_INVERTED))
320 		tm->tm_sec--;
321 #endif
322 
323 	/* only keep the carry interrupt enabled if UIE is on */
324 	if (!(rtc->periodic_freq & PF_OXS))
325 		sh_rtc_setcie(dev, 0);
326 
327 	dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
328 		"mday=%d, mon=%d, year=%d, wday=%d\n",
329 		__func__,
330 		tm->tm_sec, tm->tm_min, tm->tm_hour,
331 		tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
332 
333 	return 0;
334 }
335 
336 static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
337 {
338 	struct sh_rtc *rtc = dev_get_drvdata(dev);
339 	unsigned int tmp;
340 	int year;
341 
342 	spin_lock_irq(&rtc->lock);
343 
344 	/* Reset pre-scaler & stop RTC */
345 	tmp = readb(rtc->regbase + RCR2);
346 	tmp |= RCR2_RESET;
347 	tmp &= ~RCR2_START;
348 	writeb(tmp, rtc->regbase + RCR2);
349 
350 	writeb(bin2bcd(tm->tm_sec),  rtc->regbase + RSECCNT);
351 	writeb(bin2bcd(tm->tm_min),  rtc->regbase + RMINCNT);
352 	writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
353 	writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
354 	writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
355 	writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
356 
357 	if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
358 		year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
359 			bin2bcd(tm->tm_year % 100);
360 		writew(year, rtc->regbase + RYRCNT);
361 	} else {
362 		year = tm->tm_year % 100;
363 		writeb(bin2bcd(year), rtc->regbase + RYRCNT);
364 	}
365 
366 	/* Start RTC */
367 	tmp = readb(rtc->regbase + RCR2);
368 	tmp &= ~RCR2_RESET;
369 	tmp |= RCR2_RTCEN | RCR2_START;
370 	writeb(tmp, rtc->regbase + RCR2);
371 
372 	spin_unlock_irq(&rtc->lock);
373 
374 	return 0;
375 }
376 
377 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
378 {
379 	unsigned int byte;
380 	int value = -1;			/* return -1 for ignored values */
381 
382 	byte = readb(rtc->regbase + reg_off);
383 	if (byte & AR_ENB) {
384 		byte &= ~AR_ENB;	/* strip the enable bit */
385 		value = bcd2bin(byte);
386 	}
387 
388 	return value;
389 }
390 
391 static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
392 {
393 	struct sh_rtc *rtc = dev_get_drvdata(dev);
394 	struct rtc_time *tm = &wkalrm->time;
395 
396 	spin_lock_irq(&rtc->lock);
397 
398 	tm->tm_sec	= sh_rtc_read_alarm_value(rtc, RSECAR);
399 	tm->tm_min	= sh_rtc_read_alarm_value(rtc, RMINAR);
400 	tm->tm_hour	= sh_rtc_read_alarm_value(rtc, RHRAR);
401 	tm->tm_wday	= sh_rtc_read_alarm_value(rtc, RWKAR);
402 	tm->tm_mday	= sh_rtc_read_alarm_value(rtc, RDAYAR);
403 	tm->tm_mon	= sh_rtc_read_alarm_value(rtc, RMONAR);
404 	if (tm->tm_mon > 0)
405 		tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
406 
407 	wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
408 
409 	spin_unlock_irq(&rtc->lock);
410 
411 	return 0;
412 }
413 
414 static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
415 					    int value, int reg_off)
416 {
417 	/* < 0 for a value that is ignored */
418 	if (value < 0)
419 		writeb(0, rtc->regbase + reg_off);
420 	else
421 		writeb(bin2bcd(value) | AR_ENB,  rtc->regbase + reg_off);
422 }
423 
424 static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
425 {
426 	struct sh_rtc *rtc = dev_get_drvdata(dev);
427 	unsigned int rcr1;
428 	struct rtc_time *tm = &wkalrm->time;
429 	int mon;
430 
431 	spin_lock_irq(&rtc->lock);
432 
433 	/* disable alarm interrupt and clear the alarm flag */
434 	rcr1 = readb(rtc->regbase + RCR1);
435 	rcr1 &= ~(RCR1_AF | RCR1_AIE);
436 	writeb(rcr1, rtc->regbase + RCR1);
437 
438 	/* set alarm time */
439 	sh_rtc_write_alarm_value(rtc, tm->tm_sec,  RSECAR);
440 	sh_rtc_write_alarm_value(rtc, tm->tm_min,  RMINAR);
441 	sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
442 	sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
443 	sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
444 	mon = tm->tm_mon;
445 	if (mon >= 0)
446 		mon += 1;
447 	sh_rtc_write_alarm_value(rtc, mon, RMONAR);
448 
449 	if (wkalrm->enabled) {
450 		rcr1 |= RCR1_AIE;
451 		writeb(rcr1, rtc->regbase + RCR1);
452 	}
453 
454 	spin_unlock_irq(&rtc->lock);
455 
456 	return 0;
457 }
458 
459 static const struct rtc_class_ops sh_rtc_ops = {
460 	.read_time	= sh_rtc_read_time,
461 	.set_time	= sh_rtc_set_time,
462 	.read_alarm	= sh_rtc_read_alarm,
463 	.set_alarm	= sh_rtc_set_alarm,
464 	.proc		= sh_rtc_proc,
465 	.alarm_irq_enable = sh_rtc_alarm_irq_enable,
466 };
467 
468 static int __init sh_rtc_probe(struct platform_device *pdev)
469 {
470 	struct sh_rtc *rtc;
471 	struct resource *res;
472 	char clk_name[14];
473 	int clk_id, ret;
474 
475 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
476 	if (unlikely(!rtc))
477 		return -ENOMEM;
478 
479 	spin_lock_init(&rtc->lock);
480 
481 	/* get periodic/carry/alarm irqs */
482 	ret = platform_get_irq(pdev, 0);
483 	if (unlikely(ret <= 0)) {
484 		dev_err(&pdev->dev, "No IRQ resource\n");
485 		return -ENOENT;
486 	}
487 
488 	rtc->periodic_irq = ret;
489 	rtc->carry_irq = platform_get_irq(pdev, 1);
490 	rtc->alarm_irq = platform_get_irq(pdev, 2);
491 
492 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
493 	if (!res)
494 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
495 	if (unlikely(res == NULL)) {
496 		dev_err(&pdev->dev, "No IO resource\n");
497 		return -ENOENT;
498 	}
499 
500 	rtc->regsize = resource_size(res);
501 
502 	rtc->res = devm_request_mem_region(&pdev->dev, res->start,
503 					rtc->regsize, pdev->name);
504 	if (unlikely(!rtc->res))
505 		return -EBUSY;
506 
507 	rtc->regbase = devm_ioremap(&pdev->dev, rtc->res->start, rtc->regsize);
508 	if (unlikely(!rtc->regbase))
509 		return -EINVAL;
510 
511 	if (!pdev->dev.of_node) {
512 		clk_id = pdev->id;
513 		/* With a single device, the clock id is still "rtc0" */
514 		if (clk_id < 0)
515 			clk_id = 0;
516 
517 		snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
518 	} else
519 		snprintf(clk_name, sizeof(clk_name), "fck");
520 
521 	rtc->clk = devm_clk_get(&pdev->dev, clk_name);
522 	if (IS_ERR(rtc->clk)) {
523 		/*
524 		 * No error handling for rtc->clk intentionally, not all
525 		 * platforms will have a unique clock for the RTC, and
526 		 * the clk API can handle the struct clk pointer being
527 		 * NULL.
528 		 */
529 		rtc->clk = NULL;
530 	}
531 
532 	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
533 	if (IS_ERR(rtc->rtc_dev))
534 		return PTR_ERR(rtc->rtc_dev);
535 
536 	clk_enable(rtc->clk);
537 
538 	rtc->capabilities = RTC_DEF_CAPABILITIES;
539 
540 #ifdef CONFIG_SUPERH
541 	if (dev_get_platdata(&pdev->dev)) {
542 		struct sh_rtc_platform_info *pinfo =
543 			dev_get_platdata(&pdev->dev);
544 
545 		/*
546 		 * Some CPUs have special capabilities in addition to the
547 		 * default set. Add those in here.
548 		 */
549 		rtc->capabilities |= pinfo->capabilities;
550 	}
551 #endif
552 
553 	if (rtc->carry_irq <= 0) {
554 		/* register shared periodic/carry/alarm irq */
555 		ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
556 				sh_rtc_shared, 0, "sh-rtc", rtc);
557 		if (unlikely(ret)) {
558 			dev_err(&pdev->dev,
559 				"request IRQ failed with %d, IRQ %d\n", ret,
560 				rtc->periodic_irq);
561 			goto err_unmap;
562 		}
563 	} else {
564 		/* register periodic/carry/alarm irqs */
565 		ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
566 				sh_rtc_periodic, 0, "sh-rtc period", rtc);
567 		if (unlikely(ret)) {
568 			dev_err(&pdev->dev,
569 				"request period IRQ failed with %d, IRQ %d\n",
570 				ret, rtc->periodic_irq);
571 			goto err_unmap;
572 		}
573 
574 		ret = devm_request_irq(&pdev->dev, rtc->carry_irq,
575 				sh_rtc_interrupt, 0, "sh-rtc carry", rtc);
576 		if (unlikely(ret)) {
577 			dev_err(&pdev->dev,
578 				"request carry IRQ failed with %d, IRQ %d\n",
579 				ret, rtc->carry_irq);
580 			goto err_unmap;
581 		}
582 
583 		ret = devm_request_irq(&pdev->dev, rtc->alarm_irq,
584 				sh_rtc_alarm, 0, "sh-rtc alarm", rtc);
585 		if (unlikely(ret)) {
586 			dev_err(&pdev->dev,
587 				"request alarm IRQ failed with %d, IRQ %d\n",
588 				ret, rtc->alarm_irq);
589 			goto err_unmap;
590 		}
591 	}
592 
593 	platform_set_drvdata(pdev, rtc);
594 
595 	/* everything disabled by default */
596 	sh_rtc_setaie(&pdev->dev, 0);
597 	sh_rtc_setcie(&pdev->dev, 0);
598 
599 	rtc->rtc_dev->ops = &sh_rtc_ops;
600 	rtc->rtc_dev->max_user_freq = 256;
601 
602 	if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
603 		rtc->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_1900;
604 		rtc->rtc_dev->range_max = RTC_TIMESTAMP_END_9999;
605 	} else {
606 		rtc->rtc_dev->range_min = mktime64(1999, 1, 1, 0, 0, 0);
607 		rtc->rtc_dev->range_max = mktime64(2098, 12, 31, 23, 59, 59);
608 	}
609 
610 	ret = devm_rtc_register_device(rtc->rtc_dev);
611 	if (ret)
612 		goto err_unmap;
613 
614 	device_init_wakeup(&pdev->dev, 1);
615 	return 0;
616 
617 err_unmap:
618 	clk_disable(rtc->clk);
619 
620 	return ret;
621 }
622 
623 static void __exit sh_rtc_remove(struct platform_device *pdev)
624 {
625 	struct sh_rtc *rtc = platform_get_drvdata(pdev);
626 
627 	sh_rtc_setaie(&pdev->dev, 0);
628 	sh_rtc_setcie(&pdev->dev, 0);
629 
630 	clk_disable(rtc->clk);
631 }
632 
633 static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
634 {
635 	struct sh_rtc *rtc = dev_get_drvdata(dev);
636 
637 	irq_set_irq_wake(rtc->periodic_irq, enabled);
638 
639 	if (rtc->carry_irq > 0) {
640 		irq_set_irq_wake(rtc->carry_irq, enabled);
641 		irq_set_irq_wake(rtc->alarm_irq, enabled);
642 	}
643 }
644 
645 static int __maybe_unused sh_rtc_suspend(struct device *dev)
646 {
647 	if (device_may_wakeup(dev))
648 		sh_rtc_set_irq_wake(dev, 1);
649 
650 	return 0;
651 }
652 
653 static int __maybe_unused sh_rtc_resume(struct device *dev)
654 {
655 	if (device_may_wakeup(dev))
656 		sh_rtc_set_irq_wake(dev, 0);
657 
658 	return 0;
659 }
660 
661 static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
662 
663 static const struct of_device_id sh_rtc_of_match[] = {
664 	{ .compatible = "renesas,sh-rtc", },
665 	{ /* sentinel */ }
666 };
667 MODULE_DEVICE_TABLE(of, sh_rtc_of_match);
668 
669 /*
670  * sh_rtc_remove() lives in .exit.text. For drivers registered via
671  * module_platform_driver_probe() this is ok because they cannot get unbound at
672  * runtime. So mark the driver struct with __refdata to prevent modpost
673  * triggering a section mismatch warning.
674  */
675 static struct platform_driver sh_rtc_platform_driver __refdata = {
676 	.driver		= {
677 		.name	= DRV_NAME,
678 		.pm	= &sh_rtc_pm_ops,
679 		.of_match_table = sh_rtc_of_match,
680 	},
681 	.remove_new	= __exit_p(sh_rtc_remove),
682 };
683 
684 module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe);
685 
686 MODULE_DESCRIPTION("SuperH on-chip RTC driver");
687 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
688 	      "Jamie Lenehan <lenehan@twibble.org>, "
689 	      "Angelo Castello <angelo.castello@st.com>");
690 MODULE_LICENSE("GPL v2");
691 MODULE_ALIAS("platform:" DRV_NAME);
692