1 /* drivers/rtc/rtc-s3c.c 2 * 3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com/ 5 * 6 * Copyright (c) 2004,2006 Simtec Electronics 7 * Ben Dooks, <ben@simtec.co.uk> 8 * http://armlinux.simtec.co.uk/ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver 15 */ 16 17 #include <linux/module.h> 18 #include <linux/fs.h> 19 #include <linux/string.h> 20 #include <linux/init.h> 21 #include <linux/platform_device.h> 22 #include <linux/interrupt.h> 23 #include <linux/rtc.h> 24 #include <linux/bcd.h> 25 #include <linux/clk.h> 26 #include <linux/log2.h> 27 #include <linux/slab.h> 28 29 #include <mach/hardware.h> 30 #include <asm/uaccess.h> 31 #include <asm/io.h> 32 #include <asm/irq.h> 33 #include <plat/regs-rtc.h> 34 35 enum s3c_cpu_type { 36 TYPE_S3C2410, 37 TYPE_S3C64XX, 38 }; 39 40 /* I have yet to find an S3C implementation with more than one 41 * of these rtc blocks in */ 42 43 static struct resource *s3c_rtc_mem; 44 45 static struct clk *rtc_clk; 46 static void __iomem *s3c_rtc_base; 47 static int s3c_rtc_alarmno = NO_IRQ; 48 static int s3c_rtc_tickno = NO_IRQ; 49 static enum s3c_cpu_type s3c_rtc_cpu_type; 50 51 static DEFINE_SPINLOCK(s3c_rtc_pie_lock); 52 53 /* IRQ Handlers */ 54 55 static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) 56 { 57 struct rtc_device *rdev = id; 58 59 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); 60 61 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 62 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP); 63 64 return IRQ_HANDLED; 65 } 66 67 static irqreturn_t s3c_rtc_tickirq(int irq, void *id) 68 { 69 struct rtc_device *rdev = id; 70 71 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); 72 73 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 74 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP); 75 76 return IRQ_HANDLED; 77 } 78 79 /* Update control registers */ 80 static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) 81 { 82 unsigned int tmp; 83 84 pr_debug("%s: aie=%d\n", __func__, enabled); 85 86 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; 87 88 if (enabled) 89 tmp |= S3C2410_RTCALM_ALMEN; 90 91 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); 92 93 return 0; 94 } 95 96 static int s3c_rtc_setfreq(struct device *dev, int freq) 97 { 98 struct platform_device *pdev = to_platform_device(dev); 99 struct rtc_device *rtc_dev = platform_get_drvdata(pdev); 100 unsigned int tmp = 0; 101 102 if (!is_power_of_2(freq)) 103 return -EINVAL; 104 105 spin_lock_irq(&s3c_rtc_pie_lock); 106 107 if (s3c_rtc_cpu_type == TYPE_S3C2410) { 108 tmp = readb(s3c_rtc_base + S3C2410_TICNT); 109 tmp &= S3C2410_TICNT_ENABLE; 110 } 111 112 tmp |= (rtc_dev->max_user_freq / freq)-1; 113 114 writel(tmp, s3c_rtc_base + S3C2410_TICNT); 115 spin_unlock_irq(&s3c_rtc_pie_lock); 116 117 return 0; 118 } 119 120 /* Time read/write */ 121 122 static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) 123 { 124 unsigned int have_retried = 0; 125 void __iomem *base = s3c_rtc_base; 126 127 retry_get_time: 128 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); 129 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); 130 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); 131 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); 132 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); 133 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); 134 135 /* the only way to work out wether the system was mid-update 136 * when we read it is to check the second counter, and if it 137 * is zero, then we re-try the entire read 138 */ 139 140 if (rtc_tm->tm_sec == 0 && !have_retried) { 141 have_retried = 1; 142 goto retry_get_time; 143 } 144 145 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n", 146 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, 147 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); 148 149 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); 150 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); 151 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); 152 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); 153 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); 154 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); 155 156 rtc_tm->tm_year += 100; 157 rtc_tm->tm_mon -= 1; 158 159 return rtc_valid_tm(rtc_tm); 160 } 161 162 static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) 163 { 164 void __iomem *base = s3c_rtc_base; 165 int year = tm->tm_year - 100; 166 167 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n", 168 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, 169 tm->tm_hour, tm->tm_min, tm->tm_sec); 170 171 /* we get around y2k by simply not supporting it */ 172 173 if (year < 0 || year >= 100) { 174 dev_err(dev, "rtc only supports 100 years\n"); 175 return -EINVAL; 176 } 177 178 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC); 179 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN); 180 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR); 181 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE); 182 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON); 183 writeb(bin2bcd(year), base + S3C2410_RTCYEAR); 184 185 return 0; 186 } 187 188 static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) 189 { 190 struct rtc_time *alm_tm = &alrm->time; 191 void __iomem *base = s3c_rtc_base; 192 unsigned int alm_en; 193 194 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); 195 alm_tm->tm_min = readb(base + S3C2410_ALMMIN); 196 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); 197 alm_tm->tm_mon = readb(base + S3C2410_ALMMON); 198 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); 199 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); 200 201 alm_en = readb(base + S3C2410_RTCALM); 202 203 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; 204 205 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n", 206 alm_en, 207 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, 208 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); 209 210 211 /* decode the alarm enable field */ 212 213 if (alm_en & S3C2410_RTCALM_SECEN) 214 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); 215 else 216 alm_tm->tm_sec = -1; 217 218 if (alm_en & S3C2410_RTCALM_MINEN) 219 alm_tm->tm_min = bcd2bin(alm_tm->tm_min); 220 else 221 alm_tm->tm_min = -1; 222 223 if (alm_en & S3C2410_RTCALM_HOUREN) 224 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); 225 else 226 alm_tm->tm_hour = -1; 227 228 if (alm_en & S3C2410_RTCALM_DAYEN) 229 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); 230 else 231 alm_tm->tm_mday = -1; 232 233 if (alm_en & S3C2410_RTCALM_MONEN) { 234 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); 235 alm_tm->tm_mon -= 1; 236 } else { 237 alm_tm->tm_mon = -1; 238 } 239 240 if (alm_en & S3C2410_RTCALM_YEAREN) 241 alm_tm->tm_year = bcd2bin(alm_tm->tm_year); 242 else 243 alm_tm->tm_year = -1; 244 245 return 0; 246 } 247 248 static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 249 { 250 struct rtc_time *tm = &alrm->time; 251 void __iomem *base = s3c_rtc_base; 252 unsigned int alrm_en; 253 254 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n", 255 alrm->enabled, 256 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, 257 tm->tm_hour, tm->tm_min, tm->tm_sec); 258 259 260 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; 261 writeb(0x00, base + S3C2410_RTCALM); 262 263 if (tm->tm_sec < 60 && tm->tm_sec >= 0) { 264 alrm_en |= S3C2410_RTCALM_SECEN; 265 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC); 266 } 267 268 if (tm->tm_min < 60 && tm->tm_min >= 0) { 269 alrm_en |= S3C2410_RTCALM_MINEN; 270 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN); 271 } 272 273 if (tm->tm_hour < 24 && tm->tm_hour >= 0) { 274 alrm_en |= S3C2410_RTCALM_HOUREN; 275 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR); 276 } 277 278 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); 279 280 writeb(alrm_en, base + S3C2410_RTCALM); 281 282 s3c_rtc_setaie(dev, alrm->enabled); 283 284 return 0; 285 } 286 287 static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) 288 { 289 unsigned int ticnt; 290 291 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 292 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON); 293 ticnt &= S3C64XX_RTCCON_TICEN; 294 } else { 295 ticnt = readb(s3c_rtc_base + S3C2410_TICNT); 296 ticnt &= S3C2410_TICNT_ENABLE; 297 } 298 299 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); 300 return 0; 301 } 302 303 static int s3c_rtc_open(struct device *dev) 304 { 305 struct platform_device *pdev = to_platform_device(dev); 306 struct rtc_device *rtc_dev = platform_get_drvdata(pdev); 307 int ret; 308 309 ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, 310 IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev); 311 312 if (ret) { 313 dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); 314 return ret; 315 } 316 317 ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, 318 IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); 319 320 if (ret) { 321 dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); 322 goto tick_err; 323 } 324 325 return ret; 326 327 tick_err: 328 free_irq(s3c_rtc_alarmno, rtc_dev); 329 return ret; 330 } 331 332 static void s3c_rtc_release(struct device *dev) 333 { 334 struct platform_device *pdev = to_platform_device(dev); 335 struct rtc_device *rtc_dev = platform_get_drvdata(pdev); 336 337 /* do not clear AIE here, it may be needed for wake */ 338 339 s3c_rtc_setpie(dev, 0); 340 free_irq(s3c_rtc_alarmno, rtc_dev); 341 free_irq(s3c_rtc_tickno, rtc_dev); 342 } 343 344 static const struct rtc_class_ops s3c_rtcops = { 345 .open = s3c_rtc_open, 346 .release = s3c_rtc_release, 347 .read_time = s3c_rtc_gettime, 348 .set_time = s3c_rtc_settime, 349 .read_alarm = s3c_rtc_getalarm, 350 .set_alarm = s3c_rtc_setalarm, 351 .proc = s3c_rtc_proc, 352 .alarm_irq_enable = s3c_rtc_setaie, 353 }; 354 355 static void s3c_rtc_enable(struct platform_device *pdev, int en) 356 { 357 void __iomem *base = s3c_rtc_base; 358 unsigned int tmp; 359 360 if (s3c_rtc_base == NULL) 361 return; 362 363 if (!en) { 364 tmp = readw(base + S3C2410_RTCCON); 365 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 366 tmp &= ~S3C64XX_RTCCON_TICEN; 367 tmp &= ~S3C2410_RTCCON_RTCEN; 368 writew(tmp, base + S3C2410_RTCCON); 369 370 if (s3c_rtc_cpu_type == TYPE_S3C2410) { 371 tmp = readb(base + S3C2410_TICNT); 372 tmp &= ~S3C2410_TICNT_ENABLE; 373 writeb(tmp, base + S3C2410_TICNT); 374 } 375 } else { 376 /* re-enable the device, and check it is ok */ 377 378 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) { 379 dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); 380 381 tmp = readw(base + S3C2410_RTCCON); 382 writew(tmp | S3C2410_RTCCON_RTCEN, 383 base + S3C2410_RTCCON); 384 } 385 386 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) { 387 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); 388 389 tmp = readw(base + S3C2410_RTCCON); 390 writew(tmp & ~S3C2410_RTCCON_CNTSEL, 391 base + S3C2410_RTCCON); 392 } 393 394 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) { 395 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); 396 397 tmp = readw(base + S3C2410_RTCCON); 398 writew(tmp & ~S3C2410_RTCCON_CLKRST, 399 base + S3C2410_RTCCON); 400 } 401 } 402 } 403 404 static int __devexit s3c_rtc_remove(struct platform_device *dev) 405 { 406 struct rtc_device *rtc = platform_get_drvdata(dev); 407 408 platform_set_drvdata(dev, NULL); 409 rtc_device_unregister(rtc); 410 411 s3c_rtc_setpie(&dev->dev, 0); 412 s3c_rtc_setaie(&dev->dev, 0); 413 414 clk_disable(rtc_clk); 415 clk_put(rtc_clk); 416 rtc_clk = NULL; 417 418 iounmap(s3c_rtc_base); 419 release_resource(s3c_rtc_mem); 420 kfree(s3c_rtc_mem); 421 422 return 0; 423 } 424 425 static int __devinit s3c_rtc_probe(struct platform_device *pdev) 426 { 427 struct rtc_device *rtc; 428 struct rtc_time rtc_tm; 429 struct resource *res; 430 int ret; 431 432 pr_debug("%s: probe=%p\n", __func__, pdev); 433 434 /* find the IRQs */ 435 436 s3c_rtc_tickno = platform_get_irq(pdev, 1); 437 if (s3c_rtc_tickno < 0) { 438 dev_err(&pdev->dev, "no irq for rtc tick\n"); 439 return -ENOENT; 440 } 441 442 s3c_rtc_alarmno = platform_get_irq(pdev, 0); 443 if (s3c_rtc_alarmno < 0) { 444 dev_err(&pdev->dev, "no irq for alarm\n"); 445 return -ENOENT; 446 } 447 448 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", 449 s3c_rtc_tickno, s3c_rtc_alarmno); 450 451 /* get the memory region */ 452 453 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 454 if (res == NULL) { 455 dev_err(&pdev->dev, "failed to get memory region resource\n"); 456 return -ENOENT; 457 } 458 459 s3c_rtc_mem = request_mem_region(res->start, 460 res->end-res->start+1, 461 pdev->name); 462 463 if (s3c_rtc_mem == NULL) { 464 dev_err(&pdev->dev, "failed to reserve memory region\n"); 465 ret = -ENOENT; 466 goto err_nores; 467 } 468 469 s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); 470 if (s3c_rtc_base == NULL) { 471 dev_err(&pdev->dev, "failed ioremap()\n"); 472 ret = -EINVAL; 473 goto err_nomap; 474 } 475 476 rtc_clk = clk_get(&pdev->dev, "rtc"); 477 if (IS_ERR(rtc_clk)) { 478 dev_err(&pdev->dev, "failed to find rtc clock source\n"); 479 ret = PTR_ERR(rtc_clk); 480 rtc_clk = NULL; 481 goto err_clk; 482 } 483 484 clk_enable(rtc_clk); 485 486 /* check to see if everything is setup correctly */ 487 488 s3c_rtc_enable(pdev, 1); 489 490 pr_debug("s3c2410_rtc: RTCCON=%02x\n", 491 readw(s3c_rtc_base + S3C2410_RTCCON)); 492 493 device_init_wakeup(&pdev->dev, 1); 494 495 /* register RTC and exit */ 496 497 rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, 498 THIS_MODULE); 499 500 if (IS_ERR(rtc)) { 501 dev_err(&pdev->dev, "cannot attach rtc\n"); 502 ret = PTR_ERR(rtc); 503 goto err_nortc; 504 } 505 506 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; 507 508 /* Check RTC Time */ 509 510 s3c_rtc_gettime(NULL, &rtc_tm); 511 512 if (rtc_valid_tm(&rtc_tm)) { 513 rtc_tm.tm_year = 100; 514 rtc_tm.tm_mon = 0; 515 rtc_tm.tm_mday = 1; 516 rtc_tm.tm_hour = 0; 517 rtc_tm.tm_min = 0; 518 rtc_tm.tm_sec = 0; 519 520 s3c_rtc_settime(NULL, &rtc_tm); 521 522 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n"); 523 } 524 525 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 526 rtc->max_user_freq = 32768; 527 else 528 rtc->max_user_freq = 128; 529 530 platform_set_drvdata(pdev, rtc); 531 532 s3c_rtc_setfreq(&pdev->dev, 1); 533 534 return 0; 535 536 err_nortc: 537 s3c_rtc_enable(pdev, 0); 538 clk_disable(rtc_clk); 539 clk_put(rtc_clk); 540 541 err_clk: 542 iounmap(s3c_rtc_base); 543 544 err_nomap: 545 release_resource(s3c_rtc_mem); 546 547 err_nores: 548 return ret; 549 } 550 551 #ifdef CONFIG_PM 552 553 /* RTC Power management control */ 554 555 static int ticnt_save, ticnt_en_save; 556 557 static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) 558 { 559 /* save TICNT for anyone using periodic interrupts */ 560 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); 561 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 562 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON); 563 ticnt_en_save &= S3C64XX_RTCCON_TICEN; 564 } 565 s3c_rtc_enable(pdev, 0); 566 567 if (device_may_wakeup(&pdev->dev)) 568 enable_irq_wake(s3c_rtc_alarmno); 569 570 return 0; 571 } 572 573 static int s3c_rtc_resume(struct platform_device *pdev) 574 { 575 unsigned int tmp; 576 577 s3c_rtc_enable(pdev, 1); 578 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); 579 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) { 580 tmp = readw(s3c_rtc_base + S3C2410_RTCCON); 581 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON); 582 } 583 584 if (device_may_wakeup(&pdev->dev)) 585 disable_irq_wake(s3c_rtc_alarmno); 586 587 return 0; 588 } 589 #else 590 #define s3c_rtc_suspend NULL 591 #define s3c_rtc_resume NULL 592 #endif 593 594 static struct platform_device_id s3c_rtc_driver_ids[] = { 595 { 596 .name = "s3c2410-rtc", 597 .driver_data = TYPE_S3C2410, 598 }, { 599 .name = "s3c64xx-rtc", 600 .driver_data = TYPE_S3C64XX, 601 }, 602 { } 603 }; 604 605 MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids); 606 607 static struct platform_driver s3c_rtc_driver = { 608 .probe = s3c_rtc_probe, 609 .remove = __devexit_p(s3c_rtc_remove), 610 .suspend = s3c_rtc_suspend, 611 .resume = s3c_rtc_resume, 612 .id_table = s3c_rtc_driver_ids, 613 .driver = { 614 .name = "s3c-rtc", 615 .owner = THIS_MODULE, 616 }, 617 }; 618 619 static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; 620 621 static int __init s3c_rtc_init(void) 622 { 623 printk(banner); 624 return platform_driver_register(&s3c_rtc_driver); 625 } 626 627 static void __exit s3c_rtc_exit(void) 628 { 629 platform_driver_unregister(&s3c_rtc_driver); 630 } 631 632 module_init(s3c_rtc_init); 633 module_exit(s3c_rtc_exit); 634 635 MODULE_DESCRIPTION("Samsung S3C RTC Driver"); 636 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 637 MODULE_LICENSE("GPL"); 638 MODULE_ALIAS("platform:s3c2410-rtc"); 639