1 /* drivers/rtc/rtc-s3c.c 2 * 3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com/ 5 * 6 * Copyright (c) 2004,2006 Simtec Electronics 7 * Ben Dooks, <ben@simtec.co.uk> 8 * http://armlinux.simtec.co.uk/ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver 15 */ 16 17 #include <linux/module.h> 18 #include <linux/fs.h> 19 #include <linux/string.h> 20 #include <linux/init.h> 21 #include <linux/platform_device.h> 22 #include <linux/interrupt.h> 23 #include <linux/rtc.h> 24 #include <linux/bcd.h> 25 #include <linux/clk.h> 26 #include <linux/log2.h> 27 #include <linux/slab.h> 28 #include <linux/of.h> 29 30 #include <mach/hardware.h> 31 #include <asm/uaccess.h> 32 #include <asm/io.h> 33 #include <asm/irq.h> 34 #include <plat/regs-rtc.h> 35 36 enum s3c_cpu_type { 37 TYPE_S3C2410, 38 TYPE_S3C2416, 39 TYPE_S3C2443, 40 TYPE_S3C64XX, 41 }; 42 43 /* I have yet to find an S3C implementation with more than one 44 * of these rtc blocks in */ 45 46 static struct resource *s3c_rtc_mem; 47 48 static struct clk *rtc_clk; 49 static void __iomem *s3c_rtc_base; 50 static int s3c_rtc_alarmno = NO_IRQ; 51 static int s3c_rtc_tickno = NO_IRQ; 52 static bool wake_en; 53 static enum s3c_cpu_type s3c_rtc_cpu_type; 54 55 static DEFINE_SPINLOCK(s3c_rtc_pie_lock); 56 57 static void s3c_rtc_alarm_clk_enable(bool enable) 58 { 59 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock); 60 static bool alarm_clk_enabled; 61 unsigned long irq_flags; 62 63 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags); 64 if (enable) { 65 if (!alarm_clk_enabled) { 66 clk_enable(rtc_clk); 67 alarm_clk_enabled = true; 68 } 69 } else { 70 if (alarm_clk_enabled) { 71 clk_disable(rtc_clk); 72 alarm_clk_enabled = false; 73 } 74 } 75 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags); 76 } 77 78 /* IRQ Handlers */ 79 80 static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) 81 { 82 struct rtc_device *rdev = id; 83 84 clk_enable(rtc_clk); 85 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); 86 87 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 88 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP); 89 90 clk_disable(rtc_clk); 91 92 s3c_rtc_alarm_clk_enable(false); 93 94 return IRQ_HANDLED; 95 } 96 97 static irqreturn_t s3c_rtc_tickirq(int irq, void *id) 98 { 99 struct rtc_device *rdev = id; 100 101 clk_enable(rtc_clk); 102 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); 103 104 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 105 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP); 106 107 clk_disable(rtc_clk); 108 return IRQ_HANDLED; 109 } 110 111 /* Update control registers */ 112 static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) 113 { 114 unsigned int tmp; 115 116 pr_debug("%s: aie=%d\n", __func__, enabled); 117 118 clk_enable(rtc_clk); 119 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; 120 121 if (enabled) 122 tmp |= S3C2410_RTCALM_ALMEN; 123 124 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); 125 clk_disable(rtc_clk); 126 127 s3c_rtc_alarm_clk_enable(enabled); 128 129 return 0; 130 } 131 132 static int s3c_rtc_setfreq(struct device *dev, int freq) 133 { 134 struct platform_device *pdev = to_platform_device(dev); 135 struct rtc_device *rtc_dev = platform_get_drvdata(pdev); 136 unsigned int tmp = 0; 137 int val; 138 139 if (!is_power_of_2(freq)) 140 return -EINVAL; 141 142 clk_enable(rtc_clk); 143 spin_lock_irq(&s3c_rtc_pie_lock); 144 145 if (s3c_rtc_cpu_type != TYPE_S3C64XX) { 146 tmp = readb(s3c_rtc_base + S3C2410_TICNT); 147 tmp &= S3C2410_TICNT_ENABLE; 148 } 149 150 val = (rtc_dev->max_user_freq / freq) - 1; 151 152 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) { 153 tmp |= S3C2443_TICNT_PART(val); 154 writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1); 155 156 if (s3c_rtc_cpu_type == TYPE_S3C2416) 157 writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2); 158 } else { 159 tmp |= val; 160 } 161 162 writel(tmp, s3c_rtc_base + S3C2410_TICNT); 163 spin_unlock_irq(&s3c_rtc_pie_lock); 164 clk_disable(rtc_clk); 165 166 return 0; 167 } 168 169 /* Time read/write */ 170 171 static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) 172 { 173 unsigned int have_retried = 0; 174 void __iomem *base = s3c_rtc_base; 175 176 clk_enable(rtc_clk); 177 retry_get_time: 178 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); 179 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); 180 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); 181 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); 182 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); 183 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); 184 185 /* the only way to work out wether the system was mid-update 186 * when we read it is to check the second counter, and if it 187 * is zero, then we re-try the entire read 188 */ 189 190 if (rtc_tm->tm_sec == 0 && !have_retried) { 191 have_retried = 1; 192 goto retry_get_time; 193 } 194 195 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); 196 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); 197 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); 198 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); 199 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); 200 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); 201 202 rtc_tm->tm_year += 100; 203 204 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n", 205 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, 206 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); 207 208 rtc_tm->tm_mon -= 1; 209 210 clk_disable(rtc_clk); 211 return rtc_valid_tm(rtc_tm); 212 } 213 214 static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) 215 { 216 void __iomem *base = s3c_rtc_base; 217 int year = tm->tm_year - 100; 218 219 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n", 220 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, 221 tm->tm_hour, tm->tm_min, tm->tm_sec); 222 223 /* we get around y2k by simply not supporting it */ 224 225 if (year < 0 || year >= 100) { 226 dev_err(dev, "rtc only supports 100 years\n"); 227 return -EINVAL; 228 } 229 230 clk_enable(rtc_clk); 231 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC); 232 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN); 233 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR); 234 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE); 235 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON); 236 writeb(bin2bcd(year), base + S3C2410_RTCYEAR); 237 clk_disable(rtc_clk); 238 239 return 0; 240 } 241 242 static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) 243 { 244 struct rtc_time *alm_tm = &alrm->time; 245 void __iomem *base = s3c_rtc_base; 246 unsigned int alm_en; 247 248 clk_enable(rtc_clk); 249 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); 250 alm_tm->tm_min = readb(base + S3C2410_ALMMIN); 251 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); 252 alm_tm->tm_mon = readb(base + S3C2410_ALMMON); 253 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); 254 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); 255 256 alm_en = readb(base + S3C2410_RTCALM); 257 258 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; 259 260 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n", 261 alm_en, 262 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, 263 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); 264 265 266 /* decode the alarm enable field */ 267 268 if (alm_en & S3C2410_RTCALM_SECEN) 269 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); 270 else 271 alm_tm->tm_sec = -1; 272 273 if (alm_en & S3C2410_RTCALM_MINEN) 274 alm_tm->tm_min = bcd2bin(alm_tm->tm_min); 275 else 276 alm_tm->tm_min = -1; 277 278 if (alm_en & S3C2410_RTCALM_HOUREN) 279 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); 280 else 281 alm_tm->tm_hour = -1; 282 283 if (alm_en & S3C2410_RTCALM_DAYEN) 284 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); 285 else 286 alm_tm->tm_mday = -1; 287 288 if (alm_en & S3C2410_RTCALM_MONEN) { 289 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); 290 alm_tm->tm_mon -= 1; 291 } else { 292 alm_tm->tm_mon = -1; 293 } 294 295 if (alm_en & S3C2410_RTCALM_YEAREN) 296 alm_tm->tm_year = bcd2bin(alm_tm->tm_year); 297 else 298 alm_tm->tm_year = -1; 299 300 clk_disable(rtc_clk); 301 return 0; 302 } 303 304 static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 305 { 306 struct rtc_time *tm = &alrm->time; 307 void __iomem *base = s3c_rtc_base; 308 unsigned int alrm_en; 309 310 clk_enable(rtc_clk); 311 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n", 312 alrm->enabled, 313 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday, 314 tm->tm_hour, tm->tm_min, tm->tm_sec); 315 316 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; 317 writeb(0x00, base + S3C2410_RTCALM); 318 319 if (tm->tm_sec < 60 && tm->tm_sec >= 0) { 320 alrm_en |= S3C2410_RTCALM_SECEN; 321 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC); 322 } 323 324 if (tm->tm_min < 60 && tm->tm_min >= 0) { 325 alrm_en |= S3C2410_RTCALM_MINEN; 326 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN); 327 } 328 329 if (tm->tm_hour < 24 && tm->tm_hour >= 0) { 330 alrm_en |= S3C2410_RTCALM_HOUREN; 331 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR); 332 } 333 334 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); 335 336 writeb(alrm_en, base + S3C2410_RTCALM); 337 338 s3c_rtc_setaie(dev, alrm->enabled); 339 340 clk_disable(rtc_clk); 341 return 0; 342 } 343 344 static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) 345 { 346 unsigned int ticnt; 347 348 clk_enable(rtc_clk); 349 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 350 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON); 351 ticnt &= S3C64XX_RTCCON_TICEN; 352 } else { 353 ticnt = readb(s3c_rtc_base + S3C2410_TICNT); 354 ticnt &= S3C2410_TICNT_ENABLE; 355 } 356 357 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); 358 clk_disable(rtc_clk); 359 return 0; 360 } 361 362 static const struct rtc_class_ops s3c_rtcops = { 363 .read_time = s3c_rtc_gettime, 364 .set_time = s3c_rtc_settime, 365 .read_alarm = s3c_rtc_getalarm, 366 .set_alarm = s3c_rtc_setalarm, 367 .proc = s3c_rtc_proc, 368 .alarm_irq_enable = s3c_rtc_setaie, 369 }; 370 371 static void s3c_rtc_enable(struct platform_device *pdev, int en) 372 { 373 void __iomem *base = s3c_rtc_base; 374 unsigned int tmp; 375 376 if (s3c_rtc_base == NULL) 377 return; 378 379 clk_enable(rtc_clk); 380 if (!en) { 381 tmp = readw(base + S3C2410_RTCCON); 382 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 383 tmp &= ~S3C64XX_RTCCON_TICEN; 384 tmp &= ~S3C2410_RTCCON_RTCEN; 385 writew(tmp, base + S3C2410_RTCCON); 386 387 if (s3c_rtc_cpu_type != TYPE_S3C64XX) { 388 tmp = readb(base + S3C2410_TICNT); 389 tmp &= ~S3C2410_TICNT_ENABLE; 390 writeb(tmp, base + S3C2410_TICNT); 391 } 392 } else { 393 /* re-enable the device, and check it is ok */ 394 395 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) { 396 dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); 397 398 tmp = readw(base + S3C2410_RTCCON); 399 writew(tmp | S3C2410_RTCCON_RTCEN, 400 base + S3C2410_RTCCON); 401 } 402 403 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) { 404 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); 405 406 tmp = readw(base + S3C2410_RTCCON); 407 writew(tmp & ~S3C2410_RTCCON_CNTSEL, 408 base + S3C2410_RTCCON); 409 } 410 411 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) { 412 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); 413 414 tmp = readw(base + S3C2410_RTCCON); 415 writew(tmp & ~S3C2410_RTCCON_CLKRST, 416 base + S3C2410_RTCCON); 417 } 418 } 419 clk_disable(rtc_clk); 420 } 421 422 static int __devexit s3c_rtc_remove(struct platform_device *dev) 423 { 424 struct rtc_device *rtc = platform_get_drvdata(dev); 425 426 free_irq(s3c_rtc_alarmno, rtc); 427 free_irq(s3c_rtc_tickno, rtc); 428 429 platform_set_drvdata(dev, NULL); 430 rtc_device_unregister(rtc); 431 432 s3c_rtc_setaie(&dev->dev, 0); 433 434 clk_put(rtc_clk); 435 rtc_clk = NULL; 436 437 iounmap(s3c_rtc_base); 438 release_resource(s3c_rtc_mem); 439 kfree(s3c_rtc_mem); 440 441 return 0; 442 } 443 444 static const struct of_device_id s3c_rtc_dt_match[]; 445 446 static inline int s3c_rtc_get_driver_data(struct platform_device *pdev) 447 { 448 #ifdef CONFIG_OF 449 if (pdev->dev.of_node) { 450 const struct of_device_id *match; 451 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node); 452 return match->data; 453 } 454 #endif 455 return platform_get_device_id(pdev)->driver_data; 456 } 457 458 static int __devinit s3c_rtc_probe(struct platform_device *pdev) 459 { 460 struct rtc_device *rtc; 461 struct rtc_time rtc_tm; 462 struct resource *res; 463 int ret; 464 int tmp; 465 466 pr_debug("%s: probe=%p\n", __func__, pdev); 467 468 /* find the IRQs */ 469 470 s3c_rtc_tickno = platform_get_irq(pdev, 1); 471 if (s3c_rtc_tickno < 0) { 472 dev_err(&pdev->dev, "no irq for rtc tick\n"); 473 return -ENOENT; 474 } 475 476 s3c_rtc_alarmno = platform_get_irq(pdev, 0); 477 if (s3c_rtc_alarmno < 0) { 478 dev_err(&pdev->dev, "no irq for alarm\n"); 479 return -ENOENT; 480 } 481 482 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", 483 s3c_rtc_tickno, s3c_rtc_alarmno); 484 485 /* get the memory region */ 486 487 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 488 if (res == NULL) { 489 dev_err(&pdev->dev, "failed to get memory region resource\n"); 490 return -ENOENT; 491 } 492 493 s3c_rtc_mem = request_mem_region(res->start, resource_size(res), 494 pdev->name); 495 496 if (s3c_rtc_mem == NULL) { 497 dev_err(&pdev->dev, "failed to reserve memory region\n"); 498 ret = -ENOENT; 499 goto err_nores; 500 } 501 502 s3c_rtc_base = ioremap(res->start, resource_size(res)); 503 if (s3c_rtc_base == NULL) { 504 dev_err(&pdev->dev, "failed ioremap()\n"); 505 ret = -EINVAL; 506 goto err_nomap; 507 } 508 509 rtc_clk = clk_get(&pdev->dev, "rtc"); 510 if (IS_ERR(rtc_clk)) { 511 dev_err(&pdev->dev, "failed to find rtc clock source\n"); 512 ret = PTR_ERR(rtc_clk); 513 rtc_clk = NULL; 514 goto err_clk; 515 } 516 517 clk_enable(rtc_clk); 518 519 /* check to see if everything is setup correctly */ 520 521 s3c_rtc_enable(pdev, 1); 522 523 pr_debug("s3c2410_rtc: RTCCON=%02x\n", 524 readw(s3c_rtc_base + S3C2410_RTCCON)); 525 526 device_init_wakeup(&pdev->dev, 1); 527 528 /* register RTC and exit */ 529 530 rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, 531 THIS_MODULE); 532 533 if (IS_ERR(rtc)) { 534 dev_err(&pdev->dev, "cannot attach rtc\n"); 535 ret = PTR_ERR(rtc); 536 goto err_nortc; 537 } 538 539 s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev); 540 541 /* Check RTC Time */ 542 543 s3c_rtc_gettime(NULL, &rtc_tm); 544 545 if (rtc_valid_tm(&rtc_tm)) { 546 rtc_tm.tm_year = 100; 547 rtc_tm.tm_mon = 0; 548 rtc_tm.tm_mday = 1; 549 rtc_tm.tm_hour = 0; 550 rtc_tm.tm_min = 0; 551 rtc_tm.tm_sec = 0; 552 553 s3c_rtc_settime(NULL, &rtc_tm); 554 555 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n"); 556 } 557 558 if (s3c_rtc_cpu_type != TYPE_S3C2410) 559 rtc->max_user_freq = 32768; 560 else 561 rtc->max_user_freq = 128; 562 563 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) { 564 tmp = readw(s3c_rtc_base + S3C2410_RTCCON); 565 tmp |= S3C2443_RTCCON_TICSEL; 566 writew(tmp, s3c_rtc_base + S3C2410_RTCCON); 567 } 568 569 platform_set_drvdata(pdev, rtc); 570 571 s3c_rtc_setfreq(&pdev->dev, 1); 572 573 ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, 574 0, "s3c2410-rtc alarm", rtc); 575 if (ret) { 576 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); 577 goto err_alarm_irq; 578 } 579 580 ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, 581 0, "s3c2410-rtc tick", rtc); 582 if (ret) { 583 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); 584 free_irq(s3c_rtc_alarmno, rtc); 585 goto err_tick_irq; 586 } 587 588 clk_disable(rtc_clk); 589 590 return 0; 591 592 err_tick_irq: 593 free_irq(s3c_rtc_alarmno, rtc); 594 595 err_alarm_irq: 596 platform_set_drvdata(pdev, NULL); 597 rtc_device_unregister(rtc); 598 599 err_nortc: 600 s3c_rtc_enable(pdev, 0); 601 clk_disable(rtc_clk); 602 clk_put(rtc_clk); 603 604 err_clk: 605 iounmap(s3c_rtc_base); 606 607 err_nomap: 608 release_resource(s3c_rtc_mem); 609 610 err_nores: 611 return ret; 612 } 613 614 #ifdef CONFIG_PM 615 616 /* RTC Power management control */ 617 618 static int ticnt_save, ticnt_en_save; 619 620 static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) 621 { 622 clk_enable(rtc_clk); 623 /* save TICNT for anyone using periodic interrupts */ 624 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); 625 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 626 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON); 627 ticnt_en_save &= S3C64XX_RTCCON_TICEN; 628 } 629 s3c_rtc_enable(pdev, 0); 630 631 if (device_may_wakeup(&pdev->dev) && !wake_en) { 632 if (enable_irq_wake(s3c_rtc_alarmno) == 0) 633 wake_en = true; 634 else 635 dev_err(&pdev->dev, "enable_irq_wake failed\n"); 636 } 637 clk_disable(rtc_clk); 638 639 return 0; 640 } 641 642 static int s3c_rtc_resume(struct platform_device *pdev) 643 { 644 unsigned int tmp; 645 646 clk_enable(rtc_clk); 647 s3c_rtc_enable(pdev, 1); 648 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); 649 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) { 650 tmp = readw(s3c_rtc_base + S3C2410_RTCCON); 651 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON); 652 } 653 654 if (device_may_wakeup(&pdev->dev) && wake_en) { 655 disable_irq_wake(s3c_rtc_alarmno); 656 wake_en = false; 657 } 658 clk_disable(rtc_clk); 659 660 return 0; 661 } 662 #else 663 #define s3c_rtc_suspend NULL 664 #define s3c_rtc_resume NULL 665 #endif 666 667 #ifdef CONFIG_OF 668 static const struct of_device_id s3c_rtc_dt_match[] = { 669 { 670 .compatible = "samsung,s3c2410-rtc" 671 .data = TYPE_S3C2410, 672 }, { 673 .compatible = "samsung,s3c2416-rtc" 674 .data = TYPE_S3C2416, 675 }, { 676 .compatible = "samsung,s3c2443-rtc" 677 .data = TYPE_S3C2443, 678 }, { 679 .compatible = "samsung,s3c6410-rtc" 680 .data = TYPE_S3C64XX, 681 }, 682 {}, 683 }; 684 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match); 685 #else 686 #define s3c_rtc_dt_match NULL 687 #endif 688 689 static struct platform_device_id s3c_rtc_driver_ids[] = { 690 { 691 .name = "s3c2410-rtc", 692 .driver_data = TYPE_S3C2410, 693 }, { 694 .name = "s3c2416-rtc", 695 .driver_data = TYPE_S3C2416, 696 }, { 697 .name = "s3c2443-rtc", 698 .driver_data = TYPE_S3C2443, 699 }, { 700 .name = "s3c64xx-rtc", 701 .driver_data = TYPE_S3C64XX, 702 }, 703 { } 704 }; 705 706 MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids); 707 708 static struct platform_driver s3c_rtc_driver = { 709 .probe = s3c_rtc_probe, 710 .remove = __devexit_p(s3c_rtc_remove), 711 .suspend = s3c_rtc_suspend, 712 .resume = s3c_rtc_resume, 713 .id_table = s3c_rtc_driver_ids, 714 .driver = { 715 .name = "s3c-rtc", 716 .owner = THIS_MODULE, 717 .of_match_table = s3c_rtc_dt_match, 718 }, 719 }; 720 721 module_platform_driver(s3c_rtc_driver); 722 723 MODULE_DESCRIPTION("Samsung S3C RTC Driver"); 724 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 725 MODULE_LICENSE("GPL"); 726 MODULE_ALIAS("platform:s3c2410-rtc"); 727