1 /* drivers/rtc/rtc-s3c.c 2 * 3 * Copyright (c) 2004,2006 Simtec Electronics 4 * Ben Dooks, <ben@simtec.co.uk> 5 * http://armlinux.simtec.co.uk/ 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * S3C2410/S3C2440/S3C24XX Internal RTC Driver 12 */ 13 14 #include <linux/module.h> 15 #include <linux/fs.h> 16 #include <linux/string.h> 17 #include <linux/init.h> 18 #include <linux/platform_device.h> 19 #include <linux/interrupt.h> 20 #include <linux/rtc.h> 21 #include <linux/bcd.h> 22 #include <linux/clk.h> 23 #include <linux/log2.h> 24 #include <linux/slab.h> 25 26 #include <mach/hardware.h> 27 #include <asm/uaccess.h> 28 #include <asm/io.h> 29 #include <asm/irq.h> 30 #include <plat/regs-rtc.h> 31 32 enum s3c_cpu_type { 33 TYPE_S3C2410, 34 TYPE_S3C64XX, 35 }; 36 37 /* I have yet to find an S3C implementation with more than one 38 * of these rtc blocks in */ 39 40 static struct resource *s3c_rtc_mem; 41 42 static void __iomem *s3c_rtc_base; 43 static int s3c_rtc_alarmno = NO_IRQ; 44 static int s3c_rtc_tickno = NO_IRQ; 45 static enum s3c_cpu_type s3c_rtc_cpu_type; 46 47 static DEFINE_SPINLOCK(s3c_rtc_pie_lock); 48 49 /* IRQ Handlers */ 50 51 static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) 52 { 53 struct rtc_device *rdev = id; 54 55 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); 56 return IRQ_HANDLED; 57 } 58 59 static irqreturn_t s3c_rtc_tickirq(int irq, void *id) 60 { 61 struct rtc_device *rdev = id; 62 63 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); 64 return IRQ_HANDLED; 65 } 66 67 /* Update control registers */ 68 static void s3c_rtc_setaie(int to) 69 { 70 unsigned int tmp; 71 72 pr_debug("%s: aie=%d\n", __func__, to); 73 74 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; 75 76 if (to) 77 tmp |= S3C2410_RTCALM_ALMEN; 78 79 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); 80 } 81 82 static int s3c_rtc_setpie(struct device *dev, int enabled) 83 { 84 unsigned int tmp; 85 86 pr_debug("%s: pie=%d\n", __func__, enabled); 87 88 spin_lock_irq(&s3c_rtc_pie_lock); 89 90 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 91 tmp = readb(s3c_rtc_base + S3C2410_RTCCON); 92 tmp &= ~S3C64XX_RTCCON_TICEN; 93 94 if (enabled) 95 tmp |= S3C64XX_RTCCON_TICEN; 96 97 writeb(tmp, s3c_rtc_base + S3C2410_RTCCON); 98 } else { 99 tmp = readb(s3c_rtc_base + S3C2410_TICNT); 100 tmp &= ~S3C2410_TICNT_ENABLE; 101 102 if (enabled) 103 tmp |= S3C2410_TICNT_ENABLE; 104 105 writeb(tmp, s3c_rtc_base + S3C2410_TICNT); 106 } 107 108 spin_unlock_irq(&s3c_rtc_pie_lock); 109 110 return 0; 111 } 112 113 static int s3c_rtc_setfreq(struct device *dev, int freq) 114 { 115 struct platform_device *pdev = to_platform_device(dev); 116 struct rtc_device *rtc_dev = platform_get_drvdata(pdev); 117 unsigned int tmp = 0; 118 119 if (!is_power_of_2(freq)) 120 return -EINVAL; 121 122 spin_lock_irq(&s3c_rtc_pie_lock); 123 124 if (s3c_rtc_cpu_type == TYPE_S3C2410) { 125 tmp = readb(s3c_rtc_base + S3C2410_TICNT); 126 tmp &= S3C2410_TICNT_ENABLE; 127 } 128 129 tmp |= (rtc_dev->max_user_freq / freq)-1; 130 131 writeb(tmp, s3c_rtc_base + S3C2410_TICNT); 132 spin_unlock_irq(&s3c_rtc_pie_lock); 133 134 return 0; 135 } 136 137 /* Time read/write */ 138 139 static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) 140 { 141 unsigned int have_retried = 0; 142 void __iomem *base = s3c_rtc_base; 143 144 retry_get_time: 145 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); 146 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); 147 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); 148 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); 149 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); 150 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); 151 152 /* the only way to work out wether the system was mid-update 153 * when we read it is to check the second counter, and if it 154 * is zero, then we re-try the entire read 155 */ 156 157 if (rtc_tm->tm_sec == 0 && !have_retried) { 158 have_retried = 1; 159 goto retry_get_time; 160 } 161 162 pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", 163 rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, 164 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); 165 166 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); 167 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); 168 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); 169 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); 170 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); 171 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); 172 173 rtc_tm->tm_year += 100; 174 rtc_tm->tm_mon -= 1; 175 176 return 0; 177 } 178 179 static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) 180 { 181 void __iomem *base = s3c_rtc_base; 182 int year = tm->tm_year - 100; 183 184 pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", 185 tm->tm_year, tm->tm_mon, tm->tm_mday, 186 tm->tm_hour, tm->tm_min, tm->tm_sec); 187 188 /* we get around y2k by simply not supporting it */ 189 190 if (year < 0 || year >= 100) { 191 dev_err(dev, "rtc only supports 100 years\n"); 192 return -EINVAL; 193 } 194 195 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC); 196 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN); 197 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR); 198 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE); 199 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON); 200 writeb(bin2bcd(year), base + S3C2410_RTCYEAR); 201 202 return 0; 203 } 204 205 static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) 206 { 207 struct rtc_time *alm_tm = &alrm->time; 208 void __iomem *base = s3c_rtc_base; 209 unsigned int alm_en; 210 211 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); 212 alm_tm->tm_min = readb(base + S3C2410_ALMMIN); 213 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); 214 alm_tm->tm_mon = readb(base + S3C2410_ALMMON); 215 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); 216 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); 217 218 alm_en = readb(base + S3C2410_RTCALM); 219 220 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; 221 222 pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", 223 alm_en, 224 alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, 225 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); 226 227 228 /* decode the alarm enable field */ 229 230 if (alm_en & S3C2410_RTCALM_SECEN) 231 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); 232 else 233 alm_tm->tm_sec = 0xff; 234 235 if (alm_en & S3C2410_RTCALM_MINEN) 236 alm_tm->tm_min = bcd2bin(alm_tm->tm_min); 237 else 238 alm_tm->tm_min = 0xff; 239 240 if (alm_en & S3C2410_RTCALM_HOUREN) 241 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); 242 else 243 alm_tm->tm_hour = 0xff; 244 245 if (alm_en & S3C2410_RTCALM_DAYEN) 246 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); 247 else 248 alm_tm->tm_mday = 0xff; 249 250 if (alm_en & S3C2410_RTCALM_MONEN) { 251 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); 252 alm_tm->tm_mon -= 1; 253 } else { 254 alm_tm->tm_mon = 0xff; 255 } 256 257 if (alm_en & S3C2410_RTCALM_YEAREN) 258 alm_tm->tm_year = bcd2bin(alm_tm->tm_year); 259 else 260 alm_tm->tm_year = 0xffff; 261 262 return 0; 263 } 264 265 static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 266 { 267 struct rtc_time *tm = &alrm->time; 268 void __iomem *base = s3c_rtc_base; 269 unsigned int alrm_en; 270 271 pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", 272 alrm->enabled, 273 tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, 274 tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); 275 276 277 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; 278 writeb(0x00, base + S3C2410_RTCALM); 279 280 if (tm->tm_sec < 60 && tm->tm_sec >= 0) { 281 alrm_en |= S3C2410_RTCALM_SECEN; 282 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC); 283 } 284 285 if (tm->tm_min < 60 && tm->tm_min >= 0) { 286 alrm_en |= S3C2410_RTCALM_MINEN; 287 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN); 288 } 289 290 if (tm->tm_hour < 24 && tm->tm_hour >= 0) { 291 alrm_en |= S3C2410_RTCALM_HOUREN; 292 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR); 293 } 294 295 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); 296 297 writeb(alrm_en, base + S3C2410_RTCALM); 298 299 s3c_rtc_setaie(alrm->enabled); 300 301 if (alrm->enabled) 302 enable_irq_wake(s3c_rtc_alarmno); 303 else 304 disable_irq_wake(s3c_rtc_alarmno); 305 306 return 0; 307 } 308 309 static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) 310 { 311 unsigned int ticnt; 312 313 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 314 ticnt = readb(s3c_rtc_base + S3C2410_RTCCON); 315 ticnt &= S3C64XX_RTCCON_TICEN; 316 } else { 317 ticnt = readb(s3c_rtc_base + S3C2410_TICNT); 318 ticnt &= S3C2410_TICNT_ENABLE; 319 } 320 321 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); 322 return 0; 323 } 324 325 static int s3c_rtc_open(struct device *dev) 326 { 327 struct platform_device *pdev = to_platform_device(dev); 328 struct rtc_device *rtc_dev = platform_get_drvdata(pdev); 329 int ret; 330 331 ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, 332 IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev); 333 334 if (ret) { 335 dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); 336 return ret; 337 } 338 339 ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, 340 IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); 341 342 if (ret) { 343 dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); 344 goto tick_err; 345 } 346 347 return ret; 348 349 tick_err: 350 free_irq(s3c_rtc_alarmno, rtc_dev); 351 return ret; 352 } 353 354 static void s3c_rtc_release(struct device *dev) 355 { 356 struct platform_device *pdev = to_platform_device(dev); 357 struct rtc_device *rtc_dev = platform_get_drvdata(pdev); 358 359 /* do not clear AIE here, it may be needed for wake */ 360 361 s3c_rtc_setpie(dev, 0); 362 free_irq(s3c_rtc_alarmno, rtc_dev); 363 free_irq(s3c_rtc_tickno, rtc_dev); 364 } 365 366 static const struct rtc_class_ops s3c_rtcops = { 367 .open = s3c_rtc_open, 368 .release = s3c_rtc_release, 369 .read_time = s3c_rtc_gettime, 370 .set_time = s3c_rtc_settime, 371 .read_alarm = s3c_rtc_getalarm, 372 .set_alarm = s3c_rtc_setalarm, 373 .irq_set_freq = s3c_rtc_setfreq, 374 .irq_set_state = s3c_rtc_setpie, 375 .proc = s3c_rtc_proc, 376 }; 377 378 static void s3c_rtc_enable(struct platform_device *pdev, int en) 379 { 380 void __iomem *base = s3c_rtc_base; 381 unsigned int tmp; 382 383 if (s3c_rtc_base == NULL) 384 return; 385 386 if (!en) { 387 tmp = readb(base + S3C2410_RTCCON); 388 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 389 tmp &= ~S3C64XX_RTCCON_TICEN; 390 tmp &= ~S3C2410_RTCCON_RTCEN; 391 writeb(tmp, base + S3C2410_RTCCON); 392 393 if (s3c_rtc_cpu_type == TYPE_S3C2410) { 394 tmp = readb(base + S3C2410_TICNT); 395 tmp &= ~S3C2410_TICNT_ENABLE; 396 writeb(tmp, base + S3C2410_TICNT); 397 } 398 } else { 399 /* re-enable the device, and check it is ok */ 400 401 if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ 402 dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); 403 404 tmp = readb(base + S3C2410_RTCCON); 405 writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); 406 } 407 408 if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ 409 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); 410 411 tmp = readb(base + S3C2410_RTCCON); 412 writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); 413 } 414 415 if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ 416 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); 417 418 tmp = readb(base + S3C2410_RTCCON); 419 writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); 420 } 421 } 422 } 423 424 static int __devexit s3c_rtc_remove(struct platform_device *dev) 425 { 426 struct rtc_device *rtc = platform_get_drvdata(dev); 427 428 platform_set_drvdata(dev, NULL); 429 rtc_device_unregister(rtc); 430 431 s3c_rtc_setpie(&dev->dev, 0); 432 s3c_rtc_setaie(0); 433 434 iounmap(s3c_rtc_base); 435 release_resource(s3c_rtc_mem); 436 kfree(s3c_rtc_mem); 437 438 return 0; 439 } 440 441 static int __devinit s3c_rtc_probe(struct platform_device *pdev) 442 { 443 struct rtc_device *rtc; 444 struct resource *res; 445 int ret; 446 447 pr_debug("%s: probe=%p\n", __func__, pdev); 448 449 /* find the IRQs */ 450 451 s3c_rtc_tickno = platform_get_irq(pdev, 1); 452 if (s3c_rtc_tickno < 0) { 453 dev_err(&pdev->dev, "no irq for rtc tick\n"); 454 return -ENOENT; 455 } 456 457 s3c_rtc_alarmno = platform_get_irq(pdev, 0); 458 if (s3c_rtc_alarmno < 0) { 459 dev_err(&pdev->dev, "no irq for alarm\n"); 460 return -ENOENT; 461 } 462 463 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", 464 s3c_rtc_tickno, s3c_rtc_alarmno); 465 466 /* get the memory region */ 467 468 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 469 if (res == NULL) { 470 dev_err(&pdev->dev, "failed to get memory region resource\n"); 471 return -ENOENT; 472 } 473 474 s3c_rtc_mem = request_mem_region(res->start, 475 res->end-res->start+1, 476 pdev->name); 477 478 if (s3c_rtc_mem == NULL) { 479 dev_err(&pdev->dev, "failed to reserve memory region\n"); 480 ret = -ENOENT; 481 goto err_nores; 482 } 483 484 s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); 485 if (s3c_rtc_base == NULL) { 486 dev_err(&pdev->dev, "failed ioremap()\n"); 487 ret = -EINVAL; 488 goto err_nomap; 489 } 490 491 /* check to see if everything is setup correctly */ 492 493 s3c_rtc_enable(pdev, 1); 494 495 pr_debug("s3c2410_rtc: RTCCON=%02x\n", 496 readb(s3c_rtc_base + S3C2410_RTCCON)); 497 498 device_init_wakeup(&pdev->dev, 1); 499 500 /* register RTC and exit */ 501 502 rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, 503 THIS_MODULE); 504 505 if (IS_ERR(rtc)) { 506 dev_err(&pdev->dev, "cannot attach rtc\n"); 507 ret = PTR_ERR(rtc); 508 goto err_nortc; 509 } 510 511 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; 512 513 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 514 rtc->max_user_freq = 32768; 515 else 516 rtc->max_user_freq = 128; 517 518 platform_set_drvdata(pdev, rtc); 519 520 s3c_rtc_setfreq(&pdev->dev, 1); 521 522 return 0; 523 524 err_nortc: 525 s3c_rtc_enable(pdev, 0); 526 iounmap(s3c_rtc_base); 527 528 err_nomap: 529 release_resource(s3c_rtc_mem); 530 531 err_nores: 532 return ret; 533 } 534 535 #ifdef CONFIG_PM 536 537 /* RTC Power management control */ 538 539 static int ticnt_save, ticnt_en_save; 540 541 static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) 542 { 543 /* save TICNT for anyone using periodic interrupts */ 544 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); 545 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 546 ticnt_en_save = readb(s3c_rtc_base + S3C2410_RTCCON); 547 ticnt_en_save &= S3C64XX_RTCCON_TICEN; 548 } 549 s3c_rtc_enable(pdev, 0); 550 return 0; 551 } 552 553 static int s3c_rtc_resume(struct platform_device *pdev) 554 { 555 unsigned int tmp; 556 557 s3c_rtc_enable(pdev, 1); 558 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); 559 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) { 560 tmp = readb(s3c_rtc_base + S3C2410_RTCCON); 561 writeb(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON); 562 } 563 return 0; 564 } 565 #else 566 #define s3c_rtc_suspend NULL 567 #define s3c_rtc_resume NULL 568 #endif 569 570 static struct platform_device_id s3c_rtc_driver_ids[] = { 571 { 572 .name = "s3c2410-rtc", 573 .driver_data = TYPE_S3C2410, 574 }, { 575 .name = "s3c64xx-rtc", 576 .driver_data = TYPE_S3C64XX, 577 }, 578 { } 579 }; 580 581 MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids); 582 583 static struct platform_driver s3c_rtc_driver = { 584 .probe = s3c_rtc_probe, 585 .remove = __devexit_p(s3c_rtc_remove), 586 .suspend = s3c_rtc_suspend, 587 .resume = s3c_rtc_resume, 588 .id_table = s3c_rtc_driver_ids, 589 .driver = { 590 .name = "s3c-rtc", 591 .owner = THIS_MODULE, 592 }, 593 }; 594 595 static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; 596 597 static int __init s3c_rtc_init(void) 598 { 599 printk(banner); 600 return platform_driver_register(&s3c_rtc_driver); 601 } 602 603 static void __exit s3c_rtc_exit(void) 604 { 605 platform_driver_unregister(&s3c_rtc_driver); 606 } 607 608 module_init(s3c_rtc_init); 609 module_exit(s3c_rtc_exit); 610 611 MODULE_DESCRIPTION("Samsung S3C RTC Driver"); 612 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 613 MODULE_LICENSE("GPL"); 614 MODULE_ALIAS("platform:s3c2410-rtc"); 615