xref: /linux/drivers/rtc/rtc-rv3028.c (revision bdaedca74d6293b6ac643a8ebe8231b52bf1171b)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * RTC driver for the Micro Crystal RV3028
4  *
5  * Copyright (C) 2019 Micro Crystal SA
6  *
7  * Alexandre Belloni <alexandre.belloni@bootlin.com>
8  *
9  */
10 
11 #include <linux/clk-provider.h>
12 #include <linux/bcd.h>
13 #include <linux/bitops.h>
14 #include <linux/i2c.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/log2.h>
18 #include <linux/module.h>
19 #include <linux/of_device.h>
20 #include <linux/regmap.h>
21 #include <linux/rtc.h>
22 
23 #define RV3028_SEC			0x00
24 #define RV3028_MIN			0x01
25 #define RV3028_HOUR			0x02
26 #define RV3028_WDAY			0x03
27 #define RV3028_DAY			0x04
28 #define RV3028_MONTH			0x05
29 #define RV3028_YEAR			0x06
30 #define RV3028_ALARM_MIN		0x07
31 #define RV3028_ALARM_HOUR		0x08
32 #define RV3028_ALARM_DAY		0x09
33 #define RV3028_STATUS			0x0E
34 #define RV3028_CTRL1			0x0F
35 #define RV3028_CTRL2			0x10
36 #define RV3028_EVT_CTRL			0x13
37 #define RV3028_TS_COUNT			0x14
38 #define RV3028_TS_SEC			0x15
39 #define RV3028_RAM1			0x1F
40 #define RV3028_EEPROM_ADDR		0x25
41 #define RV3028_EEPROM_DATA		0x26
42 #define RV3028_EEPROM_CMD		0x27
43 #define RV3028_CLKOUT			0x35
44 #define RV3028_OFFSET			0x36
45 #define RV3028_BACKUP			0x37
46 
47 #define RV3028_STATUS_PORF		BIT(0)
48 #define RV3028_STATUS_EVF		BIT(1)
49 #define RV3028_STATUS_AF		BIT(2)
50 #define RV3028_STATUS_TF		BIT(3)
51 #define RV3028_STATUS_UF		BIT(4)
52 #define RV3028_STATUS_BSF		BIT(5)
53 #define RV3028_STATUS_CLKF		BIT(6)
54 #define RV3028_STATUS_EEBUSY		BIT(7)
55 
56 #define RV3028_CLKOUT_FD_MASK		GENMASK(2, 0)
57 #define RV3028_CLKOUT_PORIE		BIT(3)
58 #define RV3028_CLKOUT_CLKSY		BIT(6)
59 #define RV3028_CLKOUT_CLKOE		BIT(7)
60 
61 #define RV3028_CTRL1_EERD		BIT(3)
62 #define RV3028_CTRL1_WADA		BIT(5)
63 
64 #define RV3028_CTRL2_RESET		BIT(0)
65 #define RV3028_CTRL2_12_24		BIT(1)
66 #define RV3028_CTRL2_EIE		BIT(2)
67 #define RV3028_CTRL2_AIE		BIT(3)
68 #define RV3028_CTRL2_TIE		BIT(4)
69 #define RV3028_CTRL2_UIE		BIT(5)
70 #define RV3028_CTRL2_TSE		BIT(7)
71 
72 #define RV3028_EVT_CTRL_TSR		BIT(2)
73 
74 #define RV3028_EEPROM_CMD_UPDATE	0x11
75 #define RV3028_EEPROM_CMD_WRITE		0x21
76 #define RV3028_EEPROM_CMD_READ		0x22
77 
78 #define RV3028_EEBUSY_POLL		10000
79 #define RV3028_EEBUSY_TIMEOUT		100000
80 
81 #define RV3028_BACKUP_TCE		BIT(5)
82 #define RV3028_BACKUP_TCR_MASK		GENMASK(1,0)
83 
84 #define OFFSET_STEP_PPT			953674
85 
86 enum rv3028_type {
87 	rv_3028,
88 };
89 
90 struct rv3028_data {
91 	struct regmap *regmap;
92 	struct rtc_device *rtc;
93 	enum rv3028_type type;
94 #ifdef CONFIG_COMMON_CLK
95 	struct clk_hw clkout_hw;
96 #endif
97 };
98 
99 static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000};
100 
101 static ssize_t timestamp0_store(struct device *dev,
102 				struct device_attribute *attr,
103 				const char *buf, size_t count)
104 {
105 	struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
106 
107 	regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR,
108 			   RV3028_EVT_CTRL_TSR);
109 
110 	return count;
111 };
112 
113 static ssize_t timestamp0_show(struct device *dev,
114 			       struct device_attribute *attr, char *buf)
115 {
116 	struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
117 	struct rtc_time tm;
118 	int ret, count;
119 	u8 date[6];
120 
121 	ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
122 	if (ret)
123 		return ret;
124 
125 	if (!count)
126 		return 0;
127 
128 	ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date,
129 			       sizeof(date));
130 	if (ret)
131 		return ret;
132 
133 	tm.tm_sec = bcd2bin(date[0]);
134 	tm.tm_min = bcd2bin(date[1]);
135 	tm.tm_hour = bcd2bin(date[2]);
136 	tm.tm_mday = bcd2bin(date[3]);
137 	tm.tm_mon = bcd2bin(date[4]) - 1;
138 	tm.tm_year = bcd2bin(date[5]) + 100;
139 
140 	ret = rtc_valid_tm(&tm);
141 	if (ret)
142 		return ret;
143 
144 	return sprintf(buf, "%llu\n",
145 		       (unsigned long long)rtc_tm_to_time64(&tm));
146 };
147 
148 static DEVICE_ATTR_RW(timestamp0);
149 
150 static ssize_t timestamp0_count_show(struct device *dev,
151 				     struct device_attribute *attr, char *buf)
152 {
153 	struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
154 	int ret, count;
155 
156 	ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
157 	if (ret)
158 		return ret;
159 
160 	return sprintf(buf, "%u\n", count);
161 };
162 
163 static DEVICE_ATTR_RO(timestamp0_count);
164 
165 static struct attribute *rv3028_attrs[] = {
166 	&dev_attr_timestamp0.attr,
167 	&dev_attr_timestamp0_count.attr,
168 	NULL
169 };
170 
171 static const struct attribute_group rv3028_attr_group = {
172 	.attrs	= rv3028_attrs,
173 };
174 
175 static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd)
176 {
177 	if (eerd)
178 		return 0;
179 
180 	return regmap_update_bits(rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, 0);
181 }
182 
183 static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd)
184 {
185 	u32 ctrl1, status;
186 	int ret;
187 
188 	ret = regmap_read(rv3028->regmap, RV3028_CTRL1, &ctrl1);
189 	if (ret)
190 		return ret;
191 
192 	*eerd = ctrl1 & RV3028_CTRL1_EERD;
193 	if (*eerd)
194 		return 0;
195 
196 	ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
197 				 RV3028_CTRL1_EERD, RV3028_CTRL1_EERD);
198 	if (ret)
199 		return ret;
200 
201 	ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
202 				       !(status & RV3028_STATUS_EEBUSY),
203 				       RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
204 	if (ret) {
205 		rv3028_exit_eerd(rv3028, *eerd);
206 
207 		return ret;
208 	}
209 
210 	return 0;
211 }
212 
213 static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd)
214 {
215 	u32 status;
216 	int ret;
217 
218 	ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
219 	if (ret)
220 		goto exit_eerd;
221 
222 	ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE);
223 	if (ret)
224 		goto exit_eerd;
225 
226 	usleep_range(63000, RV3028_EEBUSY_TIMEOUT);
227 
228 	ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
229 				       !(status & RV3028_STATUS_EEBUSY),
230 				       RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
231 
232 exit_eerd:
233 	rv3028_exit_eerd(rv3028, eerd);
234 
235 	return ret;
236 }
237 
238 static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg,
239 			     unsigned int mask, unsigned int val)
240 {
241 	u32 eerd;
242 	int ret;
243 
244 	ret = rv3028_enter_eerd(rv3028, &eerd);
245 	if (ret)
246 		return ret;
247 
248 	ret = regmap_update_bits(rv3028->regmap, reg, mask, val);
249 	if (ret) {
250 		rv3028_exit_eerd(rv3028, eerd);
251 		return ret;
252 	}
253 
254 	return rv3028_update_eeprom(rv3028, eerd);
255 }
256 
257 static irqreturn_t rv3028_handle_irq(int irq, void *dev_id)
258 {
259 	struct rv3028_data *rv3028 = dev_id;
260 	unsigned long events = 0;
261 	u32 status = 0, ctrl = 0;
262 
263 	if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 ||
264 	   status == 0) {
265 		return IRQ_NONE;
266 	}
267 
268 	status &= ~RV3028_STATUS_PORF;
269 
270 	if (status & RV3028_STATUS_TF) {
271 		status |= RV3028_STATUS_TF;
272 		ctrl |= RV3028_CTRL2_TIE;
273 		events |= RTC_PF;
274 	}
275 
276 	if (status & RV3028_STATUS_AF) {
277 		status |= RV3028_STATUS_AF;
278 		ctrl |= RV3028_CTRL2_AIE;
279 		events |= RTC_AF;
280 	}
281 
282 	if (status & RV3028_STATUS_UF) {
283 		status |= RV3028_STATUS_UF;
284 		ctrl |= RV3028_CTRL2_UIE;
285 		events |= RTC_UF;
286 	}
287 
288 	if (events) {
289 		rtc_update_irq(rv3028->rtc, 1, events);
290 		regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0);
291 		regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0);
292 	}
293 
294 	if (status & RV3028_STATUS_EVF) {
295 		sysfs_notify(&rv3028->rtc->dev.kobj, NULL,
296 			     dev_attr_timestamp0.attr.name);
297 		dev_warn(&rv3028->rtc->dev, "event detected");
298 	}
299 
300 	return IRQ_HANDLED;
301 }
302 
303 static int rv3028_get_time(struct device *dev, struct rtc_time *tm)
304 {
305 	struct rv3028_data *rv3028 = dev_get_drvdata(dev);
306 	u8 date[7];
307 	int ret, status;
308 
309 	ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
310 	if (ret < 0)
311 		return ret;
312 
313 	if (status & RV3028_STATUS_PORF)
314 		return -EINVAL;
315 
316 	ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date));
317 	if (ret)
318 		return ret;
319 
320 	tm->tm_sec  = bcd2bin(date[RV3028_SEC] & 0x7f);
321 	tm->tm_min  = bcd2bin(date[RV3028_MIN] & 0x7f);
322 	tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f);
323 	tm->tm_wday = date[RV3028_WDAY] & 0x7f;
324 	tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f);
325 	tm->tm_mon  = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1;
326 	tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100;
327 
328 	return 0;
329 }
330 
331 static int rv3028_set_time(struct device *dev, struct rtc_time *tm)
332 {
333 	struct rv3028_data *rv3028 = dev_get_drvdata(dev);
334 	u8 date[7];
335 	int ret;
336 
337 	date[RV3028_SEC]   = bin2bcd(tm->tm_sec);
338 	date[RV3028_MIN]   = bin2bcd(tm->tm_min);
339 	date[RV3028_HOUR]  = bin2bcd(tm->tm_hour);
340 	date[RV3028_WDAY]  = tm->tm_wday;
341 	date[RV3028_DAY]   = bin2bcd(tm->tm_mday);
342 	date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1);
343 	date[RV3028_YEAR]  = bin2bcd(tm->tm_year - 100);
344 
345 	/*
346 	 * Writing to the Seconds register has the same effect as setting RESET
347 	 * bit to 1
348 	 */
349 	ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date,
350 				sizeof(date));
351 	if (ret)
352 		return ret;
353 
354 	ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
355 				 RV3028_STATUS_PORF, 0);
356 
357 	return ret;
358 }
359 
360 static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm)
361 {
362 	struct rv3028_data *rv3028 = dev_get_drvdata(dev);
363 	u8 alarmvals[3];
364 	int status, ctrl, ret;
365 
366 	ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
367 			       sizeof(alarmvals));
368 	if (ret)
369 		return ret;
370 
371 	ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
372 	if (ret < 0)
373 		return ret;
374 
375 	ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl);
376 	if (ret < 0)
377 		return ret;
378 
379 	alrm->time.tm_sec  = 0;
380 	alrm->time.tm_min  = bcd2bin(alarmvals[0] & 0x7f);
381 	alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
382 	alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f);
383 
384 	alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE);
385 	alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled;
386 
387 	return 0;
388 }
389 
390 static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
391 {
392 	struct rv3028_data *rv3028 = dev_get_drvdata(dev);
393 	u8 alarmvals[3];
394 	u8 ctrl = 0;
395 	int ret;
396 
397 	/* The alarm has no seconds, round up to nearest minute */
398 	if (alrm->time.tm_sec) {
399 		time64_t alarm_time = rtc_tm_to_time64(&alrm->time);
400 
401 		alarm_time += 60 - alrm->time.tm_sec;
402 		rtc_time64_to_tm(alarm_time, &alrm->time);
403 	}
404 
405 	ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
406 				 RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0);
407 	if (ret)
408 		return ret;
409 
410 	alarmvals[0] = bin2bcd(alrm->time.tm_min);
411 	alarmvals[1] = bin2bcd(alrm->time.tm_hour);
412 	alarmvals[2] = bin2bcd(alrm->time.tm_mday);
413 
414 	ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
415 				 RV3028_STATUS_AF, 0);
416 	if (ret)
417 		return ret;
418 
419 	ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
420 				sizeof(alarmvals));
421 	if (ret)
422 		return ret;
423 
424 	if (alrm->enabled) {
425 		if (rv3028->rtc->uie_rtctimer.enabled)
426 			ctrl |= RV3028_CTRL2_UIE;
427 		if (rv3028->rtc->aie_timer.enabled)
428 			ctrl |= RV3028_CTRL2_AIE;
429 	}
430 
431 	ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
432 				 RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
433 
434 	return ret;
435 }
436 
437 static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled)
438 {
439 	struct rv3028_data *rv3028 = dev_get_drvdata(dev);
440 	int ctrl = 0, ret;
441 
442 	if (enabled) {
443 		if (rv3028->rtc->uie_rtctimer.enabled)
444 			ctrl |= RV3028_CTRL2_UIE;
445 		if (rv3028->rtc->aie_timer.enabled)
446 			ctrl |= RV3028_CTRL2_AIE;
447 	}
448 
449 	ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
450 				 RV3028_STATUS_AF | RV3028_STATUS_UF, 0);
451 	if (ret)
452 		return ret;
453 
454 	ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
455 				 RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
456 	if (ret)
457 		return ret;
458 
459 	return 0;
460 }
461 
462 static int rv3028_read_offset(struct device *dev, long *offset)
463 {
464 	struct rv3028_data *rv3028 = dev_get_drvdata(dev);
465 	int ret, value, steps;
466 
467 	ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value);
468 	if (ret < 0)
469 		return ret;
470 
471 	steps = sign_extend32(value << 1, 8);
472 
473 	ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
474 	if (ret < 0)
475 		return ret;
476 
477 	steps += value >> 7;
478 
479 	*offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000);
480 
481 	return 0;
482 }
483 
484 static int rv3028_set_offset(struct device *dev, long offset)
485 {
486 	struct rv3028_data *rv3028 = dev_get_drvdata(dev);
487 	u32 eerd;
488 	int ret;
489 
490 	offset = clamp(offset, -244141L, 243187L) * 1000;
491 	offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT);
492 
493 	ret = rv3028_enter_eerd(rv3028, &eerd);
494 	if (ret)
495 		return ret;
496 
497 	ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1);
498 	if (ret < 0)
499 		goto exit_eerd;
500 
501 	ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7),
502 				 offset << 7);
503 	if (ret < 0)
504 		goto exit_eerd;
505 
506 	return rv3028_update_eeprom(rv3028, eerd);
507 
508 exit_eerd:
509 	rv3028_exit_eerd(rv3028, eerd);
510 
511 	return ret;
512 
513 }
514 
515 static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
516 {
517 	struct rv3028_data *rv3028 = dev_get_drvdata(dev);
518 	int status, ret = 0;
519 
520 	switch (cmd) {
521 	case RTC_VL_READ:
522 		ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
523 		if (ret < 0)
524 			return ret;
525 
526 		status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0;
527 		return put_user(status, (unsigned int __user *)arg);
528 
529 	default:
530 		return -ENOIOCTLCMD;
531 	}
532 }
533 
534 static int rv3028_nvram_write(void *priv, unsigned int offset, void *val,
535 			      size_t bytes)
536 {
537 	return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes);
538 }
539 
540 static int rv3028_nvram_read(void *priv, unsigned int offset, void *val,
541 			     size_t bytes)
542 {
543 	return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes);
544 }
545 
546 static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val,
547 			       size_t bytes)
548 {
549 	struct rv3028_data *rv3028 = priv;
550 	u32 status, eerd;
551 	int i, ret;
552 	u8 *buf = val;
553 
554 	ret = rv3028_enter_eerd(rv3028, &eerd);
555 	if (ret)
556 		return ret;
557 
558 	for (i = 0; i < bytes; i++) {
559 		ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
560 		if (ret)
561 			goto restore_eerd;
562 
563 		ret = regmap_write(rv3028->regmap, RV3028_EEPROM_DATA, buf[i]);
564 		if (ret)
565 			goto restore_eerd;
566 
567 		ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
568 		if (ret)
569 			goto restore_eerd;
570 
571 		ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
572 				   RV3028_EEPROM_CMD_WRITE);
573 		if (ret)
574 			goto restore_eerd;
575 
576 		usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
577 
578 		ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
579 					       !(status & RV3028_STATUS_EEBUSY),
580 					       RV3028_EEBUSY_POLL,
581 					       RV3028_EEBUSY_TIMEOUT);
582 		if (ret)
583 			goto restore_eerd;
584 	}
585 
586 restore_eerd:
587 	rv3028_exit_eerd(rv3028, eerd);
588 
589 	return ret;
590 }
591 
592 static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val,
593 			      size_t bytes)
594 {
595 	struct rv3028_data *rv3028 = priv;
596 	u32 status, eerd, data;
597 	int i, ret;
598 	u8 *buf = val;
599 
600 	ret = rv3028_enter_eerd(rv3028, &eerd);
601 	if (ret)
602 		return ret;
603 
604 	for (i = 0; i < bytes; i++) {
605 		ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
606 		if (ret)
607 			goto restore_eerd;
608 
609 		ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
610 		if (ret)
611 			goto restore_eerd;
612 
613 		ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
614 				   RV3028_EEPROM_CMD_READ);
615 		if (ret)
616 			goto restore_eerd;
617 
618 		ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
619 					       !(status & RV3028_STATUS_EEBUSY),
620 					       RV3028_EEBUSY_POLL,
621 					       RV3028_EEBUSY_TIMEOUT);
622 		if (ret)
623 			goto restore_eerd;
624 
625 		ret = regmap_read(rv3028->regmap, RV3028_EEPROM_DATA, &data);
626 		if (ret)
627 			goto restore_eerd;
628 		buf[i] = data;
629 	}
630 
631 restore_eerd:
632 	rv3028_exit_eerd(rv3028, eerd);
633 
634 	return ret;
635 }
636 
637 #ifdef CONFIG_COMMON_CLK
638 #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw)
639 
640 static int clkout_rates[] = {
641 	32768,
642 	8192,
643 	1024,
644 	64,
645 	32,
646 	1,
647 };
648 
649 static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw,
650 					       unsigned long parent_rate)
651 {
652 	int clkout, ret;
653 	struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
654 
655 	ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
656 	if (ret < 0)
657 		return 0;
658 
659 	clkout &= RV3028_CLKOUT_FD_MASK;
660 	return clkout_rates[clkout];
661 }
662 
663 static long rv3028_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
664 				     unsigned long *prate)
665 {
666 	int i;
667 
668 	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
669 		if (clkout_rates[i] <= rate)
670 			return clkout_rates[i];
671 
672 	return 0;
673 }
674 
675 static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
676 				  unsigned long parent_rate)
677 {
678 	int i, ret;
679 	u32 enabled;
680 	struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
681 
682 	ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled);
683 	if (ret < 0)
684 		return ret;
685 
686 	ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
687 	if (ret < 0)
688 		return ret;
689 
690 	enabled &= RV3028_CLKOUT_CLKOE;
691 
692 	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
693 		if (clkout_rates[i] == rate)
694 			return rv3028_update_cfg(rv3028, RV3028_CLKOUT, 0xff,
695 						 RV3028_CLKOUT_CLKSY | enabled | i);
696 
697 	return -EINVAL;
698 }
699 
700 static int rv3028_clkout_prepare(struct clk_hw *hw)
701 {
702 	struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
703 
704 	return regmap_write(rv3028->regmap, RV3028_CLKOUT,
705 			    RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE);
706 }
707 
708 static void rv3028_clkout_unprepare(struct clk_hw *hw)
709 {
710 	struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
711 
712 	regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
713 	regmap_update_bits(rv3028->regmap, RV3028_STATUS,
714 			   RV3028_STATUS_CLKF, 0);
715 }
716 
717 static int rv3028_clkout_is_prepared(struct clk_hw *hw)
718 {
719 	int clkout, ret;
720 	struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
721 
722 	ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
723 	if (ret < 0)
724 		return ret;
725 
726 	return !!(clkout & RV3028_CLKOUT_CLKOE);
727 }
728 
729 static const struct clk_ops rv3028_clkout_ops = {
730 	.prepare = rv3028_clkout_prepare,
731 	.unprepare = rv3028_clkout_unprepare,
732 	.is_prepared = rv3028_clkout_is_prepared,
733 	.recalc_rate = rv3028_clkout_recalc_rate,
734 	.round_rate = rv3028_clkout_round_rate,
735 	.set_rate = rv3028_clkout_set_rate,
736 };
737 
738 static int rv3028_clkout_register_clk(struct rv3028_data *rv3028,
739 				      struct i2c_client *client)
740 {
741 	int ret;
742 	struct clk *clk;
743 	struct clk_init_data init;
744 	struct device_node *node = client->dev.of_node;
745 
746 	ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
747 				 RV3028_STATUS_CLKF, 0);
748 	if (ret < 0)
749 		return ret;
750 
751 	init.name = "rv3028-clkout";
752 	init.ops = &rv3028_clkout_ops;
753 	init.flags = 0;
754 	init.parent_names = NULL;
755 	init.num_parents = 0;
756 	rv3028->clkout_hw.init = &init;
757 
758 	/* optional override of the clockname */
759 	of_property_read_string(node, "clock-output-names", &init.name);
760 
761 	/* register the clock */
762 	clk = devm_clk_register(&client->dev, &rv3028->clkout_hw);
763 	if (!IS_ERR(clk))
764 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
765 
766 	return 0;
767 }
768 #endif
769 
770 static const struct rtc_class_ops rv3028_rtc_ops = {
771 	.read_time = rv3028_get_time,
772 	.set_time = rv3028_set_time,
773 	.read_alarm = rv3028_get_alarm,
774 	.set_alarm = rv3028_set_alarm,
775 	.alarm_irq_enable = rv3028_alarm_irq_enable,
776 	.read_offset = rv3028_read_offset,
777 	.set_offset = rv3028_set_offset,
778 	.ioctl = rv3028_ioctl,
779 };
780 
781 static const struct regmap_config regmap_config = {
782         .reg_bits = 8,
783         .val_bits = 8,
784         .max_register = 0x37,
785 };
786 
787 static int rv3028_probe(struct i2c_client *client)
788 {
789 	struct rv3028_data *rv3028;
790 	int ret, status;
791 	u32 ohms;
792 	struct nvmem_config nvmem_cfg = {
793 		.name = "rv3028_nvram",
794 		.word_size = 1,
795 		.stride = 1,
796 		.size = 2,
797 		.type = NVMEM_TYPE_BATTERY_BACKED,
798 		.reg_read = rv3028_nvram_read,
799 		.reg_write = rv3028_nvram_write,
800 	};
801 	struct nvmem_config eeprom_cfg = {
802 		.name = "rv3028_eeprom",
803 		.word_size = 1,
804 		.stride = 1,
805 		.size = 43,
806 		.type = NVMEM_TYPE_EEPROM,
807 		.reg_read = rv3028_eeprom_read,
808 		.reg_write = rv3028_eeprom_write,
809 	};
810 
811 	rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data),
812 			      GFP_KERNEL);
813 	if (!rv3028)
814 		return -ENOMEM;
815 
816 	rv3028->regmap = devm_regmap_init_i2c(client, &regmap_config);
817 	if (IS_ERR(rv3028->regmap))
818 		return PTR_ERR(rv3028->regmap);
819 
820 	i2c_set_clientdata(client, rv3028);
821 
822 	ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
823 	if (ret < 0)
824 		return ret;
825 
826 	if (status & RV3028_STATUS_AF)
827 		dev_warn(&client->dev, "An alarm may have been missed.\n");
828 
829 	rv3028->rtc = devm_rtc_allocate_device(&client->dev);
830 	if (IS_ERR(rv3028->rtc))
831 		return PTR_ERR(rv3028->rtc);
832 
833 	if (client->irq > 0) {
834 		ret = devm_request_threaded_irq(&client->dev, client->irq,
835 						NULL, rv3028_handle_irq,
836 						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
837 						"rv3028", rv3028);
838 		if (ret) {
839 			dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
840 			client->irq = 0;
841 		}
842 	}
843 	if (!client->irq)
844 		clear_bit(RTC_FEATURE_ALARM, rv3028->rtc->features);
845 
846 	ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
847 				 RV3028_CTRL1_WADA, RV3028_CTRL1_WADA);
848 	if (ret)
849 		return ret;
850 
851 	/* setup timestamping */
852 	ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
853 				 RV3028_CTRL2_EIE | RV3028_CTRL2_TSE,
854 				 RV3028_CTRL2_EIE | RV3028_CTRL2_TSE);
855 	if (ret)
856 		return ret;
857 
858 	/* setup trickle charger */
859 	if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms",
860 				      &ohms)) {
861 		int i;
862 
863 		for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++)
864 			if (ohms == rv3028_trickle_resistors[i])
865 				break;
866 
867 		if (i < ARRAY_SIZE(rv3028_trickle_resistors)) {
868 			ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE |
869 						 RV3028_BACKUP_TCR_MASK, RV3028_BACKUP_TCE | i);
870 			if (ret)
871 				return ret;
872 		} else {
873 			dev_warn(&client->dev, "invalid trickle resistor value\n");
874 		}
875 	}
876 
877 	ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group);
878 	if (ret)
879 		return ret;
880 
881 	rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
882 	rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099;
883 	rv3028->rtc->ops = &rv3028_rtc_ops;
884 	ret = devm_rtc_register_device(rv3028->rtc);
885 	if (ret)
886 		return ret;
887 
888 	nvmem_cfg.priv = rv3028->regmap;
889 	devm_rtc_nvmem_register(rv3028->rtc, &nvmem_cfg);
890 	eeprom_cfg.priv = rv3028;
891 	devm_rtc_nvmem_register(rv3028->rtc, &eeprom_cfg);
892 
893 	rv3028->rtc->max_user_freq = 1;
894 
895 #ifdef CONFIG_COMMON_CLK
896 	rv3028_clkout_register_clk(rv3028, client);
897 #endif
898 	return 0;
899 }
900 
901 static const __maybe_unused struct of_device_id rv3028_of_match[] = {
902 	{ .compatible = "microcrystal,rv3028", },
903 	{ }
904 };
905 MODULE_DEVICE_TABLE(of, rv3028_of_match);
906 
907 static struct i2c_driver rv3028_driver = {
908 	.driver = {
909 		.name = "rtc-rv3028",
910 		.of_match_table = of_match_ptr(rv3028_of_match),
911 	},
912 	.probe_new	= rv3028_probe,
913 };
914 module_i2c_driver(rv3028_driver);
915 
916 MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
917 MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver");
918 MODULE_LICENSE("GPL v2");
919