1 /* 2 * A SPI driver for the Ricoh RS5C348 RTC 3 * 4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * The board specific init code should provide characteristics of this 11 * device: 12 * Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS 13 */ 14 15 #include <linux/bcd.h> 16 #include <linux/delay.h> 17 #include <linux/device.h> 18 #include <linux/errno.h> 19 #include <linux/init.h> 20 #include <linux/kernel.h> 21 #include <linux/string.h> 22 #include <linux/slab.h> 23 #include <linux/rtc.h> 24 #include <linux/workqueue.h> 25 #include <linux/spi/spi.h> 26 #include <linux/module.h> 27 28 #define RS5C348_REG_SECS 0 29 #define RS5C348_REG_MINS 1 30 #define RS5C348_REG_HOURS 2 31 #define RS5C348_REG_WDAY 3 32 #define RS5C348_REG_DAY 4 33 #define RS5C348_REG_MONTH 5 34 #define RS5C348_REG_YEAR 6 35 #define RS5C348_REG_CTL1 14 36 #define RS5C348_REG_CTL2 15 37 38 #define RS5C348_SECS_MASK 0x7f 39 #define RS5C348_MINS_MASK 0x7f 40 #define RS5C348_HOURS_MASK 0x3f 41 #define RS5C348_WDAY_MASK 0x03 42 #define RS5C348_DAY_MASK 0x3f 43 #define RS5C348_MONTH_MASK 0x1f 44 45 #define RS5C348_BIT_PM 0x20 /* REG_HOURS */ 46 #define RS5C348_BIT_Y2K 0x80 /* REG_MONTH */ 47 #define RS5C348_BIT_24H 0x20 /* REG_CTL1 */ 48 #define RS5C348_BIT_XSTP 0x10 /* REG_CTL2 */ 49 #define RS5C348_BIT_VDET 0x40 /* REG_CTL2 */ 50 51 #define RS5C348_CMD_W(addr) (((addr) << 4) | 0x08) /* single write */ 52 #define RS5C348_CMD_R(addr) (((addr) << 4) | 0x0c) /* single read */ 53 #define RS5C348_CMD_MW(addr) (((addr) << 4) | 0x00) /* burst write */ 54 #define RS5C348_CMD_MR(addr) (((addr) << 4) | 0x04) /* burst read */ 55 56 struct rs5c348_plat_data { 57 struct rtc_device *rtc; 58 int rtc_24h; 59 }; 60 61 static int 62 rs5c348_rtc_set_time(struct device *dev, struct rtc_time *tm) 63 { 64 struct spi_device *spi = to_spi_device(dev); 65 struct rs5c348_plat_data *pdata = dev_get_platdata(&spi->dev); 66 u8 txbuf[5+7], *txp; 67 int ret; 68 69 /* Transfer 5 bytes before writing SEC. This gives 31us for carry. */ 70 txp = txbuf; 71 txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ 72 txbuf[1] = 0; /* dummy */ 73 txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ 74 txbuf[3] = 0; /* dummy */ 75 txbuf[4] = RS5C348_CMD_MW(RS5C348_REG_SECS); /* cmd, sec, ... */ 76 txp = &txbuf[5]; 77 txp[RS5C348_REG_SECS] = bin2bcd(tm->tm_sec); 78 txp[RS5C348_REG_MINS] = bin2bcd(tm->tm_min); 79 if (pdata->rtc_24h) { 80 txp[RS5C348_REG_HOURS] = bin2bcd(tm->tm_hour); 81 } else { 82 /* hour 0 is AM12, noon is PM12 */ 83 txp[RS5C348_REG_HOURS] = bin2bcd((tm->tm_hour + 11) % 12 + 1) | 84 (tm->tm_hour >= 12 ? RS5C348_BIT_PM : 0); 85 } 86 txp[RS5C348_REG_WDAY] = bin2bcd(tm->tm_wday); 87 txp[RS5C348_REG_DAY] = bin2bcd(tm->tm_mday); 88 txp[RS5C348_REG_MONTH] = bin2bcd(tm->tm_mon + 1) | 89 (tm->tm_year >= 100 ? RS5C348_BIT_Y2K : 0); 90 txp[RS5C348_REG_YEAR] = bin2bcd(tm->tm_year % 100); 91 /* write in one transfer to avoid data inconsistency */ 92 ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), NULL, 0); 93 udelay(62); /* Tcsr 62us */ 94 return ret; 95 } 96 97 static int 98 rs5c348_rtc_read_time(struct device *dev, struct rtc_time *tm) 99 { 100 struct spi_device *spi = to_spi_device(dev); 101 struct rs5c348_plat_data *pdata = dev_get_platdata(&spi->dev); 102 u8 txbuf[5], rxbuf[7]; 103 int ret; 104 105 /* Transfer 5 byte befores reading SEC. This gives 31us for carry. */ 106 txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ 107 txbuf[1] = 0; /* dummy */ 108 txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ 109 txbuf[3] = 0; /* dummy */ 110 txbuf[4] = RS5C348_CMD_MR(RS5C348_REG_SECS); /* cmd, sec, ... */ 111 112 /* read in one transfer to avoid data inconsistency */ 113 ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), 114 rxbuf, sizeof(rxbuf)); 115 udelay(62); /* Tcsr 62us */ 116 if (ret < 0) 117 return ret; 118 119 tm->tm_sec = bcd2bin(rxbuf[RS5C348_REG_SECS] & RS5C348_SECS_MASK); 120 tm->tm_min = bcd2bin(rxbuf[RS5C348_REG_MINS] & RS5C348_MINS_MASK); 121 tm->tm_hour = bcd2bin(rxbuf[RS5C348_REG_HOURS] & RS5C348_HOURS_MASK); 122 if (!pdata->rtc_24h) { 123 if (rxbuf[RS5C348_REG_HOURS] & RS5C348_BIT_PM) { 124 tm->tm_hour -= 20; 125 tm->tm_hour %= 12; 126 tm->tm_hour += 12; 127 } else 128 tm->tm_hour %= 12; 129 } 130 tm->tm_wday = bcd2bin(rxbuf[RS5C348_REG_WDAY] & RS5C348_WDAY_MASK); 131 tm->tm_mday = bcd2bin(rxbuf[RS5C348_REG_DAY] & RS5C348_DAY_MASK); 132 tm->tm_mon = 133 bcd2bin(rxbuf[RS5C348_REG_MONTH] & RS5C348_MONTH_MASK) - 1; 134 /* year is 1900 + tm->tm_year */ 135 tm->tm_year = bcd2bin(rxbuf[RS5C348_REG_YEAR]) + 136 ((rxbuf[RS5C348_REG_MONTH] & RS5C348_BIT_Y2K) ? 100 : 0); 137 138 return 0; 139 } 140 141 static const struct rtc_class_ops rs5c348_rtc_ops = { 142 .read_time = rs5c348_rtc_read_time, 143 .set_time = rs5c348_rtc_set_time, 144 }; 145 146 static struct spi_driver rs5c348_driver; 147 148 static int rs5c348_probe(struct spi_device *spi) 149 { 150 int ret; 151 struct rtc_device *rtc; 152 struct rs5c348_plat_data *pdata; 153 154 pdata = devm_kzalloc(&spi->dev, sizeof(struct rs5c348_plat_data), 155 GFP_KERNEL); 156 if (!pdata) 157 return -ENOMEM; 158 spi->dev.platform_data = pdata; 159 160 /* Check D7 of SECOND register */ 161 ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_SECS)); 162 if (ret < 0 || (ret & 0x80)) { 163 dev_err(&spi->dev, "not found.\n"); 164 goto kfree_exit; 165 } 166 167 dev_info(&spi->dev, "spiclk %u KHz.\n", 168 (spi->max_speed_hz + 500) / 1000); 169 170 /* turn RTC on if it was not on */ 171 ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_CTL2)); 172 if (ret < 0) 173 goto kfree_exit; 174 if (ret & (RS5C348_BIT_XSTP | RS5C348_BIT_VDET)) { 175 u8 buf[2]; 176 struct rtc_time tm; 177 if (ret & RS5C348_BIT_VDET) 178 dev_warn(&spi->dev, "voltage-low detected.\n"); 179 if (ret & RS5C348_BIT_XSTP) 180 dev_warn(&spi->dev, "oscillator-stop detected.\n"); 181 rtc_time_to_tm(0, &tm); /* 1970/1/1 */ 182 ret = rs5c348_rtc_set_time(&spi->dev, &tm); 183 if (ret < 0) 184 goto kfree_exit; 185 buf[0] = RS5C348_CMD_W(RS5C348_REG_CTL2); 186 buf[1] = 0; 187 ret = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0); 188 if (ret < 0) 189 goto kfree_exit; 190 } 191 192 ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_CTL1)); 193 if (ret < 0) 194 goto kfree_exit; 195 if (ret & RS5C348_BIT_24H) 196 pdata->rtc_24h = 1; 197 198 rtc = devm_rtc_device_register(&spi->dev, rs5c348_driver.driver.name, 199 &rs5c348_rtc_ops, THIS_MODULE); 200 201 if (IS_ERR(rtc)) { 202 ret = PTR_ERR(rtc); 203 goto kfree_exit; 204 } 205 206 pdata->rtc = rtc; 207 208 return 0; 209 kfree_exit: 210 return ret; 211 } 212 213 static struct spi_driver rs5c348_driver = { 214 .driver = { 215 .name = "rtc-rs5c348", 216 }, 217 .probe = rs5c348_probe, 218 }; 219 220 module_spi_driver(rs5c348_driver); 221 222 MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>"); 223 MODULE_DESCRIPTION("Ricoh RS5C348 RTC driver"); 224 MODULE_LICENSE("GPL"); 225 MODULE_ALIAS("spi:rtc-rs5c348"); 226