1 /* 2 * Ricoh RP5C01 RTC Driver 3 * 4 * Copyright 2009 Geert Uytterhoeven 5 * 6 * Based on the A3000 TOD code in arch/m68k/amiga/config.c 7 * Copyright (C) 1993 Hamish Macdonald 8 */ 9 10 #include <linux/io.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/platform_device.h> 14 #include <linux/rtc.h> 15 #include <linux/slab.h> 16 17 18 enum { 19 RP5C01_1_SECOND = 0x0, /* MODE 00 */ 20 RP5C01_10_SECOND = 0x1, /* MODE 00 */ 21 RP5C01_1_MINUTE = 0x2, /* MODE 00 and MODE 01 */ 22 RP5C01_10_MINUTE = 0x3, /* MODE 00 and MODE 01 */ 23 RP5C01_1_HOUR = 0x4, /* MODE 00 and MODE 01 */ 24 RP5C01_10_HOUR = 0x5, /* MODE 00 and MODE 01 */ 25 RP5C01_DAY_OF_WEEK = 0x6, /* MODE 00 and MODE 01 */ 26 RP5C01_1_DAY = 0x7, /* MODE 00 and MODE 01 */ 27 RP5C01_10_DAY = 0x8, /* MODE 00 and MODE 01 */ 28 RP5C01_1_MONTH = 0x9, /* MODE 00 */ 29 RP5C01_10_MONTH = 0xa, /* MODE 00 */ 30 RP5C01_1_YEAR = 0xb, /* MODE 00 */ 31 RP5C01_10_YEAR = 0xc, /* MODE 00 */ 32 33 RP5C01_12_24_SELECT = 0xa, /* MODE 01 */ 34 RP5C01_LEAP_YEAR = 0xb, /* MODE 01 */ 35 36 RP5C01_MODE = 0xd, /* all modes */ 37 RP5C01_TEST = 0xe, /* all modes */ 38 RP5C01_RESET = 0xf, /* all modes */ 39 }; 40 41 #define RP5C01_12_24_SELECT_12 (0 << 0) 42 #define RP5C01_12_24_SELECT_24 (1 << 0) 43 44 #define RP5C01_10_HOUR_AM (0 << 1) 45 #define RP5C01_10_HOUR_PM (1 << 1) 46 47 #define RP5C01_MODE_TIMER_EN (1 << 3) /* timer enable */ 48 #define RP5C01_MODE_ALARM_EN (1 << 2) /* alarm enable */ 49 50 #define RP5C01_MODE_MODE_MASK (3 << 0) 51 #define RP5C01_MODE_MODE00 (0 << 0) /* time */ 52 #define RP5C01_MODE_MODE01 (1 << 0) /* alarm, 12h/24h, leap year */ 53 #define RP5C01_MODE_RAM_BLOCK10 (2 << 0) /* RAM 4 bits x 13 */ 54 #define RP5C01_MODE_RAM_BLOCK11 (3 << 0) /* RAM 4 bits x 13 */ 55 56 #define RP5C01_RESET_1HZ_PULSE (1 << 3) 57 #define RP5C01_RESET_16HZ_PULSE (1 << 2) 58 #define RP5C01_RESET_SECOND (1 << 1) /* reset divider stages for */ 59 /* seconds or smaller units */ 60 #define RP5C01_RESET_ALARM (1 << 0) /* reset all alarm registers */ 61 62 63 struct rp5c01_priv { 64 u32 __iomem *regs; 65 struct rtc_device *rtc; 66 spinlock_t lock; /* against concurrent RTC/NVRAM access */ 67 struct bin_attribute nvram_attr; 68 }; 69 70 static inline unsigned int rp5c01_read(struct rp5c01_priv *priv, 71 unsigned int reg) 72 { 73 return __raw_readl(&priv->regs[reg]) & 0xf; 74 } 75 76 static inline void rp5c01_write(struct rp5c01_priv *priv, unsigned int val, 77 unsigned int reg) 78 { 79 __raw_writel(val, &priv->regs[reg]); 80 } 81 82 static void rp5c01_lock(struct rp5c01_priv *priv) 83 { 84 rp5c01_write(priv, RP5C01_MODE_MODE00, RP5C01_MODE); 85 } 86 87 static void rp5c01_unlock(struct rp5c01_priv *priv) 88 { 89 rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01, 90 RP5C01_MODE); 91 } 92 93 static int rp5c01_read_time(struct device *dev, struct rtc_time *tm) 94 { 95 struct rp5c01_priv *priv = dev_get_drvdata(dev); 96 97 spin_lock_irq(&priv->lock); 98 rp5c01_lock(priv); 99 100 tm->tm_sec = rp5c01_read(priv, RP5C01_10_SECOND) * 10 + 101 rp5c01_read(priv, RP5C01_1_SECOND); 102 tm->tm_min = rp5c01_read(priv, RP5C01_10_MINUTE) * 10 + 103 rp5c01_read(priv, RP5C01_1_MINUTE); 104 tm->tm_hour = rp5c01_read(priv, RP5C01_10_HOUR) * 10 + 105 rp5c01_read(priv, RP5C01_1_HOUR); 106 tm->tm_mday = rp5c01_read(priv, RP5C01_10_DAY) * 10 + 107 rp5c01_read(priv, RP5C01_1_DAY); 108 tm->tm_wday = rp5c01_read(priv, RP5C01_DAY_OF_WEEK); 109 tm->tm_mon = rp5c01_read(priv, RP5C01_10_MONTH) * 10 + 110 rp5c01_read(priv, RP5C01_1_MONTH) - 1; 111 tm->tm_year = rp5c01_read(priv, RP5C01_10_YEAR) * 10 + 112 rp5c01_read(priv, RP5C01_1_YEAR); 113 if (tm->tm_year <= 69) 114 tm->tm_year += 100; 115 116 rp5c01_unlock(priv); 117 spin_unlock_irq(&priv->lock); 118 119 return rtc_valid_tm(tm); 120 } 121 122 static int rp5c01_set_time(struct device *dev, struct rtc_time *tm) 123 { 124 struct rp5c01_priv *priv = dev_get_drvdata(dev); 125 126 spin_lock_irq(&priv->lock); 127 rp5c01_lock(priv); 128 129 rp5c01_write(priv, tm->tm_sec / 10, RP5C01_10_SECOND); 130 rp5c01_write(priv, tm->tm_sec % 10, RP5C01_1_SECOND); 131 rp5c01_write(priv, tm->tm_min / 10, RP5C01_10_MINUTE); 132 rp5c01_write(priv, tm->tm_min % 10, RP5C01_1_MINUTE); 133 rp5c01_write(priv, tm->tm_hour / 10, RP5C01_10_HOUR); 134 rp5c01_write(priv, tm->tm_hour % 10, RP5C01_1_HOUR); 135 rp5c01_write(priv, tm->tm_mday / 10, RP5C01_10_DAY); 136 rp5c01_write(priv, tm->tm_mday % 10, RP5C01_1_DAY); 137 if (tm->tm_wday != -1) 138 rp5c01_write(priv, tm->tm_wday, RP5C01_DAY_OF_WEEK); 139 rp5c01_write(priv, (tm->tm_mon + 1) / 10, RP5C01_10_MONTH); 140 rp5c01_write(priv, (tm->tm_mon + 1) % 10, RP5C01_1_MONTH); 141 if (tm->tm_year >= 100) 142 tm->tm_year -= 100; 143 rp5c01_write(priv, tm->tm_year / 10, RP5C01_10_YEAR); 144 rp5c01_write(priv, tm->tm_year % 10, RP5C01_1_YEAR); 145 146 rp5c01_unlock(priv); 147 spin_unlock_irq(&priv->lock); 148 return 0; 149 } 150 151 static const struct rtc_class_ops rp5c01_rtc_ops = { 152 .read_time = rp5c01_read_time, 153 .set_time = rp5c01_set_time, 154 }; 155 156 157 /* 158 * The NVRAM is organized as 2 blocks of 13 nibbles of 4 bits. 159 * We provide access to them like AmigaOS does: the high nibble of each 8-bit 160 * byte is stored in BLOCK10, the low nibble in BLOCK11. 161 */ 162 163 static ssize_t rp5c01_nvram_read(struct file *filp, struct kobject *kobj, 164 struct bin_attribute *bin_attr, 165 char *buf, loff_t pos, size_t size) 166 { 167 struct device *dev = container_of(kobj, struct device, kobj); 168 struct rp5c01_priv *priv = dev_get_drvdata(dev); 169 ssize_t count; 170 171 spin_lock_irq(&priv->lock); 172 173 for (count = 0; size > 0 && pos < RP5C01_MODE; count++, size--) { 174 u8 data; 175 176 rp5c01_write(priv, 177 RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK10, 178 RP5C01_MODE); 179 data = rp5c01_read(priv, pos) << 4; 180 rp5c01_write(priv, 181 RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK11, 182 RP5C01_MODE); 183 data |= rp5c01_read(priv, pos++); 184 rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01, 185 RP5C01_MODE); 186 *buf++ = data; 187 } 188 189 spin_unlock_irq(&priv->lock); 190 return count; 191 } 192 193 static ssize_t rp5c01_nvram_write(struct file *filp, struct kobject *kobj, 194 struct bin_attribute *bin_attr, 195 char *buf, loff_t pos, size_t size) 196 { 197 struct device *dev = container_of(kobj, struct device, kobj); 198 struct rp5c01_priv *priv = dev_get_drvdata(dev); 199 ssize_t count; 200 201 spin_lock_irq(&priv->lock); 202 203 for (count = 0; size > 0 && pos < RP5C01_MODE; count++, size--) { 204 u8 data = *buf++; 205 206 rp5c01_write(priv, 207 RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK10, 208 RP5C01_MODE); 209 rp5c01_write(priv, data >> 4, pos); 210 rp5c01_write(priv, 211 RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK11, 212 RP5C01_MODE); 213 rp5c01_write(priv, data & 0xf, pos++); 214 rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01, 215 RP5C01_MODE); 216 } 217 218 spin_unlock_irq(&priv->lock); 219 return count; 220 } 221 222 static int __init rp5c01_rtc_probe(struct platform_device *dev) 223 { 224 struct resource *res; 225 struct rp5c01_priv *priv; 226 struct rtc_device *rtc; 227 int error; 228 229 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 230 if (!res) 231 return -ENODEV; 232 233 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 234 if (!priv) 235 return -ENOMEM; 236 237 priv->regs = ioremap(res->start, resource_size(res)); 238 if (!priv->regs) { 239 error = -ENOMEM; 240 goto out_free_priv; 241 } 242 243 sysfs_bin_attr_init(&priv->nvram_attr); 244 priv->nvram_attr.attr.name = "nvram"; 245 priv->nvram_attr.attr.mode = S_IRUGO | S_IWUSR; 246 priv->nvram_attr.read = rp5c01_nvram_read; 247 priv->nvram_attr.write = rp5c01_nvram_write; 248 priv->nvram_attr.size = RP5C01_MODE; 249 250 spin_lock_init(&priv->lock); 251 252 platform_set_drvdata(dev, priv); 253 254 rtc = rtc_device_register("rtc-rp5c01", &dev->dev, &rp5c01_rtc_ops, 255 THIS_MODULE); 256 if (IS_ERR(rtc)) { 257 error = PTR_ERR(rtc); 258 goto out_unmap; 259 } 260 priv->rtc = rtc; 261 262 error = sysfs_create_bin_file(&dev->dev.kobj, &priv->nvram_attr); 263 if (error) 264 goto out_unregister; 265 266 return 0; 267 268 out_unregister: 269 rtc_device_unregister(rtc); 270 out_unmap: 271 platform_set_drvdata(dev, NULL); 272 iounmap(priv->regs); 273 out_free_priv: 274 kfree(priv); 275 return error; 276 } 277 278 static int __exit rp5c01_rtc_remove(struct platform_device *dev) 279 { 280 struct rp5c01_priv *priv = platform_get_drvdata(dev); 281 282 sysfs_remove_bin_file(&dev->dev.kobj, &priv->nvram_attr); 283 rtc_device_unregister(priv->rtc); 284 iounmap(priv->regs); 285 kfree(priv); 286 return 0; 287 } 288 289 static struct platform_driver rp5c01_rtc_driver = { 290 .driver = { 291 .name = "rtc-rp5c01", 292 .owner = THIS_MODULE, 293 }, 294 .remove = __exit_p(rp5c01_rtc_remove), 295 }; 296 297 static int __init rp5c01_rtc_init(void) 298 { 299 return platform_driver_probe(&rp5c01_rtc_driver, rp5c01_rtc_probe); 300 } 301 302 static void __exit rp5c01_rtc_fini(void) 303 { 304 platform_driver_unregister(&rp5c01_rtc_driver); 305 } 306 307 module_init(rp5c01_rtc_init); 308 module_exit(rp5c01_rtc_fini); 309 310 MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>"); 311 MODULE_LICENSE("GPL"); 312 MODULE_DESCRIPTION("Ricoh RP5C01 RTC driver"); 313 MODULE_ALIAS("platform:rtc-rp5c01"); 314