1 /* 2 * drivers/rtc/rtc-pcf85363.c 3 * 4 * Driver for NXP PCF85363 real-time clock. 5 * 6 * Copyright (C) 2017 Eric Nelson 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * Based loosely on rtc-8583 by Russell King, Wolfram Sang and Juergen Beisert 13 */ 14 #include <linux/module.h> 15 #include <linux/i2c.h> 16 #include <linux/slab.h> 17 #include <linux/rtc.h> 18 #include <linux/init.h> 19 #include <linux/err.h> 20 #include <linux/errno.h> 21 #include <linux/bcd.h> 22 #include <linux/of.h> 23 #include <linux/of_device.h> 24 #include <linux/regmap.h> 25 26 /* 27 * Date/Time registers 28 */ 29 #define DT_100THS 0x00 30 #define DT_SECS 0x01 31 #define DT_MINUTES 0x02 32 #define DT_HOURS 0x03 33 #define DT_DAYS 0x04 34 #define DT_WEEKDAYS 0x05 35 #define DT_MONTHS 0x06 36 #define DT_YEARS 0x07 37 38 /* 39 * Alarm registers 40 */ 41 #define DT_SECOND_ALM1 0x08 42 #define DT_MINUTE_ALM1 0x09 43 #define DT_HOUR_ALM1 0x0a 44 #define DT_DAY_ALM1 0x0b 45 #define DT_MONTH_ALM1 0x0c 46 #define DT_MINUTE_ALM2 0x0d 47 #define DT_HOUR_ALM2 0x0e 48 #define DT_WEEKDAY_ALM2 0x0f 49 #define DT_ALARM_EN 0x10 50 51 /* 52 * Time stamp registers 53 */ 54 #define DT_TIMESTAMP1 0x11 55 #define DT_TIMESTAMP2 0x17 56 #define DT_TIMESTAMP3 0x1d 57 #define DT_TS_MODE 0x23 58 59 /* 60 * control registers 61 */ 62 #define CTRL_OFFSET 0x24 63 #define CTRL_OSCILLATOR 0x25 64 #define CTRL_BATTERY 0x26 65 #define CTRL_PIN_IO 0x27 66 #define CTRL_FUNCTION 0x28 67 #define CTRL_INTA_EN 0x29 68 #define CTRL_INTB_EN 0x2a 69 #define CTRL_FLAGS 0x2b 70 #define CTRL_RAMBYTE 0x2c 71 #define CTRL_WDOG 0x2d 72 #define CTRL_STOP_EN 0x2e 73 #define CTRL_RESETS 0x2f 74 #define CTRL_RAM 0x40 75 76 #define ALRM_SEC_A1E BIT(0) 77 #define ALRM_MIN_A1E BIT(1) 78 #define ALRM_HR_A1E BIT(2) 79 #define ALRM_DAY_A1E BIT(3) 80 #define ALRM_MON_A1E BIT(4) 81 #define ALRM_MIN_A2E BIT(5) 82 #define ALRM_HR_A2E BIT(6) 83 #define ALRM_DAY_A2E BIT(7) 84 85 #define INT_WDIE BIT(0) 86 #define INT_BSIE BIT(1) 87 #define INT_TSRIE BIT(2) 88 #define INT_A2IE BIT(3) 89 #define INT_A1IE BIT(4) 90 #define INT_OIE BIT(5) 91 #define INT_PIE BIT(6) 92 #define INT_ILP BIT(7) 93 94 #define FLAGS_TSR1F BIT(0) 95 #define FLAGS_TSR2F BIT(1) 96 #define FLAGS_TSR3F BIT(2) 97 #define FLAGS_BSF BIT(3) 98 #define FLAGS_WDF BIT(4) 99 #define FLAGS_A1F BIT(5) 100 #define FLAGS_A2F BIT(6) 101 #define FLAGS_PIF BIT(7) 102 103 #define PIN_IO_INTAPM GENMASK(1, 0) 104 #define PIN_IO_INTA_CLK 0 105 #define PIN_IO_INTA_BAT 1 106 #define PIN_IO_INTA_OUT 2 107 #define PIN_IO_INTA_HIZ 3 108 109 #define STOP_EN_STOP BIT(0) 110 111 #define RESET_CPR 0xa4 112 113 #define NVRAM_SIZE 0x40 114 115 static struct i2c_driver pcf85363_driver; 116 117 struct pcf85363 { 118 struct rtc_device *rtc; 119 struct regmap *regmap; 120 }; 121 122 struct pcf85x63_config { 123 struct regmap_config regmap; 124 unsigned int num_nvram; 125 }; 126 127 static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm) 128 { 129 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 130 unsigned char buf[DT_YEARS + 1]; 131 int ret, len = sizeof(buf); 132 133 /* read the RTC date and time registers all at once */ 134 ret = regmap_bulk_read(pcf85363->regmap, DT_100THS, buf, len); 135 if (ret) { 136 dev_err(dev, "%s: error %d\n", __func__, ret); 137 return ret; 138 } 139 140 tm->tm_year = bcd2bin(buf[DT_YEARS]); 141 /* adjust for 1900 base of rtc_time */ 142 tm->tm_year += 100; 143 144 tm->tm_wday = buf[DT_WEEKDAYS] & 7; 145 buf[DT_SECS] &= 0x7F; 146 tm->tm_sec = bcd2bin(buf[DT_SECS]); 147 buf[DT_MINUTES] &= 0x7F; 148 tm->tm_min = bcd2bin(buf[DT_MINUTES]); 149 tm->tm_hour = bcd2bin(buf[DT_HOURS]); 150 tm->tm_mday = bcd2bin(buf[DT_DAYS]); 151 tm->tm_mon = bcd2bin(buf[DT_MONTHS]) - 1; 152 153 return 0; 154 } 155 156 static int pcf85363_rtc_set_time(struct device *dev, struct rtc_time *tm) 157 { 158 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 159 unsigned char tmp[11]; 160 unsigned char *buf = &tmp[2]; 161 int ret; 162 163 tmp[0] = STOP_EN_STOP; 164 tmp[1] = RESET_CPR; 165 166 buf[DT_100THS] = 0; 167 buf[DT_SECS] = bin2bcd(tm->tm_sec); 168 buf[DT_MINUTES] = bin2bcd(tm->tm_min); 169 buf[DT_HOURS] = bin2bcd(tm->tm_hour); 170 buf[DT_DAYS] = bin2bcd(tm->tm_mday); 171 buf[DT_WEEKDAYS] = tm->tm_wday; 172 buf[DT_MONTHS] = bin2bcd(tm->tm_mon + 1); 173 buf[DT_YEARS] = bin2bcd(tm->tm_year % 100); 174 175 ret = regmap_bulk_write(pcf85363->regmap, CTRL_STOP_EN, 176 tmp, sizeof(tmp)); 177 if (ret) 178 return ret; 179 180 return regmap_write(pcf85363->regmap, CTRL_STOP_EN, 0); 181 } 182 183 static int pcf85363_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 184 { 185 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 186 unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1]; 187 unsigned int val; 188 int ret; 189 190 ret = regmap_bulk_read(pcf85363->regmap, DT_SECOND_ALM1, buf, 191 sizeof(buf)); 192 if (ret) 193 return ret; 194 195 alrm->time.tm_sec = bcd2bin(buf[0]); 196 alrm->time.tm_min = bcd2bin(buf[1]); 197 alrm->time.tm_hour = bcd2bin(buf[2]); 198 alrm->time.tm_mday = bcd2bin(buf[3]); 199 alrm->time.tm_mon = bcd2bin(buf[4]) - 1; 200 201 ret = regmap_read(pcf85363->regmap, CTRL_INTA_EN, &val); 202 if (ret) 203 return ret; 204 205 alrm->enabled = !!(val & INT_A1IE); 206 207 return 0; 208 } 209 210 static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned 211 int enabled) 212 { 213 unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E | 214 ALRM_DAY_A1E | ALRM_MON_A1E; 215 int ret; 216 217 ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags, 218 enabled ? alarm_flags : 0); 219 if (ret) 220 return ret; 221 222 ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN, 223 INT_A1IE, enabled ? INT_A1IE : 0); 224 225 if (ret || enabled) 226 return ret; 227 228 /* clear current flags */ 229 return regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0); 230 } 231 232 static int pcf85363_rtc_alarm_irq_enable(struct device *dev, 233 unsigned int enabled) 234 { 235 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 236 237 return _pcf85363_rtc_alarm_irq_enable(pcf85363, enabled); 238 } 239 240 static int pcf85363_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 241 { 242 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 243 unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1]; 244 int ret; 245 246 buf[0] = bin2bcd(alrm->time.tm_sec); 247 buf[1] = bin2bcd(alrm->time.tm_min); 248 buf[2] = bin2bcd(alrm->time.tm_hour); 249 buf[3] = bin2bcd(alrm->time.tm_mday); 250 buf[4] = bin2bcd(alrm->time.tm_mon + 1); 251 252 /* 253 * Disable the alarm interrupt before changing the value to avoid 254 * spurious interrupts 255 */ 256 ret = _pcf85363_rtc_alarm_irq_enable(pcf85363, 0); 257 if (ret) 258 return ret; 259 260 ret = regmap_bulk_write(pcf85363->regmap, DT_SECOND_ALM1, buf, 261 sizeof(buf)); 262 if (ret) 263 return ret; 264 265 return _pcf85363_rtc_alarm_irq_enable(pcf85363, alrm->enabled); 266 } 267 268 static irqreturn_t pcf85363_rtc_handle_irq(int irq, void *dev_id) 269 { 270 struct pcf85363 *pcf85363 = i2c_get_clientdata(dev_id); 271 unsigned int flags; 272 int err; 273 274 err = regmap_read(pcf85363->regmap, CTRL_FLAGS, &flags); 275 if (err) 276 return IRQ_NONE; 277 278 if (flags & FLAGS_A1F) { 279 rtc_update_irq(pcf85363->rtc, 1, RTC_IRQF | RTC_AF); 280 regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0); 281 return IRQ_HANDLED; 282 } 283 284 return IRQ_NONE; 285 } 286 287 static const struct rtc_class_ops rtc_ops = { 288 .read_time = pcf85363_rtc_read_time, 289 .set_time = pcf85363_rtc_set_time, 290 }; 291 292 static const struct rtc_class_ops rtc_ops_alarm = { 293 .read_time = pcf85363_rtc_read_time, 294 .set_time = pcf85363_rtc_set_time, 295 .read_alarm = pcf85363_rtc_read_alarm, 296 .set_alarm = pcf85363_rtc_set_alarm, 297 .alarm_irq_enable = pcf85363_rtc_alarm_irq_enable, 298 }; 299 300 static int pcf85363_nvram_read(void *priv, unsigned int offset, void *val, 301 size_t bytes) 302 { 303 struct pcf85363 *pcf85363 = priv; 304 305 return regmap_bulk_read(pcf85363->regmap, CTRL_RAM + offset, 306 val, bytes); 307 } 308 309 static int pcf85363_nvram_write(void *priv, unsigned int offset, void *val, 310 size_t bytes) 311 { 312 struct pcf85363 *pcf85363 = priv; 313 314 return regmap_bulk_write(pcf85363->regmap, CTRL_RAM + offset, 315 val, bytes); 316 } 317 318 static int pcf85x63_nvram_read(void *priv, unsigned int offset, void *val, 319 size_t bytes) 320 { 321 struct pcf85363 *pcf85363 = priv; 322 unsigned int tmp_val; 323 int ret; 324 325 ret = regmap_read(pcf85363->regmap, CTRL_RAMBYTE, &tmp_val); 326 (*(unsigned char *) val) = (unsigned char) tmp_val; 327 328 return ret; 329 } 330 331 static int pcf85x63_nvram_write(void *priv, unsigned int offset, void *val, 332 size_t bytes) 333 { 334 struct pcf85363 *pcf85363 = priv; 335 unsigned char tmp_val; 336 337 tmp_val = *((unsigned char *)val); 338 return regmap_write(pcf85363->regmap, CTRL_RAMBYTE, 339 (unsigned int)tmp_val); 340 } 341 342 static const struct pcf85x63_config pcf_85263_config = { 343 .regmap = { 344 .reg_bits = 8, 345 .val_bits = 8, 346 .max_register = 0x2f, 347 }, 348 .num_nvram = 1 349 }; 350 351 static const struct pcf85x63_config pcf_85363_config = { 352 .regmap = { 353 .reg_bits = 8, 354 .val_bits = 8, 355 .max_register = 0x7f, 356 }, 357 .num_nvram = 2 358 }; 359 360 static int pcf85363_probe(struct i2c_client *client, 361 const struct i2c_device_id *id) 362 { 363 struct pcf85363 *pcf85363; 364 const struct pcf85x63_config *config = &pcf_85363_config; 365 const void *data = of_device_get_match_data(&client->dev); 366 static struct nvmem_config nvmem_cfg[] = { 367 { 368 .name = "pcf85x63-", 369 .word_size = 1, 370 .stride = 1, 371 .size = 1, 372 .reg_read = pcf85x63_nvram_read, 373 .reg_write = pcf85x63_nvram_write, 374 }, { 375 .name = "pcf85363-", 376 .word_size = 1, 377 .stride = 1, 378 .size = NVRAM_SIZE, 379 .reg_read = pcf85363_nvram_read, 380 .reg_write = pcf85363_nvram_write, 381 }, 382 }; 383 int ret, i; 384 385 if (data) 386 config = data; 387 388 pcf85363 = devm_kzalloc(&client->dev, sizeof(struct pcf85363), 389 GFP_KERNEL); 390 if (!pcf85363) 391 return -ENOMEM; 392 393 pcf85363->regmap = devm_regmap_init_i2c(client, &config->regmap); 394 if (IS_ERR(pcf85363->regmap)) { 395 dev_err(&client->dev, "regmap allocation failed\n"); 396 return PTR_ERR(pcf85363->regmap); 397 } 398 399 i2c_set_clientdata(client, pcf85363); 400 401 pcf85363->rtc = devm_rtc_allocate_device(&client->dev); 402 if (IS_ERR(pcf85363->rtc)) 403 return PTR_ERR(pcf85363->rtc); 404 405 pcf85363->rtc->ops = &rtc_ops; 406 pcf85363->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 407 pcf85363->rtc->range_max = RTC_TIMESTAMP_END_2099; 408 409 if (client->irq > 0) { 410 regmap_write(pcf85363->regmap, CTRL_FLAGS, 0); 411 regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO, 412 PIN_IO_INTA_OUT, PIN_IO_INTAPM); 413 ret = devm_request_threaded_irq(&client->dev, client->irq, 414 NULL, pcf85363_rtc_handle_irq, 415 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 416 "pcf85363", client); 417 if (ret) 418 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 419 else 420 pcf85363->rtc->ops = &rtc_ops_alarm; 421 } 422 423 ret = rtc_register_device(pcf85363->rtc); 424 425 for (i = 0; i < config->num_nvram; i++) { 426 nvmem_cfg[i].priv = pcf85363; 427 rtc_nvmem_register(pcf85363->rtc, &nvmem_cfg[i]); 428 } 429 430 return ret; 431 } 432 433 static const struct of_device_id dev_ids[] = { 434 { .compatible = "nxp,pcf85263", .data = &pcf_85263_config }, 435 { .compatible = "nxp,pcf85363", .data = &pcf_85363_config }, 436 { /* sentinel */ } 437 }; 438 MODULE_DEVICE_TABLE(of, dev_ids); 439 440 static struct i2c_driver pcf85363_driver = { 441 .driver = { 442 .name = "pcf85363", 443 .of_match_table = of_match_ptr(dev_ids), 444 }, 445 .probe = pcf85363_probe, 446 }; 447 448 module_i2c_driver(pcf85363_driver); 449 450 MODULE_AUTHOR("Eric Nelson"); 451 MODULE_DESCRIPTION("pcf85263/pcf85363 I2C RTC driver"); 452 MODULE_LICENSE("GPL"); 453