1 /* 2 * TI OMAP1 Real Time Clock interface for Linux 3 * 4 * Copyright (C) 2003 MontaVista Software, Inc. 5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> 6 * 7 * Copyright (C) 2006 David Brownell (new RTC framework) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 12 * 2 of the License, or (at your option) any later version. 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 #include <linux/ioport.h> 19 #include <linux/delay.h> 20 #include <linux/rtc.h> 21 #include <linux/bcd.h> 22 #include <linux/platform_device.h> 23 #include <linux/of.h> 24 #include <linux/of_device.h> 25 #include <linux/pm_runtime.h> 26 #include <linux/io.h> 27 28 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock 29 * with century-range alarm matching, driven by the 32kHz clock. 30 * 31 * The main user-visible ways it differs from PC RTCs are by omitting 32 * "don't care" alarm fields and sub-second periodic IRQs, and having 33 * an autoadjust mechanism to calibrate to the true oscillator rate. 34 * 35 * Board-specific wiring options include using split power mode with 36 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset), 37 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from 38 * low power modes) for OMAP1 boards (OMAP-L138 has this built into 39 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment. 40 */ 41 42 #define DRIVER_NAME "omap_rtc" 43 44 #define OMAP_RTC_BASE 0xfffb4800 45 46 /* RTC registers */ 47 #define OMAP_RTC_SECONDS_REG 0x00 48 #define OMAP_RTC_MINUTES_REG 0x04 49 #define OMAP_RTC_HOURS_REG 0x08 50 #define OMAP_RTC_DAYS_REG 0x0C 51 #define OMAP_RTC_MONTHS_REG 0x10 52 #define OMAP_RTC_YEARS_REG 0x14 53 #define OMAP_RTC_WEEKS_REG 0x18 54 55 #define OMAP_RTC_ALARM_SECONDS_REG 0x20 56 #define OMAP_RTC_ALARM_MINUTES_REG 0x24 57 #define OMAP_RTC_ALARM_HOURS_REG 0x28 58 #define OMAP_RTC_ALARM_DAYS_REG 0x2c 59 #define OMAP_RTC_ALARM_MONTHS_REG 0x30 60 #define OMAP_RTC_ALARM_YEARS_REG 0x34 61 62 #define OMAP_RTC_CTRL_REG 0x40 63 #define OMAP_RTC_STATUS_REG 0x44 64 #define OMAP_RTC_INTERRUPTS_REG 0x48 65 66 #define OMAP_RTC_COMP_LSB_REG 0x4c 67 #define OMAP_RTC_COMP_MSB_REG 0x50 68 #define OMAP_RTC_OSC_REG 0x54 69 70 #define OMAP_RTC_KICK0_REG 0x6c 71 #define OMAP_RTC_KICK1_REG 0x70 72 73 #define OMAP_RTC_IRQWAKEEN 0x7c 74 75 /* OMAP_RTC_CTRL_REG bit fields: */ 76 #define OMAP_RTC_CTRL_SPLIT (1<<7) 77 #define OMAP_RTC_CTRL_DISABLE (1<<6) 78 #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5) 79 #define OMAP_RTC_CTRL_TEST (1<<4) 80 #define OMAP_RTC_CTRL_MODE_12_24 (1<<3) 81 #define OMAP_RTC_CTRL_AUTO_COMP (1<<2) 82 #define OMAP_RTC_CTRL_ROUND_30S (1<<1) 83 #define OMAP_RTC_CTRL_STOP (1<<0) 84 85 /* OMAP_RTC_STATUS_REG bit fields: */ 86 #define OMAP_RTC_STATUS_POWER_UP (1<<7) 87 #define OMAP_RTC_STATUS_ALARM (1<<6) 88 #define OMAP_RTC_STATUS_1D_EVENT (1<<5) 89 #define OMAP_RTC_STATUS_1H_EVENT (1<<4) 90 #define OMAP_RTC_STATUS_1M_EVENT (1<<3) 91 #define OMAP_RTC_STATUS_1S_EVENT (1<<2) 92 #define OMAP_RTC_STATUS_RUN (1<<1) 93 #define OMAP_RTC_STATUS_BUSY (1<<0) 94 95 /* OMAP_RTC_INTERRUPTS_REG bit fields: */ 96 #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3) 97 #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2) 98 99 /* OMAP_RTC_IRQWAKEEN bit fields: */ 100 #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN (1<<1) 101 102 /* OMAP_RTC_KICKER values */ 103 #define KICK0_VALUE 0x83e70b13 104 #define KICK1_VALUE 0x95a4f1e0 105 106 #define OMAP_RTC_HAS_KICKER 0x1 107 108 /* 109 * Few RTC IP revisions has special WAKE-EN Register to enable Wakeup 110 * generation for event Alarm. 111 */ 112 #define OMAP_RTC_HAS_IRQWAKEEN 0x2 113 114 static void __iomem *rtc_base; 115 116 #define rtc_read(addr) readb(rtc_base + (addr)) 117 #define rtc_write(val, addr) writeb(val, rtc_base + (addr)) 118 119 #define rtc_writel(val, addr) writel(val, rtc_base + (addr)) 120 121 122 /* we rely on the rtc framework to handle locking (rtc->ops_lock), 123 * so the only other requirement is that register accesses which 124 * require BUSY to be clear are made with IRQs locally disabled 125 */ 126 static void rtc_wait_not_busy(void) 127 { 128 int count = 0; 129 u8 status; 130 131 /* BUSY may stay active for 1/32768 second (~30 usec) */ 132 for (count = 0; count < 50; count++) { 133 status = rtc_read(OMAP_RTC_STATUS_REG); 134 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0) 135 break; 136 udelay(1); 137 } 138 /* now we have ~15 usec to read/write various registers */ 139 } 140 141 static irqreturn_t rtc_irq(int irq, void *rtc) 142 { 143 unsigned long events = 0; 144 u8 irq_data; 145 146 irq_data = rtc_read(OMAP_RTC_STATUS_REG); 147 148 /* alarm irq? */ 149 if (irq_data & OMAP_RTC_STATUS_ALARM) { 150 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); 151 events |= RTC_IRQF | RTC_AF; 152 } 153 154 /* 1/sec periodic/update irq? */ 155 if (irq_data & OMAP_RTC_STATUS_1S_EVENT) 156 events |= RTC_IRQF | RTC_UF; 157 158 rtc_update_irq(rtc, 1, events); 159 160 return IRQ_HANDLED; 161 } 162 163 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 164 { 165 u8 reg; 166 167 local_irq_disable(); 168 rtc_wait_not_busy(); 169 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 170 if (enabled) 171 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; 172 else 173 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; 174 rtc_wait_not_busy(); 175 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 176 local_irq_enable(); 177 178 return 0; 179 } 180 181 /* this hardware doesn't support "don't care" alarm fields */ 182 static int tm2bcd(struct rtc_time *tm) 183 { 184 if (rtc_valid_tm(tm) != 0) 185 return -EINVAL; 186 187 tm->tm_sec = bin2bcd(tm->tm_sec); 188 tm->tm_min = bin2bcd(tm->tm_min); 189 tm->tm_hour = bin2bcd(tm->tm_hour); 190 tm->tm_mday = bin2bcd(tm->tm_mday); 191 192 tm->tm_mon = bin2bcd(tm->tm_mon + 1); 193 194 /* epoch == 1900 */ 195 if (tm->tm_year < 100 || tm->tm_year > 199) 196 return -EINVAL; 197 tm->tm_year = bin2bcd(tm->tm_year - 100); 198 199 return 0; 200 } 201 202 static void bcd2tm(struct rtc_time *tm) 203 { 204 tm->tm_sec = bcd2bin(tm->tm_sec); 205 tm->tm_min = bcd2bin(tm->tm_min); 206 tm->tm_hour = bcd2bin(tm->tm_hour); 207 tm->tm_mday = bcd2bin(tm->tm_mday); 208 tm->tm_mon = bcd2bin(tm->tm_mon) - 1; 209 /* epoch == 1900 */ 210 tm->tm_year = bcd2bin(tm->tm_year) + 100; 211 } 212 213 214 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm) 215 { 216 /* we don't report wday/yday/isdst ... */ 217 local_irq_disable(); 218 rtc_wait_not_busy(); 219 220 tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG); 221 tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG); 222 tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG); 223 tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG); 224 tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG); 225 tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG); 226 227 local_irq_enable(); 228 229 bcd2tm(tm); 230 return 0; 231 } 232 233 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm) 234 { 235 if (tm2bcd(tm) < 0) 236 return -EINVAL; 237 local_irq_disable(); 238 rtc_wait_not_busy(); 239 240 rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG); 241 rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG); 242 rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG); 243 rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG); 244 rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG); 245 rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG); 246 247 local_irq_enable(); 248 249 return 0; 250 } 251 252 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 253 { 254 local_irq_disable(); 255 rtc_wait_not_busy(); 256 257 alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG); 258 alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG); 259 alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG); 260 alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG); 261 alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG); 262 alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG); 263 264 local_irq_enable(); 265 266 bcd2tm(&alm->time); 267 alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG) 268 & OMAP_RTC_INTERRUPTS_IT_ALARM); 269 270 return 0; 271 } 272 273 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 274 { 275 u8 reg; 276 277 if (tm2bcd(&alm->time) < 0) 278 return -EINVAL; 279 280 local_irq_disable(); 281 rtc_wait_not_busy(); 282 283 rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG); 284 rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG); 285 rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG); 286 rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG); 287 rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG); 288 rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG); 289 290 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 291 if (alm->enabled) 292 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; 293 else 294 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; 295 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 296 297 local_irq_enable(); 298 299 return 0; 300 } 301 302 static struct rtc_class_ops omap_rtc_ops = { 303 .read_time = omap_rtc_read_time, 304 .set_time = omap_rtc_set_time, 305 .read_alarm = omap_rtc_read_alarm, 306 .set_alarm = omap_rtc_set_alarm, 307 .alarm_irq_enable = omap_rtc_alarm_irq_enable, 308 }; 309 310 static int omap_rtc_alarm; 311 static int omap_rtc_timer; 312 313 #define OMAP_RTC_DATA_AM3352_IDX 1 314 #define OMAP_RTC_DATA_DA830_IDX 2 315 316 static struct platform_device_id omap_rtc_devtype[] = { 317 { 318 .name = DRIVER_NAME, 319 }, 320 [OMAP_RTC_DATA_AM3352_IDX] = { 321 .name = "am3352-rtc", 322 .driver_data = OMAP_RTC_HAS_KICKER | OMAP_RTC_HAS_IRQWAKEEN, 323 }, 324 [OMAP_RTC_DATA_DA830_IDX] = { 325 .name = "da830-rtc", 326 .driver_data = OMAP_RTC_HAS_KICKER, 327 }, 328 {}, 329 }; 330 MODULE_DEVICE_TABLE(platform, omap_rtc_devtype); 331 332 static const struct of_device_id omap_rtc_of_match[] = { 333 { .compatible = "ti,da830-rtc", 334 .data = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX], 335 }, 336 { .compatible = "ti,am3352-rtc", 337 .data = &omap_rtc_devtype[OMAP_RTC_DATA_AM3352_IDX], 338 }, 339 {}, 340 }; 341 MODULE_DEVICE_TABLE(of, omap_rtc_of_match); 342 343 static int __init omap_rtc_probe(struct platform_device *pdev) 344 { 345 struct resource *res; 346 struct rtc_device *rtc; 347 u8 reg, new_ctrl; 348 const struct platform_device_id *id_entry; 349 const struct of_device_id *of_id; 350 351 of_id = of_match_device(omap_rtc_of_match, &pdev->dev); 352 if (of_id) 353 pdev->id_entry = of_id->data; 354 355 omap_rtc_timer = platform_get_irq(pdev, 0); 356 if (omap_rtc_timer <= 0) { 357 pr_debug("%s: no update irq?\n", pdev->name); 358 return -ENOENT; 359 } 360 361 omap_rtc_alarm = platform_get_irq(pdev, 1); 362 if (omap_rtc_alarm <= 0) { 363 pr_debug("%s: no alarm irq?\n", pdev->name); 364 return -ENOENT; 365 } 366 367 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 368 rtc_base = devm_ioremap_resource(&pdev->dev, res); 369 if (IS_ERR(rtc_base)) 370 return PTR_ERR(rtc_base); 371 372 /* Enable the clock/module so that we can access the registers */ 373 pm_runtime_enable(&pdev->dev); 374 pm_runtime_get_sync(&pdev->dev); 375 376 id_entry = platform_get_device_id(pdev); 377 if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) { 378 rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG); 379 rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG); 380 } 381 382 rtc = devm_rtc_device_register(&pdev->dev, pdev->name, 383 &omap_rtc_ops, THIS_MODULE); 384 if (IS_ERR(rtc)) { 385 pr_debug("%s: can't register RTC device, err %ld\n", 386 pdev->name, PTR_ERR(rtc)); 387 goto fail0; 388 } 389 platform_set_drvdata(pdev, rtc); 390 391 /* clear pending irqs, and set 1/second periodic, 392 * which we'll use instead of update irqs 393 */ 394 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 395 396 /* clear old status */ 397 reg = rtc_read(OMAP_RTC_STATUS_REG); 398 if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) { 399 pr_info("%s: RTC power up reset detected\n", 400 pdev->name); 401 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG); 402 } 403 if (reg & (u8) OMAP_RTC_STATUS_ALARM) 404 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); 405 406 /* handle periodic and alarm irqs */ 407 if (devm_request_irq(&pdev->dev, omap_rtc_timer, rtc_irq, 0, 408 dev_name(&rtc->dev), rtc)) { 409 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n", 410 pdev->name, omap_rtc_timer); 411 goto fail0; 412 } 413 if ((omap_rtc_timer != omap_rtc_alarm) && 414 (devm_request_irq(&pdev->dev, omap_rtc_alarm, rtc_irq, 0, 415 dev_name(&rtc->dev), rtc))) { 416 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n", 417 pdev->name, omap_rtc_alarm); 418 goto fail0; 419 } 420 421 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */ 422 reg = rtc_read(OMAP_RTC_CTRL_REG); 423 if (reg & (u8) OMAP_RTC_CTRL_STOP) 424 pr_info("%s: already running\n", pdev->name); 425 426 /* force to 24 hour mode */ 427 new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP); 428 new_ctrl |= OMAP_RTC_CTRL_STOP; 429 430 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: 431 * 432 * - Device wake-up capability setting should come through chip 433 * init logic. OMAP1 boards should initialize the "wakeup capable" 434 * flag in the platform device if the board is wired right for 435 * being woken up by RTC alarm. For OMAP-L138, this capability 436 * is built into the SoC by the "Deep Sleep" capability. 437 * 438 * - Boards wired so RTC_ON_nOFF is used as the reset signal, 439 * rather than nPWRON_RESET, should forcibly enable split 440 * power mode. (Some chip errata report that RTC_CTRL_SPLIT 441 * is write-only, and always reads as zero...) 442 */ 443 444 device_init_wakeup(&pdev->dev, true); 445 446 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT) 447 pr_info("%s: split power mode\n", pdev->name); 448 449 if (reg != new_ctrl) 450 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG); 451 452 return 0; 453 454 fail0: 455 if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) 456 rtc_writel(0, OMAP_RTC_KICK0_REG); 457 pm_runtime_put_sync(&pdev->dev); 458 pm_runtime_disable(&pdev->dev); 459 return -EIO; 460 } 461 462 static int __exit omap_rtc_remove(struct platform_device *pdev) 463 { 464 const struct platform_device_id *id_entry = 465 platform_get_device_id(pdev); 466 467 device_init_wakeup(&pdev->dev, 0); 468 469 /* leave rtc running, but disable irqs */ 470 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 471 472 if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) 473 rtc_writel(0, OMAP_RTC_KICK0_REG); 474 475 /* Disable the clock/module */ 476 pm_runtime_put_sync(&pdev->dev); 477 pm_runtime_disable(&pdev->dev); 478 479 return 0; 480 } 481 482 #ifdef CONFIG_PM_SLEEP 483 static u8 irqstat; 484 485 static int omap_rtc_suspend(struct device *dev) 486 { 487 u8 irqwake_stat; 488 struct platform_device *pdev = to_platform_device(dev); 489 const struct platform_device_id *id_entry = 490 platform_get_device_id(pdev); 491 492 irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG); 493 494 /* FIXME the RTC alarm is not currently acting as a wakeup event 495 * source on some platforms, and in fact this enable() call is just 496 * saving a flag that's never used... 497 */ 498 if (device_may_wakeup(dev)) { 499 enable_irq_wake(omap_rtc_alarm); 500 501 if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN) { 502 irqwake_stat = rtc_read(OMAP_RTC_IRQWAKEEN); 503 irqwake_stat |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN; 504 rtc_write(irqwake_stat, OMAP_RTC_IRQWAKEEN); 505 } 506 } else { 507 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 508 } 509 510 /* Disable the clock/module */ 511 pm_runtime_put_sync(dev); 512 513 return 0; 514 } 515 516 static int omap_rtc_resume(struct device *dev) 517 { 518 u8 irqwake_stat; 519 struct platform_device *pdev = to_platform_device(dev); 520 const struct platform_device_id *id_entry = 521 platform_get_device_id(pdev); 522 523 /* Enable the clock/module so that we can access the registers */ 524 pm_runtime_get_sync(dev); 525 526 if (device_may_wakeup(dev)) { 527 disable_irq_wake(omap_rtc_alarm); 528 529 if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN) { 530 irqwake_stat = rtc_read(OMAP_RTC_IRQWAKEEN); 531 irqwake_stat &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN; 532 rtc_write(irqwake_stat, OMAP_RTC_IRQWAKEEN); 533 } 534 } else { 535 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG); 536 } 537 return 0; 538 } 539 #endif 540 541 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume); 542 543 static void omap_rtc_shutdown(struct platform_device *pdev) 544 { 545 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 546 } 547 548 MODULE_ALIAS("platform:omap_rtc"); 549 static struct platform_driver omap_rtc_driver = { 550 .remove = __exit_p(omap_rtc_remove), 551 .shutdown = omap_rtc_shutdown, 552 .driver = { 553 .name = DRIVER_NAME, 554 .owner = THIS_MODULE, 555 .pm = &omap_rtc_pm_ops, 556 .of_match_table = omap_rtc_of_match, 557 }, 558 .id_table = omap_rtc_devtype, 559 }; 560 561 module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe); 562 563 MODULE_AUTHOR("George G. Davis (and others)"); 564 MODULE_LICENSE("GPL"); 565