1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Oki MSM6242 RTC Driver 4 * 5 * Copyright 2009 Geert Uytterhoeven 6 * 7 * Based on the A2000 TOD code in arch/m68k/amiga/config.c 8 * Copyright (C) 1993 Hamish Macdonald 9 */ 10 11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 13 #include <linux/delay.h> 14 #include <linux/io.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/platform_device.h> 18 #include <linux/rtc.h> 19 #include <linux/slab.h> 20 21 22 enum { 23 MSM6242_SECOND1 = 0x0, /* 1-second digit register */ 24 MSM6242_SECOND10 = 0x1, /* 10-second digit register */ 25 MSM6242_MINUTE1 = 0x2, /* 1-minute digit register */ 26 MSM6242_MINUTE10 = 0x3, /* 10-minute digit register */ 27 MSM6242_HOUR1 = 0x4, /* 1-hour digit register */ 28 MSM6242_HOUR10 = 0x5, /* PM/AM, 10-hour digit register */ 29 MSM6242_DAY1 = 0x6, /* 1-day digit register */ 30 MSM6242_DAY10 = 0x7, /* 10-day digit register */ 31 MSM6242_MONTH1 = 0x8, /* 1-month digit register */ 32 MSM6242_MONTH10 = 0x9, /* 10-month digit register */ 33 MSM6242_YEAR1 = 0xa, /* 1-year digit register */ 34 MSM6242_YEAR10 = 0xb, /* 10-year digit register */ 35 MSM6242_WEEK = 0xc, /* Week register */ 36 MSM6242_CD = 0xd, /* Control Register D */ 37 MSM6242_CE = 0xe, /* Control Register E */ 38 MSM6242_CF = 0xf, /* Control Register F */ 39 }; 40 41 #define MSM6242_HOUR10_AM (0 << 2) 42 #define MSM6242_HOUR10_PM (1 << 2) 43 #define MSM6242_HOUR10_HR_MASK (3 << 0) 44 45 #define MSM6242_WEEK_SUNDAY 0 46 #define MSM6242_WEEK_MONDAY 1 47 #define MSM6242_WEEK_TUESDAY 2 48 #define MSM6242_WEEK_WEDNESDAY 3 49 #define MSM6242_WEEK_THURSDAY 4 50 #define MSM6242_WEEK_FRIDAY 5 51 #define MSM6242_WEEK_SATURDAY 6 52 53 #define MSM6242_CD_30_S_ADJ (1 << 3) /* 30-second adjustment */ 54 #define MSM6242_CD_IRQ_FLAG (1 << 2) 55 #define MSM6242_CD_BUSY (1 << 1) 56 #define MSM6242_CD_HOLD (1 << 0) 57 58 #define MSM6242_CE_T_MASK (3 << 2) 59 #define MSM6242_CE_T_64HZ (0 << 2) /* period 1/64 second */ 60 #define MSM6242_CE_T_1HZ (1 << 2) /* period 1 second */ 61 #define MSM6242_CE_T_1MINUTE (2 << 2) /* period 1 minute */ 62 #define MSM6242_CE_T_1HOUR (3 << 2) /* period 1 hour */ 63 64 #define MSM6242_CE_ITRPT_STND (1 << 1) 65 #define MSM6242_CE_MASK (1 << 0) /* STD.P output control */ 66 67 #define MSM6242_CF_TEST (1 << 3) 68 #define MSM6242_CF_12H (0 << 2) 69 #define MSM6242_CF_24H (1 << 2) 70 #define MSM6242_CF_STOP (1 << 1) 71 #define MSM6242_CF_REST (1 << 0) /* reset */ 72 73 74 struct msm6242_priv { 75 u32 __iomem *regs; 76 struct rtc_device *rtc; 77 }; 78 79 static inline unsigned int msm6242_read(struct msm6242_priv *priv, 80 unsigned int reg) 81 { 82 return __raw_readl(&priv->regs[reg]) & 0xf; 83 } 84 85 static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val, 86 unsigned int reg) 87 { 88 __raw_writel(val, &priv->regs[reg]); 89 } 90 91 static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val, 92 unsigned int reg) 93 { 94 msm6242_write(priv, msm6242_read(priv, reg) | val, reg); 95 } 96 97 static inline void msm6242_clear(struct msm6242_priv *priv, unsigned int val, 98 unsigned int reg) 99 { 100 msm6242_write(priv, msm6242_read(priv, reg) & ~val, reg); 101 } 102 103 static void msm6242_lock(struct msm6242_priv *priv) 104 { 105 int cnt = 5; 106 107 msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD); 108 109 while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) { 110 msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD); 111 udelay(70); 112 msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD); 113 cnt--; 114 } 115 116 if (!cnt) 117 pr_warn("timed out waiting for RTC (0x%x)\n", 118 msm6242_read(priv, MSM6242_CD)); 119 } 120 121 static void msm6242_unlock(struct msm6242_priv *priv) 122 { 123 msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD); 124 } 125 126 static int msm6242_read_time(struct device *dev, struct rtc_time *tm) 127 { 128 struct msm6242_priv *priv = dev_get_drvdata(dev); 129 130 msm6242_lock(priv); 131 132 tm->tm_sec = msm6242_read(priv, MSM6242_SECOND10) * 10 + 133 msm6242_read(priv, MSM6242_SECOND1); 134 tm->tm_min = msm6242_read(priv, MSM6242_MINUTE10) * 10 + 135 msm6242_read(priv, MSM6242_MINUTE1); 136 tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10 & 3)) * 10 + 137 msm6242_read(priv, MSM6242_HOUR1); 138 tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 + 139 msm6242_read(priv, MSM6242_DAY1); 140 tm->tm_wday = msm6242_read(priv, MSM6242_WEEK); 141 tm->tm_mon = msm6242_read(priv, MSM6242_MONTH10) * 10 + 142 msm6242_read(priv, MSM6242_MONTH1) - 1; 143 tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 + 144 msm6242_read(priv, MSM6242_YEAR1); 145 if (tm->tm_year <= 69) 146 tm->tm_year += 100; 147 148 if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) { 149 unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) & 150 MSM6242_HOUR10_PM; 151 if (!pm && tm->tm_hour == 12) 152 tm->tm_hour = 0; 153 else if (pm && tm->tm_hour != 12) 154 tm->tm_hour += 12; 155 } 156 157 msm6242_unlock(priv); 158 159 return 0; 160 } 161 162 static int msm6242_set_time(struct device *dev, struct rtc_time *tm) 163 { 164 struct msm6242_priv *priv = dev_get_drvdata(dev); 165 166 msm6242_lock(priv); 167 168 msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10); 169 msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1); 170 msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10); 171 msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1); 172 if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H) 173 msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10); 174 else if (tm->tm_hour >= 12) 175 msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10, 176 MSM6242_HOUR10); 177 else 178 msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10); 179 msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1); 180 msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10); 181 msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1); 182 if (tm->tm_wday != -1) 183 msm6242_write(priv, tm->tm_wday, MSM6242_WEEK); 184 msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10); 185 msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1); 186 if (tm->tm_year >= 100) 187 tm->tm_year -= 100; 188 msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10); 189 msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1); 190 191 msm6242_unlock(priv); 192 return 0; 193 } 194 195 static const struct rtc_class_ops msm6242_rtc_ops = { 196 .read_time = msm6242_read_time, 197 .set_time = msm6242_set_time, 198 }; 199 200 static int __init msm6242_rtc_probe(struct platform_device *pdev) 201 { 202 struct resource *res; 203 struct msm6242_priv *priv; 204 struct rtc_device *rtc; 205 206 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 207 if (!res) 208 return -ENODEV; 209 210 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 211 if (!priv) 212 return -ENOMEM; 213 214 priv->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res)); 215 if (!priv->regs) 216 return -ENOMEM; 217 platform_set_drvdata(pdev, priv); 218 219 rtc = devm_rtc_device_register(&pdev->dev, "rtc-msm6242", 220 &msm6242_rtc_ops, THIS_MODULE); 221 if (IS_ERR(rtc)) 222 return PTR_ERR(rtc); 223 224 priv->rtc = rtc; 225 return 0; 226 } 227 228 static struct platform_driver msm6242_rtc_driver = { 229 .driver = { 230 .name = "rtc-msm6242", 231 }, 232 }; 233 234 module_platform_driver_probe(msm6242_rtc_driver, msm6242_rtc_probe); 235 236 MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>"); 237 MODULE_LICENSE("GPL"); 238 MODULE_DESCRIPTION("Oki MSM6242 RTC driver"); 239 MODULE_ALIAS("platform:rtc-msm6242"); 240