1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // RTC driver for Maxim MAX77686 and MAX77802 4 // 5 // Copyright (C) 2012 Samsung Electronics Co.Ltd 6 // 7 // based on rtc-max8997.c 8 9 #include <linux/i2c.h> 10 #include <linux/slab.h> 11 #include <linux/rtc.h> 12 #include <linux/delay.h> 13 #include <linux/mutex.h> 14 #include <linux/module.h> 15 #include <linux/platform_device.h> 16 #include <linux/mfd/max77686-private.h> 17 #include <linux/irqdomain.h> 18 #include <linux/regmap.h> 19 20 #define MAX77686_I2C_ADDR_RTC (0x0C >> 1) 21 #define MAX77620_I2C_ADDR_RTC 0x68 22 #define MAX77686_INVALID_I2C_ADDR (-1) 23 24 /* Define non existing register */ 25 #define MAX77686_INVALID_REG (-1) 26 27 /* RTC Control Register */ 28 #define BCD_EN_SHIFT 0 29 #define BCD_EN_MASK BIT(BCD_EN_SHIFT) 30 #define MODEL24_SHIFT 1 31 #define MODEL24_MASK BIT(MODEL24_SHIFT) 32 /* RTC Update Register1 */ 33 #define RTC_UDR_SHIFT 0 34 #define RTC_UDR_MASK BIT(RTC_UDR_SHIFT) 35 #define RTC_RBUDR_SHIFT 4 36 #define RTC_RBUDR_MASK BIT(RTC_RBUDR_SHIFT) 37 /* RTC Hour register */ 38 #define HOUR_PM_SHIFT 6 39 #define HOUR_PM_MASK BIT(HOUR_PM_SHIFT) 40 /* RTC Alarm Enable */ 41 #define ALARM_ENABLE_SHIFT 7 42 #define ALARM_ENABLE_MASK BIT(ALARM_ENABLE_SHIFT) 43 44 #define REG_RTC_NONE 0xdeadbeef 45 46 /* 47 * MAX77802 has separate register (RTCAE1) for alarm enable instead 48 * using 1 bit from registers RTC{SEC,MIN,HOUR,DAY,MONTH,YEAR,DATE} 49 * as in done in MAX77686. 50 */ 51 #define MAX77802_ALARM_ENABLE_VALUE 0x77 52 53 enum { 54 RTC_SEC = 0, 55 RTC_MIN, 56 RTC_HOUR, 57 RTC_WEEKDAY, 58 RTC_MONTH, 59 RTC_YEAR, 60 RTC_DATE, 61 RTC_NR_TIME 62 }; 63 64 struct max77686_rtc_driver_data { 65 /* Minimum usecs needed for a RTC update */ 66 unsigned long delay; 67 /* Mask used to read RTC registers value */ 68 u8 mask; 69 /* Registers offset to I2C addresses map */ 70 const unsigned int *map; 71 /* Has a separate alarm enable register? */ 72 bool alarm_enable_reg; 73 /* I2C address for RTC block */ 74 int rtc_i2c_addr; 75 /* RTC interrupt via platform resource */ 76 bool rtc_irq_from_platform; 77 /* Pending alarm status register */ 78 int alarm_pending_status_reg; 79 /* RTC IRQ CHIP for regmap */ 80 const struct regmap_irq_chip *rtc_irq_chip; 81 }; 82 83 struct max77686_rtc_info { 84 struct device *dev; 85 struct i2c_client *rtc; 86 struct rtc_device *rtc_dev; 87 struct mutex lock; 88 89 struct regmap *regmap; 90 struct regmap *rtc_regmap; 91 92 const struct max77686_rtc_driver_data *drv_data; 93 struct regmap_irq_chip_data *rtc_irq_data; 94 95 int rtc_irq; 96 int virq; 97 int rtc_24hr_mode; 98 }; 99 100 enum MAX77686_RTC_OP { 101 MAX77686_RTC_WRITE, 102 MAX77686_RTC_READ, 103 }; 104 105 /* These are not registers but just offsets that are mapped to addresses */ 106 enum max77686_rtc_reg_offset { 107 REG_RTC_CONTROLM = 0, 108 REG_RTC_CONTROL, 109 REG_RTC_UPDATE0, 110 REG_WTSR_SMPL_CNTL, 111 REG_RTC_SEC, 112 REG_RTC_MIN, 113 REG_RTC_HOUR, 114 REG_RTC_WEEKDAY, 115 REG_RTC_MONTH, 116 REG_RTC_YEAR, 117 REG_RTC_DATE, 118 REG_ALARM1_SEC, 119 REG_ALARM1_MIN, 120 REG_ALARM1_HOUR, 121 REG_ALARM1_WEEKDAY, 122 REG_ALARM1_MONTH, 123 REG_ALARM1_YEAR, 124 REG_ALARM1_DATE, 125 REG_ALARM2_SEC, 126 REG_ALARM2_MIN, 127 REG_ALARM2_HOUR, 128 REG_ALARM2_WEEKDAY, 129 REG_ALARM2_MONTH, 130 REG_ALARM2_YEAR, 131 REG_ALARM2_DATE, 132 REG_RTC_AE1, 133 REG_RTC_END, 134 }; 135 136 /* Maps RTC registers offset to the MAX77686 register addresses */ 137 static const unsigned int max77686_map[REG_RTC_END] = { 138 [REG_RTC_CONTROLM] = MAX77686_RTC_CONTROLM, 139 [REG_RTC_CONTROL] = MAX77686_RTC_CONTROL, 140 [REG_RTC_UPDATE0] = MAX77686_RTC_UPDATE0, 141 [REG_WTSR_SMPL_CNTL] = MAX77686_WTSR_SMPL_CNTL, 142 [REG_RTC_SEC] = MAX77686_RTC_SEC, 143 [REG_RTC_MIN] = MAX77686_RTC_MIN, 144 [REG_RTC_HOUR] = MAX77686_RTC_HOUR, 145 [REG_RTC_WEEKDAY] = MAX77686_RTC_WEEKDAY, 146 [REG_RTC_MONTH] = MAX77686_RTC_MONTH, 147 [REG_RTC_YEAR] = MAX77686_RTC_YEAR, 148 [REG_RTC_DATE] = MAX77686_RTC_DATE, 149 [REG_ALARM1_SEC] = MAX77686_ALARM1_SEC, 150 [REG_ALARM1_MIN] = MAX77686_ALARM1_MIN, 151 [REG_ALARM1_HOUR] = MAX77686_ALARM1_HOUR, 152 [REG_ALARM1_WEEKDAY] = MAX77686_ALARM1_WEEKDAY, 153 [REG_ALARM1_MONTH] = MAX77686_ALARM1_MONTH, 154 [REG_ALARM1_YEAR] = MAX77686_ALARM1_YEAR, 155 [REG_ALARM1_DATE] = MAX77686_ALARM1_DATE, 156 [REG_ALARM2_SEC] = MAX77686_ALARM2_SEC, 157 [REG_ALARM2_MIN] = MAX77686_ALARM2_MIN, 158 [REG_ALARM2_HOUR] = MAX77686_ALARM2_HOUR, 159 [REG_ALARM2_WEEKDAY] = MAX77686_ALARM2_WEEKDAY, 160 [REG_ALARM2_MONTH] = MAX77686_ALARM2_MONTH, 161 [REG_ALARM2_YEAR] = MAX77686_ALARM2_YEAR, 162 [REG_ALARM2_DATE] = MAX77686_ALARM2_DATE, 163 [REG_RTC_AE1] = REG_RTC_NONE, 164 }; 165 166 static const struct regmap_irq max77686_rtc_irqs[] = { 167 /* RTC interrupts */ 168 REGMAP_IRQ_REG(0, 0, MAX77686_RTCINT_RTC60S_MSK), 169 REGMAP_IRQ_REG(1, 0, MAX77686_RTCINT_RTCA1_MSK), 170 REGMAP_IRQ_REG(2, 0, MAX77686_RTCINT_RTCA2_MSK), 171 REGMAP_IRQ_REG(3, 0, MAX77686_RTCINT_SMPL_MSK), 172 REGMAP_IRQ_REG(4, 0, MAX77686_RTCINT_RTC1S_MSK), 173 REGMAP_IRQ_REG(5, 0, MAX77686_RTCINT_WTSR_MSK), 174 }; 175 176 static const struct regmap_irq_chip max77686_rtc_irq_chip = { 177 .name = "max77686-rtc", 178 .status_base = MAX77686_RTC_INT, 179 .mask_base = MAX77686_RTC_INTM, 180 .num_regs = 1, 181 .irqs = max77686_rtc_irqs, 182 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs), 183 }; 184 185 static const struct max77686_rtc_driver_data max77686_drv_data = { 186 .delay = 16000, 187 .mask = 0x7f, 188 .map = max77686_map, 189 .alarm_enable_reg = false, 190 .rtc_irq_from_platform = false, 191 .alarm_pending_status_reg = MAX77686_REG_STATUS2, 192 .rtc_i2c_addr = MAX77686_I2C_ADDR_RTC, 193 .rtc_irq_chip = &max77686_rtc_irq_chip, 194 }; 195 196 static const struct max77686_rtc_driver_data max77620_drv_data = { 197 .delay = 16000, 198 .mask = 0x7f, 199 .map = max77686_map, 200 .alarm_enable_reg = false, 201 .rtc_irq_from_platform = true, 202 .alarm_pending_status_reg = MAX77686_INVALID_REG, 203 .rtc_i2c_addr = MAX77620_I2C_ADDR_RTC, 204 .rtc_irq_chip = &max77686_rtc_irq_chip, 205 }; 206 207 static const unsigned int max77802_map[REG_RTC_END] = { 208 [REG_RTC_CONTROLM] = MAX77802_RTC_CONTROLM, 209 [REG_RTC_CONTROL] = MAX77802_RTC_CONTROL, 210 [REG_RTC_UPDATE0] = MAX77802_RTC_UPDATE0, 211 [REG_WTSR_SMPL_CNTL] = MAX77802_WTSR_SMPL_CNTL, 212 [REG_RTC_SEC] = MAX77802_RTC_SEC, 213 [REG_RTC_MIN] = MAX77802_RTC_MIN, 214 [REG_RTC_HOUR] = MAX77802_RTC_HOUR, 215 [REG_RTC_WEEKDAY] = MAX77802_RTC_WEEKDAY, 216 [REG_RTC_MONTH] = MAX77802_RTC_MONTH, 217 [REG_RTC_YEAR] = MAX77802_RTC_YEAR, 218 [REG_RTC_DATE] = MAX77802_RTC_DATE, 219 [REG_ALARM1_SEC] = MAX77802_ALARM1_SEC, 220 [REG_ALARM1_MIN] = MAX77802_ALARM1_MIN, 221 [REG_ALARM1_HOUR] = MAX77802_ALARM1_HOUR, 222 [REG_ALARM1_WEEKDAY] = MAX77802_ALARM1_WEEKDAY, 223 [REG_ALARM1_MONTH] = MAX77802_ALARM1_MONTH, 224 [REG_ALARM1_YEAR] = MAX77802_ALARM1_YEAR, 225 [REG_ALARM1_DATE] = MAX77802_ALARM1_DATE, 226 [REG_ALARM2_SEC] = MAX77802_ALARM2_SEC, 227 [REG_ALARM2_MIN] = MAX77802_ALARM2_MIN, 228 [REG_ALARM2_HOUR] = MAX77802_ALARM2_HOUR, 229 [REG_ALARM2_WEEKDAY] = MAX77802_ALARM2_WEEKDAY, 230 [REG_ALARM2_MONTH] = MAX77802_ALARM2_MONTH, 231 [REG_ALARM2_YEAR] = MAX77802_ALARM2_YEAR, 232 [REG_ALARM2_DATE] = MAX77802_ALARM2_DATE, 233 [REG_RTC_AE1] = MAX77802_RTC_AE1, 234 }; 235 236 static const struct regmap_irq_chip max77802_rtc_irq_chip = { 237 .name = "max77802-rtc", 238 .status_base = MAX77802_RTC_INT, 239 .mask_base = MAX77802_RTC_INTM, 240 .num_regs = 1, 241 .irqs = max77686_rtc_irqs, /* same masks as 77686 */ 242 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs), 243 }; 244 245 static const struct max77686_rtc_driver_data max77802_drv_data = { 246 .delay = 200, 247 .mask = 0xff, 248 .map = max77802_map, 249 .alarm_enable_reg = true, 250 .rtc_irq_from_platform = false, 251 .alarm_pending_status_reg = MAX77686_REG_STATUS2, 252 .rtc_i2c_addr = MAX77686_INVALID_I2C_ADDR, 253 .rtc_irq_chip = &max77802_rtc_irq_chip, 254 }; 255 256 static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm, 257 struct max77686_rtc_info *info) 258 { 259 u8 mask = info->drv_data->mask; 260 261 tm->tm_sec = data[RTC_SEC] & mask; 262 tm->tm_min = data[RTC_MIN] & mask; 263 if (info->rtc_24hr_mode) { 264 tm->tm_hour = data[RTC_HOUR] & 0x1f; 265 } else { 266 tm->tm_hour = data[RTC_HOUR] & 0x0f; 267 if (data[RTC_HOUR] & HOUR_PM_MASK) 268 tm->tm_hour += 12; 269 } 270 271 /* Only a single bit is set in data[], so fls() would be equivalent */ 272 tm->tm_wday = ffs(data[RTC_WEEKDAY] & mask) - 1; 273 tm->tm_mday = data[RTC_DATE] & 0x1f; 274 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; 275 tm->tm_year = data[RTC_YEAR] & mask; 276 tm->tm_yday = 0; 277 tm->tm_isdst = 0; 278 279 /* 280 * MAX77686 uses 1 bit from sec/min/hour/etc RTC registers and the 281 * year values are just 0..99 so add 100 to support up to 2099. 282 */ 283 if (!info->drv_data->alarm_enable_reg) 284 tm->tm_year += 100; 285 } 286 287 static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data, 288 struct max77686_rtc_info *info) 289 { 290 data[RTC_SEC] = tm->tm_sec; 291 data[RTC_MIN] = tm->tm_min; 292 data[RTC_HOUR] = tm->tm_hour; 293 data[RTC_WEEKDAY] = 1 << tm->tm_wday; 294 data[RTC_DATE] = tm->tm_mday; 295 data[RTC_MONTH] = tm->tm_mon + 1; 296 297 if (info->drv_data->alarm_enable_reg) { 298 data[RTC_YEAR] = tm->tm_year; 299 return 0; 300 } 301 302 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; 303 304 if (tm->tm_year < 100) { 305 dev_err(info->dev, "RTC cannot handle the year %d.\n", 306 1900 + tm->tm_year); 307 return -EINVAL; 308 } 309 310 return 0; 311 } 312 313 static int max77686_rtc_update(struct max77686_rtc_info *info, 314 enum MAX77686_RTC_OP op) 315 { 316 int ret; 317 unsigned int data; 318 unsigned long delay = info->drv_data->delay; 319 320 if (op == MAX77686_RTC_WRITE) 321 data = 1 << RTC_UDR_SHIFT; 322 else 323 data = 1 << RTC_RBUDR_SHIFT; 324 325 ret = regmap_update_bits(info->rtc_regmap, 326 info->drv_data->map[REG_RTC_UPDATE0], 327 data, data); 328 if (ret < 0) 329 dev_err(info->dev, "Fail to write update reg(ret=%d, data=0x%x)\n", 330 ret, data); 331 else { 332 /* Minimum delay required before RTC update. */ 333 usleep_range(delay, delay * 2); 334 } 335 336 return ret; 337 } 338 339 static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm) 340 { 341 struct max77686_rtc_info *info = dev_get_drvdata(dev); 342 u8 data[RTC_NR_TIME]; 343 int ret; 344 345 mutex_lock(&info->lock); 346 347 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 348 if (ret < 0) 349 goto out; 350 351 ret = regmap_bulk_read(info->rtc_regmap, 352 info->drv_data->map[REG_RTC_SEC], 353 data, ARRAY_SIZE(data)); 354 if (ret < 0) { 355 dev_err(info->dev, "Fail to read time reg(%d)\n", ret); 356 goto out; 357 } 358 359 max77686_rtc_data_to_tm(data, tm, info); 360 361 out: 362 mutex_unlock(&info->lock); 363 return ret; 364 } 365 366 static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm) 367 { 368 struct max77686_rtc_info *info = dev_get_drvdata(dev); 369 u8 data[RTC_NR_TIME]; 370 int ret; 371 372 ret = max77686_rtc_tm_to_data(tm, data, info); 373 if (ret < 0) 374 return ret; 375 376 mutex_lock(&info->lock); 377 378 ret = regmap_bulk_write(info->rtc_regmap, 379 info->drv_data->map[REG_RTC_SEC], 380 data, ARRAY_SIZE(data)); 381 if (ret < 0) { 382 dev_err(info->dev, "Fail to write time reg(%d)\n", ret); 383 goto out; 384 } 385 386 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 387 388 out: 389 mutex_unlock(&info->lock); 390 return ret; 391 } 392 393 static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 394 { 395 struct max77686_rtc_info *info = dev_get_drvdata(dev); 396 u8 data[RTC_NR_TIME]; 397 unsigned int val; 398 const unsigned int *map = info->drv_data->map; 399 int i, ret; 400 401 mutex_lock(&info->lock); 402 403 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 404 if (ret < 0) 405 goto out; 406 407 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 408 data, ARRAY_SIZE(data)); 409 if (ret < 0) { 410 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 411 goto out; 412 } 413 414 max77686_rtc_data_to_tm(data, &alrm->time, info); 415 416 alrm->enabled = 0; 417 418 if (info->drv_data->alarm_enable_reg) { 419 if (map[REG_RTC_AE1] == REG_RTC_NONE) { 420 ret = -EINVAL; 421 dev_err(info->dev, 422 "alarm enable register not set(%d)\n", ret); 423 goto out; 424 } 425 426 ret = regmap_read(info->rtc_regmap, map[REG_RTC_AE1], &val); 427 if (ret < 0) { 428 dev_err(info->dev, 429 "fail to read alarm enable(%d)\n", ret); 430 goto out; 431 } 432 433 if (val) 434 alrm->enabled = 1; 435 } else { 436 for (i = 0; i < ARRAY_SIZE(data); i++) { 437 if (data[i] & ALARM_ENABLE_MASK) { 438 alrm->enabled = 1; 439 break; 440 } 441 } 442 } 443 444 alrm->pending = 0; 445 446 if (info->drv_data->alarm_pending_status_reg == MAX77686_INVALID_REG) 447 goto out; 448 449 ret = regmap_read(info->regmap, 450 info->drv_data->alarm_pending_status_reg, &val); 451 if (ret < 0) { 452 dev_err(info->dev, 453 "Fail to read alarm pending status reg(%d)\n", ret); 454 goto out; 455 } 456 457 if (val & (1 << 4)) /* RTCA1 */ 458 alrm->pending = 1; 459 460 out: 461 mutex_unlock(&info->lock); 462 return ret; 463 } 464 465 static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info) 466 { 467 u8 data[RTC_NR_TIME]; 468 int ret, i; 469 struct rtc_time tm; 470 const unsigned int *map = info->drv_data->map; 471 472 if (!mutex_is_locked(&info->lock)) 473 dev_warn(info->dev, "%s: should have mutex locked\n", __func__); 474 475 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 476 if (ret < 0) 477 goto out; 478 479 if (info->drv_data->alarm_enable_reg) { 480 if (map[REG_RTC_AE1] == REG_RTC_NONE) { 481 ret = -EINVAL; 482 dev_err(info->dev, 483 "alarm enable register not set(%d)\n", ret); 484 goto out; 485 } 486 487 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 0); 488 } else { 489 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 490 data, ARRAY_SIZE(data)); 491 if (ret < 0) { 492 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 493 goto out; 494 } 495 496 max77686_rtc_data_to_tm(data, &tm, info); 497 498 for (i = 0; i < ARRAY_SIZE(data); i++) 499 data[i] &= ~ALARM_ENABLE_MASK; 500 501 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC], 502 data, ARRAY_SIZE(data)); 503 } 504 505 if (ret < 0) { 506 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 507 goto out; 508 } 509 510 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 511 out: 512 return ret; 513 } 514 515 static int max77686_rtc_start_alarm(struct max77686_rtc_info *info) 516 { 517 u8 data[RTC_NR_TIME]; 518 int ret; 519 struct rtc_time tm; 520 const unsigned int *map = info->drv_data->map; 521 522 if (!mutex_is_locked(&info->lock)) 523 dev_warn(info->dev, "%s: should have mutex locked\n", __func__); 524 525 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 526 if (ret < 0) 527 goto out; 528 529 if (info->drv_data->alarm_enable_reg) { 530 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 531 MAX77802_ALARM_ENABLE_VALUE); 532 } else { 533 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 534 data, ARRAY_SIZE(data)); 535 if (ret < 0) { 536 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 537 goto out; 538 } 539 540 max77686_rtc_data_to_tm(data, &tm, info); 541 542 data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT); 543 data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT); 544 data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT); 545 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; 546 if (data[RTC_MONTH] & 0xf) 547 data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT); 548 if (data[RTC_YEAR] & info->drv_data->mask) 549 data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT); 550 if (data[RTC_DATE] & 0x1f) 551 data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT); 552 553 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC], 554 data, ARRAY_SIZE(data)); 555 } 556 557 if (ret < 0) { 558 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 559 goto out; 560 } 561 562 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 563 out: 564 return ret; 565 } 566 567 static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 568 { 569 struct max77686_rtc_info *info = dev_get_drvdata(dev); 570 u8 data[RTC_NR_TIME]; 571 int ret; 572 573 ret = max77686_rtc_tm_to_data(&alrm->time, data, info); 574 if (ret < 0) 575 return ret; 576 577 mutex_lock(&info->lock); 578 579 ret = max77686_rtc_stop_alarm(info); 580 if (ret < 0) 581 goto out; 582 583 ret = regmap_bulk_write(info->rtc_regmap, 584 info->drv_data->map[REG_ALARM1_SEC], 585 data, ARRAY_SIZE(data)); 586 587 if (ret < 0) { 588 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 589 goto out; 590 } 591 592 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 593 if (ret < 0) 594 goto out; 595 596 if (alrm->enabled) 597 ret = max77686_rtc_start_alarm(info); 598 out: 599 mutex_unlock(&info->lock); 600 return ret; 601 } 602 603 static int max77686_rtc_alarm_irq_enable(struct device *dev, 604 unsigned int enabled) 605 { 606 struct max77686_rtc_info *info = dev_get_drvdata(dev); 607 int ret; 608 609 mutex_lock(&info->lock); 610 if (enabled) 611 ret = max77686_rtc_start_alarm(info); 612 else 613 ret = max77686_rtc_stop_alarm(info); 614 mutex_unlock(&info->lock); 615 616 return ret; 617 } 618 619 static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data) 620 { 621 struct max77686_rtc_info *info = data; 622 623 dev_dbg(info->dev, "RTC alarm IRQ: %d\n", irq); 624 625 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); 626 627 return IRQ_HANDLED; 628 } 629 630 static const struct rtc_class_ops max77686_rtc_ops = { 631 .read_time = max77686_rtc_read_time, 632 .set_time = max77686_rtc_set_time, 633 .read_alarm = max77686_rtc_read_alarm, 634 .set_alarm = max77686_rtc_set_alarm, 635 .alarm_irq_enable = max77686_rtc_alarm_irq_enable, 636 }; 637 638 static int max77686_rtc_init_reg(struct max77686_rtc_info *info) 639 { 640 u8 data[2]; 641 int ret; 642 643 /* Set RTC control register : Binary mode, 24hour mdoe */ 644 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 645 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 646 647 info->rtc_24hr_mode = 1; 648 649 ret = regmap_bulk_write(info->rtc_regmap, 650 info->drv_data->map[REG_RTC_CONTROLM], 651 data, ARRAY_SIZE(data)); 652 if (ret < 0) { 653 dev_err(info->dev, "Fail to write controlm reg(%d)\n", ret); 654 return ret; 655 } 656 657 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 658 return ret; 659 } 660 661 static const struct regmap_config max77686_rtc_regmap_config = { 662 .reg_bits = 8, 663 .val_bits = 8, 664 }; 665 666 static int max77686_init_rtc_regmap(struct max77686_rtc_info *info) 667 { 668 struct device *parent = info->dev->parent; 669 struct i2c_client *parent_i2c = to_i2c_client(parent); 670 int ret; 671 672 if (info->drv_data->rtc_irq_from_platform) { 673 struct platform_device *pdev = to_platform_device(info->dev); 674 675 info->rtc_irq = platform_get_irq(pdev, 0); 676 if (info->rtc_irq < 0) 677 return info->rtc_irq; 678 } else { 679 info->rtc_irq = parent_i2c->irq; 680 } 681 682 info->regmap = dev_get_regmap(parent, NULL); 683 if (!info->regmap) { 684 dev_err(info->dev, "Failed to get rtc regmap\n"); 685 return -ENODEV; 686 } 687 688 if (info->drv_data->rtc_i2c_addr == MAX77686_INVALID_I2C_ADDR) { 689 info->rtc_regmap = info->regmap; 690 goto add_rtc_irq; 691 } 692 693 info->rtc = devm_i2c_new_dummy_device(info->dev, parent_i2c->adapter, 694 info->drv_data->rtc_i2c_addr); 695 if (IS_ERR(info->rtc)) { 696 dev_err(info->dev, "Failed to allocate I2C device for RTC\n"); 697 return PTR_ERR(info->rtc); 698 } 699 700 info->rtc_regmap = devm_regmap_init_i2c(info->rtc, 701 &max77686_rtc_regmap_config); 702 if (IS_ERR(info->rtc_regmap)) { 703 ret = PTR_ERR(info->rtc_regmap); 704 dev_err(info->dev, "Failed to allocate RTC regmap: %d\n", ret); 705 return ret; 706 } 707 708 add_rtc_irq: 709 ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq, 710 IRQF_TRIGGER_FALLING | IRQF_ONESHOT | 711 IRQF_SHARED, 0, info->drv_data->rtc_irq_chip, 712 &info->rtc_irq_data); 713 if (ret < 0) { 714 dev_err(info->dev, "Failed to add RTC irq chip: %d\n", ret); 715 return ret; 716 } 717 718 return 0; 719 } 720 721 static int max77686_rtc_probe(struct platform_device *pdev) 722 { 723 struct max77686_rtc_info *info; 724 const struct platform_device_id *id = platform_get_device_id(pdev); 725 int ret; 726 727 info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info), 728 GFP_KERNEL); 729 if (!info) 730 return -ENOMEM; 731 732 mutex_init(&info->lock); 733 info->dev = &pdev->dev; 734 info->drv_data = (const struct max77686_rtc_driver_data *) 735 id->driver_data; 736 737 ret = max77686_init_rtc_regmap(info); 738 if (ret < 0) 739 return ret; 740 741 platform_set_drvdata(pdev, info); 742 743 ret = max77686_rtc_init_reg(info); 744 if (ret < 0) { 745 dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret); 746 goto err_rtc; 747 } 748 749 device_init_wakeup(&pdev->dev, 1); 750 751 info->rtc_dev = devm_rtc_device_register(&pdev->dev, id->name, 752 &max77686_rtc_ops, THIS_MODULE); 753 754 if (IS_ERR(info->rtc_dev)) { 755 ret = PTR_ERR(info->rtc_dev); 756 dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret); 757 if (ret == 0) 758 ret = -EINVAL; 759 goto err_rtc; 760 } 761 762 info->virq = regmap_irq_get_virq(info->rtc_irq_data, 763 MAX77686_RTCIRQ_RTCA1); 764 if (info->virq <= 0) { 765 ret = -ENXIO; 766 goto err_rtc; 767 } 768 769 ret = request_threaded_irq(info->virq, NULL, max77686_rtc_alarm_irq, 0, 770 "rtc-alarm1", info); 771 if (ret < 0) { 772 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", 773 info->virq, ret); 774 goto err_rtc; 775 } 776 777 return 0; 778 779 err_rtc: 780 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data); 781 782 return ret; 783 } 784 785 static int max77686_rtc_remove(struct platform_device *pdev) 786 { 787 struct max77686_rtc_info *info = platform_get_drvdata(pdev); 788 789 free_irq(info->virq, info); 790 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data); 791 792 return 0; 793 } 794 795 #ifdef CONFIG_PM_SLEEP 796 static int max77686_rtc_suspend(struct device *dev) 797 { 798 if (device_may_wakeup(dev)) { 799 struct max77686_rtc_info *info = dev_get_drvdata(dev); 800 801 return enable_irq_wake(info->virq); 802 } 803 804 return 0; 805 } 806 807 static int max77686_rtc_resume(struct device *dev) 808 { 809 if (device_may_wakeup(dev)) { 810 struct max77686_rtc_info *info = dev_get_drvdata(dev); 811 812 return disable_irq_wake(info->virq); 813 } 814 815 return 0; 816 } 817 #endif 818 819 static SIMPLE_DEV_PM_OPS(max77686_rtc_pm_ops, 820 max77686_rtc_suspend, max77686_rtc_resume); 821 822 static const struct platform_device_id rtc_id[] = { 823 { "max77686-rtc", .driver_data = (kernel_ulong_t)&max77686_drv_data, }, 824 { "max77802-rtc", .driver_data = (kernel_ulong_t)&max77802_drv_data, }, 825 { "max77620-rtc", .driver_data = (kernel_ulong_t)&max77620_drv_data, }, 826 {}, 827 }; 828 MODULE_DEVICE_TABLE(platform, rtc_id); 829 830 static struct platform_driver max77686_rtc_driver = { 831 .driver = { 832 .name = "max77686-rtc", 833 .pm = &max77686_rtc_pm_ops, 834 }, 835 .probe = max77686_rtc_probe, 836 .remove = max77686_rtc_remove, 837 .id_table = rtc_id, 838 }; 839 840 module_platform_driver(max77686_rtc_driver); 841 842 MODULE_DESCRIPTION("Maxim MAX77686 RTC driver"); 843 MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>"); 844 MODULE_LICENSE("GPL"); 845