1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * I2C client/driver for the ST M41T80 family of i2c rtc chips. 4 * 5 * Author: Alexander Bigga <ab@mycable.de> 6 * 7 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> 8 * 9 * 2006 (c) mycable GmbH 10 */ 11 12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 13 14 #include <linux/bcd.h> 15 #include <linux/clk-provider.h> 16 #include <linux/i2c.h> 17 #include <linux/init.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/of_device.h> 21 #include <linux/rtc.h> 22 #include <linux/slab.h> 23 #include <linux/mutex.h> 24 #include <linux/string.h> 25 #ifdef CONFIG_RTC_DRV_M41T80_WDT 26 #include <linux/fs.h> 27 #include <linux/ioctl.h> 28 #include <linux/miscdevice.h> 29 #include <linux/reboot.h> 30 #include <linux/watchdog.h> 31 #endif 32 33 #define M41T80_REG_SSEC 0x00 34 #define M41T80_REG_SEC 0x01 35 #define M41T80_REG_MIN 0x02 36 #define M41T80_REG_HOUR 0x03 37 #define M41T80_REG_WDAY 0x04 38 #define M41T80_REG_DAY 0x05 39 #define M41T80_REG_MON 0x06 40 #define M41T80_REG_YEAR 0x07 41 #define M41T80_REG_ALARM_MON 0x0a 42 #define M41T80_REG_ALARM_DAY 0x0b 43 #define M41T80_REG_ALARM_HOUR 0x0c 44 #define M41T80_REG_ALARM_MIN 0x0d 45 #define M41T80_REG_ALARM_SEC 0x0e 46 #define M41T80_REG_FLAGS 0x0f 47 #define M41T80_REG_SQW 0x13 48 49 #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) 50 #define M41T80_ALARM_REG_SIZE \ 51 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) 52 53 #define M41T80_SQW_MAX_FREQ 32768 54 55 #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ 56 #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ 57 #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ 58 #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ 59 #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */ 60 #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ 61 #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ 62 #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ 63 #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ 64 #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ 65 66 #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ 67 #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ 68 #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ 69 #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ 70 #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ 71 72 static const struct i2c_device_id m41t80_id[] = { 73 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, 74 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, 75 { "m41t80", M41T80_FEATURE_SQ }, 76 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, 77 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 78 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 79 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 80 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 81 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 82 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 83 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, 84 { } 85 }; 86 MODULE_DEVICE_TABLE(i2c, m41t80_id); 87 88 static const __maybe_unused struct of_device_id m41t80_of_match[] = { 89 { 90 .compatible = "st,m41t62", 91 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT) 92 }, 93 { 94 .compatible = "st,m41t65", 95 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD) 96 }, 97 { 98 .compatible = "st,m41t80", 99 .data = (void *)(M41T80_FEATURE_SQ) 100 }, 101 { 102 .compatible = "st,m41t81", 103 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ) 104 }, 105 { 106 .compatible = "st,m41t81s", 107 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 108 }, 109 { 110 .compatible = "st,m41t82", 111 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 112 }, 113 { 114 .compatible = "st,m41t83", 115 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 116 }, 117 { 118 .compatible = "st,m41t84", 119 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 120 }, 121 { 122 .compatible = "st,m41t85", 123 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 124 }, 125 { 126 .compatible = "st,m41t87", 127 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 128 }, 129 { 130 .compatible = "microcrystal,rv4162", 131 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 132 }, 133 /* DT compatibility only, do not use compatibles below: */ 134 { 135 .compatible = "st,rv4162", 136 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 137 }, 138 { 139 .compatible = "rv4162", 140 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 141 }, 142 { } 143 }; 144 MODULE_DEVICE_TABLE(of, m41t80_of_match); 145 146 struct m41t80_data { 147 unsigned long features; 148 struct i2c_client *client; 149 struct rtc_device *rtc; 150 #ifdef CONFIG_COMMON_CLK 151 struct clk_hw sqw; 152 unsigned long freq; 153 unsigned int sqwe; 154 #endif 155 }; 156 157 static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) 158 { 159 struct i2c_client *client = dev_id; 160 struct m41t80_data *m41t80 = i2c_get_clientdata(client); 161 unsigned long events = 0; 162 int flags, flags_afe; 163 164 rtc_lock(m41t80->rtc); 165 166 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 167 if (flags_afe < 0) { 168 rtc_unlock(m41t80->rtc); 169 return IRQ_NONE; 170 } 171 172 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 173 if (flags <= 0) { 174 rtc_unlock(m41t80->rtc); 175 return IRQ_NONE; 176 } 177 178 if (flags & M41T80_FLAGS_AF) { 179 flags &= ~M41T80_FLAGS_AF; 180 flags_afe &= ~M41T80_ALMON_AFE; 181 events |= RTC_AF; 182 } 183 184 if (events) { 185 rtc_update_irq(m41t80->rtc, 1, events); 186 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags); 187 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 188 flags_afe); 189 } 190 191 rtc_unlock(m41t80->rtc); 192 193 return IRQ_HANDLED; 194 } 195 196 static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) 197 { 198 struct i2c_client *client = to_i2c_client(dev); 199 unsigned char buf[8]; 200 int err, flags; 201 202 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 203 if (flags < 0) 204 return flags; 205 206 if (flags & M41T80_FLAGS_OF) { 207 dev_err(&client->dev, "Oscillator failure, data is invalid.\n"); 208 return -EINVAL; 209 } 210 211 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, 212 sizeof(buf), buf); 213 if (err < 0) { 214 dev_err(&client->dev, "Unable to read date\n"); 215 return err; 216 } 217 218 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); 219 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); 220 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); 221 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); 222 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; 223 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; 224 225 /* assume 20YY not 19YY, and ignore the Century Bit */ 226 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; 227 return 0; 228 } 229 230 static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) 231 { 232 struct i2c_client *client = to_i2c_client(dev); 233 struct m41t80_data *clientdata = i2c_get_clientdata(client); 234 unsigned char buf[8]; 235 int err, flags; 236 237 buf[M41T80_REG_SSEC] = 0; 238 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); 239 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); 240 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); 241 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); 242 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); 243 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); 244 buf[M41T80_REG_WDAY] = tm->tm_wday; 245 246 /* If the square wave output is controlled in the weekday register */ 247 if (clientdata->features & M41T80_FEATURE_SQ_ALT) { 248 int val; 249 250 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY); 251 if (val < 0) 252 return val; 253 254 buf[M41T80_REG_WDAY] |= (val & 0xf0); 255 } 256 257 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, 258 sizeof(buf), buf); 259 if (err < 0) { 260 dev_err(&client->dev, "Unable to write to date registers\n"); 261 return err; 262 } 263 264 /* Clear the OF bit of Flags Register */ 265 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 266 if (flags < 0) 267 return flags; 268 269 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 270 flags & ~M41T80_FLAGS_OF); 271 if (err < 0) { 272 dev_err(&client->dev, "Unable to write flags register\n"); 273 return err; 274 } 275 276 return err; 277 } 278 279 static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) 280 { 281 struct i2c_client *client = to_i2c_client(dev); 282 struct m41t80_data *clientdata = i2c_get_clientdata(client); 283 int reg; 284 285 if (clientdata->features & M41T80_FEATURE_BL) { 286 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 287 if (reg < 0) 288 return reg; 289 seq_printf(seq, "battery\t\t: %s\n", 290 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); 291 } 292 return 0; 293 } 294 295 static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) 296 { 297 struct i2c_client *client = to_i2c_client(dev); 298 int flags, retval; 299 300 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 301 if (flags < 0) 302 return flags; 303 304 if (enabled) 305 flags |= M41T80_ALMON_AFE; 306 else 307 flags &= ~M41T80_ALMON_AFE; 308 309 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags); 310 if (retval < 0) { 311 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval); 312 return retval; 313 } 314 return 0; 315 } 316 317 static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 318 { 319 struct i2c_client *client = to_i2c_client(dev); 320 u8 alarmvals[5]; 321 int ret, err; 322 323 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); 324 alarmvals[1] = bin2bcd(alrm->time.tm_mday); 325 alarmvals[2] = bin2bcd(alrm->time.tm_hour); 326 alarmvals[3] = bin2bcd(alrm->time.tm_min); 327 alarmvals[4] = bin2bcd(alrm->time.tm_sec); 328 329 /* Clear AF and AFE flags */ 330 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 331 if (ret < 0) 332 return ret; 333 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 334 ret & ~(M41T80_ALMON_AFE)); 335 if (err < 0) { 336 dev_err(dev, "Unable to clear AFE bit\n"); 337 return err; 338 } 339 340 /* Keep SQWE bit value */ 341 alarmvals[0] |= (ret & M41T80_ALMON_SQWE); 342 343 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 344 if (ret < 0) 345 return ret; 346 347 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 348 ret & ~(M41T80_FLAGS_AF)); 349 if (err < 0) { 350 dev_err(dev, "Unable to clear AF bit\n"); 351 return err; 352 } 353 354 /* Write the alarm */ 355 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, 356 5, alarmvals); 357 if (err) 358 return err; 359 360 /* Enable the alarm interrupt */ 361 if (alrm->enabled) { 362 alarmvals[0] |= M41T80_ALMON_AFE; 363 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 364 alarmvals[0]); 365 if (err) 366 return err; 367 } 368 369 return 0; 370 } 371 372 static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 373 { 374 struct i2c_client *client = to_i2c_client(dev); 375 u8 alarmvals[5]; 376 int flags, ret; 377 378 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, 379 5, alarmvals); 380 if (ret != 5) 381 return ret < 0 ? ret : -EIO; 382 383 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 384 if (flags < 0) 385 return flags; 386 387 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); 388 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); 389 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); 390 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); 391 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1; 392 393 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); 394 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; 395 396 return 0; 397 } 398 399 static const struct rtc_class_ops m41t80_rtc_ops = { 400 .read_time = m41t80_rtc_read_time, 401 .set_time = m41t80_rtc_set_time, 402 .proc = m41t80_rtc_proc, 403 .read_alarm = m41t80_read_alarm, 404 .set_alarm = m41t80_set_alarm, 405 .alarm_irq_enable = m41t80_alarm_irq_enable, 406 }; 407 408 #ifdef CONFIG_PM_SLEEP 409 static int m41t80_suspend(struct device *dev) 410 { 411 struct i2c_client *client = to_i2c_client(dev); 412 413 if (client->irq >= 0 && device_may_wakeup(dev)) 414 enable_irq_wake(client->irq); 415 416 return 0; 417 } 418 419 static int m41t80_resume(struct device *dev) 420 { 421 struct i2c_client *client = to_i2c_client(dev); 422 423 if (client->irq >= 0 && device_may_wakeup(dev)) 424 disable_irq_wake(client->irq); 425 426 return 0; 427 } 428 #endif 429 430 static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); 431 432 #ifdef CONFIG_COMMON_CLK 433 #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw) 434 435 static unsigned long m41t80_decode_freq(int setting) 436 { 437 return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ : 438 M41T80_SQW_MAX_FREQ >> setting; 439 } 440 441 static unsigned long m41t80_get_freq(struct m41t80_data *m41t80) 442 { 443 struct i2c_client *client = m41t80->client; 444 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 445 M41T80_REG_WDAY : M41T80_REG_SQW; 446 int ret = i2c_smbus_read_byte_data(client, reg_sqw); 447 448 if (ret < 0) 449 return 0; 450 return m41t80_decode_freq(ret >> 4); 451 } 452 453 static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw, 454 unsigned long parent_rate) 455 { 456 return sqw_to_m41t80_data(hw)->freq; 457 } 458 459 static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate, 460 unsigned long *prate) 461 { 462 if (rate >= M41T80_SQW_MAX_FREQ) 463 return M41T80_SQW_MAX_FREQ; 464 if (rate >= M41T80_SQW_MAX_FREQ / 4) 465 return M41T80_SQW_MAX_FREQ / 4; 466 if (!rate) 467 return 0; 468 return 1 << ilog2(rate); 469 } 470 471 static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate, 472 unsigned long parent_rate) 473 { 474 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 475 struct i2c_client *client = m41t80->client; 476 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 477 M41T80_REG_WDAY : M41T80_REG_SQW; 478 int reg, ret, val = 0; 479 480 if (rate >= M41T80_SQW_MAX_FREQ) 481 val = 1; 482 else if (rate >= M41T80_SQW_MAX_FREQ / 4) 483 val = 2; 484 else if (rate) 485 val = 15 - ilog2(rate); 486 487 reg = i2c_smbus_read_byte_data(client, reg_sqw); 488 if (reg < 0) 489 return reg; 490 491 reg = (reg & 0x0f) | (val << 4); 492 493 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg); 494 if (!ret) 495 m41t80->freq = m41t80_decode_freq(val); 496 return ret; 497 } 498 499 static int m41t80_sqw_control(struct clk_hw *hw, bool enable) 500 { 501 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 502 struct i2c_client *client = m41t80->client; 503 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 504 505 if (ret < 0) 506 return ret; 507 508 if (enable) 509 ret |= M41T80_ALMON_SQWE; 510 else 511 ret &= ~M41T80_ALMON_SQWE; 512 513 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret); 514 if (!ret) 515 m41t80->sqwe = enable; 516 return ret; 517 } 518 519 static int m41t80_sqw_prepare(struct clk_hw *hw) 520 { 521 return m41t80_sqw_control(hw, 1); 522 } 523 524 static void m41t80_sqw_unprepare(struct clk_hw *hw) 525 { 526 m41t80_sqw_control(hw, 0); 527 } 528 529 static int m41t80_sqw_is_prepared(struct clk_hw *hw) 530 { 531 return sqw_to_m41t80_data(hw)->sqwe; 532 } 533 534 static const struct clk_ops m41t80_sqw_ops = { 535 .prepare = m41t80_sqw_prepare, 536 .unprepare = m41t80_sqw_unprepare, 537 .is_prepared = m41t80_sqw_is_prepared, 538 .recalc_rate = m41t80_sqw_recalc_rate, 539 .round_rate = m41t80_sqw_round_rate, 540 .set_rate = m41t80_sqw_set_rate, 541 }; 542 543 static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80) 544 { 545 struct i2c_client *client = m41t80->client; 546 struct device_node *node = client->dev.of_node; 547 struct clk *clk; 548 struct clk_init_data init; 549 int ret; 550 551 /* First disable the clock */ 552 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 553 if (ret < 0) 554 return ERR_PTR(ret); 555 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 556 ret & ~(M41T80_ALMON_SQWE)); 557 if (ret < 0) 558 return ERR_PTR(ret); 559 560 init.name = "m41t80-sqw"; 561 init.ops = &m41t80_sqw_ops; 562 init.flags = 0; 563 init.parent_names = NULL; 564 init.num_parents = 0; 565 m41t80->sqw.init = &init; 566 m41t80->freq = m41t80_get_freq(m41t80); 567 568 /* optional override of the clockname */ 569 of_property_read_string(node, "clock-output-names", &init.name); 570 571 /* register the clock */ 572 clk = clk_register(&client->dev, &m41t80->sqw); 573 if (!IS_ERR(clk)) 574 of_clk_add_provider(node, of_clk_src_simple_get, clk); 575 576 return clk; 577 } 578 #endif 579 580 #ifdef CONFIG_RTC_DRV_M41T80_WDT 581 /* 582 ***************************************************************************** 583 * 584 * Watchdog Driver 585 * 586 ***************************************************************************** 587 */ 588 static DEFINE_MUTEX(m41t80_rtc_mutex); 589 static struct i2c_client *save_client; 590 591 /* Default margin */ 592 #define WD_TIMO 60 /* 1..31 seconds */ 593 594 static int wdt_margin = WD_TIMO; 595 module_param(wdt_margin, int, 0); 596 MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); 597 598 static unsigned long wdt_is_open; 599 static int boot_flag; 600 601 /** 602 * wdt_ping: 603 * 604 * Reload counter one with the watchdog timeout. We don't bother reloading 605 * the cascade counter. 606 */ 607 static void wdt_ping(void) 608 { 609 unsigned char i2c_data[2]; 610 struct i2c_msg msgs1[1] = { 611 { 612 .addr = save_client->addr, 613 .flags = 0, 614 .len = 2, 615 .buf = i2c_data, 616 }, 617 }; 618 struct m41t80_data *clientdata = i2c_get_clientdata(save_client); 619 620 i2c_data[0] = 0x09; /* watchdog register */ 621 622 if (wdt_margin > 31) 623 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ 624 else 625 /* 626 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) 627 */ 628 i2c_data[1] = wdt_margin << 2 | 0x82; 629 630 /* 631 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as 632 * that would be an invalid resolution. 633 */ 634 if (clientdata->features & M41T80_FEATURE_WD) 635 i2c_data[1] &= ~M41T80_WATCHDOG_RB2; 636 637 i2c_transfer(save_client->adapter, msgs1, 1); 638 } 639 640 /** 641 * wdt_disable: 642 * 643 * disables watchdog. 644 */ 645 static void wdt_disable(void) 646 { 647 unsigned char i2c_data[2], i2c_buf[0x10]; 648 struct i2c_msg msgs0[2] = { 649 { 650 .addr = save_client->addr, 651 .flags = 0, 652 .len = 1, 653 .buf = i2c_data, 654 }, 655 { 656 .addr = save_client->addr, 657 .flags = I2C_M_RD, 658 .len = 1, 659 .buf = i2c_buf, 660 }, 661 }; 662 struct i2c_msg msgs1[1] = { 663 { 664 .addr = save_client->addr, 665 .flags = 0, 666 .len = 2, 667 .buf = i2c_data, 668 }, 669 }; 670 671 i2c_data[0] = 0x09; 672 i2c_transfer(save_client->adapter, msgs0, 2); 673 674 i2c_data[0] = 0x09; 675 i2c_data[1] = 0x00; 676 i2c_transfer(save_client->adapter, msgs1, 1); 677 } 678 679 /** 680 * wdt_write: 681 * @file: file handle to the watchdog 682 * @buf: buffer to write (unused as data does not matter here 683 * @count: count of bytes 684 * @ppos: pointer to the position to write. No seeks allowed 685 * 686 * A write to a watchdog device is defined as a keepalive signal. Any 687 * write of data will do, as we we don't define content meaning. 688 */ 689 static ssize_t wdt_write(struct file *file, const char __user *buf, 690 size_t count, loff_t *ppos) 691 { 692 if (count) { 693 wdt_ping(); 694 return 1; 695 } 696 return 0; 697 } 698 699 static ssize_t wdt_read(struct file *file, char __user *buf, 700 size_t count, loff_t *ppos) 701 { 702 return 0; 703 } 704 705 /** 706 * wdt_ioctl: 707 * @file: file handle to the device 708 * @cmd: watchdog command 709 * @arg: argument pointer 710 * 711 * The watchdog API defines a common set of functions for all watchdogs 712 * according to their available features. We only actually usefully support 713 * querying capabilities and current status. 714 */ 715 static int wdt_ioctl(struct file *file, unsigned int cmd, 716 unsigned long arg) 717 { 718 int new_margin, rv; 719 static struct watchdog_info ident = { 720 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | 721 WDIOF_SETTIMEOUT, 722 .firmware_version = 1, 723 .identity = "M41T80 WTD" 724 }; 725 726 switch (cmd) { 727 case WDIOC_GETSUPPORT: 728 return copy_to_user((struct watchdog_info __user *)arg, &ident, 729 sizeof(ident)) ? -EFAULT : 0; 730 731 case WDIOC_GETSTATUS: 732 case WDIOC_GETBOOTSTATUS: 733 return put_user(boot_flag, (int __user *)arg); 734 case WDIOC_KEEPALIVE: 735 wdt_ping(); 736 return 0; 737 case WDIOC_SETTIMEOUT: 738 if (get_user(new_margin, (int __user *)arg)) 739 return -EFAULT; 740 /* Arbitrary, can't find the card's limits */ 741 if (new_margin < 1 || new_margin > 124) 742 return -EINVAL; 743 wdt_margin = new_margin; 744 wdt_ping(); 745 fallthrough; 746 case WDIOC_GETTIMEOUT: 747 return put_user(wdt_margin, (int __user *)arg); 748 749 case WDIOC_SETOPTIONS: 750 if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) 751 return -EFAULT; 752 753 if (rv & WDIOS_DISABLECARD) { 754 pr_info("disable watchdog\n"); 755 wdt_disable(); 756 } 757 758 if (rv & WDIOS_ENABLECARD) { 759 pr_info("enable watchdog\n"); 760 wdt_ping(); 761 } 762 763 return -EINVAL; 764 } 765 return -ENOTTY; 766 } 767 768 static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, 769 unsigned long arg) 770 { 771 int ret; 772 773 mutex_lock(&m41t80_rtc_mutex); 774 ret = wdt_ioctl(file, cmd, arg); 775 mutex_unlock(&m41t80_rtc_mutex); 776 777 return ret; 778 } 779 780 /** 781 * wdt_open: 782 * @inode: inode of device 783 * @file: file handle to device 784 * 785 */ 786 static int wdt_open(struct inode *inode, struct file *file) 787 { 788 if (iminor(inode) == WATCHDOG_MINOR) { 789 mutex_lock(&m41t80_rtc_mutex); 790 if (test_and_set_bit(0, &wdt_is_open)) { 791 mutex_unlock(&m41t80_rtc_mutex); 792 return -EBUSY; 793 } 794 /* 795 * Activate 796 */ 797 wdt_is_open = 1; 798 mutex_unlock(&m41t80_rtc_mutex); 799 return stream_open(inode, file); 800 } 801 return -ENODEV; 802 } 803 804 /** 805 * wdt_close: 806 * @inode: inode to board 807 * @file: file handle to board 808 * 809 */ 810 static int wdt_release(struct inode *inode, struct file *file) 811 { 812 if (iminor(inode) == WATCHDOG_MINOR) 813 clear_bit(0, &wdt_is_open); 814 return 0; 815 } 816 817 /** 818 * notify_sys: 819 * @this: our notifier block 820 * @code: the event being reported 821 * @unused: unused 822 * 823 * Our notifier is called on system shutdowns. We want to turn the card 824 * off at reboot otherwise the machine will reboot again during memory 825 * test or worse yet during the following fsck. This would suck, in fact 826 * trust me - if it happens it does suck. 827 */ 828 static int wdt_notify_sys(struct notifier_block *this, unsigned long code, 829 void *unused) 830 { 831 if (code == SYS_DOWN || code == SYS_HALT) 832 /* Disable Watchdog */ 833 wdt_disable(); 834 return NOTIFY_DONE; 835 } 836 837 static const struct file_operations wdt_fops = { 838 .owner = THIS_MODULE, 839 .read = wdt_read, 840 .unlocked_ioctl = wdt_unlocked_ioctl, 841 .compat_ioctl = compat_ptr_ioctl, 842 .write = wdt_write, 843 .open = wdt_open, 844 .release = wdt_release, 845 .llseek = no_llseek, 846 }; 847 848 static struct miscdevice wdt_dev = { 849 .minor = WATCHDOG_MINOR, 850 .name = "watchdog", 851 .fops = &wdt_fops, 852 }; 853 854 /* 855 * The WDT card needs to learn about soft shutdowns in order to 856 * turn the timebomb registers off. 857 */ 858 static struct notifier_block wdt_notifier = { 859 .notifier_call = wdt_notify_sys, 860 }; 861 #endif /* CONFIG_RTC_DRV_M41T80_WDT */ 862 863 /* 864 ***************************************************************************** 865 * 866 * Driver Interface 867 * 868 ***************************************************************************** 869 */ 870 871 static int m41t80_probe(struct i2c_client *client, 872 const struct i2c_device_id *id) 873 { 874 struct i2c_adapter *adapter = client->adapter; 875 int rc = 0; 876 struct rtc_time tm; 877 struct m41t80_data *m41t80_data = NULL; 878 bool wakeup_source = false; 879 880 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | 881 I2C_FUNC_SMBUS_BYTE_DATA)) { 882 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n"); 883 return -ENODEV; 884 } 885 886 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data), 887 GFP_KERNEL); 888 if (!m41t80_data) 889 return -ENOMEM; 890 891 m41t80_data->client = client; 892 if (client->dev.of_node) 893 m41t80_data->features = (unsigned long) 894 of_device_get_match_data(&client->dev); 895 else 896 m41t80_data->features = id->driver_data; 897 i2c_set_clientdata(client, m41t80_data); 898 899 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev); 900 if (IS_ERR(m41t80_data->rtc)) 901 return PTR_ERR(m41t80_data->rtc); 902 903 #ifdef CONFIG_OF 904 wakeup_source = of_property_read_bool(client->dev.of_node, 905 "wakeup-source"); 906 #endif 907 if (client->irq > 0) { 908 rc = devm_request_threaded_irq(&client->dev, client->irq, 909 NULL, m41t80_handle_irq, 910 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 911 "m41t80", client); 912 if (rc) { 913 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 914 client->irq = 0; 915 wakeup_source = false; 916 } 917 } 918 if (client->irq > 0 || wakeup_source) 919 device_init_wakeup(&client->dev, true); 920 else 921 clear_bit(RTC_FEATURE_ALARM, m41t80_data->rtc->features); 922 923 m41t80_data->rtc->ops = &m41t80_rtc_ops; 924 m41t80_data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 925 m41t80_data->rtc->range_max = RTC_TIMESTAMP_END_2099; 926 927 if (client->irq <= 0) { 928 /* We cannot support UIE mode if we do not have an IRQ line */ 929 m41t80_data->rtc->uie_unsupported = 1; 930 } 931 932 /* Make sure HT (Halt Update) bit is cleared */ 933 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); 934 935 if (rc >= 0 && rc & M41T80_ALHOUR_HT) { 936 if (m41t80_data->features & M41T80_FEATURE_HT) { 937 m41t80_rtc_read_time(&client->dev, &tm); 938 dev_info(&client->dev, "HT bit was set!\n"); 939 dev_info(&client->dev, "Power Down at %ptR\n", &tm); 940 } 941 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, 942 rc & ~M41T80_ALHOUR_HT); 943 } 944 945 if (rc < 0) { 946 dev_err(&client->dev, "Can't clear HT bit\n"); 947 return rc; 948 } 949 950 /* Make sure ST (stop) bit is cleared */ 951 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); 952 953 if (rc >= 0 && rc & M41T80_SEC_ST) 954 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, 955 rc & ~M41T80_SEC_ST); 956 if (rc < 0) { 957 dev_err(&client->dev, "Can't clear ST bit\n"); 958 return rc; 959 } 960 961 #ifdef CONFIG_RTC_DRV_M41T80_WDT 962 if (m41t80_data->features & M41T80_FEATURE_HT) { 963 save_client = client; 964 rc = misc_register(&wdt_dev); 965 if (rc) 966 return rc; 967 rc = register_reboot_notifier(&wdt_notifier); 968 if (rc) { 969 misc_deregister(&wdt_dev); 970 return rc; 971 } 972 } 973 #endif 974 #ifdef CONFIG_COMMON_CLK 975 if (m41t80_data->features & M41T80_FEATURE_SQ) 976 m41t80_sqw_register_clk(m41t80_data); 977 #endif 978 979 rc = devm_rtc_register_device(m41t80_data->rtc); 980 if (rc) 981 return rc; 982 983 return 0; 984 } 985 986 static int m41t80_remove(struct i2c_client *client) 987 { 988 #ifdef CONFIG_RTC_DRV_M41T80_WDT 989 struct m41t80_data *clientdata = i2c_get_clientdata(client); 990 991 if (clientdata->features & M41T80_FEATURE_HT) { 992 misc_deregister(&wdt_dev); 993 unregister_reboot_notifier(&wdt_notifier); 994 } 995 #endif 996 997 return 0; 998 } 999 1000 static struct i2c_driver m41t80_driver = { 1001 .driver = { 1002 .name = "rtc-m41t80", 1003 .of_match_table = of_match_ptr(m41t80_of_match), 1004 .pm = &m41t80_pm, 1005 }, 1006 .probe = m41t80_probe, 1007 .remove = m41t80_remove, 1008 .id_table = m41t80_id, 1009 }; 1010 1011 module_i2c_driver(m41t80_driver); 1012 1013 MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); 1014 MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); 1015 MODULE_LICENSE("GPL"); 1016