xref: /linux/drivers/rtc/rtc-ds1302.c (revision 93d90ad708b8da6efc0e487b66111aa9db7f70c7)
1 /*
2  * Dallas DS1302 RTC Support
3  *
4  *  Copyright (C) 2002 David McCullough
5  *  Copyright (C) 2003 - 2007 Paul Mundt
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License version 2. See the file "COPYING" in the main directory of
9  * this archive for more details.
10  */
11 
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/platform_device.h>
16 #include <linux/rtc.h>
17 #include <linux/io.h>
18 #include <linux/bcd.h>
19 
20 #define DRV_NAME	"rtc-ds1302"
21 #define DRV_VERSION	"0.1.1"
22 
23 #define	RTC_CMD_READ	0x81		/* Read command */
24 #define	RTC_CMD_WRITE	0x80		/* Write command */
25 
26 #define	RTC_CMD_WRITE_ENABLE	0x00		/* Write enable */
27 #define	RTC_CMD_WRITE_DISABLE	0x80		/* Write disable */
28 
29 #define RTC_ADDR_RAM0	0x20		/* Address of RAM0 */
30 #define RTC_ADDR_TCR	0x08		/* Address of trickle charge register */
31 #define	RTC_ADDR_CTRL	0x07		/* Address of control register */
32 #define	RTC_ADDR_YEAR	0x06		/* Address of year register */
33 #define	RTC_ADDR_DAY	0x05		/* Address of day of week register */
34 #define	RTC_ADDR_MON	0x04		/* Address of month register */
35 #define	RTC_ADDR_DATE	0x03		/* Address of day of month register */
36 #define	RTC_ADDR_HOUR	0x02		/* Address of hour register */
37 #define	RTC_ADDR_MIN	0x01		/* Address of minute register */
38 #define	RTC_ADDR_SEC	0x00		/* Address of second register */
39 
40 #ifdef CONFIG_SH_SECUREEDGE5410
41 #include <asm/rtc.h>
42 #include <mach/secureedge5410.h>
43 
44 #define	RTC_RESET	0x1000
45 #define	RTC_IODATA	0x0800
46 #define	RTC_SCLK	0x0400
47 
48 #define set_dp(x)	SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
49 #define get_dp()	SECUREEDGE_READ_IOPORT()
50 #define ds1302_set_tx()
51 #define ds1302_set_rx()
52 
53 static inline int ds1302_hw_init(void)
54 {
55 	return 0;
56 }
57 
58 static inline void ds1302_reset(void)
59 {
60 	set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
61 }
62 
63 static inline void ds1302_clock(void)
64 {
65 	set_dp(get_dp() | RTC_SCLK);	/* clock high */
66 	set_dp(get_dp() & ~RTC_SCLK);	/* clock low */
67 }
68 
69 static inline void ds1302_start(void)
70 {
71 	set_dp(get_dp() | RTC_RESET);
72 }
73 
74 static inline void ds1302_stop(void)
75 {
76 	set_dp(get_dp() & ~RTC_RESET);
77 }
78 
79 static inline void ds1302_txbit(int bit)
80 {
81 	set_dp((get_dp() & ~RTC_IODATA) | (bit ? RTC_IODATA : 0));
82 }
83 
84 static inline int ds1302_rxbit(void)
85 {
86 	return !!(get_dp() & RTC_IODATA);
87 }
88 
89 #else
90 #error "Add support for your platform"
91 #endif
92 
93 static void ds1302_sendbits(unsigned int val)
94 {
95 	int i;
96 
97 	ds1302_set_tx();
98 
99 	for (i = 8; (i); i--, val >>= 1) {
100 		ds1302_txbit(val & 0x1);
101 		ds1302_clock();
102 	}
103 }
104 
105 static unsigned int ds1302_recvbits(void)
106 {
107 	unsigned int val;
108 	int i;
109 
110 	ds1302_set_rx();
111 
112 	for (i = 0, val = 0; (i < 8); i++) {
113 		val |= (ds1302_rxbit() << i);
114 		ds1302_clock();
115 	}
116 
117 	return val;
118 }
119 
120 static unsigned int ds1302_readbyte(unsigned int addr)
121 {
122 	unsigned int val;
123 
124 	ds1302_reset();
125 
126 	ds1302_start();
127 	ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
128 	val = ds1302_recvbits();
129 	ds1302_stop();
130 
131 	return val;
132 }
133 
134 static void ds1302_writebyte(unsigned int addr, unsigned int val)
135 {
136 	ds1302_reset();
137 
138 	ds1302_start();
139 	ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
140 	ds1302_sendbits(val);
141 	ds1302_stop();
142 }
143 
144 static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
145 {
146 	tm->tm_sec	= bcd2bin(ds1302_readbyte(RTC_ADDR_SEC));
147 	tm->tm_min	= bcd2bin(ds1302_readbyte(RTC_ADDR_MIN));
148 	tm->tm_hour	= bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR));
149 	tm->tm_wday	= bcd2bin(ds1302_readbyte(RTC_ADDR_DAY));
150 	tm->tm_mday	= bcd2bin(ds1302_readbyte(RTC_ADDR_DATE));
151 	tm->tm_mon	= bcd2bin(ds1302_readbyte(RTC_ADDR_MON)) - 1;
152 	tm->tm_year	= bcd2bin(ds1302_readbyte(RTC_ADDR_YEAR));
153 
154 	if (tm->tm_year < 70)
155 		tm->tm_year += 100;
156 
157 	dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
158 		"mday=%d, mon=%d, year=%d, wday=%d\n",
159 		__func__,
160 		tm->tm_sec, tm->tm_min, tm->tm_hour,
161 		tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
162 
163 	return rtc_valid_tm(tm);
164 }
165 
166 static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm)
167 {
168 	ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE);
169 	/* Stop RTC */
170 	ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
171 
172 	ds1302_writebyte(RTC_ADDR_SEC, bin2bcd(tm->tm_sec));
173 	ds1302_writebyte(RTC_ADDR_MIN, bin2bcd(tm->tm_min));
174 	ds1302_writebyte(RTC_ADDR_HOUR, bin2bcd(tm->tm_hour));
175 	ds1302_writebyte(RTC_ADDR_DAY, bin2bcd(tm->tm_wday));
176 	ds1302_writebyte(RTC_ADDR_DATE, bin2bcd(tm->tm_mday));
177 	ds1302_writebyte(RTC_ADDR_MON, bin2bcd(tm->tm_mon + 1));
178 	ds1302_writebyte(RTC_ADDR_YEAR, bin2bcd(tm->tm_year % 100));
179 
180 	/* Start RTC */
181 	ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
182 
183 	ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE);
184 
185 	return 0;
186 }
187 
188 static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd,
189 			    unsigned long arg)
190 {
191 	switch (cmd) {
192 #ifdef RTC_SET_CHARGE
193 	case RTC_SET_CHARGE:
194 	{
195 		int tcs_val;
196 
197 		if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int)))
198 			return -EFAULT;
199 
200 		ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf));
201 		return 0;
202 	}
203 #endif
204 	}
205 
206 	return -ENOIOCTLCMD;
207 }
208 
209 static struct rtc_class_ops ds1302_rtc_ops = {
210 	.read_time	= ds1302_rtc_read_time,
211 	.set_time	= ds1302_rtc_set_time,
212 	.ioctl		= ds1302_rtc_ioctl,
213 };
214 
215 static int __init ds1302_rtc_probe(struct platform_device *pdev)
216 {
217 	struct rtc_device *rtc;
218 
219 	if (ds1302_hw_init()) {
220 		dev_err(&pdev->dev, "Failed to init communication channel");
221 		return -EINVAL;
222 	}
223 
224 	/* Reset */
225 	ds1302_reset();
226 
227 	/* Write a magic value to the DS1302 RAM, and see if it sticks. */
228 	ds1302_writebyte(RTC_ADDR_RAM0, 0x42);
229 	if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) {
230 		dev_err(&pdev->dev, "Failed to probe");
231 		return -ENODEV;
232 	}
233 
234 	rtc = devm_rtc_device_register(&pdev->dev, "ds1302",
235 					   &ds1302_rtc_ops, THIS_MODULE);
236 	if (IS_ERR(rtc))
237 		return PTR_ERR(rtc);
238 
239 	platform_set_drvdata(pdev, rtc);
240 
241 	return 0;
242 }
243 
244 static struct platform_driver ds1302_platform_driver = {
245 	.driver		= {
246 		.name	= DRV_NAME,
247 	},
248 };
249 
250 module_platform_driver_probe(ds1302_platform_driver, ds1302_rtc_probe);
251 
252 MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
253 MODULE_VERSION(DRV_VERSION);
254 MODULE_AUTHOR("Paul Mundt, David McCullough");
255 MODULE_LICENSE("GPL v2");
256