xref: /linux/drivers/rtc/rtc-cmos.c (revision cc04a46f11ea046ed53e2c832ae29e4790f7e35f)
1 /*
2  * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
3  *
4  * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5  * Copyright (C) 2006 David Brownell (convert to new framework)
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * as published by the Free Software Foundation; either version
10  * 2 of the License, or (at your option) any later version.
11  */
12 
13 /*
14  * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15  * That defined the register interface now provided by all PCs, some
16  * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
17  * integrate an MC146818 clone in their southbridge, and boards use
18  * that instead of discrete clones like the DS12887 or M48T86.  There
19  * are also clones that connect using the LPC bus.
20  *
21  * That register API is also used directly by various other drivers
22  * (notably for integrated NVRAM), infrastructure (x86 has code to
23  * bypass the RTC framework, directly reading the RTC during boot
24  * and updating minutes/seconds for systems using NTP synch) and
25  * utilities (like userspace 'hwclock', if no /dev node exists).
26  *
27  * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28  * interrupts disabled, holding the global rtc_lock, to exclude those
29  * other drivers and utilities on correctly configured systems.
30  */
31 
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33 
34 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/init.h>
37 #include <linux/interrupt.h>
38 #include <linux/spinlock.h>
39 #include <linux/platform_device.h>
40 #include <linux/log2.h>
41 #include <linux/pm.h>
42 #include <linux/of.h>
43 #include <linux/of_platform.h>
44 
45 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
46 #include <asm-generic/rtc.h>
47 
48 struct cmos_rtc {
49 	struct rtc_device	*rtc;
50 	struct device		*dev;
51 	int			irq;
52 	struct resource		*iomem;
53 	time64_t		alarm_expires;
54 
55 	void			(*wake_on)(struct device *);
56 	void			(*wake_off)(struct device *);
57 
58 	u8			enabled_wake;
59 	u8			suspend_ctrl;
60 
61 	/* newer hardware extends the original register set */
62 	u8			day_alrm;
63 	u8			mon_alrm;
64 	u8			century;
65 };
66 
67 /* both platform and pnp busses use negative numbers for invalid irqs */
68 #define is_valid_irq(n)		((n) > 0)
69 
70 static const char driver_name[] = "rtc_cmos";
71 
72 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
73  * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
74  * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
75  */
76 #define	RTC_IRQMASK	(RTC_PF | RTC_AF | RTC_UF)
77 
78 static inline int is_intr(u8 rtc_intr)
79 {
80 	if (!(rtc_intr & RTC_IRQF))
81 		return 0;
82 	return rtc_intr & RTC_IRQMASK;
83 }
84 
85 /*----------------------------------------------------------------*/
86 
87 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
88  * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
89  * used in a broken "legacy replacement" mode.  The breakage includes
90  * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
91  * other (better) use.
92  *
93  * When that broken mode is in use, platform glue provides a partial
94  * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
95  * want to use HPET for anything except those IRQs though...
96  */
97 #ifdef CONFIG_HPET_EMULATE_RTC
98 #include <asm/hpet.h>
99 #else
100 
101 static inline int is_hpet_enabled(void)
102 {
103 	return 0;
104 }
105 
106 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
107 {
108 	return 0;
109 }
110 
111 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
112 {
113 	return 0;
114 }
115 
116 static inline int
117 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
118 {
119 	return 0;
120 }
121 
122 static inline int hpet_set_periodic_freq(unsigned long freq)
123 {
124 	return 0;
125 }
126 
127 static inline int hpet_rtc_dropped_irq(void)
128 {
129 	return 0;
130 }
131 
132 static inline int hpet_rtc_timer_init(void)
133 {
134 	return 0;
135 }
136 
137 extern irq_handler_t hpet_rtc_interrupt;
138 
139 static inline int hpet_register_irq_handler(irq_handler_t handler)
140 {
141 	return 0;
142 }
143 
144 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
145 {
146 	return 0;
147 }
148 
149 #endif
150 
151 /*----------------------------------------------------------------*/
152 
153 #ifdef RTC_PORT
154 
155 /* Most newer x86 systems have two register banks, the first used
156  * for RTC and NVRAM and the second only for NVRAM.  Caller must
157  * own rtc_lock ... and we won't worry about access during NMI.
158  */
159 #define can_bank2	true
160 
161 static inline unsigned char cmos_read_bank2(unsigned char addr)
162 {
163 	outb(addr, RTC_PORT(2));
164 	return inb(RTC_PORT(3));
165 }
166 
167 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
168 {
169 	outb(addr, RTC_PORT(2));
170 	outb(val, RTC_PORT(3));
171 }
172 
173 #else
174 
175 #define can_bank2	false
176 
177 static inline unsigned char cmos_read_bank2(unsigned char addr)
178 {
179 	return 0;
180 }
181 
182 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
183 {
184 }
185 
186 #endif
187 
188 /*----------------------------------------------------------------*/
189 
190 static int cmos_read_time(struct device *dev, struct rtc_time *t)
191 {
192 	/* REVISIT:  if the clock has a "century" register, use
193 	 * that instead of the heuristic in get_rtc_time().
194 	 * That'll make Y3K compatility (year > 2070) easy!
195 	 */
196 	get_rtc_time(t);
197 	return 0;
198 }
199 
200 static int cmos_set_time(struct device *dev, struct rtc_time *t)
201 {
202 	/* REVISIT:  set the "century" register if available
203 	 *
204 	 * NOTE: this ignores the issue whereby updating the seconds
205 	 * takes effect exactly 500ms after we write the register.
206 	 * (Also queueing and other delays before we get this far.)
207 	 */
208 	return set_rtc_time(t);
209 }
210 
211 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
212 {
213 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
214 	unsigned char	rtc_control;
215 
216 	if (!is_valid_irq(cmos->irq))
217 		return -EIO;
218 
219 	/* Basic alarms only support hour, minute, and seconds fields.
220 	 * Some also support day and month, for alarms up to a year in
221 	 * the future.
222 	 */
223 	t->time.tm_mday = -1;
224 	t->time.tm_mon = -1;
225 
226 	spin_lock_irq(&rtc_lock);
227 	t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
228 	t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
229 	t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
230 
231 	if (cmos->day_alrm) {
232 		/* ignore upper bits on readback per ACPI spec */
233 		t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
234 		if (!t->time.tm_mday)
235 			t->time.tm_mday = -1;
236 
237 		if (cmos->mon_alrm) {
238 			t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
239 			if (!t->time.tm_mon)
240 				t->time.tm_mon = -1;
241 		}
242 	}
243 
244 	rtc_control = CMOS_READ(RTC_CONTROL);
245 	spin_unlock_irq(&rtc_lock);
246 
247 	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
248 		if (((unsigned)t->time.tm_sec) < 0x60)
249 			t->time.tm_sec = bcd2bin(t->time.tm_sec);
250 		else
251 			t->time.tm_sec = -1;
252 		if (((unsigned)t->time.tm_min) < 0x60)
253 			t->time.tm_min = bcd2bin(t->time.tm_min);
254 		else
255 			t->time.tm_min = -1;
256 		if (((unsigned)t->time.tm_hour) < 0x24)
257 			t->time.tm_hour = bcd2bin(t->time.tm_hour);
258 		else
259 			t->time.tm_hour = -1;
260 
261 		if (cmos->day_alrm) {
262 			if (((unsigned)t->time.tm_mday) <= 0x31)
263 				t->time.tm_mday = bcd2bin(t->time.tm_mday);
264 			else
265 				t->time.tm_mday = -1;
266 
267 			if (cmos->mon_alrm) {
268 				if (((unsigned)t->time.tm_mon) <= 0x12)
269 					t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
270 				else
271 					t->time.tm_mon = -1;
272 			}
273 		}
274 	}
275 	t->time.tm_year = -1;
276 
277 	t->enabled = !!(rtc_control & RTC_AIE);
278 	t->pending = 0;
279 
280 	return 0;
281 }
282 
283 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
284 {
285 	unsigned char	rtc_intr;
286 
287 	/* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
288 	 * allegedly some older rtcs need that to handle irqs properly
289 	 */
290 	rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
291 
292 	if (is_hpet_enabled())
293 		return;
294 
295 	rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
296 	if (is_intr(rtc_intr))
297 		rtc_update_irq(cmos->rtc, 1, rtc_intr);
298 }
299 
300 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
301 {
302 	unsigned char	rtc_control;
303 
304 	/* flush any pending IRQ status, notably for update irqs,
305 	 * before we enable new IRQs
306 	 */
307 	rtc_control = CMOS_READ(RTC_CONTROL);
308 	cmos_checkintr(cmos, rtc_control);
309 
310 	rtc_control |= mask;
311 	CMOS_WRITE(rtc_control, RTC_CONTROL);
312 	hpet_set_rtc_irq_bit(mask);
313 
314 	cmos_checkintr(cmos, rtc_control);
315 }
316 
317 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
318 {
319 	unsigned char	rtc_control;
320 
321 	rtc_control = CMOS_READ(RTC_CONTROL);
322 	rtc_control &= ~mask;
323 	CMOS_WRITE(rtc_control, RTC_CONTROL);
324 	hpet_mask_rtc_irq_bit(mask);
325 
326 	cmos_checkintr(cmos, rtc_control);
327 }
328 
329 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
330 {
331 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
332 	unsigned char mon, mday, hrs, min, sec, rtc_control;
333 
334 	if (!is_valid_irq(cmos->irq))
335 		return -EIO;
336 
337 	mon = t->time.tm_mon + 1;
338 	mday = t->time.tm_mday;
339 	hrs = t->time.tm_hour;
340 	min = t->time.tm_min;
341 	sec = t->time.tm_sec;
342 
343 	rtc_control = CMOS_READ(RTC_CONTROL);
344 	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
345 		/* Writing 0xff means "don't care" or "match all".  */
346 		mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
347 		mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
348 		hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
349 		min = (min < 60) ? bin2bcd(min) : 0xff;
350 		sec = (sec < 60) ? bin2bcd(sec) : 0xff;
351 	}
352 
353 	spin_lock_irq(&rtc_lock);
354 
355 	/* next rtc irq must not be from previous alarm setting */
356 	cmos_irq_disable(cmos, RTC_AIE);
357 
358 	/* update alarm */
359 	CMOS_WRITE(hrs, RTC_HOURS_ALARM);
360 	CMOS_WRITE(min, RTC_MINUTES_ALARM);
361 	CMOS_WRITE(sec, RTC_SECONDS_ALARM);
362 
363 	/* the system may support an "enhanced" alarm */
364 	if (cmos->day_alrm) {
365 		CMOS_WRITE(mday, cmos->day_alrm);
366 		if (cmos->mon_alrm)
367 			CMOS_WRITE(mon, cmos->mon_alrm);
368 	}
369 
370 	/* FIXME the HPET alarm glue currently ignores day_alrm
371 	 * and mon_alrm ...
372 	 */
373 	hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
374 
375 	if (t->enabled)
376 		cmos_irq_enable(cmos, RTC_AIE);
377 
378 	spin_unlock_irq(&rtc_lock);
379 
380 	cmos->alarm_expires = rtc_tm_to_time64(&t->time);
381 
382 	return 0;
383 }
384 
385 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
386 {
387 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
388 	unsigned long	flags;
389 
390 	if (!is_valid_irq(cmos->irq))
391 		return -EINVAL;
392 
393 	spin_lock_irqsave(&rtc_lock, flags);
394 
395 	if (enabled)
396 		cmos_irq_enable(cmos, RTC_AIE);
397 	else
398 		cmos_irq_disable(cmos, RTC_AIE);
399 
400 	spin_unlock_irqrestore(&rtc_lock, flags);
401 	return 0;
402 }
403 
404 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
405 
406 static int cmos_procfs(struct device *dev, struct seq_file *seq)
407 {
408 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
409 	unsigned char	rtc_control, valid;
410 
411 	spin_lock_irq(&rtc_lock);
412 	rtc_control = CMOS_READ(RTC_CONTROL);
413 	valid = CMOS_READ(RTC_VALID);
414 	spin_unlock_irq(&rtc_lock);
415 
416 	/* NOTE:  at least ICH6 reports battery status using a different
417 	 * (non-RTC) bit; and SQWE is ignored on many current systems.
418 	 */
419 	seq_printf(seq,
420 		   "periodic_IRQ\t: %s\n"
421 		   "update_IRQ\t: %s\n"
422 		   "HPET_emulated\t: %s\n"
423 		   // "square_wave\t: %s\n"
424 		   "BCD\t\t: %s\n"
425 		   "DST_enable\t: %s\n"
426 		   "periodic_freq\t: %d\n"
427 		   "batt_status\t: %s\n",
428 		   (rtc_control & RTC_PIE) ? "yes" : "no",
429 		   (rtc_control & RTC_UIE) ? "yes" : "no",
430 		   is_hpet_enabled() ? "yes" : "no",
431 		   // (rtc_control & RTC_SQWE) ? "yes" : "no",
432 		   (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
433 		   (rtc_control & RTC_DST_EN) ? "yes" : "no",
434 		   cmos->rtc->irq_freq,
435 		   (valid & RTC_VRT) ? "okay" : "dead");
436 
437 	return 0;
438 }
439 
440 #else
441 #define	cmos_procfs	NULL
442 #endif
443 
444 static const struct rtc_class_ops cmos_rtc_ops = {
445 	.read_time		= cmos_read_time,
446 	.set_time		= cmos_set_time,
447 	.read_alarm		= cmos_read_alarm,
448 	.set_alarm		= cmos_set_alarm,
449 	.proc			= cmos_procfs,
450 	.alarm_irq_enable	= cmos_alarm_irq_enable,
451 };
452 
453 /*----------------------------------------------------------------*/
454 
455 /*
456  * All these chips have at least 64 bytes of address space, shared by
457  * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
458  * by boot firmware.  Modern chips have 128 or 256 bytes.
459  */
460 
461 #define NVRAM_OFFSET	(RTC_REG_D + 1)
462 
463 static ssize_t
464 cmos_nvram_read(struct file *filp, struct kobject *kobj,
465 		struct bin_attribute *attr,
466 		char *buf, loff_t off, size_t count)
467 {
468 	int	retval;
469 
470 	off += NVRAM_OFFSET;
471 	spin_lock_irq(&rtc_lock);
472 	for (retval = 0; count; count--, off++, retval++) {
473 		if (off < 128)
474 			*buf++ = CMOS_READ(off);
475 		else if (can_bank2)
476 			*buf++ = cmos_read_bank2(off);
477 		else
478 			break;
479 	}
480 	spin_unlock_irq(&rtc_lock);
481 
482 	return retval;
483 }
484 
485 static ssize_t
486 cmos_nvram_write(struct file *filp, struct kobject *kobj,
487 		struct bin_attribute *attr,
488 		char *buf, loff_t off, size_t count)
489 {
490 	struct cmos_rtc	*cmos;
491 	int		retval;
492 
493 	cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
494 
495 	/* NOTE:  on at least PCs and Ataris, the boot firmware uses a
496 	 * checksum on part of the NVRAM data.  That's currently ignored
497 	 * here.  If userspace is smart enough to know what fields of
498 	 * NVRAM to update, updating checksums is also part of its job.
499 	 */
500 	off += NVRAM_OFFSET;
501 	spin_lock_irq(&rtc_lock);
502 	for (retval = 0; count; count--, off++, retval++) {
503 		/* don't trash RTC registers */
504 		if (off == cmos->day_alrm
505 				|| off == cmos->mon_alrm
506 				|| off == cmos->century)
507 			buf++;
508 		else if (off < 128)
509 			CMOS_WRITE(*buf++, off);
510 		else if (can_bank2)
511 			cmos_write_bank2(*buf++, off);
512 		else
513 			break;
514 	}
515 	spin_unlock_irq(&rtc_lock);
516 
517 	return retval;
518 }
519 
520 static struct bin_attribute nvram = {
521 	.attr = {
522 		.name	= "nvram",
523 		.mode	= S_IRUGO | S_IWUSR,
524 	},
525 
526 	.read	= cmos_nvram_read,
527 	.write	= cmos_nvram_write,
528 	/* size gets set up later */
529 };
530 
531 /*----------------------------------------------------------------*/
532 
533 static struct cmos_rtc	cmos_rtc;
534 
535 static irqreturn_t cmos_interrupt(int irq, void *p)
536 {
537 	u8		irqstat;
538 	u8		rtc_control;
539 
540 	spin_lock(&rtc_lock);
541 
542 	/* When the HPET interrupt handler calls us, the interrupt
543 	 * status is passed as arg1 instead of the irq number.  But
544 	 * always clear irq status, even when HPET is in the way.
545 	 *
546 	 * Note that HPET and RTC are almost certainly out of phase,
547 	 * giving different IRQ status ...
548 	 */
549 	irqstat = CMOS_READ(RTC_INTR_FLAGS);
550 	rtc_control = CMOS_READ(RTC_CONTROL);
551 	if (is_hpet_enabled())
552 		irqstat = (unsigned long)irq & 0xF0;
553 
554 	/* If we were suspended, RTC_CONTROL may not be accurate since the
555 	 * bios may have cleared it.
556 	 */
557 	if (!cmos_rtc.suspend_ctrl)
558 		irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
559 	else
560 		irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
561 
562 	/* All Linux RTC alarms should be treated as if they were oneshot.
563 	 * Similar code may be needed in system wakeup paths, in case the
564 	 * alarm woke the system.
565 	 */
566 	if (irqstat & RTC_AIE) {
567 		cmos_rtc.suspend_ctrl &= ~RTC_AIE;
568 		rtc_control &= ~RTC_AIE;
569 		CMOS_WRITE(rtc_control, RTC_CONTROL);
570 		hpet_mask_rtc_irq_bit(RTC_AIE);
571 		CMOS_READ(RTC_INTR_FLAGS);
572 	}
573 	spin_unlock(&rtc_lock);
574 
575 	if (is_intr(irqstat)) {
576 		rtc_update_irq(p, 1, irqstat);
577 		return IRQ_HANDLED;
578 	} else
579 		return IRQ_NONE;
580 }
581 
582 #ifdef	CONFIG_PNP
583 #define	INITSECTION
584 
585 #else
586 #define	INITSECTION	__init
587 #endif
588 
589 static int INITSECTION
590 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
591 {
592 	struct cmos_rtc_board_info	*info = dev_get_platdata(dev);
593 	int				retval = 0;
594 	unsigned char			rtc_control;
595 	unsigned			address_space;
596 	u32				flags = 0;
597 
598 	/* there can be only one ... */
599 	if (cmos_rtc.dev)
600 		return -EBUSY;
601 
602 	if (!ports)
603 		return -ENODEV;
604 
605 	/* Claim I/O ports ASAP, minimizing conflict with legacy driver.
606 	 *
607 	 * REVISIT non-x86 systems may instead use memory space resources
608 	 * (needing ioremap etc), not i/o space resources like this ...
609 	 */
610 	if (RTC_IOMAPPED)
611 		ports = request_region(ports->start, resource_size(ports),
612 				       driver_name);
613 	else
614 		ports = request_mem_region(ports->start, resource_size(ports),
615 					   driver_name);
616 	if (!ports) {
617 		dev_dbg(dev, "i/o registers already in use\n");
618 		return -EBUSY;
619 	}
620 
621 	cmos_rtc.irq = rtc_irq;
622 	cmos_rtc.iomem = ports;
623 
624 	/* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
625 	 * driver did, but don't reject unknown configs.   Old hardware
626 	 * won't address 128 bytes.  Newer chips have multiple banks,
627 	 * though they may not be listed in one I/O resource.
628 	 */
629 #if	defined(CONFIG_ATARI)
630 	address_space = 64;
631 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
632 			|| defined(__sparc__) || defined(__mips__) \
633 			|| defined(__powerpc__)
634 	address_space = 128;
635 #else
636 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
637 	address_space = 128;
638 #endif
639 	if (can_bank2 && ports->end > (ports->start + 1))
640 		address_space = 256;
641 
642 	/* For ACPI systems extension info comes from the FADT.  On others,
643 	 * board specific setup provides it as appropriate.  Systems where
644 	 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
645 	 * some almost-clones) can provide hooks to make that behave.
646 	 *
647 	 * Note that ACPI doesn't preclude putting these registers into
648 	 * "extended" areas of the chip, including some that we won't yet
649 	 * expect CMOS_READ and friends to handle.
650 	 */
651 	if (info) {
652 		if (info->flags)
653 			flags = info->flags;
654 		if (info->address_space)
655 			address_space = info->address_space;
656 
657 		if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
658 			cmos_rtc.day_alrm = info->rtc_day_alarm;
659 		if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
660 			cmos_rtc.mon_alrm = info->rtc_mon_alarm;
661 		if (info->rtc_century && info->rtc_century < 128)
662 			cmos_rtc.century = info->rtc_century;
663 
664 		if (info->wake_on && info->wake_off) {
665 			cmos_rtc.wake_on = info->wake_on;
666 			cmos_rtc.wake_off = info->wake_off;
667 		}
668 	}
669 
670 	cmos_rtc.dev = dev;
671 	dev_set_drvdata(dev, &cmos_rtc);
672 
673 	cmos_rtc.rtc = rtc_device_register(driver_name, dev,
674 				&cmos_rtc_ops, THIS_MODULE);
675 	if (IS_ERR(cmos_rtc.rtc)) {
676 		retval = PTR_ERR(cmos_rtc.rtc);
677 		goto cleanup0;
678 	}
679 
680 	rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
681 
682 	spin_lock_irq(&rtc_lock);
683 
684 	if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
685 		/* force periodic irq to CMOS reset default of 1024Hz;
686 		 *
687 		 * REVISIT it's been reported that at least one x86_64 ALI
688 		 * mobo doesn't use 32KHz here ... for portability we might
689 		 * need to do something about other clock frequencies.
690 		 */
691 		cmos_rtc.rtc->irq_freq = 1024;
692 		hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
693 		CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
694 	}
695 
696 	/* disable irqs */
697 	if (is_valid_irq(rtc_irq))
698 		cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
699 
700 	rtc_control = CMOS_READ(RTC_CONTROL);
701 
702 	spin_unlock_irq(&rtc_lock);
703 
704 	/* FIXME:
705 	 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
706 	 */
707 	if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
708 		dev_warn(dev, "only 24-hr supported\n");
709 		retval = -ENXIO;
710 		goto cleanup1;
711 	}
712 
713 	if (is_valid_irq(rtc_irq)) {
714 		irq_handler_t rtc_cmos_int_handler;
715 
716 		if (is_hpet_enabled()) {
717 			rtc_cmos_int_handler = hpet_rtc_interrupt;
718 			retval = hpet_register_irq_handler(cmos_interrupt);
719 			if (retval) {
720 				dev_warn(dev, "hpet_register_irq_handler "
721 						" failed in rtc_init().");
722 				goto cleanup1;
723 			}
724 		} else
725 			rtc_cmos_int_handler = cmos_interrupt;
726 
727 		retval = request_irq(rtc_irq, rtc_cmos_int_handler,
728 				0, dev_name(&cmos_rtc.rtc->dev),
729 				cmos_rtc.rtc);
730 		if (retval < 0) {
731 			dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
732 			goto cleanup1;
733 		}
734 	}
735 	hpet_rtc_timer_init();
736 
737 	/* export at least the first block of NVRAM */
738 	nvram.size = address_space - NVRAM_OFFSET;
739 	retval = sysfs_create_bin_file(&dev->kobj, &nvram);
740 	if (retval < 0) {
741 		dev_dbg(dev, "can't create nvram file? %d\n", retval);
742 		goto cleanup2;
743 	}
744 
745 	dev_info(dev, "%s%s, %zd bytes nvram%s\n",
746 		!is_valid_irq(rtc_irq) ? "no alarms" :
747 			cmos_rtc.mon_alrm ? "alarms up to one year" :
748 			cmos_rtc.day_alrm ? "alarms up to one month" :
749 			"alarms up to one day",
750 		cmos_rtc.century ? ", y3k" : "",
751 		nvram.size,
752 		is_hpet_enabled() ? ", hpet irqs" : "");
753 
754 	return 0;
755 
756 cleanup2:
757 	if (is_valid_irq(rtc_irq))
758 		free_irq(rtc_irq, cmos_rtc.rtc);
759 cleanup1:
760 	cmos_rtc.dev = NULL;
761 	rtc_device_unregister(cmos_rtc.rtc);
762 cleanup0:
763 	if (RTC_IOMAPPED)
764 		release_region(ports->start, resource_size(ports));
765 	else
766 		release_mem_region(ports->start, resource_size(ports));
767 	return retval;
768 }
769 
770 static void cmos_do_shutdown(int rtc_irq)
771 {
772 	spin_lock_irq(&rtc_lock);
773 	if (is_valid_irq(rtc_irq))
774 		cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
775 	spin_unlock_irq(&rtc_lock);
776 }
777 
778 static void __exit cmos_do_remove(struct device *dev)
779 {
780 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
781 	struct resource *ports;
782 
783 	cmos_do_shutdown(cmos->irq);
784 
785 	sysfs_remove_bin_file(&dev->kobj, &nvram);
786 
787 	if (is_valid_irq(cmos->irq)) {
788 		free_irq(cmos->irq, cmos->rtc);
789 		hpet_unregister_irq_handler(cmos_interrupt);
790 	}
791 
792 	rtc_device_unregister(cmos->rtc);
793 	cmos->rtc = NULL;
794 
795 	ports = cmos->iomem;
796 	if (RTC_IOMAPPED)
797 		release_region(ports->start, resource_size(ports));
798 	else
799 		release_mem_region(ports->start, resource_size(ports));
800 	cmos->iomem = NULL;
801 
802 	cmos->dev = NULL;
803 }
804 
805 static int cmos_aie_poweroff(struct device *dev)
806 {
807 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
808 	struct rtc_time now;
809 	time64_t t_now;
810 	int retval = 0;
811 	unsigned char rtc_control;
812 
813 	if (!cmos->alarm_expires)
814 		return -EINVAL;
815 
816 	spin_lock_irq(&rtc_lock);
817 	rtc_control = CMOS_READ(RTC_CONTROL);
818 	spin_unlock_irq(&rtc_lock);
819 
820 	/* We only care about the situation where AIE is disabled. */
821 	if (rtc_control & RTC_AIE)
822 		return -EBUSY;
823 
824 	cmos_read_time(dev, &now);
825 	t_now = rtc_tm_to_time64(&now);
826 
827 	/*
828 	 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
829 	 * automatically right after shutdown on some buggy boxes.
830 	 * This automatic rebooting issue won't happen when the alarm
831 	 * time is larger than now+1 seconds.
832 	 *
833 	 * If the alarm time is equal to now+1 seconds, the issue can be
834 	 * prevented by cancelling the alarm.
835 	 */
836 	if (cmos->alarm_expires == t_now + 1) {
837 		struct rtc_wkalrm alarm;
838 
839 		/* Cancel the AIE timer by configuring the past time. */
840 		rtc_time64_to_tm(t_now - 1, &alarm.time);
841 		alarm.enabled = 0;
842 		retval = cmos_set_alarm(dev, &alarm);
843 	} else if (cmos->alarm_expires > t_now + 1) {
844 		retval = -EBUSY;
845 	}
846 
847 	return retval;
848 }
849 
850 #ifdef CONFIG_PM
851 
852 static int cmos_suspend(struct device *dev)
853 {
854 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
855 	unsigned char	tmp;
856 
857 	/* only the alarm might be a wakeup event source */
858 	spin_lock_irq(&rtc_lock);
859 	cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
860 	if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
861 		unsigned char	mask;
862 
863 		if (device_may_wakeup(dev))
864 			mask = RTC_IRQMASK & ~RTC_AIE;
865 		else
866 			mask = RTC_IRQMASK;
867 		tmp &= ~mask;
868 		CMOS_WRITE(tmp, RTC_CONTROL);
869 		hpet_mask_rtc_irq_bit(mask);
870 
871 		cmos_checkintr(cmos, tmp);
872 	}
873 	spin_unlock_irq(&rtc_lock);
874 
875 	if (tmp & RTC_AIE) {
876 		cmos->enabled_wake = 1;
877 		if (cmos->wake_on)
878 			cmos->wake_on(dev);
879 		else
880 			enable_irq_wake(cmos->irq);
881 	}
882 
883 	dev_dbg(dev, "suspend%s, ctrl %02x\n",
884 			(tmp & RTC_AIE) ? ", alarm may wake" : "",
885 			tmp);
886 
887 	return 0;
888 }
889 
890 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
891  * after a detour through G3 "mechanical off", although the ACPI spec
892  * says wakeup should only work from G1/S4 "hibernate".  To most users,
893  * distinctions between S4 and S5 are pointless.  So when the hardware
894  * allows, don't draw that distinction.
895  */
896 static inline int cmos_poweroff(struct device *dev)
897 {
898 	return cmos_suspend(dev);
899 }
900 
901 #ifdef	CONFIG_PM_SLEEP
902 
903 static int cmos_resume(struct device *dev)
904 {
905 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
906 	unsigned char tmp;
907 
908 	if (cmos->enabled_wake) {
909 		if (cmos->wake_off)
910 			cmos->wake_off(dev);
911 		else
912 			disable_irq_wake(cmos->irq);
913 		cmos->enabled_wake = 0;
914 	}
915 
916 	spin_lock_irq(&rtc_lock);
917 	tmp = cmos->suspend_ctrl;
918 	cmos->suspend_ctrl = 0;
919 	/* re-enable any irqs previously active */
920 	if (tmp & RTC_IRQMASK) {
921 		unsigned char	mask;
922 
923 		if (device_may_wakeup(dev))
924 			hpet_rtc_timer_init();
925 
926 		do {
927 			CMOS_WRITE(tmp, RTC_CONTROL);
928 			hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
929 
930 			mask = CMOS_READ(RTC_INTR_FLAGS);
931 			mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
932 			if (!is_hpet_enabled() || !is_intr(mask))
933 				break;
934 
935 			/* force one-shot behavior if HPET blocked
936 			 * the wake alarm's irq
937 			 */
938 			rtc_update_irq(cmos->rtc, 1, mask);
939 			tmp &= ~RTC_AIE;
940 			hpet_mask_rtc_irq_bit(RTC_AIE);
941 		} while (mask & RTC_AIE);
942 	}
943 	spin_unlock_irq(&rtc_lock);
944 
945 	dev_dbg(dev, "resume, ctrl %02x\n", tmp);
946 
947 	return 0;
948 }
949 
950 #endif
951 #else
952 
953 static inline int cmos_poweroff(struct device *dev)
954 {
955 	return -ENOSYS;
956 }
957 
958 #endif
959 
960 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
961 
962 /*----------------------------------------------------------------*/
963 
964 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
965  * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
966  * probably list them in similar PNPBIOS tables; so PNP is more common.
967  *
968  * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
969  * predate even PNPBIOS should set up platform_bus devices.
970  */
971 
972 #ifdef	CONFIG_ACPI
973 
974 #include <linux/acpi.h>
975 
976 static u32 rtc_handler(void *context)
977 {
978 	struct device *dev = context;
979 
980 	pm_wakeup_event(dev, 0);
981 	acpi_clear_event(ACPI_EVENT_RTC);
982 	acpi_disable_event(ACPI_EVENT_RTC, 0);
983 	return ACPI_INTERRUPT_HANDLED;
984 }
985 
986 static inline void rtc_wake_setup(struct device *dev)
987 {
988 	acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
989 	/*
990 	 * After the RTC handler is installed, the Fixed_RTC event should
991 	 * be disabled. Only when the RTC alarm is set will it be enabled.
992 	 */
993 	acpi_clear_event(ACPI_EVENT_RTC);
994 	acpi_disable_event(ACPI_EVENT_RTC, 0);
995 }
996 
997 static void rtc_wake_on(struct device *dev)
998 {
999 	acpi_clear_event(ACPI_EVENT_RTC);
1000 	acpi_enable_event(ACPI_EVENT_RTC, 0);
1001 }
1002 
1003 static void rtc_wake_off(struct device *dev)
1004 {
1005 	acpi_disable_event(ACPI_EVENT_RTC, 0);
1006 }
1007 
1008 /* Every ACPI platform has a mc146818 compatible "cmos rtc".  Here we find
1009  * its device node and pass extra config data.  This helps its driver use
1010  * capabilities that the now-obsolete mc146818 didn't have, and informs it
1011  * that this board's RTC is wakeup-capable (per ACPI spec).
1012  */
1013 static struct cmos_rtc_board_info acpi_rtc_info;
1014 
1015 static void cmos_wake_setup(struct device *dev)
1016 {
1017 	if (acpi_disabled)
1018 		return;
1019 
1020 	rtc_wake_setup(dev);
1021 	acpi_rtc_info.wake_on = rtc_wake_on;
1022 	acpi_rtc_info.wake_off = rtc_wake_off;
1023 
1024 	/* workaround bug in some ACPI tables */
1025 	if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1026 		dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1027 			acpi_gbl_FADT.month_alarm);
1028 		acpi_gbl_FADT.month_alarm = 0;
1029 	}
1030 
1031 	acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1032 	acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1033 	acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1034 
1035 	/* NOTE:  S4_RTC_WAKE is NOT currently useful to Linux */
1036 	if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1037 		dev_info(dev, "RTC can wake from S4\n");
1038 
1039 	dev->platform_data = &acpi_rtc_info;
1040 
1041 	/* RTC always wakes from S1/S2/S3, and often S4/STD */
1042 	device_init_wakeup(dev, 1);
1043 }
1044 
1045 #else
1046 
1047 static void cmos_wake_setup(struct device *dev)
1048 {
1049 }
1050 
1051 #endif
1052 
1053 #ifdef	CONFIG_PNP
1054 
1055 #include <linux/pnp.h>
1056 
1057 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1058 {
1059 	cmos_wake_setup(&pnp->dev);
1060 
1061 	if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0))
1062 		/* Some machines contain a PNP entry for the RTC, but
1063 		 * don't define the IRQ. It should always be safe to
1064 		 * hardcode it in these cases
1065 		 */
1066 		return cmos_do_probe(&pnp->dev,
1067 				pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1068 	else
1069 		return cmos_do_probe(&pnp->dev,
1070 				pnp_get_resource(pnp, IORESOURCE_IO, 0),
1071 				pnp_irq(pnp, 0));
1072 }
1073 
1074 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1075 {
1076 	cmos_do_remove(&pnp->dev);
1077 }
1078 
1079 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1080 {
1081 	struct device *dev = &pnp->dev;
1082 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1083 
1084 	if (system_state == SYSTEM_POWER_OFF) {
1085 		int retval = cmos_poweroff(dev);
1086 
1087 		if (cmos_aie_poweroff(dev) < 0 && !retval)
1088 			return;
1089 	}
1090 
1091 	cmos_do_shutdown(cmos->irq);
1092 }
1093 
1094 static const struct pnp_device_id rtc_ids[] = {
1095 	{ .id = "PNP0b00", },
1096 	{ .id = "PNP0b01", },
1097 	{ .id = "PNP0b02", },
1098 	{ },
1099 };
1100 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1101 
1102 static struct pnp_driver cmos_pnp_driver = {
1103 	.name		= (char *) driver_name,
1104 	.id_table	= rtc_ids,
1105 	.probe		= cmos_pnp_probe,
1106 	.remove		= __exit_p(cmos_pnp_remove),
1107 	.shutdown	= cmos_pnp_shutdown,
1108 
1109 	/* flag ensures resume() gets called, and stops syslog spam */
1110 	.flags		= PNP_DRIVER_RES_DO_NOT_CHANGE,
1111 	.driver		= {
1112 			.pm = &cmos_pm_ops,
1113 	},
1114 };
1115 
1116 #endif	/* CONFIG_PNP */
1117 
1118 #ifdef CONFIG_OF
1119 static const struct of_device_id of_cmos_match[] = {
1120 	{
1121 		.compatible = "motorola,mc146818",
1122 	},
1123 	{ },
1124 };
1125 MODULE_DEVICE_TABLE(of, of_cmos_match);
1126 
1127 static __init void cmos_of_init(struct platform_device *pdev)
1128 {
1129 	struct device_node *node = pdev->dev.of_node;
1130 	struct rtc_time time;
1131 	int ret;
1132 	const __be32 *val;
1133 
1134 	if (!node)
1135 		return;
1136 
1137 	val = of_get_property(node, "ctrl-reg", NULL);
1138 	if (val)
1139 		CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1140 
1141 	val = of_get_property(node, "freq-reg", NULL);
1142 	if (val)
1143 		CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1144 
1145 	get_rtc_time(&time);
1146 	ret = rtc_valid_tm(&time);
1147 	if (ret) {
1148 		struct rtc_time def_time = {
1149 			.tm_year = 1,
1150 			.tm_mday = 1,
1151 		};
1152 		set_rtc_time(&def_time);
1153 	}
1154 }
1155 #else
1156 static inline void cmos_of_init(struct platform_device *pdev) {}
1157 #endif
1158 /*----------------------------------------------------------------*/
1159 
1160 /* Platform setup should have set up an RTC device, when PNP is
1161  * unavailable ... this could happen even on (older) PCs.
1162  */
1163 
1164 static int __init cmos_platform_probe(struct platform_device *pdev)
1165 {
1166 	struct resource *resource;
1167 	int irq;
1168 
1169 	cmos_of_init(pdev);
1170 	cmos_wake_setup(&pdev->dev);
1171 
1172 	if (RTC_IOMAPPED)
1173 		resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1174 	else
1175 		resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1176 	irq = platform_get_irq(pdev, 0);
1177 	if (irq < 0)
1178 		irq = -1;
1179 
1180 	return cmos_do_probe(&pdev->dev, resource, irq);
1181 }
1182 
1183 static int __exit cmos_platform_remove(struct platform_device *pdev)
1184 {
1185 	cmos_do_remove(&pdev->dev);
1186 	return 0;
1187 }
1188 
1189 static void cmos_platform_shutdown(struct platform_device *pdev)
1190 {
1191 	struct device *dev = &pdev->dev;
1192 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1193 
1194 	if (system_state == SYSTEM_POWER_OFF) {
1195 		int retval = cmos_poweroff(dev);
1196 
1197 		if (cmos_aie_poweroff(dev) < 0 && !retval)
1198 			return;
1199 	}
1200 
1201 	cmos_do_shutdown(cmos->irq);
1202 }
1203 
1204 /* work with hotplug and coldplug */
1205 MODULE_ALIAS("platform:rtc_cmos");
1206 
1207 static struct platform_driver cmos_platform_driver = {
1208 	.remove		= __exit_p(cmos_platform_remove),
1209 	.shutdown	= cmos_platform_shutdown,
1210 	.driver = {
1211 		.name		= driver_name,
1212 #ifdef CONFIG_PM
1213 		.pm		= &cmos_pm_ops,
1214 #endif
1215 		.of_match_table = of_match_ptr(of_cmos_match),
1216 	}
1217 };
1218 
1219 #ifdef CONFIG_PNP
1220 static bool pnp_driver_registered;
1221 #endif
1222 static bool platform_driver_registered;
1223 
1224 static int __init cmos_init(void)
1225 {
1226 	int retval = 0;
1227 
1228 #ifdef	CONFIG_PNP
1229 	retval = pnp_register_driver(&cmos_pnp_driver);
1230 	if (retval == 0)
1231 		pnp_driver_registered = true;
1232 #endif
1233 
1234 	if (!cmos_rtc.dev) {
1235 		retval = platform_driver_probe(&cmos_platform_driver,
1236 					       cmos_platform_probe);
1237 		if (retval == 0)
1238 			platform_driver_registered = true;
1239 	}
1240 
1241 	if (retval == 0)
1242 		return 0;
1243 
1244 #ifdef	CONFIG_PNP
1245 	if (pnp_driver_registered)
1246 		pnp_unregister_driver(&cmos_pnp_driver);
1247 #endif
1248 	return retval;
1249 }
1250 module_init(cmos_init);
1251 
1252 static void __exit cmos_exit(void)
1253 {
1254 #ifdef	CONFIG_PNP
1255 	if (pnp_driver_registered)
1256 		pnp_unregister_driver(&cmos_pnp_driver);
1257 #endif
1258 	if (platform_driver_registered)
1259 		platform_driver_unregister(&cmos_platform_driver);
1260 }
1261 module_exit(cmos_exit);
1262 
1263 
1264 MODULE_AUTHOR("David Brownell");
1265 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1266 MODULE_LICENSE("GPL");
1267