xref: /linux/drivers/rtc/rtc-cmos.c (revision b8d312aa075f33282565467662c4628dae0a2aff)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
4  *
5  * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6  * Copyright (C) 2006 David Brownell (convert to new framework)
7  */
8 
9 /*
10  * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11  * That defined the register interface now provided by all PCs, some
12  * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
13  * integrate an MC146818 clone in their southbridge, and boards use
14  * that instead of discrete clones like the DS12887 or M48T86.  There
15  * are also clones that connect using the LPC bus.
16  *
17  * That register API is also used directly by various other drivers
18  * (notably for integrated NVRAM), infrastructure (x86 has code to
19  * bypass the RTC framework, directly reading the RTC during boot
20  * and updating minutes/seconds for systems using NTP synch) and
21  * utilities (like userspace 'hwclock', if no /dev node exists).
22  *
23  * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24  * interrupts disabled, holding the global rtc_lock, to exclude those
25  * other drivers and utilities on correctly configured systems.
26  */
27 
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29 
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/interrupt.h>
34 #include <linux/spinlock.h>
35 #include <linux/platform_device.h>
36 #include <linux/log2.h>
37 #include <linux/pm.h>
38 #include <linux/of.h>
39 #include <linux/of_platform.h>
40 #ifdef CONFIG_X86
41 #include <asm/i8259.h>
42 #include <asm/processor.h>
43 #include <linux/dmi.h>
44 #endif
45 
46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47 #include <linux/mc146818rtc.h>
48 
49 #ifdef CONFIG_ACPI
50 /*
51  * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
52  *
53  * If cleared, ACPI SCI is only used to wake up the system from suspend
54  *
55  * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
56  */
57 
58 static bool use_acpi_alarm;
59 module_param(use_acpi_alarm, bool, 0444);
60 
61 static inline int cmos_use_acpi_alarm(void)
62 {
63 	return use_acpi_alarm;
64 }
65 #else /* !CONFIG_ACPI */
66 
67 static inline int cmos_use_acpi_alarm(void)
68 {
69 	return 0;
70 }
71 #endif
72 
73 struct cmos_rtc {
74 	struct rtc_device	*rtc;
75 	struct device		*dev;
76 	int			irq;
77 	struct resource		*iomem;
78 	time64_t		alarm_expires;
79 
80 	void			(*wake_on)(struct device *);
81 	void			(*wake_off)(struct device *);
82 
83 	u8			enabled_wake;
84 	u8			suspend_ctrl;
85 
86 	/* newer hardware extends the original register set */
87 	u8			day_alrm;
88 	u8			mon_alrm;
89 	u8			century;
90 
91 	struct rtc_wkalrm	saved_wkalrm;
92 };
93 
94 /* both platform and pnp busses use negative numbers for invalid irqs */
95 #define is_valid_irq(n)		((n) > 0)
96 
97 static const char driver_name[] = "rtc_cmos";
98 
99 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100  * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
101  * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
102  */
103 #define	RTC_IRQMASK	(RTC_PF | RTC_AF | RTC_UF)
104 
105 static inline int is_intr(u8 rtc_intr)
106 {
107 	if (!(rtc_intr & RTC_IRQF))
108 		return 0;
109 	return rtc_intr & RTC_IRQMASK;
110 }
111 
112 /*----------------------------------------------------------------*/
113 
114 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115  * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116  * used in a broken "legacy replacement" mode.  The breakage includes
117  * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118  * other (better) use.
119  *
120  * When that broken mode is in use, platform glue provides a partial
121  * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
122  * want to use HPET for anything except those IRQs though...
123  */
124 #ifdef CONFIG_HPET_EMULATE_RTC
125 #include <asm/hpet.h>
126 #else
127 
128 static inline int is_hpet_enabled(void)
129 {
130 	return 0;
131 }
132 
133 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
134 {
135 	return 0;
136 }
137 
138 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
139 {
140 	return 0;
141 }
142 
143 static inline int
144 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
145 {
146 	return 0;
147 }
148 
149 static inline int hpet_set_periodic_freq(unsigned long freq)
150 {
151 	return 0;
152 }
153 
154 static inline int hpet_rtc_dropped_irq(void)
155 {
156 	return 0;
157 }
158 
159 static inline int hpet_rtc_timer_init(void)
160 {
161 	return 0;
162 }
163 
164 extern irq_handler_t hpet_rtc_interrupt;
165 
166 static inline int hpet_register_irq_handler(irq_handler_t handler)
167 {
168 	return 0;
169 }
170 
171 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
172 {
173 	return 0;
174 }
175 
176 #endif
177 
178 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179 static inline int use_hpet_alarm(void)
180 {
181 	return is_hpet_enabled() && !cmos_use_acpi_alarm();
182 }
183 
184 /*----------------------------------------------------------------*/
185 
186 #ifdef RTC_PORT
187 
188 /* Most newer x86 systems have two register banks, the first used
189  * for RTC and NVRAM and the second only for NVRAM.  Caller must
190  * own rtc_lock ... and we won't worry about access during NMI.
191  */
192 #define can_bank2	true
193 
194 static inline unsigned char cmos_read_bank2(unsigned char addr)
195 {
196 	outb(addr, RTC_PORT(2));
197 	return inb(RTC_PORT(3));
198 }
199 
200 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
201 {
202 	outb(addr, RTC_PORT(2));
203 	outb(val, RTC_PORT(3));
204 }
205 
206 #else
207 
208 #define can_bank2	false
209 
210 static inline unsigned char cmos_read_bank2(unsigned char addr)
211 {
212 	return 0;
213 }
214 
215 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
216 {
217 }
218 
219 #endif
220 
221 /*----------------------------------------------------------------*/
222 
223 static int cmos_read_time(struct device *dev, struct rtc_time *t)
224 {
225 	/*
226 	 * If pm_trace abused the RTC for storage, set the timespec to 0,
227 	 * which tells the caller that this RTC value is unusable.
228 	 */
229 	if (!pm_trace_rtc_valid())
230 		return -EIO;
231 
232 	/* REVISIT:  if the clock has a "century" register, use
233 	 * that instead of the heuristic in mc146818_get_time().
234 	 * That'll make Y3K compatility (year > 2070) easy!
235 	 */
236 	mc146818_get_time(t);
237 	return 0;
238 }
239 
240 static int cmos_set_time(struct device *dev, struct rtc_time *t)
241 {
242 	/* REVISIT:  set the "century" register if available
243 	 *
244 	 * NOTE: this ignores the issue whereby updating the seconds
245 	 * takes effect exactly 500ms after we write the register.
246 	 * (Also queueing and other delays before we get this far.)
247 	 */
248 	return mc146818_set_time(t);
249 }
250 
251 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
252 {
253 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
254 	unsigned char	rtc_control;
255 
256 	/* This not only a rtc_op, but also called directly */
257 	if (!is_valid_irq(cmos->irq))
258 		return -EIO;
259 
260 	/* Basic alarms only support hour, minute, and seconds fields.
261 	 * Some also support day and month, for alarms up to a year in
262 	 * the future.
263 	 */
264 
265 	spin_lock_irq(&rtc_lock);
266 	t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
267 	t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
268 	t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
269 
270 	if (cmos->day_alrm) {
271 		/* ignore upper bits on readback per ACPI spec */
272 		t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
273 		if (!t->time.tm_mday)
274 			t->time.tm_mday = -1;
275 
276 		if (cmos->mon_alrm) {
277 			t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
278 			if (!t->time.tm_mon)
279 				t->time.tm_mon = -1;
280 		}
281 	}
282 
283 	rtc_control = CMOS_READ(RTC_CONTROL);
284 	spin_unlock_irq(&rtc_lock);
285 
286 	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
287 		if (((unsigned)t->time.tm_sec) < 0x60)
288 			t->time.tm_sec = bcd2bin(t->time.tm_sec);
289 		else
290 			t->time.tm_sec = -1;
291 		if (((unsigned)t->time.tm_min) < 0x60)
292 			t->time.tm_min = bcd2bin(t->time.tm_min);
293 		else
294 			t->time.tm_min = -1;
295 		if (((unsigned)t->time.tm_hour) < 0x24)
296 			t->time.tm_hour = bcd2bin(t->time.tm_hour);
297 		else
298 			t->time.tm_hour = -1;
299 
300 		if (cmos->day_alrm) {
301 			if (((unsigned)t->time.tm_mday) <= 0x31)
302 				t->time.tm_mday = bcd2bin(t->time.tm_mday);
303 			else
304 				t->time.tm_mday = -1;
305 
306 			if (cmos->mon_alrm) {
307 				if (((unsigned)t->time.tm_mon) <= 0x12)
308 					t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
309 				else
310 					t->time.tm_mon = -1;
311 			}
312 		}
313 	}
314 
315 	t->enabled = !!(rtc_control & RTC_AIE);
316 	t->pending = 0;
317 
318 	return 0;
319 }
320 
321 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
322 {
323 	unsigned char	rtc_intr;
324 
325 	/* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
326 	 * allegedly some older rtcs need that to handle irqs properly
327 	 */
328 	rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
329 
330 	if (use_hpet_alarm())
331 		return;
332 
333 	rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
334 	if (is_intr(rtc_intr))
335 		rtc_update_irq(cmos->rtc, 1, rtc_intr);
336 }
337 
338 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
339 {
340 	unsigned char	rtc_control;
341 
342 	/* flush any pending IRQ status, notably for update irqs,
343 	 * before we enable new IRQs
344 	 */
345 	rtc_control = CMOS_READ(RTC_CONTROL);
346 	cmos_checkintr(cmos, rtc_control);
347 
348 	rtc_control |= mask;
349 	CMOS_WRITE(rtc_control, RTC_CONTROL);
350 	if (use_hpet_alarm())
351 		hpet_set_rtc_irq_bit(mask);
352 
353 	if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
354 		if (cmos->wake_on)
355 			cmos->wake_on(cmos->dev);
356 	}
357 
358 	cmos_checkintr(cmos, rtc_control);
359 }
360 
361 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
362 {
363 	unsigned char	rtc_control;
364 
365 	rtc_control = CMOS_READ(RTC_CONTROL);
366 	rtc_control &= ~mask;
367 	CMOS_WRITE(rtc_control, RTC_CONTROL);
368 	if (use_hpet_alarm())
369 		hpet_mask_rtc_irq_bit(mask);
370 
371 	if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
372 		if (cmos->wake_off)
373 			cmos->wake_off(cmos->dev);
374 	}
375 
376 	cmos_checkintr(cmos, rtc_control);
377 }
378 
379 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
380 {
381 	struct cmos_rtc *cmos = dev_get_drvdata(dev);
382 	struct rtc_time now;
383 
384 	cmos_read_time(dev, &now);
385 
386 	if (!cmos->day_alrm) {
387 		time64_t t_max_date;
388 		time64_t t_alrm;
389 
390 		t_max_date = rtc_tm_to_time64(&now);
391 		t_max_date += 24 * 60 * 60 - 1;
392 		t_alrm = rtc_tm_to_time64(&t->time);
393 		if (t_alrm > t_max_date) {
394 			dev_err(dev,
395 				"Alarms can be up to one day in the future\n");
396 			return -EINVAL;
397 		}
398 	} else if (!cmos->mon_alrm) {
399 		struct rtc_time max_date = now;
400 		time64_t t_max_date;
401 		time64_t t_alrm;
402 		int max_mday;
403 
404 		if (max_date.tm_mon == 11) {
405 			max_date.tm_mon = 0;
406 			max_date.tm_year += 1;
407 		} else {
408 			max_date.tm_mon += 1;
409 		}
410 		max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
411 		if (max_date.tm_mday > max_mday)
412 			max_date.tm_mday = max_mday;
413 
414 		t_max_date = rtc_tm_to_time64(&max_date);
415 		t_max_date -= 1;
416 		t_alrm = rtc_tm_to_time64(&t->time);
417 		if (t_alrm > t_max_date) {
418 			dev_err(dev,
419 				"Alarms can be up to one month in the future\n");
420 			return -EINVAL;
421 		}
422 	} else {
423 		struct rtc_time max_date = now;
424 		time64_t t_max_date;
425 		time64_t t_alrm;
426 		int max_mday;
427 
428 		max_date.tm_year += 1;
429 		max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
430 		if (max_date.tm_mday > max_mday)
431 			max_date.tm_mday = max_mday;
432 
433 		t_max_date = rtc_tm_to_time64(&max_date);
434 		t_max_date -= 1;
435 		t_alrm = rtc_tm_to_time64(&t->time);
436 		if (t_alrm > t_max_date) {
437 			dev_err(dev,
438 				"Alarms can be up to one year in the future\n");
439 			return -EINVAL;
440 		}
441 	}
442 
443 	return 0;
444 }
445 
446 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
447 {
448 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
449 	unsigned char mon, mday, hrs, min, sec, rtc_control;
450 	int ret;
451 
452 	/* This not only a rtc_op, but also called directly */
453 	if (!is_valid_irq(cmos->irq))
454 		return -EIO;
455 
456 	ret = cmos_validate_alarm(dev, t);
457 	if (ret < 0)
458 		return ret;
459 
460 	mon = t->time.tm_mon + 1;
461 	mday = t->time.tm_mday;
462 	hrs = t->time.tm_hour;
463 	min = t->time.tm_min;
464 	sec = t->time.tm_sec;
465 
466 	rtc_control = CMOS_READ(RTC_CONTROL);
467 	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
468 		/* Writing 0xff means "don't care" or "match all".  */
469 		mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
470 		mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
471 		hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
472 		min = (min < 60) ? bin2bcd(min) : 0xff;
473 		sec = (sec < 60) ? bin2bcd(sec) : 0xff;
474 	}
475 
476 	spin_lock_irq(&rtc_lock);
477 
478 	/* next rtc irq must not be from previous alarm setting */
479 	cmos_irq_disable(cmos, RTC_AIE);
480 
481 	/* update alarm */
482 	CMOS_WRITE(hrs, RTC_HOURS_ALARM);
483 	CMOS_WRITE(min, RTC_MINUTES_ALARM);
484 	CMOS_WRITE(sec, RTC_SECONDS_ALARM);
485 
486 	/* the system may support an "enhanced" alarm */
487 	if (cmos->day_alrm) {
488 		CMOS_WRITE(mday, cmos->day_alrm);
489 		if (cmos->mon_alrm)
490 			CMOS_WRITE(mon, cmos->mon_alrm);
491 	}
492 
493 	if (use_hpet_alarm()) {
494 		/*
495 		 * FIXME the HPET alarm glue currently ignores day_alrm
496 		 * and mon_alrm ...
497 		 */
498 		hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min,
499 				    t->time.tm_sec);
500 	}
501 
502 	if (t->enabled)
503 		cmos_irq_enable(cmos, RTC_AIE);
504 
505 	spin_unlock_irq(&rtc_lock);
506 
507 	cmos->alarm_expires = rtc_tm_to_time64(&t->time);
508 
509 	return 0;
510 }
511 
512 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
513 {
514 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
515 	unsigned long	flags;
516 
517 	spin_lock_irqsave(&rtc_lock, flags);
518 
519 	if (enabled)
520 		cmos_irq_enable(cmos, RTC_AIE);
521 	else
522 		cmos_irq_disable(cmos, RTC_AIE);
523 
524 	spin_unlock_irqrestore(&rtc_lock, flags);
525 	return 0;
526 }
527 
528 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
529 
530 static int cmos_procfs(struct device *dev, struct seq_file *seq)
531 {
532 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
533 	unsigned char	rtc_control, valid;
534 
535 	spin_lock_irq(&rtc_lock);
536 	rtc_control = CMOS_READ(RTC_CONTROL);
537 	valid = CMOS_READ(RTC_VALID);
538 	spin_unlock_irq(&rtc_lock);
539 
540 	/* NOTE:  at least ICH6 reports battery status using a different
541 	 * (non-RTC) bit; and SQWE is ignored on many current systems.
542 	 */
543 	seq_printf(seq,
544 		   "periodic_IRQ\t: %s\n"
545 		   "update_IRQ\t: %s\n"
546 		   "HPET_emulated\t: %s\n"
547 		   // "square_wave\t: %s\n"
548 		   "BCD\t\t: %s\n"
549 		   "DST_enable\t: %s\n"
550 		   "periodic_freq\t: %d\n"
551 		   "batt_status\t: %s\n",
552 		   (rtc_control & RTC_PIE) ? "yes" : "no",
553 		   (rtc_control & RTC_UIE) ? "yes" : "no",
554 		   use_hpet_alarm() ? "yes" : "no",
555 		   // (rtc_control & RTC_SQWE) ? "yes" : "no",
556 		   (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
557 		   (rtc_control & RTC_DST_EN) ? "yes" : "no",
558 		   cmos->rtc->irq_freq,
559 		   (valid & RTC_VRT) ? "okay" : "dead");
560 
561 	return 0;
562 }
563 
564 #else
565 #define	cmos_procfs	NULL
566 #endif
567 
568 static const struct rtc_class_ops cmos_rtc_ops = {
569 	.read_time		= cmos_read_time,
570 	.set_time		= cmos_set_time,
571 	.read_alarm		= cmos_read_alarm,
572 	.set_alarm		= cmos_set_alarm,
573 	.proc			= cmos_procfs,
574 	.alarm_irq_enable	= cmos_alarm_irq_enable,
575 };
576 
577 static const struct rtc_class_ops cmos_rtc_ops_no_alarm = {
578 	.read_time		= cmos_read_time,
579 	.set_time		= cmos_set_time,
580 	.proc			= cmos_procfs,
581 };
582 
583 /*----------------------------------------------------------------*/
584 
585 /*
586  * All these chips have at least 64 bytes of address space, shared by
587  * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
588  * by boot firmware.  Modern chips have 128 or 256 bytes.
589  */
590 
591 #define NVRAM_OFFSET	(RTC_REG_D + 1)
592 
593 static int cmos_nvram_read(void *priv, unsigned int off, void *val,
594 			   size_t count)
595 {
596 	unsigned char *buf = val;
597 	int	retval;
598 
599 	off += NVRAM_OFFSET;
600 	spin_lock_irq(&rtc_lock);
601 	for (retval = 0; count; count--, off++, retval++) {
602 		if (off < 128)
603 			*buf++ = CMOS_READ(off);
604 		else if (can_bank2)
605 			*buf++ = cmos_read_bank2(off);
606 		else
607 			break;
608 	}
609 	spin_unlock_irq(&rtc_lock);
610 
611 	return retval;
612 }
613 
614 static int cmos_nvram_write(void *priv, unsigned int off, void *val,
615 			    size_t count)
616 {
617 	struct cmos_rtc	*cmos = priv;
618 	unsigned char	*buf = val;
619 	int		retval;
620 
621 	/* NOTE:  on at least PCs and Ataris, the boot firmware uses a
622 	 * checksum on part of the NVRAM data.  That's currently ignored
623 	 * here.  If userspace is smart enough to know what fields of
624 	 * NVRAM to update, updating checksums is also part of its job.
625 	 */
626 	off += NVRAM_OFFSET;
627 	spin_lock_irq(&rtc_lock);
628 	for (retval = 0; count; count--, off++, retval++) {
629 		/* don't trash RTC registers */
630 		if (off == cmos->day_alrm
631 				|| off == cmos->mon_alrm
632 				|| off == cmos->century)
633 			buf++;
634 		else if (off < 128)
635 			CMOS_WRITE(*buf++, off);
636 		else if (can_bank2)
637 			cmos_write_bank2(*buf++, off);
638 		else
639 			break;
640 	}
641 	spin_unlock_irq(&rtc_lock);
642 
643 	return retval;
644 }
645 
646 /*----------------------------------------------------------------*/
647 
648 static struct cmos_rtc	cmos_rtc;
649 
650 static irqreturn_t cmos_interrupt(int irq, void *p)
651 {
652 	u8		irqstat;
653 	u8		rtc_control;
654 
655 	spin_lock(&rtc_lock);
656 
657 	/* When the HPET interrupt handler calls us, the interrupt
658 	 * status is passed as arg1 instead of the irq number.  But
659 	 * always clear irq status, even when HPET is in the way.
660 	 *
661 	 * Note that HPET and RTC are almost certainly out of phase,
662 	 * giving different IRQ status ...
663 	 */
664 	irqstat = CMOS_READ(RTC_INTR_FLAGS);
665 	rtc_control = CMOS_READ(RTC_CONTROL);
666 	if (use_hpet_alarm())
667 		irqstat = (unsigned long)irq & 0xF0;
668 
669 	/* If we were suspended, RTC_CONTROL may not be accurate since the
670 	 * bios may have cleared it.
671 	 */
672 	if (!cmos_rtc.suspend_ctrl)
673 		irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
674 	else
675 		irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
676 
677 	/* All Linux RTC alarms should be treated as if they were oneshot.
678 	 * Similar code may be needed in system wakeup paths, in case the
679 	 * alarm woke the system.
680 	 */
681 	if (irqstat & RTC_AIE) {
682 		cmos_rtc.suspend_ctrl &= ~RTC_AIE;
683 		rtc_control &= ~RTC_AIE;
684 		CMOS_WRITE(rtc_control, RTC_CONTROL);
685 		if (use_hpet_alarm())
686 			hpet_mask_rtc_irq_bit(RTC_AIE);
687 		CMOS_READ(RTC_INTR_FLAGS);
688 	}
689 	spin_unlock(&rtc_lock);
690 
691 	if (is_intr(irqstat)) {
692 		rtc_update_irq(p, 1, irqstat);
693 		return IRQ_HANDLED;
694 	} else
695 		return IRQ_NONE;
696 }
697 
698 #ifdef	CONFIG_PNP
699 #define	INITSECTION
700 
701 #else
702 #define	INITSECTION	__init
703 #endif
704 
705 static int INITSECTION
706 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
707 {
708 	struct cmos_rtc_board_info	*info = dev_get_platdata(dev);
709 	int				retval = 0;
710 	unsigned char			rtc_control;
711 	unsigned			address_space;
712 	u32				flags = 0;
713 	struct nvmem_config nvmem_cfg = {
714 		.name = "cmos_nvram",
715 		.word_size = 1,
716 		.stride = 1,
717 		.reg_read = cmos_nvram_read,
718 		.reg_write = cmos_nvram_write,
719 		.priv = &cmos_rtc,
720 	};
721 
722 	/* there can be only one ... */
723 	if (cmos_rtc.dev)
724 		return -EBUSY;
725 
726 	if (!ports)
727 		return -ENODEV;
728 
729 	/* Claim I/O ports ASAP, minimizing conflict with legacy driver.
730 	 *
731 	 * REVISIT non-x86 systems may instead use memory space resources
732 	 * (needing ioremap etc), not i/o space resources like this ...
733 	 */
734 	if (RTC_IOMAPPED)
735 		ports = request_region(ports->start, resource_size(ports),
736 				       driver_name);
737 	else
738 		ports = request_mem_region(ports->start, resource_size(ports),
739 					   driver_name);
740 	if (!ports) {
741 		dev_dbg(dev, "i/o registers already in use\n");
742 		return -EBUSY;
743 	}
744 
745 	cmos_rtc.irq = rtc_irq;
746 	cmos_rtc.iomem = ports;
747 
748 	/* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
749 	 * driver did, but don't reject unknown configs.   Old hardware
750 	 * won't address 128 bytes.  Newer chips have multiple banks,
751 	 * though they may not be listed in one I/O resource.
752 	 */
753 #if	defined(CONFIG_ATARI)
754 	address_space = 64;
755 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
756 			|| defined(__sparc__) || defined(__mips__) \
757 			|| defined(__powerpc__)
758 	address_space = 128;
759 #else
760 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
761 	address_space = 128;
762 #endif
763 	if (can_bank2 && ports->end > (ports->start + 1))
764 		address_space = 256;
765 
766 	/* For ACPI systems extension info comes from the FADT.  On others,
767 	 * board specific setup provides it as appropriate.  Systems where
768 	 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
769 	 * some almost-clones) can provide hooks to make that behave.
770 	 *
771 	 * Note that ACPI doesn't preclude putting these registers into
772 	 * "extended" areas of the chip, including some that we won't yet
773 	 * expect CMOS_READ and friends to handle.
774 	 */
775 	if (info) {
776 		if (info->flags)
777 			flags = info->flags;
778 		if (info->address_space)
779 			address_space = info->address_space;
780 
781 		if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
782 			cmos_rtc.day_alrm = info->rtc_day_alarm;
783 		if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
784 			cmos_rtc.mon_alrm = info->rtc_mon_alarm;
785 		if (info->rtc_century && info->rtc_century < 128)
786 			cmos_rtc.century = info->rtc_century;
787 
788 		if (info->wake_on && info->wake_off) {
789 			cmos_rtc.wake_on = info->wake_on;
790 			cmos_rtc.wake_off = info->wake_off;
791 		}
792 	}
793 
794 	cmos_rtc.dev = dev;
795 	dev_set_drvdata(dev, &cmos_rtc);
796 
797 	cmos_rtc.rtc = devm_rtc_allocate_device(dev);
798 	if (IS_ERR(cmos_rtc.rtc)) {
799 		retval = PTR_ERR(cmos_rtc.rtc);
800 		goto cleanup0;
801 	}
802 
803 	rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
804 
805 	spin_lock_irq(&rtc_lock);
806 
807 	if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
808 		/* force periodic irq to CMOS reset default of 1024Hz;
809 		 *
810 		 * REVISIT it's been reported that at least one x86_64 ALI
811 		 * mobo doesn't use 32KHz here ... for portability we might
812 		 * need to do something about other clock frequencies.
813 		 */
814 		cmos_rtc.rtc->irq_freq = 1024;
815 		if (use_hpet_alarm())
816 			hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
817 		CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
818 	}
819 
820 	/* disable irqs */
821 	if (is_valid_irq(rtc_irq))
822 		cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
823 
824 	rtc_control = CMOS_READ(RTC_CONTROL);
825 
826 	spin_unlock_irq(&rtc_lock);
827 
828 	if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
829 		dev_warn(dev, "only 24-hr supported\n");
830 		retval = -ENXIO;
831 		goto cleanup1;
832 	}
833 
834 	if (use_hpet_alarm())
835 		hpet_rtc_timer_init();
836 
837 	if (is_valid_irq(rtc_irq)) {
838 		irq_handler_t rtc_cmos_int_handler;
839 
840 		if (use_hpet_alarm()) {
841 			rtc_cmos_int_handler = hpet_rtc_interrupt;
842 			retval = hpet_register_irq_handler(cmos_interrupt);
843 			if (retval) {
844 				hpet_mask_rtc_irq_bit(RTC_IRQMASK);
845 				dev_warn(dev, "hpet_register_irq_handler "
846 						" failed in rtc_init().");
847 				goto cleanup1;
848 			}
849 		} else
850 			rtc_cmos_int_handler = cmos_interrupt;
851 
852 		retval = request_irq(rtc_irq, rtc_cmos_int_handler,
853 				IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
854 				cmos_rtc.rtc);
855 		if (retval < 0) {
856 			dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
857 			goto cleanup1;
858 		}
859 
860 		cmos_rtc.rtc->ops = &cmos_rtc_ops;
861 	} else {
862 		cmos_rtc.rtc->ops = &cmos_rtc_ops_no_alarm;
863 	}
864 
865 	cmos_rtc.rtc->nvram_old_abi = true;
866 	retval = rtc_register_device(cmos_rtc.rtc);
867 	if (retval)
868 		goto cleanup2;
869 
870 	/* export at least the first block of NVRAM */
871 	nvmem_cfg.size = address_space - NVRAM_OFFSET;
872 	if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg))
873 		dev_err(dev, "nvmem registration failed\n");
874 
875 	dev_info(dev, "%s%s, %d bytes nvram%s\n",
876 		 !is_valid_irq(rtc_irq) ? "no alarms" :
877 		 cmos_rtc.mon_alrm ? "alarms up to one year" :
878 		 cmos_rtc.day_alrm ? "alarms up to one month" :
879 		 "alarms up to one day",
880 		 cmos_rtc.century ? ", y3k" : "",
881 		 nvmem_cfg.size,
882 		 use_hpet_alarm() ? ", hpet irqs" : "");
883 
884 	return 0;
885 
886 cleanup2:
887 	if (is_valid_irq(rtc_irq))
888 		free_irq(rtc_irq, cmos_rtc.rtc);
889 cleanup1:
890 	cmos_rtc.dev = NULL;
891 cleanup0:
892 	if (RTC_IOMAPPED)
893 		release_region(ports->start, resource_size(ports));
894 	else
895 		release_mem_region(ports->start, resource_size(ports));
896 	return retval;
897 }
898 
899 static void cmos_do_shutdown(int rtc_irq)
900 {
901 	spin_lock_irq(&rtc_lock);
902 	if (is_valid_irq(rtc_irq))
903 		cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
904 	spin_unlock_irq(&rtc_lock);
905 }
906 
907 static void cmos_do_remove(struct device *dev)
908 {
909 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
910 	struct resource *ports;
911 
912 	cmos_do_shutdown(cmos->irq);
913 
914 	if (is_valid_irq(cmos->irq)) {
915 		free_irq(cmos->irq, cmos->rtc);
916 		if (use_hpet_alarm())
917 			hpet_unregister_irq_handler(cmos_interrupt);
918 	}
919 
920 	cmos->rtc = NULL;
921 
922 	ports = cmos->iomem;
923 	if (RTC_IOMAPPED)
924 		release_region(ports->start, resource_size(ports));
925 	else
926 		release_mem_region(ports->start, resource_size(ports));
927 	cmos->iomem = NULL;
928 
929 	cmos->dev = NULL;
930 }
931 
932 static int cmos_aie_poweroff(struct device *dev)
933 {
934 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
935 	struct rtc_time now;
936 	time64_t t_now;
937 	int retval = 0;
938 	unsigned char rtc_control;
939 
940 	if (!cmos->alarm_expires)
941 		return -EINVAL;
942 
943 	spin_lock_irq(&rtc_lock);
944 	rtc_control = CMOS_READ(RTC_CONTROL);
945 	spin_unlock_irq(&rtc_lock);
946 
947 	/* We only care about the situation where AIE is disabled. */
948 	if (rtc_control & RTC_AIE)
949 		return -EBUSY;
950 
951 	cmos_read_time(dev, &now);
952 	t_now = rtc_tm_to_time64(&now);
953 
954 	/*
955 	 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
956 	 * automatically right after shutdown on some buggy boxes.
957 	 * This automatic rebooting issue won't happen when the alarm
958 	 * time is larger than now+1 seconds.
959 	 *
960 	 * If the alarm time is equal to now+1 seconds, the issue can be
961 	 * prevented by cancelling the alarm.
962 	 */
963 	if (cmos->alarm_expires == t_now + 1) {
964 		struct rtc_wkalrm alarm;
965 
966 		/* Cancel the AIE timer by configuring the past time. */
967 		rtc_time64_to_tm(t_now - 1, &alarm.time);
968 		alarm.enabled = 0;
969 		retval = cmos_set_alarm(dev, &alarm);
970 	} else if (cmos->alarm_expires > t_now + 1) {
971 		retval = -EBUSY;
972 	}
973 
974 	return retval;
975 }
976 
977 static int cmos_suspend(struct device *dev)
978 {
979 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
980 	unsigned char	tmp;
981 
982 	/* only the alarm might be a wakeup event source */
983 	spin_lock_irq(&rtc_lock);
984 	cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
985 	if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
986 		unsigned char	mask;
987 
988 		if (device_may_wakeup(dev))
989 			mask = RTC_IRQMASK & ~RTC_AIE;
990 		else
991 			mask = RTC_IRQMASK;
992 		tmp &= ~mask;
993 		CMOS_WRITE(tmp, RTC_CONTROL);
994 		if (use_hpet_alarm())
995 			hpet_mask_rtc_irq_bit(mask);
996 		cmos_checkintr(cmos, tmp);
997 	}
998 	spin_unlock_irq(&rtc_lock);
999 
1000 	if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1001 		cmos->enabled_wake = 1;
1002 		if (cmos->wake_on)
1003 			cmos->wake_on(dev);
1004 		else
1005 			enable_irq_wake(cmos->irq);
1006 	}
1007 
1008 	cmos_read_alarm(dev, &cmos->saved_wkalrm);
1009 
1010 	dev_dbg(dev, "suspend%s, ctrl %02x\n",
1011 			(tmp & RTC_AIE) ? ", alarm may wake" : "",
1012 			tmp);
1013 
1014 	return 0;
1015 }
1016 
1017 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1018  * after a detour through G3 "mechanical off", although the ACPI spec
1019  * says wakeup should only work from G1/S4 "hibernate".  To most users,
1020  * distinctions between S4 and S5 are pointless.  So when the hardware
1021  * allows, don't draw that distinction.
1022  */
1023 static inline int cmos_poweroff(struct device *dev)
1024 {
1025 	if (!IS_ENABLED(CONFIG_PM))
1026 		return -ENOSYS;
1027 
1028 	return cmos_suspend(dev);
1029 }
1030 
1031 static void cmos_check_wkalrm(struct device *dev)
1032 {
1033 	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1034 	struct rtc_wkalrm current_alarm;
1035 	time64_t t_now;
1036 	time64_t t_current_expires;
1037 	time64_t t_saved_expires;
1038 	struct rtc_time now;
1039 
1040 	/* Check if we have RTC Alarm armed */
1041 	if (!(cmos->suspend_ctrl & RTC_AIE))
1042 		return;
1043 
1044 	cmos_read_time(dev, &now);
1045 	t_now = rtc_tm_to_time64(&now);
1046 
1047 	/*
1048 	 * ACPI RTC wake event is cleared after resume from STR,
1049 	 * ACK the rtc irq here
1050 	 */
1051 	if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1052 		cmos_interrupt(0, (void *)cmos->rtc);
1053 		return;
1054 	}
1055 
1056 	cmos_read_alarm(dev, &current_alarm);
1057 	t_current_expires = rtc_tm_to_time64(&current_alarm.time);
1058 	t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1059 	if (t_current_expires != t_saved_expires ||
1060 	    cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1061 		cmos_set_alarm(dev, &cmos->saved_wkalrm);
1062 	}
1063 }
1064 
1065 static void cmos_check_acpi_rtc_status(struct device *dev,
1066 				       unsigned char *rtc_control);
1067 
1068 static int __maybe_unused cmos_resume(struct device *dev)
1069 {
1070 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1071 	unsigned char tmp;
1072 
1073 	if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1074 		if (cmos->wake_off)
1075 			cmos->wake_off(dev);
1076 		else
1077 			disable_irq_wake(cmos->irq);
1078 		cmos->enabled_wake = 0;
1079 	}
1080 
1081 	/* The BIOS might have changed the alarm, restore it */
1082 	cmos_check_wkalrm(dev);
1083 
1084 	spin_lock_irq(&rtc_lock);
1085 	tmp = cmos->suspend_ctrl;
1086 	cmos->suspend_ctrl = 0;
1087 	/* re-enable any irqs previously active */
1088 	if (tmp & RTC_IRQMASK) {
1089 		unsigned char	mask;
1090 
1091 		if (device_may_wakeup(dev) && use_hpet_alarm())
1092 			hpet_rtc_timer_init();
1093 
1094 		do {
1095 			CMOS_WRITE(tmp, RTC_CONTROL);
1096 			if (use_hpet_alarm())
1097 				hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1098 
1099 			mask = CMOS_READ(RTC_INTR_FLAGS);
1100 			mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1101 			if (!use_hpet_alarm() || !is_intr(mask))
1102 				break;
1103 
1104 			/* force one-shot behavior if HPET blocked
1105 			 * the wake alarm's irq
1106 			 */
1107 			rtc_update_irq(cmos->rtc, 1, mask);
1108 			tmp &= ~RTC_AIE;
1109 			hpet_mask_rtc_irq_bit(RTC_AIE);
1110 		} while (mask & RTC_AIE);
1111 
1112 		if (tmp & RTC_AIE)
1113 			cmos_check_acpi_rtc_status(dev, &tmp);
1114 	}
1115 	spin_unlock_irq(&rtc_lock);
1116 
1117 	dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1118 
1119 	return 0;
1120 }
1121 
1122 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1123 
1124 /*----------------------------------------------------------------*/
1125 
1126 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1127  * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1128  * probably list them in similar PNPBIOS tables; so PNP is more common.
1129  *
1130  * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
1131  * predate even PNPBIOS should set up platform_bus devices.
1132  */
1133 
1134 #ifdef	CONFIG_ACPI
1135 
1136 #include <linux/acpi.h>
1137 
1138 static u32 rtc_handler(void *context)
1139 {
1140 	struct device *dev = context;
1141 	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1142 	unsigned char rtc_control = 0;
1143 	unsigned char rtc_intr;
1144 	unsigned long flags;
1145 
1146 
1147 	/*
1148 	 * Always update rtc irq when ACPI is used as RTC Alarm.
1149 	 * Or else, ACPI SCI is enabled during suspend/resume only,
1150 	 * update rtc irq in that case.
1151 	 */
1152 	if (cmos_use_acpi_alarm())
1153 		cmos_interrupt(0, (void *)cmos->rtc);
1154 	else {
1155 		/* Fix me: can we use cmos_interrupt() here as well? */
1156 		spin_lock_irqsave(&rtc_lock, flags);
1157 		if (cmos_rtc.suspend_ctrl)
1158 			rtc_control = CMOS_READ(RTC_CONTROL);
1159 		if (rtc_control & RTC_AIE) {
1160 			cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1161 			CMOS_WRITE(rtc_control, RTC_CONTROL);
1162 			rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1163 			rtc_update_irq(cmos->rtc, 1, rtc_intr);
1164 		}
1165 		spin_unlock_irqrestore(&rtc_lock, flags);
1166 	}
1167 
1168 	pm_wakeup_hard_event(dev);
1169 	acpi_clear_event(ACPI_EVENT_RTC);
1170 	acpi_disable_event(ACPI_EVENT_RTC, 0);
1171 	return ACPI_INTERRUPT_HANDLED;
1172 }
1173 
1174 static inline void rtc_wake_setup(struct device *dev)
1175 {
1176 	acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1177 	/*
1178 	 * After the RTC handler is installed, the Fixed_RTC event should
1179 	 * be disabled. Only when the RTC alarm is set will it be enabled.
1180 	 */
1181 	acpi_clear_event(ACPI_EVENT_RTC);
1182 	acpi_disable_event(ACPI_EVENT_RTC, 0);
1183 }
1184 
1185 static void rtc_wake_on(struct device *dev)
1186 {
1187 	acpi_clear_event(ACPI_EVENT_RTC);
1188 	acpi_enable_event(ACPI_EVENT_RTC, 0);
1189 }
1190 
1191 static void rtc_wake_off(struct device *dev)
1192 {
1193 	acpi_disable_event(ACPI_EVENT_RTC, 0);
1194 }
1195 
1196 #ifdef CONFIG_X86
1197 /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
1198 static void use_acpi_alarm_quirks(void)
1199 {
1200 	int year;
1201 
1202 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
1203 		return;
1204 
1205 	if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))
1206 		return;
1207 
1208 	if (!is_hpet_enabled())
1209 		return;
1210 
1211 	if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year >= 2015)
1212 		use_acpi_alarm = true;
1213 }
1214 #else
1215 static inline void use_acpi_alarm_quirks(void) { }
1216 #endif
1217 
1218 /* Every ACPI platform has a mc146818 compatible "cmos rtc".  Here we find
1219  * its device node and pass extra config data.  This helps its driver use
1220  * capabilities that the now-obsolete mc146818 didn't have, and informs it
1221  * that this board's RTC is wakeup-capable (per ACPI spec).
1222  */
1223 static struct cmos_rtc_board_info acpi_rtc_info;
1224 
1225 static void cmos_wake_setup(struct device *dev)
1226 {
1227 	if (acpi_disabled)
1228 		return;
1229 
1230 	use_acpi_alarm_quirks();
1231 
1232 	rtc_wake_setup(dev);
1233 	acpi_rtc_info.wake_on = rtc_wake_on;
1234 	acpi_rtc_info.wake_off = rtc_wake_off;
1235 
1236 	/* workaround bug in some ACPI tables */
1237 	if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1238 		dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1239 			acpi_gbl_FADT.month_alarm);
1240 		acpi_gbl_FADT.month_alarm = 0;
1241 	}
1242 
1243 	acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1244 	acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1245 	acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1246 
1247 	/* NOTE:  S4_RTC_WAKE is NOT currently useful to Linux */
1248 	if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1249 		dev_info(dev, "RTC can wake from S4\n");
1250 
1251 	dev->platform_data = &acpi_rtc_info;
1252 
1253 	/* RTC always wakes from S1/S2/S3, and often S4/STD */
1254 	device_init_wakeup(dev, 1);
1255 }
1256 
1257 static void cmos_check_acpi_rtc_status(struct device *dev,
1258 				       unsigned char *rtc_control)
1259 {
1260 	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1261 	acpi_event_status rtc_status;
1262 	acpi_status status;
1263 
1264 	if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1265 		return;
1266 
1267 	status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1268 	if (ACPI_FAILURE(status)) {
1269 		dev_err(dev, "Could not get RTC status\n");
1270 	} else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1271 		unsigned char mask;
1272 		*rtc_control &= ~RTC_AIE;
1273 		CMOS_WRITE(*rtc_control, RTC_CONTROL);
1274 		mask = CMOS_READ(RTC_INTR_FLAGS);
1275 		rtc_update_irq(cmos->rtc, 1, mask);
1276 	}
1277 }
1278 
1279 #else
1280 
1281 static void cmos_wake_setup(struct device *dev)
1282 {
1283 }
1284 
1285 static void cmos_check_acpi_rtc_status(struct device *dev,
1286 				       unsigned char *rtc_control)
1287 {
1288 }
1289 
1290 #endif
1291 
1292 #ifdef	CONFIG_PNP
1293 
1294 #include <linux/pnp.h>
1295 
1296 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1297 {
1298 	cmos_wake_setup(&pnp->dev);
1299 
1300 	if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1301 		unsigned int irq = 0;
1302 #ifdef CONFIG_X86
1303 		/* Some machines contain a PNP entry for the RTC, but
1304 		 * don't define the IRQ. It should always be safe to
1305 		 * hardcode it on systems with a legacy PIC.
1306 		 */
1307 		if (nr_legacy_irqs())
1308 			irq = 8;
1309 #endif
1310 		return cmos_do_probe(&pnp->dev,
1311 				pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1312 	} else {
1313 		return cmos_do_probe(&pnp->dev,
1314 				pnp_get_resource(pnp, IORESOURCE_IO, 0),
1315 				pnp_irq(pnp, 0));
1316 	}
1317 }
1318 
1319 static void cmos_pnp_remove(struct pnp_dev *pnp)
1320 {
1321 	cmos_do_remove(&pnp->dev);
1322 }
1323 
1324 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1325 {
1326 	struct device *dev = &pnp->dev;
1327 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1328 
1329 	if (system_state == SYSTEM_POWER_OFF) {
1330 		int retval = cmos_poweroff(dev);
1331 
1332 		if (cmos_aie_poweroff(dev) < 0 && !retval)
1333 			return;
1334 	}
1335 
1336 	cmos_do_shutdown(cmos->irq);
1337 }
1338 
1339 static const struct pnp_device_id rtc_ids[] = {
1340 	{ .id = "PNP0b00", },
1341 	{ .id = "PNP0b01", },
1342 	{ .id = "PNP0b02", },
1343 	{ },
1344 };
1345 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1346 
1347 static struct pnp_driver cmos_pnp_driver = {
1348 	.name		= (char *) driver_name,
1349 	.id_table	= rtc_ids,
1350 	.probe		= cmos_pnp_probe,
1351 	.remove		= cmos_pnp_remove,
1352 	.shutdown	= cmos_pnp_shutdown,
1353 
1354 	/* flag ensures resume() gets called, and stops syslog spam */
1355 	.flags		= PNP_DRIVER_RES_DO_NOT_CHANGE,
1356 	.driver		= {
1357 			.pm = &cmos_pm_ops,
1358 	},
1359 };
1360 
1361 #endif	/* CONFIG_PNP */
1362 
1363 #ifdef CONFIG_OF
1364 static const struct of_device_id of_cmos_match[] = {
1365 	{
1366 		.compatible = "motorola,mc146818",
1367 	},
1368 	{ },
1369 };
1370 MODULE_DEVICE_TABLE(of, of_cmos_match);
1371 
1372 static __init void cmos_of_init(struct platform_device *pdev)
1373 {
1374 	struct device_node *node = pdev->dev.of_node;
1375 	const __be32 *val;
1376 
1377 	if (!node)
1378 		return;
1379 
1380 	val = of_get_property(node, "ctrl-reg", NULL);
1381 	if (val)
1382 		CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1383 
1384 	val = of_get_property(node, "freq-reg", NULL);
1385 	if (val)
1386 		CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1387 }
1388 #else
1389 static inline void cmos_of_init(struct platform_device *pdev) {}
1390 #endif
1391 /*----------------------------------------------------------------*/
1392 
1393 /* Platform setup should have set up an RTC device, when PNP is
1394  * unavailable ... this could happen even on (older) PCs.
1395  */
1396 
1397 static int __init cmos_platform_probe(struct platform_device *pdev)
1398 {
1399 	struct resource *resource;
1400 	int irq;
1401 
1402 	cmos_of_init(pdev);
1403 	cmos_wake_setup(&pdev->dev);
1404 
1405 	if (RTC_IOMAPPED)
1406 		resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1407 	else
1408 		resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1409 	irq = platform_get_irq(pdev, 0);
1410 	if (irq < 0)
1411 		irq = -1;
1412 
1413 	return cmos_do_probe(&pdev->dev, resource, irq);
1414 }
1415 
1416 static int cmos_platform_remove(struct platform_device *pdev)
1417 {
1418 	cmos_do_remove(&pdev->dev);
1419 	return 0;
1420 }
1421 
1422 static void cmos_platform_shutdown(struct platform_device *pdev)
1423 {
1424 	struct device *dev = &pdev->dev;
1425 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1426 
1427 	if (system_state == SYSTEM_POWER_OFF) {
1428 		int retval = cmos_poweroff(dev);
1429 
1430 		if (cmos_aie_poweroff(dev) < 0 && !retval)
1431 			return;
1432 	}
1433 
1434 	cmos_do_shutdown(cmos->irq);
1435 }
1436 
1437 /* work with hotplug and coldplug */
1438 MODULE_ALIAS("platform:rtc_cmos");
1439 
1440 static struct platform_driver cmos_platform_driver = {
1441 	.remove		= cmos_platform_remove,
1442 	.shutdown	= cmos_platform_shutdown,
1443 	.driver = {
1444 		.name		= driver_name,
1445 		.pm		= &cmos_pm_ops,
1446 		.of_match_table = of_match_ptr(of_cmos_match),
1447 	}
1448 };
1449 
1450 #ifdef CONFIG_PNP
1451 static bool pnp_driver_registered;
1452 #endif
1453 static bool platform_driver_registered;
1454 
1455 static int __init cmos_init(void)
1456 {
1457 	int retval = 0;
1458 
1459 #ifdef	CONFIG_PNP
1460 	retval = pnp_register_driver(&cmos_pnp_driver);
1461 	if (retval == 0)
1462 		pnp_driver_registered = true;
1463 #endif
1464 
1465 	if (!cmos_rtc.dev) {
1466 		retval = platform_driver_probe(&cmos_platform_driver,
1467 					       cmos_platform_probe);
1468 		if (retval == 0)
1469 			platform_driver_registered = true;
1470 	}
1471 
1472 	if (retval == 0)
1473 		return 0;
1474 
1475 #ifdef	CONFIG_PNP
1476 	if (pnp_driver_registered)
1477 		pnp_unregister_driver(&cmos_pnp_driver);
1478 #endif
1479 	return retval;
1480 }
1481 module_init(cmos_init);
1482 
1483 static void __exit cmos_exit(void)
1484 {
1485 #ifdef	CONFIG_PNP
1486 	if (pnp_driver_registered)
1487 		pnp_unregister_driver(&cmos_pnp_driver);
1488 #endif
1489 	if (platform_driver_registered)
1490 		platform_driver_unregister(&cmos_platform_driver);
1491 }
1492 module_exit(cmos_exit);
1493 
1494 
1495 MODULE_AUTHOR("David Brownell");
1496 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1497 MODULE_LICENSE("GPL");
1498