1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 4 * 5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 6 * Copyright (C) 2006 David Brownell (convert to new framework) 7 */ 8 9 /* 10 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 11 * That defined the register interface now provided by all PCs, some 12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 13 * integrate an MC146818 clone in their southbridge, and boards use 14 * that instead of discrete clones like the DS12887 or M48T86. There 15 * are also clones that connect using the LPC bus. 16 * 17 * That register API is also used directly by various other drivers 18 * (notably for integrated NVRAM), infrastructure (x86 has code to 19 * bypass the RTC framework, directly reading the RTC during boot 20 * and updating minutes/seconds for systems using NTP synch) and 21 * utilities (like userspace 'hwclock', if no /dev node exists). 22 * 23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 24 * interrupts disabled, holding the global rtc_lock, to exclude those 25 * other drivers and utilities on correctly configured systems. 26 */ 27 28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 29 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/init.h> 33 #include <linux/interrupt.h> 34 #include <linux/spinlock.h> 35 #include <linux/platform_device.h> 36 #include <linux/log2.h> 37 #include <linux/pm.h> 38 #include <linux/of.h> 39 #include <linux/of_platform.h> 40 #ifdef CONFIG_X86 41 #include <asm/i8259.h> 42 #include <asm/processor.h> 43 #include <linux/dmi.h> 44 #endif 45 46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 47 #include <linux/mc146818rtc.h> 48 49 #ifdef CONFIG_ACPI 50 /* 51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event 52 * 53 * If cleared, ACPI SCI is only used to wake up the system from suspend 54 * 55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup 56 */ 57 58 static bool use_acpi_alarm; 59 module_param(use_acpi_alarm, bool, 0444); 60 61 static inline int cmos_use_acpi_alarm(void) 62 { 63 return use_acpi_alarm; 64 } 65 #else /* !CONFIG_ACPI */ 66 67 static inline int cmos_use_acpi_alarm(void) 68 { 69 return 0; 70 } 71 #endif 72 73 struct cmos_rtc { 74 struct rtc_device *rtc; 75 struct device *dev; 76 int irq; 77 struct resource *iomem; 78 time64_t alarm_expires; 79 80 void (*wake_on)(struct device *); 81 void (*wake_off)(struct device *); 82 83 u8 enabled_wake; 84 u8 suspend_ctrl; 85 86 /* newer hardware extends the original register set */ 87 u8 day_alrm; 88 u8 mon_alrm; 89 u8 century; 90 91 struct rtc_wkalrm saved_wkalrm; 92 }; 93 94 /* both platform and pnp busses use negative numbers for invalid irqs */ 95 #define is_valid_irq(n) ((n) > 0) 96 97 static const char driver_name[] = "rtc_cmos"; 98 99 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 102 */ 103 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 104 105 static inline int is_intr(u8 rtc_intr) 106 { 107 if (!(rtc_intr & RTC_IRQF)) 108 return 0; 109 return rtc_intr & RTC_IRQMASK; 110 } 111 112 /*----------------------------------------------------------------*/ 113 114 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 116 * used in a broken "legacy replacement" mode. The breakage includes 117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 118 * other (better) use. 119 * 120 * When that broken mode is in use, platform glue provides a partial 121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 122 * want to use HPET for anything except those IRQs though... 123 */ 124 #ifdef CONFIG_HPET_EMULATE_RTC 125 #include <asm/hpet.h> 126 #else 127 128 static inline int is_hpet_enabled(void) 129 { 130 return 0; 131 } 132 133 static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 134 { 135 return 0; 136 } 137 138 static inline int hpet_set_rtc_irq_bit(unsigned long mask) 139 { 140 return 0; 141 } 142 143 static inline int 144 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 145 { 146 return 0; 147 } 148 149 static inline int hpet_set_periodic_freq(unsigned long freq) 150 { 151 return 0; 152 } 153 154 static inline int hpet_rtc_dropped_irq(void) 155 { 156 return 0; 157 } 158 159 static inline int hpet_rtc_timer_init(void) 160 { 161 return 0; 162 } 163 164 extern irq_handler_t hpet_rtc_interrupt; 165 166 static inline int hpet_register_irq_handler(irq_handler_t handler) 167 { 168 return 0; 169 } 170 171 static inline int hpet_unregister_irq_handler(irq_handler_t handler) 172 { 173 return 0; 174 } 175 176 #endif 177 178 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */ 179 static inline int use_hpet_alarm(void) 180 { 181 return is_hpet_enabled() && !cmos_use_acpi_alarm(); 182 } 183 184 /*----------------------------------------------------------------*/ 185 186 #ifdef RTC_PORT 187 188 /* Most newer x86 systems have two register banks, the first used 189 * for RTC and NVRAM and the second only for NVRAM. Caller must 190 * own rtc_lock ... and we won't worry about access during NMI. 191 */ 192 #define can_bank2 true 193 194 static inline unsigned char cmos_read_bank2(unsigned char addr) 195 { 196 outb(addr, RTC_PORT(2)); 197 return inb(RTC_PORT(3)); 198 } 199 200 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 201 { 202 outb(addr, RTC_PORT(2)); 203 outb(val, RTC_PORT(3)); 204 } 205 206 #else 207 208 #define can_bank2 false 209 210 static inline unsigned char cmos_read_bank2(unsigned char addr) 211 { 212 return 0; 213 } 214 215 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 216 { 217 } 218 219 #endif 220 221 /*----------------------------------------------------------------*/ 222 223 static int cmos_read_time(struct device *dev, struct rtc_time *t) 224 { 225 int ret; 226 227 /* 228 * If pm_trace abused the RTC for storage, set the timespec to 0, 229 * which tells the caller that this RTC value is unusable. 230 */ 231 if (!pm_trace_rtc_valid()) 232 return -EIO; 233 234 ret = mc146818_get_time(t, 1000); 235 if (ret < 0) { 236 dev_err_ratelimited(dev, "unable to read current time\n"); 237 return ret; 238 } 239 240 return 0; 241 } 242 243 static int cmos_set_time(struct device *dev, struct rtc_time *t) 244 { 245 /* NOTE: this ignores the issue whereby updating the seconds 246 * takes effect exactly 500ms after we write the register. 247 * (Also queueing and other delays before we get this far.) 248 */ 249 return mc146818_set_time(t); 250 } 251 252 struct cmos_read_alarm_callback_param { 253 struct cmos_rtc *cmos; 254 struct rtc_time *time; 255 unsigned char rtc_control; 256 }; 257 258 static void cmos_read_alarm_callback(unsigned char __always_unused seconds, 259 void *param_in) 260 { 261 struct cmos_read_alarm_callback_param *p = 262 (struct cmos_read_alarm_callback_param *)param_in; 263 struct rtc_time *time = p->time; 264 265 time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 266 time->tm_min = CMOS_READ(RTC_MINUTES_ALARM); 267 time->tm_hour = CMOS_READ(RTC_HOURS_ALARM); 268 269 if (p->cmos->day_alrm) { 270 /* ignore upper bits on readback per ACPI spec */ 271 time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f; 272 if (!time->tm_mday) 273 time->tm_mday = -1; 274 275 if (p->cmos->mon_alrm) { 276 time->tm_mon = CMOS_READ(p->cmos->mon_alrm); 277 if (!time->tm_mon) 278 time->tm_mon = -1; 279 } 280 } 281 282 p->rtc_control = CMOS_READ(RTC_CONTROL); 283 } 284 285 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 286 { 287 struct cmos_rtc *cmos = dev_get_drvdata(dev); 288 struct cmos_read_alarm_callback_param p = { 289 .cmos = cmos, 290 .time = &t->time, 291 }; 292 293 /* This not only a rtc_op, but also called directly */ 294 if (!is_valid_irq(cmos->irq)) 295 return -ETIMEDOUT; 296 297 /* Basic alarms only support hour, minute, and seconds fields. 298 * Some also support day and month, for alarms up to a year in 299 * the future. 300 */ 301 302 /* Some Intel chipsets disconnect the alarm registers when the clock 303 * update is in progress - during this time reads return bogus values 304 * and writes may fail silently. See for example "7th Generation Intel® 305 * Processor Family I/O for U/Y Platforms [...] Datasheet", section 306 * 27.7.1 307 * 308 * Use the mc146818_avoid_UIP() function to avoid this. 309 */ 310 if (!mc146818_avoid_UIP(cmos_read_alarm_callback, 10, &p)) 311 return -EIO; 312 313 if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 314 if (((unsigned)t->time.tm_sec) < 0x60) 315 t->time.tm_sec = bcd2bin(t->time.tm_sec); 316 else 317 t->time.tm_sec = -1; 318 if (((unsigned)t->time.tm_min) < 0x60) 319 t->time.tm_min = bcd2bin(t->time.tm_min); 320 else 321 t->time.tm_min = -1; 322 if (((unsigned)t->time.tm_hour) < 0x24) 323 t->time.tm_hour = bcd2bin(t->time.tm_hour); 324 else 325 t->time.tm_hour = -1; 326 327 if (cmos->day_alrm) { 328 if (((unsigned)t->time.tm_mday) <= 0x31) 329 t->time.tm_mday = bcd2bin(t->time.tm_mday); 330 else 331 t->time.tm_mday = -1; 332 333 if (cmos->mon_alrm) { 334 if (((unsigned)t->time.tm_mon) <= 0x12) 335 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 336 else 337 t->time.tm_mon = -1; 338 } 339 } 340 } 341 342 t->enabled = !!(p.rtc_control & RTC_AIE); 343 t->pending = 0; 344 345 return 0; 346 } 347 348 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 349 { 350 unsigned char rtc_intr; 351 352 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 353 * allegedly some older rtcs need that to handle irqs properly 354 */ 355 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 356 357 if (use_hpet_alarm()) 358 return; 359 360 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 361 if (is_intr(rtc_intr)) 362 rtc_update_irq(cmos->rtc, 1, rtc_intr); 363 } 364 365 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 366 { 367 unsigned char rtc_control; 368 369 /* flush any pending IRQ status, notably for update irqs, 370 * before we enable new IRQs 371 */ 372 rtc_control = CMOS_READ(RTC_CONTROL); 373 cmos_checkintr(cmos, rtc_control); 374 375 rtc_control |= mask; 376 CMOS_WRITE(rtc_control, RTC_CONTROL); 377 if (use_hpet_alarm()) 378 hpet_set_rtc_irq_bit(mask); 379 380 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 381 if (cmos->wake_on) 382 cmos->wake_on(cmos->dev); 383 } 384 385 cmos_checkintr(cmos, rtc_control); 386 } 387 388 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 389 { 390 unsigned char rtc_control; 391 392 rtc_control = CMOS_READ(RTC_CONTROL); 393 rtc_control &= ~mask; 394 CMOS_WRITE(rtc_control, RTC_CONTROL); 395 if (use_hpet_alarm()) 396 hpet_mask_rtc_irq_bit(mask); 397 398 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 399 if (cmos->wake_off) 400 cmos->wake_off(cmos->dev); 401 } 402 403 cmos_checkintr(cmos, rtc_control); 404 } 405 406 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) 407 { 408 struct cmos_rtc *cmos = dev_get_drvdata(dev); 409 struct rtc_time now; 410 411 cmos_read_time(dev, &now); 412 413 if (!cmos->day_alrm) { 414 time64_t t_max_date; 415 time64_t t_alrm; 416 417 t_max_date = rtc_tm_to_time64(&now); 418 t_max_date += 24 * 60 * 60 - 1; 419 t_alrm = rtc_tm_to_time64(&t->time); 420 if (t_alrm > t_max_date) { 421 dev_err(dev, 422 "Alarms can be up to one day in the future\n"); 423 return -EINVAL; 424 } 425 } else if (!cmos->mon_alrm) { 426 struct rtc_time max_date = now; 427 time64_t t_max_date; 428 time64_t t_alrm; 429 int max_mday; 430 431 if (max_date.tm_mon == 11) { 432 max_date.tm_mon = 0; 433 max_date.tm_year += 1; 434 } else { 435 max_date.tm_mon += 1; 436 } 437 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 438 if (max_date.tm_mday > max_mday) 439 max_date.tm_mday = max_mday; 440 441 t_max_date = rtc_tm_to_time64(&max_date); 442 t_max_date -= 1; 443 t_alrm = rtc_tm_to_time64(&t->time); 444 if (t_alrm > t_max_date) { 445 dev_err(dev, 446 "Alarms can be up to one month in the future\n"); 447 return -EINVAL; 448 } 449 } else { 450 struct rtc_time max_date = now; 451 time64_t t_max_date; 452 time64_t t_alrm; 453 int max_mday; 454 455 max_date.tm_year += 1; 456 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 457 if (max_date.tm_mday > max_mday) 458 max_date.tm_mday = max_mday; 459 460 t_max_date = rtc_tm_to_time64(&max_date); 461 t_max_date -= 1; 462 t_alrm = rtc_tm_to_time64(&t->time); 463 if (t_alrm > t_max_date) { 464 dev_err(dev, 465 "Alarms can be up to one year in the future\n"); 466 return -EINVAL; 467 } 468 } 469 470 return 0; 471 } 472 473 struct cmos_set_alarm_callback_param { 474 struct cmos_rtc *cmos; 475 unsigned char mon, mday, hrs, min, sec; 476 struct rtc_wkalrm *t; 477 }; 478 479 /* Note: this function may be executed by mc146818_avoid_UIP() more then 480 * once 481 */ 482 static void cmos_set_alarm_callback(unsigned char __always_unused seconds, 483 void *param_in) 484 { 485 struct cmos_set_alarm_callback_param *p = 486 (struct cmos_set_alarm_callback_param *)param_in; 487 488 /* next rtc irq must not be from previous alarm setting */ 489 cmos_irq_disable(p->cmos, RTC_AIE); 490 491 /* update alarm */ 492 CMOS_WRITE(p->hrs, RTC_HOURS_ALARM); 493 CMOS_WRITE(p->min, RTC_MINUTES_ALARM); 494 CMOS_WRITE(p->sec, RTC_SECONDS_ALARM); 495 496 /* the system may support an "enhanced" alarm */ 497 if (p->cmos->day_alrm) { 498 CMOS_WRITE(p->mday, p->cmos->day_alrm); 499 if (p->cmos->mon_alrm) 500 CMOS_WRITE(p->mon, p->cmos->mon_alrm); 501 } 502 503 if (use_hpet_alarm()) { 504 /* 505 * FIXME the HPET alarm glue currently ignores day_alrm 506 * and mon_alrm ... 507 */ 508 hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min, 509 p->t->time.tm_sec); 510 } 511 512 if (p->t->enabled) 513 cmos_irq_enable(p->cmos, RTC_AIE); 514 } 515 516 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 517 { 518 struct cmos_rtc *cmos = dev_get_drvdata(dev); 519 struct cmos_set_alarm_callback_param p = { 520 .cmos = cmos, 521 .t = t 522 }; 523 unsigned char rtc_control; 524 int ret; 525 526 /* This not only a rtc_op, but also called directly */ 527 if (!is_valid_irq(cmos->irq)) 528 return -EIO; 529 530 ret = cmos_validate_alarm(dev, t); 531 if (ret < 0) 532 return ret; 533 534 p.mon = t->time.tm_mon + 1; 535 p.mday = t->time.tm_mday; 536 p.hrs = t->time.tm_hour; 537 p.min = t->time.tm_min; 538 p.sec = t->time.tm_sec; 539 540 spin_lock_irq(&rtc_lock); 541 rtc_control = CMOS_READ(RTC_CONTROL); 542 spin_unlock_irq(&rtc_lock); 543 544 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 545 /* Writing 0xff means "don't care" or "match all". */ 546 p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff; 547 p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff; 548 p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff; 549 p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff; 550 p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff; 551 } 552 553 /* 554 * Some Intel chipsets disconnect the alarm registers when the clock 555 * update is in progress - during this time writes fail silently. 556 * 557 * Use mc146818_avoid_UIP() to avoid this. 558 */ 559 if (!mc146818_avoid_UIP(cmos_set_alarm_callback, 10, &p)) 560 return -ETIMEDOUT; 561 562 cmos->alarm_expires = rtc_tm_to_time64(&t->time); 563 564 return 0; 565 } 566 567 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 568 { 569 struct cmos_rtc *cmos = dev_get_drvdata(dev); 570 unsigned long flags; 571 572 spin_lock_irqsave(&rtc_lock, flags); 573 574 if (enabled) 575 cmos_irq_enable(cmos, RTC_AIE); 576 else 577 cmos_irq_disable(cmos, RTC_AIE); 578 579 spin_unlock_irqrestore(&rtc_lock, flags); 580 return 0; 581 } 582 583 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 584 585 static int cmos_procfs(struct device *dev, struct seq_file *seq) 586 { 587 struct cmos_rtc *cmos = dev_get_drvdata(dev); 588 unsigned char rtc_control, valid; 589 590 spin_lock_irq(&rtc_lock); 591 rtc_control = CMOS_READ(RTC_CONTROL); 592 valid = CMOS_READ(RTC_VALID); 593 spin_unlock_irq(&rtc_lock); 594 595 /* NOTE: at least ICH6 reports battery status using a different 596 * (non-RTC) bit; and SQWE is ignored on many current systems. 597 */ 598 seq_printf(seq, 599 "periodic_IRQ\t: %s\n" 600 "update_IRQ\t: %s\n" 601 "HPET_emulated\t: %s\n" 602 // "square_wave\t: %s\n" 603 "BCD\t\t: %s\n" 604 "DST_enable\t: %s\n" 605 "periodic_freq\t: %d\n" 606 "batt_status\t: %s\n", 607 (rtc_control & RTC_PIE) ? "yes" : "no", 608 (rtc_control & RTC_UIE) ? "yes" : "no", 609 use_hpet_alarm() ? "yes" : "no", 610 // (rtc_control & RTC_SQWE) ? "yes" : "no", 611 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 612 (rtc_control & RTC_DST_EN) ? "yes" : "no", 613 cmos->rtc->irq_freq, 614 (valid & RTC_VRT) ? "okay" : "dead"); 615 616 return 0; 617 } 618 619 #else 620 #define cmos_procfs NULL 621 #endif 622 623 static const struct rtc_class_ops cmos_rtc_ops = { 624 .read_time = cmos_read_time, 625 .set_time = cmos_set_time, 626 .read_alarm = cmos_read_alarm, 627 .set_alarm = cmos_set_alarm, 628 .proc = cmos_procfs, 629 .alarm_irq_enable = cmos_alarm_irq_enable, 630 }; 631 632 /*----------------------------------------------------------------*/ 633 634 /* 635 * All these chips have at least 64 bytes of address space, shared by 636 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 637 * by boot firmware. Modern chips have 128 or 256 bytes. 638 */ 639 640 #define NVRAM_OFFSET (RTC_REG_D + 1) 641 642 static int cmos_nvram_read(void *priv, unsigned int off, void *val, 643 size_t count) 644 { 645 unsigned char *buf = val; 646 647 off += NVRAM_OFFSET; 648 spin_lock_irq(&rtc_lock); 649 for (; count; count--, off++) { 650 if (off < 128) 651 *buf++ = CMOS_READ(off); 652 else if (can_bank2) 653 *buf++ = cmos_read_bank2(off); 654 else 655 break; 656 } 657 spin_unlock_irq(&rtc_lock); 658 659 return count ? -EIO : 0; 660 } 661 662 static int cmos_nvram_write(void *priv, unsigned int off, void *val, 663 size_t count) 664 { 665 struct cmos_rtc *cmos = priv; 666 unsigned char *buf = val; 667 668 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 669 * checksum on part of the NVRAM data. That's currently ignored 670 * here. If userspace is smart enough to know what fields of 671 * NVRAM to update, updating checksums is also part of its job. 672 */ 673 off += NVRAM_OFFSET; 674 spin_lock_irq(&rtc_lock); 675 for (; count; count--, off++) { 676 /* don't trash RTC registers */ 677 if (off == cmos->day_alrm 678 || off == cmos->mon_alrm 679 || off == cmos->century) 680 buf++; 681 else if (off < 128) 682 CMOS_WRITE(*buf++, off); 683 else if (can_bank2) 684 cmos_write_bank2(*buf++, off); 685 else 686 break; 687 } 688 spin_unlock_irq(&rtc_lock); 689 690 return count ? -EIO : 0; 691 } 692 693 /*----------------------------------------------------------------*/ 694 695 static struct cmos_rtc cmos_rtc; 696 697 static irqreturn_t cmos_interrupt(int irq, void *p) 698 { 699 u8 irqstat; 700 u8 rtc_control; 701 702 spin_lock(&rtc_lock); 703 704 /* When the HPET interrupt handler calls us, the interrupt 705 * status is passed as arg1 instead of the irq number. But 706 * always clear irq status, even when HPET is in the way. 707 * 708 * Note that HPET and RTC are almost certainly out of phase, 709 * giving different IRQ status ... 710 */ 711 irqstat = CMOS_READ(RTC_INTR_FLAGS); 712 rtc_control = CMOS_READ(RTC_CONTROL); 713 if (use_hpet_alarm()) 714 irqstat = (unsigned long)irq & 0xF0; 715 716 /* If we were suspended, RTC_CONTROL may not be accurate since the 717 * bios may have cleared it. 718 */ 719 if (!cmos_rtc.suspend_ctrl) 720 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 721 else 722 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; 723 724 /* All Linux RTC alarms should be treated as if they were oneshot. 725 * Similar code may be needed in system wakeup paths, in case the 726 * alarm woke the system. 727 */ 728 if (irqstat & RTC_AIE) { 729 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 730 rtc_control &= ~RTC_AIE; 731 CMOS_WRITE(rtc_control, RTC_CONTROL); 732 if (use_hpet_alarm()) 733 hpet_mask_rtc_irq_bit(RTC_AIE); 734 CMOS_READ(RTC_INTR_FLAGS); 735 } 736 spin_unlock(&rtc_lock); 737 738 if (is_intr(irqstat)) { 739 rtc_update_irq(p, 1, irqstat); 740 return IRQ_HANDLED; 741 } else 742 return IRQ_NONE; 743 } 744 745 #ifdef CONFIG_ACPI 746 747 #include <linux/acpi.h> 748 749 static u32 rtc_handler(void *context) 750 { 751 struct device *dev = context; 752 struct cmos_rtc *cmos = dev_get_drvdata(dev); 753 unsigned char rtc_control = 0; 754 unsigned char rtc_intr; 755 unsigned long flags; 756 757 758 /* 759 * Always update rtc irq when ACPI is used as RTC Alarm. 760 * Or else, ACPI SCI is enabled during suspend/resume only, 761 * update rtc irq in that case. 762 */ 763 if (cmos_use_acpi_alarm()) 764 cmos_interrupt(0, (void *)cmos->rtc); 765 else { 766 /* Fix me: can we use cmos_interrupt() here as well? */ 767 spin_lock_irqsave(&rtc_lock, flags); 768 if (cmos_rtc.suspend_ctrl) 769 rtc_control = CMOS_READ(RTC_CONTROL); 770 if (rtc_control & RTC_AIE) { 771 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 772 CMOS_WRITE(rtc_control, RTC_CONTROL); 773 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 774 rtc_update_irq(cmos->rtc, 1, rtc_intr); 775 } 776 spin_unlock_irqrestore(&rtc_lock, flags); 777 } 778 779 pm_wakeup_hard_event(dev); 780 acpi_clear_event(ACPI_EVENT_RTC); 781 acpi_disable_event(ACPI_EVENT_RTC, 0); 782 return ACPI_INTERRUPT_HANDLED; 783 } 784 785 static void acpi_rtc_event_setup(struct device *dev) 786 { 787 if (acpi_disabled) 788 return; 789 790 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 791 /* 792 * After the RTC handler is installed, the Fixed_RTC event should 793 * be disabled. Only when the RTC alarm is set will it be enabled. 794 */ 795 acpi_clear_event(ACPI_EVENT_RTC); 796 acpi_disable_event(ACPI_EVENT_RTC, 0); 797 } 798 799 static void acpi_rtc_event_cleanup(void) 800 { 801 if (acpi_disabled) 802 return; 803 804 acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler); 805 } 806 807 static void rtc_wake_on(struct device *dev) 808 { 809 acpi_clear_event(ACPI_EVENT_RTC); 810 acpi_enable_event(ACPI_EVENT_RTC, 0); 811 } 812 813 static void rtc_wake_off(struct device *dev) 814 { 815 acpi_disable_event(ACPI_EVENT_RTC, 0); 816 } 817 818 #ifdef CONFIG_X86 819 static void use_acpi_alarm_quirks(void) 820 { 821 switch (boot_cpu_data.x86_vendor) { 822 case X86_VENDOR_INTEL: 823 if (dmi_get_bios_year() < 2015) 824 return; 825 break; 826 case X86_VENDOR_AMD: 827 case X86_VENDOR_HYGON: 828 if (dmi_get_bios_year() < 2021) 829 return; 830 break; 831 default: 832 return; 833 } 834 if (!is_hpet_enabled()) 835 return; 836 837 use_acpi_alarm = true; 838 } 839 #else 840 static inline void use_acpi_alarm_quirks(void) { } 841 #endif 842 843 static void acpi_cmos_wake_setup(struct device *dev) 844 { 845 if (acpi_disabled) 846 return; 847 848 use_acpi_alarm_quirks(); 849 850 cmos_rtc.wake_on = rtc_wake_on; 851 cmos_rtc.wake_off = rtc_wake_off; 852 853 /* ACPI tables bug workaround. */ 854 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 855 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 856 acpi_gbl_FADT.month_alarm); 857 acpi_gbl_FADT.month_alarm = 0; 858 } 859 860 cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm; 861 cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm; 862 cmos_rtc.century = acpi_gbl_FADT.century; 863 864 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 865 dev_info(dev, "RTC can wake from S4\n"); 866 867 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 868 device_init_wakeup(dev, 1); 869 } 870 871 static void cmos_check_acpi_rtc_status(struct device *dev, 872 unsigned char *rtc_control) 873 { 874 struct cmos_rtc *cmos = dev_get_drvdata(dev); 875 acpi_event_status rtc_status; 876 acpi_status status; 877 878 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 879 return; 880 881 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 882 if (ACPI_FAILURE(status)) { 883 dev_err(dev, "Could not get RTC status\n"); 884 } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 885 unsigned char mask; 886 *rtc_control &= ~RTC_AIE; 887 CMOS_WRITE(*rtc_control, RTC_CONTROL); 888 mask = CMOS_READ(RTC_INTR_FLAGS); 889 rtc_update_irq(cmos->rtc, 1, mask); 890 } 891 } 892 893 #else /* !CONFIG_ACPI */ 894 895 static inline void acpi_rtc_event_setup(struct device *dev) 896 { 897 } 898 899 static inline void acpi_rtc_event_cleanup(void) 900 { 901 } 902 903 static inline void acpi_cmos_wake_setup(struct device *dev) 904 { 905 } 906 907 static inline void cmos_check_acpi_rtc_status(struct device *dev, 908 unsigned char *rtc_control) 909 { 910 } 911 #endif /* CONFIG_ACPI */ 912 913 #ifdef CONFIG_PNP 914 #define INITSECTION 915 916 #else 917 #define INITSECTION __init 918 #endif 919 920 #define SECS_PER_DAY (24 * 60 * 60) 921 #define SECS_PER_MONTH (28 * SECS_PER_DAY) 922 #define SECS_PER_YEAR (365 * SECS_PER_DAY) 923 924 static int INITSECTION 925 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 926 { 927 struct cmos_rtc_board_info *info = dev_get_platdata(dev); 928 int retval = 0; 929 unsigned char rtc_control; 930 unsigned address_space; 931 u32 flags = 0; 932 struct nvmem_config nvmem_cfg = { 933 .name = "cmos_nvram", 934 .word_size = 1, 935 .stride = 1, 936 .reg_read = cmos_nvram_read, 937 .reg_write = cmos_nvram_write, 938 .priv = &cmos_rtc, 939 }; 940 941 /* there can be only one ... */ 942 if (cmos_rtc.dev) 943 return -EBUSY; 944 945 if (!ports) 946 return -ENODEV; 947 948 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 949 * 950 * REVISIT non-x86 systems may instead use memory space resources 951 * (needing ioremap etc), not i/o space resources like this ... 952 */ 953 if (RTC_IOMAPPED) 954 ports = request_region(ports->start, resource_size(ports), 955 driver_name); 956 else 957 ports = request_mem_region(ports->start, resource_size(ports), 958 driver_name); 959 if (!ports) { 960 dev_dbg(dev, "i/o registers already in use\n"); 961 return -EBUSY; 962 } 963 964 cmos_rtc.irq = rtc_irq; 965 cmos_rtc.iomem = ports; 966 967 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 968 * driver did, but don't reject unknown configs. Old hardware 969 * won't address 128 bytes. Newer chips have multiple banks, 970 * though they may not be listed in one I/O resource. 971 */ 972 #if defined(CONFIG_ATARI) 973 address_space = 64; 974 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 975 || defined(__sparc__) || defined(__mips__) \ 976 || defined(__powerpc__) 977 address_space = 128; 978 #else 979 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 980 address_space = 128; 981 #endif 982 if (can_bank2 && ports->end > (ports->start + 1)) 983 address_space = 256; 984 985 /* For ACPI systems extension info comes from the FADT. On others, 986 * board specific setup provides it as appropriate. Systems where 987 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 988 * some almost-clones) can provide hooks to make that behave. 989 * 990 * Note that ACPI doesn't preclude putting these registers into 991 * "extended" areas of the chip, including some that we won't yet 992 * expect CMOS_READ and friends to handle. 993 */ 994 if (info) { 995 if (info->flags) 996 flags = info->flags; 997 if (info->address_space) 998 address_space = info->address_space; 999 1000 cmos_rtc.day_alrm = info->rtc_day_alarm; 1001 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 1002 cmos_rtc.century = info->rtc_century; 1003 1004 if (info->wake_on && info->wake_off) { 1005 cmos_rtc.wake_on = info->wake_on; 1006 cmos_rtc.wake_off = info->wake_off; 1007 } 1008 } else { 1009 acpi_cmos_wake_setup(dev); 1010 } 1011 1012 if (cmos_rtc.day_alrm >= 128) 1013 cmos_rtc.day_alrm = 0; 1014 1015 if (cmos_rtc.mon_alrm >= 128) 1016 cmos_rtc.mon_alrm = 0; 1017 1018 if (cmos_rtc.century >= 128) 1019 cmos_rtc.century = 0; 1020 1021 cmos_rtc.dev = dev; 1022 dev_set_drvdata(dev, &cmos_rtc); 1023 1024 cmos_rtc.rtc = devm_rtc_allocate_device(dev); 1025 if (IS_ERR(cmos_rtc.rtc)) { 1026 retval = PTR_ERR(cmos_rtc.rtc); 1027 goto cleanup0; 1028 } 1029 1030 if (cmos_rtc.mon_alrm) 1031 cmos_rtc.rtc->alarm_offset_max = SECS_PER_YEAR - 1; 1032 else if (cmos_rtc.day_alrm) 1033 cmos_rtc.rtc->alarm_offset_max = SECS_PER_MONTH - 1; 1034 else 1035 cmos_rtc.rtc->alarm_offset_max = SECS_PER_DAY - 1; 1036 1037 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 1038 1039 if (!mc146818_does_rtc_work()) { 1040 dev_warn(dev, "broken or not accessible\n"); 1041 retval = -ENXIO; 1042 goto cleanup1; 1043 } 1044 1045 spin_lock_irq(&rtc_lock); 1046 1047 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { 1048 /* force periodic irq to CMOS reset default of 1024Hz; 1049 * 1050 * REVISIT it's been reported that at least one x86_64 ALI 1051 * mobo doesn't use 32KHz here ... for portability we might 1052 * need to do something about other clock frequencies. 1053 */ 1054 cmos_rtc.rtc->irq_freq = 1024; 1055 if (use_hpet_alarm()) 1056 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 1057 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 1058 } 1059 1060 /* disable irqs */ 1061 if (is_valid_irq(rtc_irq)) 1062 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 1063 1064 rtc_control = CMOS_READ(RTC_CONTROL); 1065 1066 spin_unlock_irq(&rtc_lock); 1067 1068 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 1069 dev_warn(dev, "only 24-hr supported\n"); 1070 retval = -ENXIO; 1071 goto cleanup1; 1072 } 1073 1074 if (use_hpet_alarm()) 1075 hpet_rtc_timer_init(); 1076 1077 if (is_valid_irq(rtc_irq)) { 1078 irq_handler_t rtc_cmos_int_handler; 1079 1080 if (use_hpet_alarm()) { 1081 rtc_cmos_int_handler = hpet_rtc_interrupt; 1082 retval = hpet_register_irq_handler(cmos_interrupt); 1083 if (retval) { 1084 hpet_mask_rtc_irq_bit(RTC_IRQMASK); 1085 dev_warn(dev, "hpet_register_irq_handler " 1086 " failed in rtc_init()."); 1087 goto cleanup1; 1088 } 1089 } else 1090 rtc_cmos_int_handler = cmos_interrupt; 1091 1092 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 1093 0, dev_name(&cmos_rtc.rtc->dev), 1094 cmos_rtc.rtc); 1095 if (retval < 0) { 1096 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 1097 goto cleanup1; 1098 } 1099 } else { 1100 clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features); 1101 } 1102 1103 cmos_rtc.rtc->ops = &cmos_rtc_ops; 1104 1105 retval = devm_rtc_register_device(cmos_rtc.rtc); 1106 if (retval) 1107 goto cleanup2; 1108 1109 /* Set the sync offset for the periodic 11min update correct */ 1110 cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2; 1111 1112 /* export at least the first block of NVRAM */ 1113 nvmem_cfg.size = address_space - NVRAM_OFFSET; 1114 devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg); 1115 1116 /* 1117 * Everything has gone well so far, so by default register a handler for 1118 * the ACPI RTC fixed event. 1119 */ 1120 if (!info) 1121 acpi_rtc_event_setup(dev); 1122 1123 dev_info(dev, "%s%s, %d bytes nvram%s\n", 1124 !is_valid_irq(rtc_irq) ? "no alarms" : 1125 cmos_rtc.mon_alrm ? "alarms up to one year" : 1126 cmos_rtc.day_alrm ? "alarms up to one month" : 1127 "alarms up to one day", 1128 cmos_rtc.century ? ", y3k" : "", 1129 nvmem_cfg.size, 1130 use_hpet_alarm() ? ", hpet irqs" : ""); 1131 1132 return 0; 1133 1134 cleanup2: 1135 if (is_valid_irq(rtc_irq)) 1136 free_irq(rtc_irq, cmos_rtc.rtc); 1137 cleanup1: 1138 cmos_rtc.dev = NULL; 1139 cleanup0: 1140 if (RTC_IOMAPPED) 1141 release_region(ports->start, resource_size(ports)); 1142 else 1143 release_mem_region(ports->start, resource_size(ports)); 1144 return retval; 1145 } 1146 1147 static void cmos_do_shutdown(int rtc_irq) 1148 { 1149 spin_lock_irq(&rtc_lock); 1150 if (is_valid_irq(rtc_irq)) 1151 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 1152 spin_unlock_irq(&rtc_lock); 1153 } 1154 1155 static void cmos_do_remove(struct device *dev) 1156 { 1157 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1158 struct resource *ports; 1159 1160 cmos_do_shutdown(cmos->irq); 1161 1162 if (is_valid_irq(cmos->irq)) { 1163 free_irq(cmos->irq, cmos->rtc); 1164 if (use_hpet_alarm()) 1165 hpet_unregister_irq_handler(cmos_interrupt); 1166 } 1167 1168 if (!dev_get_platdata(dev)) 1169 acpi_rtc_event_cleanup(); 1170 1171 cmos->rtc = NULL; 1172 1173 ports = cmos->iomem; 1174 if (RTC_IOMAPPED) 1175 release_region(ports->start, resource_size(ports)); 1176 else 1177 release_mem_region(ports->start, resource_size(ports)); 1178 cmos->iomem = NULL; 1179 1180 cmos->dev = NULL; 1181 } 1182 1183 static int cmos_aie_poweroff(struct device *dev) 1184 { 1185 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1186 struct rtc_time now; 1187 time64_t t_now; 1188 int retval = 0; 1189 unsigned char rtc_control; 1190 1191 if (!cmos->alarm_expires) 1192 return -EINVAL; 1193 1194 spin_lock_irq(&rtc_lock); 1195 rtc_control = CMOS_READ(RTC_CONTROL); 1196 spin_unlock_irq(&rtc_lock); 1197 1198 /* We only care about the situation where AIE is disabled. */ 1199 if (rtc_control & RTC_AIE) 1200 return -EBUSY; 1201 1202 cmos_read_time(dev, &now); 1203 t_now = rtc_tm_to_time64(&now); 1204 1205 /* 1206 * When enabling "RTC wake-up" in BIOS setup, the machine reboots 1207 * automatically right after shutdown on some buggy boxes. 1208 * This automatic rebooting issue won't happen when the alarm 1209 * time is larger than now+1 seconds. 1210 * 1211 * If the alarm time is equal to now+1 seconds, the issue can be 1212 * prevented by cancelling the alarm. 1213 */ 1214 if (cmos->alarm_expires == t_now + 1) { 1215 struct rtc_wkalrm alarm; 1216 1217 /* Cancel the AIE timer by configuring the past time. */ 1218 rtc_time64_to_tm(t_now - 1, &alarm.time); 1219 alarm.enabled = 0; 1220 retval = cmos_set_alarm(dev, &alarm); 1221 } else if (cmos->alarm_expires > t_now + 1) { 1222 retval = -EBUSY; 1223 } 1224 1225 return retval; 1226 } 1227 1228 static int cmos_suspend(struct device *dev) 1229 { 1230 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1231 unsigned char tmp; 1232 1233 /* only the alarm might be a wakeup event source */ 1234 spin_lock_irq(&rtc_lock); 1235 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 1236 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 1237 unsigned char mask; 1238 1239 if (device_may_wakeup(dev)) 1240 mask = RTC_IRQMASK & ~RTC_AIE; 1241 else 1242 mask = RTC_IRQMASK; 1243 tmp &= ~mask; 1244 CMOS_WRITE(tmp, RTC_CONTROL); 1245 if (use_hpet_alarm()) 1246 hpet_mask_rtc_irq_bit(mask); 1247 cmos_checkintr(cmos, tmp); 1248 } 1249 spin_unlock_irq(&rtc_lock); 1250 1251 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) { 1252 cmos->enabled_wake = 1; 1253 if (cmos->wake_on) 1254 cmos->wake_on(dev); 1255 else 1256 enable_irq_wake(cmos->irq); 1257 } 1258 1259 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm)); 1260 cmos_read_alarm(dev, &cmos->saved_wkalrm); 1261 1262 dev_dbg(dev, "suspend%s, ctrl %02x\n", 1263 (tmp & RTC_AIE) ? ", alarm may wake" : "", 1264 tmp); 1265 1266 return 0; 1267 } 1268 1269 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 1270 * after a detour through G3 "mechanical off", although the ACPI spec 1271 * says wakeup should only work from G1/S4 "hibernate". To most users, 1272 * distinctions between S4 and S5 are pointless. So when the hardware 1273 * allows, don't draw that distinction. 1274 */ 1275 static inline int cmos_poweroff(struct device *dev) 1276 { 1277 if (!IS_ENABLED(CONFIG_PM)) 1278 return -ENOSYS; 1279 1280 return cmos_suspend(dev); 1281 } 1282 1283 static void cmos_check_wkalrm(struct device *dev) 1284 { 1285 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1286 struct rtc_wkalrm current_alarm; 1287 time64_t t_now; 1288 time64_t t_current_expires; 1289 time64_t t_saved_expires; 1290 struct rtc_time now; 1291 1292 /* Check if we have RTC Alarm armed */ 1293 if (!(cmos->suspend_ctrl & RTC_AIE)) 1294 return; 1295 1296 cmos_read_time(dev, &now); 1297 t_now = rtc_tm_to_time64(&now); 1298 1299 /* 1300 * ACPI RTC wake event is cleared after resume from STR, 1301 * ACK the rtc irq here 1302 */ 1303 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) { 1304 local_irq_disable(); 1305 cmos_interrupt(0, (void *)cmos->rtc); 1306 local_irq_enable(); 1307 return; 1308 } 1309 1310 memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm)); 1311 cmos_read_alarm(dev, ¤t_alarm); 1312 t_current_expires = rtc_tm_to_time64(¤t_alarm.time); 1313 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); 1314 if (t_current_expires != t_saved_expires || 1315 cmos->saved_wkalrm.enabled != current_alarm.enabled) { 1316 cmos_set_alarm(dev, &cmos->saved_wkalrm); 1317 } 1318 } 1319 1320 static int __maybe_unused cmos_resume(struct device *dev) 1321 { 1322 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1323 unsigned char tmp; 1324 1325 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) { 1326 if (cmos->wake_off) 1327 cmos->wake_off(dev); 1328 else 1329 disable_irq_wake(cmos->irq); 1330 cmos->enabled_wake = 0; 1331 } 1332 1333 /* The BIOS might have changed the alarm, restore it */ 1334 cmos_check_wkalrm(dev); 1335 1336 spin_lock_irq(&rtc_lock); 1337 tmp = cmos->suspend_ctrl; 1338 cmos->suspend_ctrl = 0; 1339 /* re-enable any irqs previously active */ 1340 if (tmp & RTC_IRQMASK) { 1341 unsigned char mask; 1342 1343 if (device_may_wakeup(dev) && use_hpet_alarm()) 1344 hpet_rtc_timer_init(); 1345 1346 do { 1347 CMOS_WRITE(tmp, RTC_CONTROL); 1348 if (use_hpet_alarm()) 1349 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 1350 1351 mask = CMOS_READ(RTC_INTR_FLAGS); 1352 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 1353 if (!use_hpet_alarm() || !is_intr(mask)) 1354 break; 1355 1356 /* force one-shot behavior if HPET blocked 1357 * the wake alarm's irq 1358 */ 1359 rtc_update_irq(cmos->rtc, 1, mask); 1360 tmp &= ~RTC_AIE; 1361 hpet_mask_rtc_irq_bit(RTC_AIE); 1362 } while (mask & RTC_AIE); 1363 1364 if (tmp & RTC_AIE) 1365 cmos_check_acpi_rtc_status(dev, &tmp); 1366 } 1367 spin_unlock_irq(&rtc_lock); 1368 1369 dev_dbg(dev, "resume, ctrl %02x\n", tmp); 1370 1371 return 0; 1372 } 1373 1374 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 1375 1376 /*----------------------------------------------------------------*/ 1377 1378 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 1379 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 1380 * probably list them in similar PNPBIOS tables; so PNP is more common. 1381 * 1382 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 1383 * predate even PNPBIOS should set up platform_bus devices. 1384 */ 1385 1386 #ifdef CONFIG_PNP 1387 1388 #include <linux/pnp.h> 1389 1390 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1391 { 1392 int irq; 1393 1394 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { 1395 irq = 0; 1396 #ifdef CONFIG_X86 1397 /* Some machines contain a PNP entry for the RTC, but 1398 * don't define the IRQ. It should always be safe to 1399 * hardcode it on systems with a legacy PIC. 1400 */ 1401 if (nr_legacy_irqs()) 1402 irq = RTC_IRQ; 1403 #endif 1404 } else { 1405 irq = pnp_irq(pnp, 0); 1406 } 1407 1408 return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1409 } 1410 1411 static void cmos_pnp_remove(struct pnp_dev *pnp) 1412 { 1413 cmos_do_remove(&pnp->dev); 1414 } 1415 1416 static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1417 { 1418 struct device *dev = &pnp->dev; 1419 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1420 1421 if (system_state == SYSTEM_POWER_OFF) { 1422 int retval = cmos_poweroff(dev); 1423 1424 if (cmos_aie_poweroff(dev) < 0 && !retval) 1425 return; 1426 } 1427 1428 cmos_do_shutdown(cmos->irq); 1429 } 1430 1431 static const struct pnp_device_id rtc_ids[] = { 1432 { .id = "PNP0b00", }, 1433 { .id = "PNP0b01", }, 1434 { .id = "PNP0b02", }, 1435 { }, 1436 }; 1437 MODULE_DEVICE_TABLE(pnp, rtc_ids); 1438 1439 static struct pnp_driver cmos_pnp_driver = { 1440 .name = driver_name, 1441 .id_table = rtc_ids, 1442 .probe = cmos_pnp_probe, 1443 .remove = cmos_pnp_remove, 1444 .shutdown = cmos_pnp_shutdown, 1445 1446 /* flag ensures resume() gets called, and stops syslog spam */ 1447 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1448 .driver = { 1449 .pm = &cmos_pm_ops, 1450 }, 1451 }; 1452 1453 #endif /* CONFIG_PNP */ 1454 1455 #ifdef CONFIG_OF 1456 static const struct of_device_id of_cmos_match[] = { 1457 { 1458 .compatible = "motorola,mc146818", 1459 }, 1460 { }, 1461 }; 1462 MODULE_DEVICE_TABLE(of, of_cmos_match); 1463 1464 static __init void cmos_of_init(struct platform_device *pdev) 1465 { 1466 struct device_node *node = pdev->dev.of_node; 1467 const __be32 *val; 1468 1469 if (!node) 1470 return; 1471 1472 val = of_get_property(node, "ctrl-reg", NULL); 1473 if (val) 1474 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); 1475 1476 val = of_get_property(node, "freq-reg", NULL); 1477 if (val) 1478 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); 1479 } 1480 #else 1481 static inline void cmos_of_init(struct platform_device *pdev) {} 1482 #endif 1483 /*----------------------------------------------------------------*/ 1484 1485 /* Platform setup should have set up an RTC device, when PNP is 1486 * unavailable ... this could happen even on (older) PCs. 1487 */ 1488 1489 static int __init cmos_platform_probe(struct platform_device *pdev) 1490 { 1491 struct resource *resource; 1492 int irq; 1493 1494 cmos_of_init(pdev); 1495 1496 if (RTC_IOMAPPED) 1497 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); 1498 else 1499 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1500 irq = platform_get_irq(pdev, 0); 1501 if (irq < 0) 1502 irq = -1; 1503 1504 return cmos_do_probe(&pdev->dev, resource, irq); 1505 } 1506 1507 static void cmos_platform_remove(struct platform_device *pdev) 1508 { 1509 cmos_do_remove(&pdev->dev); 1510 } 1511 1512 static void cmos_platform_shutdown(struct platform_device *pdev) 1513 { 1514 struct device *dev = &pdev->dev; 1515 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1516 1517 if (system_state == SYSTEM_POWER_OFF) { 1518 int retval = cmos_poweroff(dev); 1519 1520 if (cmos_aie_poweroff(dev) < 0 && !retval) 1521 return; 1522 } 1523 1524 cmos_do_shutdown(cmos->irq); 1525 } 1526 1527 /* work with hotplug and coldplug */ 1528 MODULE_ALIAS("platform:rtc_cmos"); 1529 1530 static struct platform_driver cmos_platform_driver = { 1531 .remove_new = cmos_platform_remove, 1532 .shutdown = cmos_platform_shutdown, 1533 .driver = { 1534 .name = driver_name, 1535 .pm = &cmos_pm_ops, 1536 .of_match_table = of_match_ptr(of_cmos_match), 1537 } 1538 }; 1539 1540 #ifdef CONFIG_PNP 1541 static bool pnp_driver_registered; 1542 #endif 1543 static bool platform_driver_registered; 1544 1545 static int __init cmos_init(void) 1546 { 1547 int retval = 0; 1548 1549 #ifdef CONFIG_PNP 1550 retval = pnp_register_driver(&cmos_pnp_driver); 1551 if (retval == 0) 1552 pnp_driver_registered = true; 1553 #endif 1554 1555 if (!cmos_rtc.dev) { 1556 retval = platform_driver_probe(&cmos_platform_driver, 1557 cmos_platform_probe); 1558 if (retval == 0) 1559 platform_driver_registered = true; 1560 } 1561 1562 if (retval == 0) 1563 return 0; 1564 1565 #ifdef CONFIG_PNP 1566 if (pnp_driver_registered) 1567 pnp_unregister_driver(&cmos_pnp_driver); 1568 #endif 1569 return retval; 1570 } 1571 module_init(cmos_init); 1572 1573 static void __exit cmos_exit(void) 1574 { 1575 #ifdef CONFIG_PNP 1576 if (pnp_driver_registered) 1577 pnp_unregister_driver(&cmos_pnp_driver); 1578 #endif 1579 if (platform_driver_registered) 1580 platform_driver_unregister(&cmos_platform_driver); 1581 } 1582 module_exit(cmos_exit); 1583 1584 1585 MODULE_AUTHOR("David Brownell"); 1586 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1587 MODULE_LICENSE("GPL"); 1588