1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 4 * 5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 6 * Copyright (C) 2006 David Brownell (convert to new framework) 7 */ 8 9 /* 10 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 11 * That defined the register interface now provided by all PCs, some 12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 13 * integrate an MC146818 clone in their southbridge, and boards use 14 * that instead of discrete clones like the DS12887 or M48T86. There 15 * are also clones that connect using the LPC bus. 16 * 17 * That register API is also used directly by various other drivers 18 * (notably for integrated NVRAM), infrastructure (x86 has code to 19 * bypass the RTC framework, directly reading the RTC during boot 20 * and updating minutes/seconds for systems using NTP synch) and 21 * utilities (like userspace 'hwclock', if no /dev node exists). 22 * 23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 24 * interrupts disabled, holding the global rtc_lock, to exclude those 25 * other drivers and utilities on correctly configured systems. 26 */ 27 28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 29 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/init.h> 33 #include <linux/interrupt.h> 34 #include <linux/spinlock.h> 35 #include <linux/platform_device.h> 36 #include <linux/log2.h> 37 #include <linux/pm.h> 38 #include <linux/of.h> 39 #include <linux/of_platform.h> 40 #ifdef CONFIG_X86 41 #include <asm/i8259.h> 42 #include <asm/processor.h> 43 #include <linux/dmi.h> 44 #endif 45 46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 47 #include <linux/mc146818rtc.h> 48 49 #ifdef CONFIG_ACPI 50 /* 51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event 52 * 53 * If cleared, ACPI SCI is only used to wake up the system from suspend 54 * 55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup 56 */ 57 58 static bool use_acpi_alarm; 59 module_param(use_acpi_alarm, bool, 0444); 60 61 static inline int cmos_use_acpi_alarm(void) 62 { 63 return use_acpi_alarm; 64 } 65 #else /* !CONFIG_ACPI */ 66 67 static inline int cmos_use_acpi_alarm(void) 68 { 69 return 0; 70 } 71 #endif 72 73 struct cmos_rtc { 74 struct rtc_device *rtc; 75 struct device *dev; 76 int irq; 77 struct resource *iomem; 78 time64_t alarm_expires; 79 80 void (*wake_on)(struct device *); 81 void (*wake_off)(struct device *); 82 83 u8 enabled_wake; 84 u8 suspend_ctrl; 85 86 /* newer hardware extends the original register set */ 87 u8 day_alrm; 88 u8 mon_alrm; 89 u8 century; 90 91 struct rtc_wkalrm saved_wkalrm; 92 }; 93 94 /* both platform and pnp busses use negative numbers for invalid irqs */ 95 #define is_valid_irq(n) ((n) > 0) 96 97 static const char driver_name[] = "rtc_cmos"; 98 99 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 102 */ 103 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 104 105 static inline int is_intr(u8 rtc_intr) 106 { 107 if (!(rtc_intr & RTC_IRQF)) 108 return 0; 109 return rtc_intr & RTC_IRQMASK; 110 } 111 112 /*----------------------------------------------------------------*/ 113 114 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 116 * used in a broken "legacy replacement" mode. The breakage includes 117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 118 * other (better) use. 119 * 120 * When that broken mode is in use, platform glue provides a partial 121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 122 * want to use HPET for anything except those IRQs though... 123 */ 124 #ifdef CONFIG_HPET_EMULATE_RTC 125 #include <asm/hpet.h> 126 #else 127 128 static inline int is_hpet_enabled(void) 129 { 130 return 0; 131 } 132 133 static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 134 { 135 return 0; 136 } 137 138 static inline int hpet_set_rtc_irq_bit(unsigned long mask) 139 { 140 return 0; 141 } 142 143 static inline int 144 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 145 { 146 return 0; 147 } 148 149 static inline int hpet_set_periodic_freq(unsigned long freq) 150 { 151 return 0; 152 } 153 154 static inline int hpet_rtc_dropped_irq(void) 155 { 156 return 0; 157 } 158 159 static inline int hpet_rtc_timer_init(void) 160 { 161 return 0; 162 } 163 164 extern irq_handler_t hpet_rtc_interrupt; 165 166 static inline int hpet_register_irq_handler(irq_handler_t handler) 167 { 168 return 0; 169 } 170 171 static inline int hpet_unregister_irq_handler(irq_handler_t handler) 172 { 173 return 0; 174 } 175 176 #endif 177 178 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */ 179 static inline int use_hpet_alarm(void) 180 { 181 return is_hpet_enabled() && !cmos_use_acpi_alarm(); 182 } 183 184 /*----------------------------------------------------------------*/ 185 186 #ifdef RTC_PORT 187 188 /* Most newer x86 systems have two register banks, the first used 189 * for RTC and NVRAM and the second only for NVRAM. Caller must 190 * own rtc_lock ... and we won't worry about access during NMI. 191 */ 192 #define can_bank2 true 193 194 static inline unsigned char cmos_read_bank2(unsigned char addr) 195 { 196 outb(addr, RTC_PORT(2)); 197 return inb(RTC_PORT(3)); 198 } 199 200 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 201 { 202 outb(addr, RTC_PORT(2)); 203 outb(val, RTC_PORT(3)); 204 } 205 206 #else 207 208 #define can_bank2 false 209 210 static inline unsigned char cmos_read_bank2(unsigned char addr) 211 { 212 return 0; 213 } 214 215 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 216 { 217 } 218 219 #endif 220 221 /*----------------------------------------------------------------*/ 222 223 static int cmos_read_time(struct device *dev, struct rtc_time *t) 224 { 225 /* 226 * If pm_trace abused the RTC for storage, set the timespec to 0, 227 * which tells the caller that this RTC value is unusable. 228 */ 229 if (!pm_trace_rtc_valid()) 230 return -EIO; 231 232 /* REVISIT: if the clock has a "century" register, use 233 * that instead of the heuristic in mc146818_get_time(). 234 * That'll make Y3K compatility (year > 2070) easy! 235 */ 236 mc146818_get_time(t); 237 return 0; 238 } 239 240 static int cmos_set_time(struct device *dev, struct rtc_time *t) 241 { 242 /* REVISIT: set the "century" register if available 243 * 244 * NOTE: this ignores the issue whereby updating the seconds 245 * takes effect exactly 500ms after we write the register. 246 * (Also queueing and other delays before we get this far.) 247 */ 248 return mc146818_set_time(t); 249 } 250 251 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 252 { 253 struct cmos_rtc *cmos = dev_get_drvdata(dev); 254 unsigned char rtc_control; 255 256 /* This not only a rtc_op, but also called directly */ 257 if (!is_valid_irq(cmos->irq)) 258 return -EIO; 259 260 /* Basic alarms only support hour, minute, and seconds fields. 261 * Some also support day and month, for alarms up to a year in 262 * the future. 263 */ 264 265 spin_lock_irq(&rtc_lock); 266 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 267 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); 268 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); 269 270 if (cmos->day_alrm) { 271 /* ignore upper bits on readback per ACPI spec */ 272 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; 273 if (!t->time.tm_mday) 274 t->time.tm_mday = -1; 275 276 if (cmos->mon_alrm) { 277 t->time.tm_mon = CMOS_READ(cmos->mon_alrm); 278 if (!t->time.tm_mon) 279 t->time.tm_mon = -1; 280 } 281 } 282 283 rtc_control = CMOS_READ(RTC_CONTROL); 284 spin_unlock_irq(&rtc_lock); 285 286 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 287 if (((unsigned)t->time.tm_sec) < 0x60) 288 t->time.tm_sec = bcd2bin(t->time.tm_sec); 289 else 290 t->time.tm_sec = -1; 291 if (((unsigned)t->time.tm_min) < 0x60) 292 t->time.tm_min = bcd2bin(t->time.tm_min); 293 else 294 t->time.tm_min = -1; 295 if (((unsigned)t->time.tm_hour) < 0x24) 296 t->time.tm_hour = bcd2bin(t->time.tm_hour); 297 else 298 t->time.tm_hour = -1; 299 300 if (cmos->day_alrm) { 301 if (((unsigned)t->time.tm_mday) <= 0x31) 302 t->time.tm_mday = bcd2bin(t->time.tm_mday); 303 else 304 t->time.tm_mday = -1; 305 306 if (cmos->mon_alrm) { 307 if (((unsigned)t->time.tm_mon) <= 0x12) 308 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 309 else 310 t->time.tm_mon = -1; 311 } 312 } 313 } 314 315 t->enabled = !!(rtc_control & RTC_AIE); 316 t->pending = 0; 317 318 return 0; 319 } 320 321 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 322 { 323 unsigned char rtc_intr; 324 325 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 326 * allegedly some older rtcs need that to handle irqs properly 327 */ 328 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 329 330 if (use_hpet_alarm()) 331 return; 332 333 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 334 if (is_intr(rtc_intr)) 335 rtc_update_irq(cmos->rtc, 1, rtc_intr); 336 } 337 338 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 339 { 340 unsigned char rtc_control; 341 342 /* flush any pending IRQ status, notably for update irqs, 343 * before we enable new IRQs 344 */ 345 rtc_control = CMOS_READ(RTC_CONTROL); 346 cmos_checkintr(cmos, rtc_control); 347 348 rtc_control |= mask; 349 CMOS_WRITE(rtc_control, RTC_CONTROL); 350 if (use_hpet_alarm()) 351 hpet_set_rtc_irq_bit(mask); 352 353 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 354 if (cmos->wake_on) 355 cmos->wake_on(cmos->dev); 356 } 357 358 cmos_checkintr(cmos, rtc_control); 359 } 360 361 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 362 { 363 unsigned char rtc_control; 364 365 rtc_control = CMOS_READ(RTC_CONTROL); 366 rtc_control &= ~mask; 367 CMOS_WRITE(rtc_control, RTC_CONTROL); 368 if (use_hpet_alarm()) 369 hpet_mask_rtc_irq_bit(mask); 370 371 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 372 if (cmos->wake_off) 373 cmos->wake_off(cmos->dev); 374 } 375 376 cmos_checkintr(cmos, rtc_control); 377 } 378 379 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) 380 { 381 struct cmos_rtc *cmos = dev_get_drvdata(dev); 382 struct rtc_time now; 383 384 cmos_read_time(dev, &now); 385 386 if (!cmos->day_alrm) { 387 time64_t t_max_date; 388 time64_t t_alrm; 389 390 t_max_date = rtc_tm_to_time64(&now); 391 t_max_date += 24 * 60 * 60 - 1; 392 t_alrm = rtc_tm_to_time64(&t->time); 393 if (t_alrm > t_max_date) { 394 dev_err(dev, 395 "Alarms can be up to one day in the future\n"); 396 return -EINVAL; 397 } 398 } else if (!cmos->mon_alrm) { 399 struct rtc_time max_date = now; 400 time64_t t_max_date; 401 time64_t t_alrm; 402 int max_mday; 403 404 if (max_date.tm_mon == 11) { 405 max_date.tm_mon = 0; 406 max_date.tm_year += 1; 407 } else { 408 max_date.tm_mon += 1; 409 } 410 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 411 if (max_date.tm_mday > max_mday) 412 max_date.tm_mday = max_mday; 413 414 t_max_date = rtc_tm_to_time64(&max_date); 415 t_max_date -= 1; 416 t_alrm = rtc_tm_to_time64(&t->time); 417 if (t_alrm > t_max_date) { 418 dev_err(dev, 419 "Alarms can be up to one month in the future\n"); 420 return -EINVAL; 421 } 422 } else { 423 struct rtc_time max_date = now; 424 time64_t t_max_date; 425 time64_t t_alrm; 426 int max_mday; 427 428 max_date.tm_year += 1; 429 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 430 if (max_date.tm_mday > max_mday) 431 max_date.tm_mday = max_mday; 432 433 t_max_date = rtc_tm_to_time64(&max_date); 434 t_max_date -= 1; 435 t_alrm = rtc_tm_to_time64(&t->time); 436 if (t_alrm > t_max_date) { 437 dev_err(dev, 438 "Alarms can be up to one year in the future\n"); 439 return -EINVAL; 440 } 441 } 442 443 return 0; 444 } 445 446 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 447 { 448 struct cmos_rtc *cmos = dev_get_drvdata(dev); 449 unsigned char mon, mday, hrs, min, sec, rtc_control; 450 int ret; 451 452 /* This not only a rtc_op, but also called directly */ 453 if (!is_valid_irq(cmos->irq)) 454 return -EIO; 455 456 ret = cmos_validate_alarm(dev, t); 457 if (ret < 0) 458 return ret; 459 460 mon = t->time.tm_mon + 1; 461 mday = t->time.tm_mday; 462 hrs = t->time.tm_hour; 463 min = t->time.tm_min; 464 sec = t->time.tm_sec; 465 466 rtc_control = CMOS_READ(RTC_CONTROL); 467 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 468 /* Writing 0xff means "don't care" or "match all". */ 469 mon = (mon <= 12) ? bin2bcd(mon) : 0xff; 470 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; 471 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; 472 min = (min < 60) ? bin2bcd(min) : 0xff; 473 sec = (sec < 60) ? bin2bcd(sec) : 0xff; 474 } 475 476 spin_lock_irq(&rtc_lock); 477 478 /* next rtc irq must not be from previous alarm setting */ 479 cmos_irq_disable(cmos, RTC_AIE); 480 481 /* update alarm */ 482 CMOS_WRITE(hrs, RTC_HOURS_ALARM); 483 CMOS_WRITE(min, RTC_MINUTES_ALARM); 484 CMOS_WRITE(sec, RTC_SECONDS_ALARM); 485 486 /* the system may support an "enhanced" alarm */ 487 if (cmos->day_alrm) { 488 CMOS_WRITE(mday, cmos->day_alrm); 489 if (cmos->mon_alrm) 490 CMOS_WRITE(mon, cmos->mon_alrm); 491 } 492 493 if (use_hpet_alarm()) { 494 /* 495 * FIXME the HPET alarm glue currently ignores day_alrm 496 * and mon_alrm ... 497 */ 498 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, 499 t->time.tm_sec); 500 } 501 502 if (t->enabled) 503 cmos_irq_enable(cmos, RTC_AIE); 504 505 spin_unlock_irq(&rtc_lock); 506 507 cmos->alarm_expires = rtc_tm_to_time64(&t->time); 508 509 return 0; 510 } 511 512 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 513 { 514 struct cmos_rtc *cmos = dev_get_drvdata(dev); 515 unsigned long flags; 516 517 spin_lock_irqsave(&rtc_lock, flags); 518 519 if (enabled) 520 cmos_irq_enable(cmos, RTC_AIE); 521 else 522 cmos_irq_disable(cmos, RTC_AIE); 523 524 spin_unlock_irqrestore(&rtc_lock, flags); 525 return 0; 526 } 527 528 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 529 530 static int cmos_procfs(struct device *dev, struct seq_file *seq) 531 { 532 struct cmos_rtc *cmos = dev_get_drvdata(dev); 533 unsigned char rtc_control, valid; 534 535 spin_lock_irq(&rtc_lock); 536 rtc_control = CMOS_READ(RTC_CONTROL); 537 valid = CMOS_READ(RTC_VALID); 538 spin_unlock_irq(&rtc_lock); 539 540 /* NOTE: at least ICH6 reports battery status using a different 541 * (non-RTC) bit; and SQWE is ignored on many current systems. 542 */ 543 seq_printf(seq, 544 "periodic_IRQ\t: %s\n" 545 "update_IRQ\t: %s\n" 546 "HPET_emulated\t: %s\n" 547 // "square_wave\t: %s\n" 548 "BCD\t\t: %s\n" 549 "DST_enable\t: %s\n" 550 "periodic_freq\t: %d\n" 551 "batt_status\t: %s\n", 552 (rtc_control & RTC_PIE) ? "yes" : "no", 553 (rtc_control & RTC_UIE) ? "yes" : "no", 554 use_hpet_alarm() ? "yes" : "no", 555 // (rtc_control & RTC_SQWE) ? "yes" : "no", 556 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 557 (rtc_control & RTC_DST_EN) ? "yes" : "no", 558 cmos->rtc->irq_freq, 559 (valid & RTC_VRT) ? "okay" : "dead"); 560 561 return 0; 562 } 563 564 #else 565 #define cmos_procfs NULL 566 #endif 567 568 static const struct rtc_class_ops cmos_rtc_ops = { 569 .read_time = cmos_read_time, 570 .set_time = cmos_set_time, 571 .read_alarm = cmos_read_alarm, 572 .set_alarm = cmos_set_alarm, 573 .proc = cmos_procfs, 574 .alarm_irq_enable = cmos_alarm_irq_enable, 575 }; 576 577 static const struct rtc_class_ops cmos_rtc_ops_no_alarm = { 578 .read_time = cmos_read_time, 579 .set_time = cmos_set_time, 580 .proc = cmos_procfs, 581 }; 582 583 /*----------------------------------------------------------------*/ 584 585 /* 586 * All these chips have at least 64 bytes of address space, shared by 587 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 588 * by boot firmware. Modern chips have 128 or 256 bytes. 589 */ 590 591 #define NVRAM_OFFSET (RTC_REG_D + 1) 592 593 static int cmos_nvram_read(void *priv, unsigned int off, void *val, 594 size_t count) 595 { 596 unsigned char *buf = val; 597 int retval; 598 599 off += NVRAM_OFFSET; 600 spin_lock_irq(&rtc_lock); 601 for (retval = 0; count; count--, off++, retval++) { 602 if (off < 128) 603 *buf++ = CMOS_READ(off); 604 else if (can_bank2) 605 *buf++ = cmos_read_bank2(off); 606 else 607 break; 608 } 609 spin_unlock_irq(&rtc_lock); 610 611 return retval; 612 } 613 614 static int cmos_nvram_write(void *priv, unsigned int off, void *val, 615 size_t count) 616 { 617 struct cmos_rtc *cmos = priv; 618 unsigned char *buf = val; 619 int retval; 620 621 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 622 * checksum on part of the NVRAM data. That's currently ignored 623 * here. If userspace is smart enough to know what fields of 624 * NVRAM to update, updating checksums is also part of its job. 625 */ 626 off += NVRAM_OFFSET; 627 spin_lock_irq(&rtc_lock); 628 for (retval = 0; count; count--, off++, retval++) { 629 /* don't trash RTC registers */ 630 if (off == cmos->day_alrm 631 || off == cmos->mon_alrm 632 || off == cmos->century) 633 buf++; 634 else if (off < 128) 635 CMOS_WRITE(*buf++, off); 636 else if (can_bank2) 637 cmos_write_bank2(*buf++, off); 638 else 639 break; 640 } 641 spin_unlock_irq(&rtc_lock); 642 643 return retval; 644 } 645 646 /*----------------------------------------------------------------*/ 647 648 static struct cmos_rtc cmos_rtc; 649 650 static irqreturn_t cmos_interrupt(int irq, void *p) 651 { 652 unsigned long flags; 653 u8 irqstat; 654 u8 rtc_control; 655 656 spin_lock_irqsave(&rtc_lock, flags); 657 658 /* When the HPET interrupt handler calls us, the interrupt 659 * status is passed as arg1 instead of the irq number. But 660 * always clear irq status, even when HPET is in the way. 661 * 662 * Note that HPET and RTC are almost certainly out of phase, 663 * giving different IRQ status ... 664 */ 665 irqstat = CMOS_READ(RTC_INTR_FLAGS); 666 rtc_control = CMOS_READ(RTC_CONTROL); 667 if (use_hpet_alarm()) 668 irqstat = (unsigned long)irq & 0xF0; 669 670 /* If we were suspended, RTC_CONTROL may not be accurate since the 671 * bios may have cleared it. 672 */ 673 if (!cmos_rtc.suspend_ctrl) 674 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 675 else 676 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; 677 678 /* All Linux RTC alarms should be treated as if they were oneshot. 679 * Similar code may be needed in system wakeup paths, in case the 680 * alarm woke the system. 681 */ 682 if (irqstat & RTC_AIE) { 683 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 684 rtc_control &= ~RTC_AIE; 685 CMOS_WRITE(rtc_control, RTC_CONTROL); 686 if (use_hpet_alarm()) 687 hpet_mask_rtc_irq_bit(RTC_AIE); 688 CMOS_READ(RTC_INTR_FLAGS); 689 } 690 spin_unlock_irqrestore(&rtc_lock, flags); 691 692 if (is_intr(irqstat)) { 693 rtc_update_irq(p, 1, irqstat); 694 return IRQ_HANDLED; 695 } else 696 return IRQ_NONE; 697 } 698 699 #ifdef CONFIG_PNP 700 #define INITSECTION 701 702 #else 703 #define INITSECTION __init 704 #endif 705 706 static int INITSECTION 707 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 708 { 709 struct cmos_rtc_board_info *info = dev_get_platdata(dev); 710 int retval = 0; 711 unsigned char rtc_control; 712 unsigned address_space; 713 u32 flags = 0; 714 struct nvmem_config nvmem_cfg = { 715 .name = "cmos_nvram", 716 .word_size = 1, 717 .stride = 1, 718 .reg_read = cmos_nvram_read, 719 .reg_write = cmos_nvram_write, 720 .priv = &cmos_rtc, 721 }; 722 723 /* there can be only one ... */ 724 if (cmos_rtc.dev) 725 return -EBUSY; 726 727 if (!ports) 728 return -ENODEV; 729 730 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 731 * 732 * REVISIT non-x86 systems may instead use memory space resources 733 * (needing ioremap etc), not i/o space resources like this ... 734 */ 735 if (RTC_IOMAPPED) 736 ports = request_region(ports->start, resource_size(ports), 737 driver_name); 738 else 739 ports = request_mem_region(ports->start, resource_size(ports), 740 driver_name); 741 if (!ports) { 742 dev_dbg(dev, "i/o registers already in use\n"); 743 return -EBUSY; 744 } 745 746 cmos_rtc.irq = rtc_irq; 747 cmos_rtc.iomem = ports; 748 749 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 750 * driver did, but don't reject unknown configs. Old hardware 751 * won't address 128 bytes. Newer chips have multiple banks, 752 * though they may not be listed in one I/O resource. 753 */ 754 #if defined(CONFIG_ATARI) 755 address_space = 64; 756 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 757 || defined(__sparc__) || defined(__mips__) \ 758 || defined(__powerpc__) 759 address_space = 128; 760 #else 761 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 762 address_space = 128; 763 #endif 764 if (can_bank2 && ports->end > (ports->start + 1)) 765 address_space = 256; 766 767 /* For ACPI systems extension info comes from the FADT. On others, 768 * board specific setup provides it as appropriate. Systems where 769 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 770 * some almost-clones) can provide hooks to make that behave. 771 * 772 * Note that ACPI doesn't preclude putting these registers into 773 * "extended" areas of the chip, including some that we won't yet 774 * expect CMOS_READ and friends to handle. 775 */ 776 if (info) { 777 if (info->flags) 778 flags = info->flags; 779 if (info->address_space) 780 address_space = info->address_space; 781 782 if (info->rtc_day_alarm && info->rtc_day_alarm < 128) 783 cmos_rtc.day_alrm = info->rtc_day_alarm; 784 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) 785 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 786 if (info->rtc_century && info->rtc_century < 128) 787 cmos_rtc.century = info->rtc_century; 788 789 if (info->wake_on && info->wake_off) { 790 cmos_rtc.wake_on = info->wake_on; 791 cmos_rtc.wake_off = info->wake_off; 792 } 793 } 794 795 cmos_rtc.dev = dev; 796 dev_set_drvdata(dev, &cmos_rtc); 797 798 cmos_rtc.rtc = devm_rtc_allocate_device(dev); 799 if (IS_ERR(cmos_rtc.rtc)) { 800 retval = PTR_ERR(cmos_rtc.rtc); 801 goto cleanup0; 802 } 803 804 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 805 806 spin_lock_irq(&rtc_lock); 807 808 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { 809 /* force periodic irq to CMOS reset default of 1024Hz; 810 * 811 * REVISIT it's been reported that at least one x86_64 ALI 812 * mobo doesn't use 32KHz here ... for portability we might 813 * need to do something about other clock frequencies. 814 */ 815 cmos_rtc.rtc->irq_freq = 1024; 816 if (use_hpet_alarm()) 817 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 818 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 819 } 820 821 /* disable irqs */ 822 if (is_valid_irq(rtc_irq)) 823 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 824 825 rtc_control = CMOS_READ(RTC_CONTROL); 826 827 spin_unlock_irq(&rtc_lock); 828 829 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 830 dev_warn(dev, "only 24-hr supported\n"); 831 retval = -ENXIO; 832 goto cleanup1; 833 } 834 835 if (use_hpet_alarm()) 836 hpet_rtc_timer_init(); 837 838 if (is_valid_irq(rtc_irq)) { 839 irq_handler_t rtc_cmos_int_handler; 840 841 if (use_hpet_alarm()) { 842 rtc_cmos_int_handler = hpet_rtc_interrupt; 843 retval = hpet_register_irq_handler(cmos_interrupt); 844 if (retval) { 845 hpet_mask_rtc_irq_bit(RTC_IRQMASK); 846 dev_warn(dev, "hpet_register_irq_handler " 847 " failed in rtc_init()."); 848 goto cleanup1; 849 } 850 } else 851 rtc_cmos_int_handler = cmos_interrupt; 852 853 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 854 0, dev_name(&cmos_rtc.rtc->dev), 855 cmos_rtc.rtc); 856 if (retval < 0) { 857 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 858 goto cleanup1; 859 } 860 861 cmos_rtc.rtc->ops = &cmos_rtc_ops; 862 } else { 863 cmos_rtc.rtc->ops = &cmos_rtc_ops_no_alarm; 864 } 865 866 cmos_rtc.rtc->nvram_old_abi = true; 867 retval = rtc_register_device(cmos_rtc.rtc); 868 if (retval) 869 goto cleanup2; 870 871 /* export at least the first block of NVRAM */ 872 nvmem_cfg.size = address_space - NVRAM_OFFSET; 873 if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg)) 874 dev_err(dev, "nvmem registration failed\n"); 875 876 dev_info(dev, "%s%s, %d bytes nvram%s\n", 877 !is_valid_irq(rtc_irq) ? "no alarms" : 878 cmos_rtc.mon_alrm ? "alarms up to one year" : 879 cmos_rtc.day_alrm ? "alarms up to one month" : 880 "alarms up to one day", 881 cmos_rtc.century ? ", y3k" : "", 882 nvmem_cfg.size, 883 use_hpet_alarm() ? ", hpet irqs" : ""); 884 885 return 0; 886 887 cleanup2: 888 if (is_valid_irq(rtc_irq)) 889 free_irq(rtc_irq, cmos_rtc.rtc); 890 cleanup1: 891 cmos_rtc.dev = NULL; 892 cleanup0: 893 if (RTC_IOMAPPED) 894 release_region(ports->start, resource_size(ports)); 895 else 896 release_mem_region(ports->start, resource_size(ports)); 897 return retval; 898 } 899 900 static void cmos_do_shutdown(int rtc_irq) 901 { 902 spin_lock_irq(&rtc_lock); 903 if (is_valid_irq(rtc_irq)) 904 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 905 spin_unlock_irq(&rtc_lock); 906 } 907 908 static void cmos_do_remove(struct device *dev) 909 { 910 struct cmos_rtc *cmos = dev_get_drvdata(dev); 911 struct resource *ports; 912 913 cmos_do_shutdown(cmos->irq); 914 915 if (is_valid_irq(cmos->irq)) { 916 free_irq(cmos->irq, cmos->rtc); 917 if (use_hpet_alarm()) 918 hpet_unregister_irq_handler(cmos_interrupt); 919 } 920 921 cmos->rtc = NULL; 922 923 ports = cmos->iomem; 924 if (RTC_IOMAPPED) 925 release_region(ports->start, resource_size(ports)); 926 else 927 release_mem_region(ports->start, resource_size(ports)); 928 cmos->iomem = NULL; 929 930 cmos->dev = NULL; 931 } 932 933 static int cmos_aie_poweroff(struct device *dev) 934 { 935 struct cmos_rtc *cmos = dev_get_drvdata(dev); 936 struct rtc_time now; 937 time64_t t_now; 938 int retval = 0; 939 unsigned char rtc_control; 940 941 if (!cmos->alarm_expires) 942 return -EINVAL; 943 944 spin_lock_irq(&rtc_lock); 945 rtc_control = CMOS_READ(RTC_CONTROL); 946 spin_unlock_irq(&rtc_lock); 947 948 /* We only care about the situation where AIE is disabled. */ 949 if (rtc_control & RTC_AIE) 950 return -EBUSY; 951 952 cmos_read_time(dev, &now); 953 t_now = rtc_tm_to_time64(&now); 954 955 /* 956 * When enabling "RTC wake-up" in BIOS setup, the machine reboots 957 * automatically right after shutdown on some buggy boxes. 958 * This automatic rebooting issue won't happen when the alarm 959 * time is larger than now+1 seconds. 960 * 961 * If the alarm time is equal to now+1 seconds, the issue can be 962 * prevented by cancelling the alarm. 963 */ 964 if (cmos->alarm_expires == t_now + 1) { 965 struct rtc_wkalrm alarm; 966 967 /* Cancel the AIE timer by configuring the past time. */ 968 rtc_time64_to_tm(t_now - 1, &alarm.time); 969 alarm.enabled = 0; 970 retval = cmos_set_alarm(dev, &alarm); 971 } else if (cmos->alarm_expires > t_now + 1) { 972 retval = -EBUSY; 973 } 974 975 return retval; 976 } 977 978 static int cmos_suspend(struct device *dev) 979 { 980 struct cmos_rtc *cmos = dev_get_drvdata(dev); 981 unsigned char tmp; 982 983 /* only the alarm might be a wakeup event source */ 984 spin_lock_irq(&rtc_lock); 985 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 986 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 987 unsigned char mask; 988 989 if (device_may_wakeup(dev)) 990 mask = RTC_IRQMASK & ~RTC_AIE; 991 else 992 mask = RTC_IRQMASK; 993 tmp &= ~mask; 994 CMOS_WRITE(tmp, RTC_CONTROL); 995 if (use_hpet_alarm()) 996 hpet_mask_rtc_irq_bit(mask); 997 cmos_checkintr(cmos, tmp); 998 } 999 spin_unlock_irq(&rtc_lock); 1000 1001 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) { 1002 cmos->enabled_wake = 1; 1003 if (cmos->wake_on) 1004 cmos->wake_on(dev); 1005 else 1006 enable_irq_wake(cmos->irq); 1007 } 1008 1009 cmos_read_alarm(dev, &cmos->saved_wkalrm); 1010 1011 dev_dbg(dev, "suspend%s, ctrl %02x\n", 1012 (tmp & RTC_AIE) ? ", alarm may wake" : "", 1013 tmp); 1014 1015 return 0; 1016 } 1017 1018 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 1019 * after a detour through G3 "mechanical off", although the ACPI spec 1020 * says wakeup should only work from G1/S4 "hibernate". To most users, 1021 * distinctions between S4 and S5 are pointless. So when the hardware 1022 * allows, don't draw that distinction. 1023 */ 1024 static inline int cmos_poweroff(struct device *dev) 1025 { 1026 if (!IS_ENABLED(CONFIG_PM)) 1027 return -ENOSYS; 1028 1029 return cmos_suspend(dev); 1030 } 1031 1032 static void cmos_check_wkalrm(struct device *dev) 1033 { 1034 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1035 struct rtc_wkalrm current_alarm; 1036 time64_t t_now; 1037 time64_t t_current_expires; 1038 time64_t t_saved_expires; 1039 struct rtc_time now; 1040 1041 /* Check if we have RTC Alarm armed */ 1042 if (!(cmos->suspend_ctrl & RTC_AIE)) 1043 return; 1044 1045 cmos_read_time(dev, &now); 1046 t_now = rtc_tm_to_time64(&now); 1047 1048 /* 1049 * ACPI RTC wake event is cleared after resume from STR, 1050 * ACK the rtc irq here 1051 */ 1052 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) { 1053 cmos_interrupt(0, (void *)cmos->rtc); 1054 return; 1055 } 1056 1057 cmos_read_alarm(dev, ¤t_alarm); 1058 t_current_expires = rtc_tm_to_time64(¤t_alarm.time); 1059 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); 1060 if (t_current_expires != t_saved_expires || 1061 cmos->saved_wkalrm.enabled != current_alarm.enabled) { 1062 cmos_set_alarm(dev, &cmos->saved_wkalrm); 1063 } 1064 } 1065 1066 static void cmos_check_acpi_rtc_status(struct device *dev, 1067 unsigned char *rtc_control); 1068 1069 static int __maybe_unused cmos_resume(struct device *dev) 1070 { 1071 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1072 unsigned char tmp; 1073 1074 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) { 1075 if (cmos->wake_off) 1076 cmos->wake_off(dev); 1077 else 1078 disable_irq_wake(cmos->irq); 1079 cmos->enabled_wake = 0; 1080 } 1081 1082 /* The BIOS might have changed the alarm, restore it */ 1083 cmos_check_wkalrm(dev); 1084 1085 spin_lock_irq(&rtc_lock); 1086 tmp = cmos->suspend_ctrl; 1087 cmos->suspend_ctrl = 0; 1088 /* re-enable any irqs previously active */ 1089 if (tmp & RTC_IRQMASK) { 1090 unsigned char mask; 1091 1092 if (device_may_wakeup(dev) && use_hpet_alarm()) 1093 hpet_rtc_timer_init(); 1094 1095 do { 1096 CMOS_WRITE(tmp, RTC_CONTROL); 1097 if (use_hpet_alarm()) 1098 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 1099 1100 mask = CMOS_READ(RTC_INTR_FLAGS); 1101 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 1102 if (!use_hpet_alarm() || !is_intr(mask)) 1103 break; 1104 1105 /* force one-shot behavior if HPET blocked 1106 * the wake alarm's irq 1107 */ 1108 rtc_update_irq(cmos->rtc, 1, mask); 1109 tmp &= ~RTC_AIE; 1110 hpet_mask_rtc_irq_bit(RTC_AIE); 1111 } while (mask & RTC_AIE); 1112 1113 if (tmp & RTC_AIE) 1114 cmos_check_acpi_rtc_status(dev, &tmp); 1115 } 1116 spin_unlock_irq(&rtc_lock); 1117 1118 dev_dbg(dev, "resume, ctrl %02x\n", tmp); 1119 1120 return 0; 1121 } 1122 1123 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 1124 1125 /*----------------------------------------------------------------*/ 1126 1127 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 1128 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 1129 * probably list them in similar PNPBIOS tables; so PNP is more common. 1130 * 1131 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 1132 * predate even PNPBIOS should set up platform_bus devices. 1133 */ 1134 1135 #ifdef CONFIG_ACPI 1136 1137 #include <linux/acpi.h> 1138 1139 static u32 rtc_handler(void *context) 1140 { 1141 struct device *dev = context; 1142 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1143 unsigned char rtc_control = 0; 1144 unsigned char rtc_intr; 1145 unsigned long flags; 1146 1147 1148 /* 1149 * Always update rtc irq when ACPI is used as RTC Alarm. 1150 * Or else, ACPI SCI is enabled during suspend/resume only, 1151 * update rtc irq in that case. 1152 */ 1153 if (cmos_use_acpi_alarm()) 1154 cmos_interrupt(0, (void *)cmos->rtc); 1155 else { 1156 /* Fix me: can we use cmos_interrupt() here as well? */ 1157 spin_lock_irqsave(&rtc_lock, flags); 1158 if (cmos_rtc.suspend_ctrl) 1159 rtc_control = CMOS_READ(RTC_CONTROL); 1160 if (rtc_control & RTC_AIE) { 1161 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 1162 CMOS_WRITE(rtc_control, RTC_CONTROL); 1163 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 1164 rtc_update_irq(cmos->rtc, 1, rtc_intr); 1165 } 1166 spin_unlock_irqrestore(&rtc_lock, flags); 1167 } 1168 1169 pm_wakeup_hard_event(dev); 1170 acpi_clear_event(ACPI_EVENT_RTC); 1171 acpi_disable_event(ACPI_EVENT_RTC, 0); 1172 return ACPI_INTERRUPT_HANDLED; 1173 } 1174 1175 static inline void rtc_wake_setup(struct device *dev) 1176 { 1177 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 1178 /* 1179 * After the RTC handler is installed, the Fixed_RTC event should 1180 * be disabled. Only when the RTC alarm is set will it be enabled. 1181 */ 1182 acpi_clear_event(ACPI_EVENT_RTC); 1183 acpi_disable_event(ACPI_EVENT_RTC, 0); 1184 } 1185 1186 static void rtc_wake_on(struct device *dev) 1187 { 1188 acpi_clear_event(ACPI_EVENT_RTC); 1189 acpi_enable_event(ACPI_EVENT_RTC, 0); 1190 } 1191 1192 static void rtc_wake_off(struct device *dev) 1193 { 1194 acpi_disable_event(ACPI_EVENT_RTC, 0); 1195 } 1196 1197 #ifdef CONFIG_X86 1198 /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */ 1199 static void use_acpi_alarm_quirks(void) 1200 { 1201 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 1202 return; 1203 1204 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) 1205 return; 1206 1207 if (!is_hpet_enabled()) 1208 return; 1209 1210 if (dmi_get_bios_year() < 2015) 1211 return; 1212 1213 use_acpi_alarm = true; 1214 } 1215 #else 1216 static inline void use_acpi_alarm_quirks(void) { } 1217 #endif 1218 1219 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find 1220 * its device node and pass extra config data. This helps its driver use 1221 * capabilities that the now-obsolete mc146818 didn't have, and informs it 1222 * that this board's RTC is wakeup-capable (per ACPI spec). 1223 */ 1224 static struct cmos_rtc_board_info acpi_rtc_info; 1225 1226 static void cmos_wake_setup(struct device *dev) 1227 { 1228 if (acpi_disabled) 1229 return; 1230 1231 use_acpi_alarm_quirks(); 1232 1233 rtc_wake_setup(dev); 1234 acpi_rtc_info.wake_on = rtc_wake_on; 1235 acpi_rtc_info.wake_off = rtc_wake_off; 1236 1237 /* workaround bug in some ACPI tables */ 1238 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 1239 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 1240 acpi_gbl_FADT.month_alarm); 1241 acpi_gbl_FADT.month_alarm = 0; 1242 } 1243 1244 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; 1245 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; 1246 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; 1247 1248 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ 1249 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 1250 dev_info(dev, "RTC can wake from S4\n"); 1251 1252 dev->platform_data = &acpi_rtc_info; 1253 1254 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 1255 device_init_wakeup(dev, 1); 1256 } 1257 1258 static void cmos_check_acpi_rtc_status(struct device *dev, 1259 unsigned char *rtc_control) 1260 { 1261 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1262 acpi_event_status rtc_status; 1263 acpi_status status; 1264 1265 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 1266 return; 1267 1268 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 1269 if (ACPI_FAILURE(status)) { 1270 dev_err(dev, "Could not get RTC status\n"); 1271 } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 1272 unsigned char mask; 1273 *rtc_control &= ~RTC_AIE; 1274 CMOS_WRITE(*rtc_control, RTC_CONTROL); 1275 mask = CMOS_READ(RTC_INTR_FLAGS); 1276 rtc_update_irq(cmos->rtc, 1, mask); 1277 } 1278 } 1279 1280 #else 1281 1282 static void cmos_wake_setup(struct device *dev) 1283 { 1284 } 1285 1286 static void cmos_check_acpi_rtc_status(struct device *dev, 1287 unsigned char *rtc_control) 1288 { 1289 } 1290 1291 #endif 1292 1293 #ifdef CONFIG_PNP 1294 1295 #include <linux/pnp.h> 1296 1297 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1298 { 1299 cmos_wake_setup(&pnp->dev); 1300 1301 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { 1302 unsigned int irq = 0; 1303 #ifdef CONFIG_X86 1304 /* Some machines contain a PNP entry for the RTC, but 1305 * don't define the IRQ. It should always be safe to 1306 * hardcode it on systems with a legacy PIC. 1307 */ 1308 if (nr_legacy_irqs()) 1309 irq = RTC_IRQ; 1310 #endif 1311 return cmos_do_probe(&pnp->dev, 1312 pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1313 } else { 1314 return cmos_do_probe(&pnp->dev, 1315 pnp_get_resource(pnp, IORESOURCE_IO, 0), 1316 pnp_irq(pnp, 0)); 1317 } 1318 } 1319 1320 static void cmos_pnp_remove(struct pnp_dev *pnp) 1321 { 1322 cmos_do_remove(&pnp->dev); 1323 } 1324 1325 static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1326 { 1327 struct device *dev = &pnp->dev; 1328 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1329 1330 if (system_state == SYSTEM_POWER_OFF) { 1331 int retval = cmos_poweroff(dev); 1332 1333 if (cmos_aie_poweroff(dev) < 0 && !retval) 1334 return; 1335 } 1336 1337 cmos_do_shutdown(cmos->irq); 1338 } 1339 1340 static const struct pnp_device_id rtc_ids[] = { 1341 { .id = "PNP0b00", }, 1342 { .id = "PNP0b01", }, 1343 { .id = "PNP0b02", }, 1344 { }, 1345 }; 1346 MODULE_DEVICE_TABLE(pnp, rtc_ids); 1347 1348 static struct pnp_driver cmos_pnp_driver = { 1349 .name = driver_name, 1350 .id_table = rtc_ids, 1351 .probe = cmos_pnp_probe, 1352 .remove = cmos_pnp_remove, 1353 .shutdown = cmos_pnp_shutdown, 1354 1355 /* flag ensures resume() gets called, and stops syslog spam */ 1356 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1357 .driver = { 1358 .pm = &cmos_pm_ops, 1359 }, 1360 }; 1361 1362 #endif /* CONFIG_PNP */ 1363 1364 #ifdef CONFIG_OF 1365 static const struct of_device_id of_cmos_match[] = { 1366 { 1367 .compatible = "motorola,mc146818", 1368 }, 1369 { }, 1370 }; 1371 MODULE_DEVICE_TABLE(of, of_cmos_match); 1372 1373 static __init void cmos_of_init(struct platform_device *pdev) 1374 { 1375 struct device_node *node = pdev->dev.of_node; 1376 const __be32 *val; 1377 1378 if (!node) 1379 return; 1380 1381 val = of_get_property(node, "ctrl-reg", NULL); 1382 if (val) 1383 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); 1384 1385 val = of_get_property(node, "freq-reg", NULL); 1386 if (val) 1387 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); 1388 } 1389 #else 1390 static inline void cmos_of_init(struct platform_device *pdev) {} 1391 #endif 1392 /*----------------------------------------------------------------*/ 1393 1394 /* Platform setup should have set up an RTC device, when PNP is 1395 * unavailable ... this could happen even on (older) PCs. 1396 */ 1397 1398 static int __init cmos_platform_probe(struct platform_device *pdev) 1399 { 1400 struct resource *resource; 1401 int irq; 1402 1403 cmos_of_init(pdev); 1404 cmos_wake_setup(&pdev->dev); 1405 1406 if (RTC_IOMAPPED) 1407 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); 1408 else 1409 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1410 irq = platform_get_irq(pdev, 0); 1411 if (irq < 0) 1412 irq = -1; 1413 1414 return cmos_do_probe(&pdev->dev, resource, irq); 1415 } 1416 1417 static int cmos_platform_remove(struct platform_device *pdev) 1418 { 1419 cmos_do_remove(&pdev->dev); 1420 return 0; 1421 } 1422 1423 static void cmos_platform_shutdown(struct platform_device *pdev) 1424 { 1425 struct device *dev = &pdev->dev; 1426 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1427 1428 if (system_state == SYSTEM_POWER_OFF) { 1429 int retval = cmos_poweroff(dev); 1430 1431 if (cmos_aie_poweroff(dev) < 0 && !retval) 1432 return; 1433 } 1434 1435 cmos_do_shutdown(cmos->irq); 1436 } 1437 1438 /* work with hotplug and coldplug */ 1439 MODULE_ALIAS("platform:rtc_cmos"); 1440 1441 static struct platform_driver cmos_platform_driver = { 1442 .remove = cmos_platform_remove, 1443 .shutdown = cmos_platform_shutdown, 1444 .driver = { 1445 .name = driver_name, 1446 .pm = &cmos_pm_ops, 1447 .of_match_table = of_match_ptr(of_cmos_match), 1448 } 1449 }; 1450 1451 #ifdef CONFIG_PNP 1452 static bool pnp_driver_registered; 1453 #endif 1454 static bool platform_driver_registered; 1455 1456 static int __init cmos_init(void) 1457 { 1458 int retval = 0; 1459 1460 #ifdef CONFIG_PNP 1461 retval = pnp_register_driver(&cmos_pnp_driver); 1462 if (retval == 0) 1463 pnp_driver_registered = true; 1464 #endif 1465 1466 if (!cmos_rtc.dev) { 1467 retval = platform_driver_probe(&cmos_platform_driver, 1468 cmos_platform_probe); 1469 if (retval == 0) 1470 platform_driver_registered = true; 1471 } 1472 1473 if (retval == 0) 1474 return 0; 1475 1476 #ifdef CONFIG_PNP 1477 if (pnp_driver_registered) 1478 pnp_unregister_driver(&cmos_pnp_driver); 1479 #endif 1480 return retval; 1481 } 1482 module_init(cmos_init); 1483 1484 static void __exit cmos_exit(void) 1485 { 1486 #ifdef CONFIG_PNP 1487 if (pnp_driver_registered) 1488 pnp_unregister_driver(&cmos_pnp_driver); 1489 #endif 1490 if (platform_driver_registered) 1491 platform_driver_unregister(&cmos_platform_driver); 1492 } 1493 module_exit(cmos_exit); 1494 1495 1496 MODULE_AUTHOR("David Brownell"); 1497 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1498 MODULE_LICENSE("GPL"); 1499