1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Delta TN48M CPLD reset driver 4 * 5 * Copyright (C) 2021 Sartura Ltd. 6 * 7 * Author: Robert Marko <robert.marko@sartura.hr> 8 */ 9 10 #include <linux/device.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/platform_device.h> 14 #include <linux/regmap.h> 15 #include <linux/reset-controller.h> 16 17 #include <dt-bindings/reset/delta,tn48m-reset.h> 18 19 #define TN48M_RESET_REG 0x10 20 21 #define TN48M_RESET_TIMEOUT_US 125000 22 #define TN48M_RESET_SLEEP_US 10 23 24 struct tn48_reset_map { 25 u8 bit; 26 }; 27 28 struct tn48_reset_data { 29 struct reset_controller_dev rcdev; 30 struct regmap *regmap; 31 }; 32 33 static const struct tn48_reset_map tn48m_resets[] = { 34 [CPU_88F7040_RESET] = {0}, 35 [CPU_88F6820_RESET] = {1}, 36 [MAC_98DX3265_RESET] = {2}, 37 [PHY_88E1680_RESET] = {4}, 38 [PHY_88E1512_RESET] = {6}, 39 [POE_RESET] = {7}, 40 }; 41 42 static inline struct tn48_reset_data *to_tn48_reset_data( 43 struct reset_controller_dev *rcdev) 44 { 45 return container_of(rcdev, struct tn48_reset_data, rcdev); 46 } 47 48 static int tn48m_control_reset(struct reset_controller_dev *rcdev, 49 unsigned long id) 50 { 51 struct tn48_reset_data *data = to_tn48_reset_data(rcdev); 52 unsigned int val; 53 54 regmap_update_bits(data->regmap, TN48M_RESET_REG, 55 BIT(tn48m_resets[id].bit), 0); 56 57 return regmap_read_poll_timeout(data->regmap, 58 TN48M_RESET_REG, 59 val, 60 val & BIT(tn48m_resets[id].bit), 61 TN48M_RESET_SLEEP_US, 62 TN48M_RESET_TIMEOUT_US); 63 } 64 65 static int tn48m_control_status(struct reset_controller_dev *rcdev, 66 unsigned long id) 67 { 68 struct tn48_reset_data *data = to_tn48_reset_data(rcdev); 69 unsigned int regval; 70 int ret; 71 72 ret = regmap_read(data->regmap, TN48M_RESET_REG, ®val); 73 if (ret < 0) 74 return ret; 75 76 if (BIT(tn48m_resets[id].bit) & regval) 77 return 0; 78 else 79 return 1; 80 } 81 82 static const struct reset_control_ops tn48_reset_ops = { 83 .reset = tn48m_control_reset, 84 .status = tn48m_control_status, 85 }; 86 87 static int tn48m_reset_probe(struct platform_device *pdev) 88 { 89 struct tn48_reset_data *data; 90 struct regmap *regmap; 91 92 regmap = dev_get_regmap(pdev->dev.parent, NULL); 93 if (!regmap) 94 return -ENODEV; 95 96 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 97 if (!data) 98 return -ENOMEM; 99 100 data->regmap = regmap; 101 102 data->rcdev.owner = THIS_MODULE; 103 data->rcdev.ops = &tn48_reset_ops; 104 data->rcdev.nr_resets = ARRAY_SIZE(tn48m_resets); 105 data->rcdev.of_node = pdev->dev.of_node; 106 107 return devm_reset_controller_register(&pdev->dev, &data->rcdev); 108 } 109 110 static const struct of_device_id tn48m_reset_of_match[] = { 111 { .compatible = "delta,tn48m-reset" }, 112 { } 113 }; 114 MODULE_DEVICE_TABLE(of, tn48m_reset_of_match); 115 116 static struct platform_driver tn48m_reset_driver = { 117 .driver = { 118 .name = "delta-tn48m-reset", 119 .of_match_table = tn48m_reset_of_match, 120 }, 121 .probe = tn48m_reset_probe, 122 }; 123 module_platform_driver(tn48m_reset_driver); 124 125 MODULE_AUTHOR("Robert Marko <robert.marko@sartura.hr>"); 126 MODULE_DESCRIPTION("Delta TN48M CPLD reset driver"); 127 MODULE_LICENSE("GPL"); 128