1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Renesas RZ/G2L USBPHY control driver
4 *
5 * Copyright (C) 2021 Renesas Electronics Corporation
6 */
7
8 #include <linux/io.h>
9 #include <linux/module.h>
10 #include <linux/of.h>
11 #include <linux/platform_device.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/regmap.h>
14 #include <linux/reset.h>
15 #include <linux/reset-controller.h>
16
17 #define RESET 0x000
18 #define VBENCTL 0x03c
19
20 #define RESET_SEL_PLLRESET BIT(12)
21 #define RESET_PLLRESET BIT(8)
22
23 #define RESET_SEL_P2RESET BIT(5)
24 #define RESET_SEL_P1RESET BIT(4)
25 #define RESET_PHYRST_2 BIT(1)
26 #define RESET_PHYRST_1 BIT(0)
27
28 #define PHY_RESET_PORT2 (RESET_SEL_P2RESET | RESET_PHYRST_2)
29 #define PHY_RESET_PORT1 (RESET_SEL_P1RESET | RESET_PHYRST_1)
30
31 #define NUM_PORTS 2
32
33 struct rzg2l_usbphy_ctrl_priv {
34 struct reset_controller_dev rcdev;
35 struct reset_control *rstc;
36 void __iomem *base;
37 struct platform_device *vdev;
38
39 spinlock_t lock;
40 };
41
42 #define rcdev_to_priv(x) container_of(x, struct rzg2l_usbphy_ctrl_priv, rcdev)
43
rzg2l_usbphy_ctrl_assert(struct reset_controller_dev * rcdev,unsigned long id)44 static int rzg2l_usbphy_ctrl_assert(struct reset_controller_dev *rcdev,
45 unsigned long id)
46 {
47 struct rzg2l_usbphy_ctrl_priv *priv = rcdev_to_priv(rcdev);
48 u32 port_mask = PHY_RESET_PORT1 | PHY_RESET_PORT2;
49 void __iomem *base = priv->base;
50 unsigned long flags;
51 u32 val;
52
53 spin_lock_irqsave(&priv->lock, flags);
54 val = readl(base + RESET);
55 val |= id ? PHY_RESET_PORT2 : PHY_RESET_PORT1;
56 if (port_mask == (val & port_mask))
57 val |= RESET_PLLRESET;
58 writel(val, base + RESET);
59 spin_unlock_irqrestore(&priv->lock, flags);
60
61 return 0;
62 }
63
rzg2l_usbphy_ctrl_deassert(struct reset_controller_dev * rcdev,unsigned long id)64 static int rzg2l_usbphy_ctrl_deassert(struct reset_controller_dev *rcdev,
65 unsigned long id)
66 {
67 struct rzg2l_usbphy_ctrl_priv *priv = rcdev_to_priv(rcdev);
68 void __iomem *base = priv->base;
69 unsigned long flags;
70 u32 val;
71
72 spin_lock_irqsave(&priv->lock, flags);
73 val = readl(base + RESET);
74
75 val |= RESET_SEL_PLLRESET;
76 val &= ~(RESET_PLLRESET | (id ? PHY_RESET_PORT2 : PHY_RESET_PORT1));
77 writel(val, base + RESET);
78 spin_unlock_irqrestore(&priv->lock, flags);
79
80 return 0;
81 }
82
rzg2l_usbphy_ctrl_status(struct reset_controller_dev * rcdev,unsigned long id)83 static int rzg2l_usbphy_ctrl_status(struct reset_controller_dev *rcdev,
84 unsigned long id)
85 {
86 struct rzg2l_usbphy_ctrl_priv *priv = rcdev_to_priv(rcdev);
87 u32 port_mask;
88
89 port_mask = id ? PHY_RESET_PORT2 : PHY_RESET_PORT1;
90
91 return !!(readl(priv->base + RESET) & port_mask);
92 }
93
94 static const struct of_device_id rzg2l_usbphy_ctrl_match_table[] = {
95 { .compatible = "renesas,rzg2l-usbphy-ctrl" },
96 { /* Sentinel */ }
97 };
98 MODULE_DEVICE_TABLE(of, rzg2l_usbphy_ctrl_match_table);
99
100 static const struct reset_control_ops rzg2l_usbphy_ctrl_reset_ops = {
101 .assert = rzg2l_usbphy_ctrl_assert,
102 .deassert = rzg2l_usbphy_ctrl_deassert,
103 .status = rzg2l_usbphy_ctrl_status,
104 };
105
106 static const struct regmap_config rzg2l_usb_regconf = {
107 .reg_bits = 32,
108 .val_bits = 32,
109 .reg_stride = 4,
110 .max_register = 1,
111 };
112
rzg2l_usbphy_ctrl_probe(struct platform_device * pdev)113 static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev)
114 {
115 struct device *dev = &pdev->dev;
116 struct rzg2l_usbphy_ctrl_priv *priv;
117 struct platform_device *vdev;
118 struct regmap *regmap;
119 unsigned long flags;
120 int error;
121 u32 val;
122
123 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
124 if (!priv)
125 return -ENOMEM;
126
127 priv->base = devm_platform_ioremap_resource(pdev, 0);
128 if (IS_ERR(priv->base))
129 return PTR_ERR(priv->base);
130
131 regmap = devm_regmap_init_mmio(dev, priv->base + VBENCTL, &rzg2l_usb_regconf);
132 if (IS_ERR(regmap))
133 return PTR_ERR(regmap);
134
135 priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
136 if (IS_ERR(priv->rstc))
137 return dev_err_probe(dev, PTR_ERR(priv->rstc),
138 "failed to get reset\n");
139
140 error = reset_control_deassert(priv->rstc);
141 if (error)
142 return error;
143
144 spin_lock_init(&priv->lock);
145 dev_set_drvdata(dev, priv);
146
147 pm_runtime_enable(&pdev->dev);
148 error = pm_runtime_resume_and_get(&pdev->dev);
149 if (error < 0) {
150 dev_err_probe(&pdev->dev, error, "pm_runtime_resume_and_get failed");
151 goto err_pm_disable_reset_deassert;
152 }
153
154 /* put pll and phy into reset state */
155 spin_lock_irqsave(&priv->lock, flags);
156 val = readl(priv->base + RESET);
157 val |= RESET_SEL_PLLRESET | RESET_PLLRESET | PHY_RESET_PORT2 | PHY_RESET_PORT1;
158 writel(val, priv->base + RESET);
159 spin_unlock_irqrestore(&priv->lock, flags);
160
161 priv->rcdev.ops = &rzg2l_usbphy_ctrl_reset_ops;
162 priv->rcdev.of_reset_n_cells = 1;
163 priv->rcdev.nr_resets = NUM_PORTS;
164 priv->rcdev.of_node = dev->of_node;
165 priv->rcdev.dev = dev;
166
167 error = devm_reset_controller_register(dev, &priv->rcdev);
168 if (error)
169 goto err_pm_runtime_put;
170
171 vdev = platform_device_alloc("rzg2l-usb-vbus-regulator", pdev->id);
172 if (!vdev) {
173 error = -ENOMEM;
174 goto err_pm_runtime_put;
175 }
176 vdev->dev.parent = dev;
177 priv->vdev = vdev;
178
179 error = platform_device_add(vdev);
180 if (error)
181 goto err_device_put;
182
183 return 0;
184
185 err_device_put:
186 platform_device_put(vdev);
187 err_pm_runtime_put:
188 pm_runtime_put(&pdev->dev);
189 err_pm_disable_reset_deassert:
190 pm_runtime_disable(&pdev->dev);
191 reset_control_assert(priv->rstc);
192 return error;
193 }
194
rzg2l_usbphy_ctrl_remove(struct platform_device * pdev)195 static void rzg2l_usbphy_ctrl_remove(struct platform_device *pdev)
196 {
197 struct rzg2l_usbphy_ctrl_priv *priv = dev_get_drvdata(&pdev->dev);
198
199 platform_device_unregister(priv->vdev);
200 pm_runtime_put(&pdev->dev);
201 pm_runtime_disable(&pdev->dev);
202 reset_control_assert(priv->rstc);
203 }
204
205 static struct platform_driver rzg2l_usbphy_ctrl_driver = {
206 .driver = {
207 .name = "rzg2l_usbphy_ctrl",
208 .of_match_table = rzg2l_usbphy_ctrl_match_table,
209 },
210 .probe = rzg2l_usbphy_ctrl_probe,
211 .remove_new = rzg2l_usbphy_ctrl_remove,
212 };
213 module_platform_driver(rzg2l_usbphy_ctrl_driver);
214
215 MODULE_LICENSE("GPL v2");
216 MODULE_DESCRIPTION("Renesas RZ/G2L USBPHY Control");
217 MODULE_AUTHOR("biju.das.jz@bp.renesas.com>");
218