1453ed428SSteen Hegelund // SPDX-License-Identifier: GPL-2.0+
2453ed428SSteen Hegelund /* Microchip Sparx5 Switch Reset driver
3453ed428SSteen Hegelund *
4453ed428SSteen Hegelund * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
5453ed428SSteen Hegelund *
6453ed428SSteen Hegelund * The Sparx5 Chip Register Model can be browsed at this location:
7453ed428SSteen Hegelund * https://github.com/microchip-ung/sparx-5_reginfo
8453ed428SSteen Hegelund */
9453ed428SSteen Hegelund #include <linux/mfd/syscon.h>
10*bad8a8afSRob Herring #include <linux/of.h>
11453ed428SSteen Hegelund #include <linux/module.h>
12453ed428SSteen Hegelund #include <linux/platform_device.h>
13*bad8a8afSRob Herring #include <linux/property.h>
14453ed428SSteen Hegelund #include <linux/regmap.h>
15453ed428SSteen Hegelund #include <linux/reset-controller.h>
16453ed428SSteen Hegelund
178c81620aSHoratiu Vultur struct reset_props {
188c81620aSHoratiu Vultur u32 protect_reg;
198c81620aSHoratiu Vultur u32 protect_bit;
208c81620aSHoratiu Vultur u32 reset_reg;
218c81620aSHoratiu Vultur u32 reset_bit;
228c81620aSHoratiu Vultur };
23453ed428SSteen Hegelund
24453ed428SSteen Hegelund struct mchp_reset_context {
25453ed428SSteen Hegelund struct regmap *cpu_ctrl;
26453ed428SSteen Hegelund struct regmap *gcb_ctrl;
27453ed428SSteen Hegelund struct reset_controller_dev rcdev;
288c81620aSHoratiu Vultur const struct reset_props *props;
29453ed428SSteen Hegelund };
30453ed428SSteen Hegelund
31453ed428SSteen Hegelund static struct regmap_config sparx5_reset_regmap_config = {
32453ed428SSteen Hegelund .reg_bits = 32,
33453ed428SSteen Hegelund .val_bits = 32,
34453ed428SSteen Hegelund .reg_stride = 4,
35453ed428SSteen Hegelund };
36453ed428SSteen Hegelund
sparx5_switch_reset(struct mchp_reset_context * ctx)3751fd1914SMichael Walle static int sparx5_switch_reset(struct mchp_reset_context *ctx)
38453ed428SSteen Hegelund {
39453ed428SSteen Hegelund u32 val;
40453ed428SSteen Hegelund
41453ed428SSteen Hegelund /* Make sure the core is PROTECTED from reset */
428c81620aSHoratiu Vultur regmap_update_bits(ctx->cpu_ctrl, ctx->props->protect_reg,
438c81620aSHoratiu Vultur ctx->props->protect_bit, ctx->props->protect_bit);
44453ed428SSteen Hegelund
45453ed428SSteen Hegelund /* Start soft reset */
468c81620aSHoratiu Vultur regmap_write(ctx->gcb_ctrl, ctx->props->reset_reg,
478c81620aSHoratiu Vultur ctx->props->reset_bit);
48453ed428SSteen Hegelund
49453ed428SSteen Hegelund /* Wait for soft reset done */
508c81620aSHoratiu Vultur return regmap_read_poll_timeout(ctx->gcb_ctrl, ctx->props->reset_reg, val,
518c81620aSHoratiu Vultur (val & ctx->props->reset_bit) == 0,
52453ed428SSteen Hegelund 1, 100);
53453ed428SSteen Hegelund }
54453ed428SSteen Hegelund
sparx5_reset_noop(struct reset_controller_dev * rcdev,unsigned long id)5551fd1914SMichael Walle static int sparx5_reset_noop(struct reset_controller_dev *rcdev,
5651fd1914SMichael Walle unsigned long id)
5751fd1914SMichael Walle {
5851fd1914SMichael Walle return 0;
5951fd1914SMichael Walle }
6051fd1914SMichael Walle
61453ed428SSteen Hegelund static const struct reset_control_ops sparx5_reset_ops = {
6251fd1914SMichael Walle .reset = sparx5_reset_noop,
63453ed428SSteen Hegelund };
64453ed428SSteen Hegelund
mchp_sparx5_map_syscon(struct platform_device * pdev,char * name,struct regmap ** target)65453ed428SSteen Hegelund static int mchp_sparx5_map_syscon(struct platform_device *pdev, char *name,
66453ed428SSteen Hegelund struct regmap **target)
67453ed428SSteen Hegelund {
68453ed428SSteen Hegelund struct device_node *syscon_np;
69453ed428SSteen Hegelund struct regmap *regmap;
70453ed428SSteen Hegelund int err;
71453ed428SSteen Hegelund
72453ed428SSteen Hegelund syscon_np = of_parse_phandle(pdev->dev.of_node, name, 0);
73453ed428SSteen Hegelund if (!syscon_np)
74453ed428SSteen Hegelund return -ENODEV;
75453ed428SSteen Hegelund regmap = syscon_node_to_regmap(syscon_np);
76453ed428SSteen Hegelund of_node_put(syscon_np);
77453ed428SSteen Hegelund if (IS_ERR(regmap)) {
78453ed428SSteen Hegelund err = PTR_ERR(regmap);
79453ed428SSteen Hegelund dev_err(&pdev->dev, "No '%s' map: %d\n", name, err);
80453ed428SSteen Hegelund return err;
81453ed428SSteen Hegelund }
82453ed428SSteen Hegelund *target = regmap;
83453ed428SSteen Hegelund return 0;
84453ed428SSteen Hegelund }
85453ed428SSteen Hegelund
mchp_sparx5_map_io(struct platform_device * pdev,int index,struct regmap ** target)86453ed428SSteen Hegelund static int mchp_sparx5_map_io(struct platform_device *pdev, int index,
87453ed428SSteen Hegelund struct regmap **target)
88453ed428SSteen Hegelund {
89453ed428SSteen Hegelund struct resource *res;
90453ed428SSteen Hegelund struct regmap *map;
91453ed428SSteen Hegelund void __iomem *mem;
92453ed428SSteen Hegelund
93453ed428SSteen Hegelund mem = devm_platform_get_and_ioremap_resource(pdev, index, &res);
9491105ed6SWei Yongjun if (IS_ERR(mem)) {
95453ed428SSteen Hegelund dev_err(&pdev->dev, "Could not map resource %d\n", index);
9691105ed6SWei Yongjun return PTR_ERR(mem);
97453ed428SSteen Hegelund }
98453ed428SSteen Hegelund sparx5_reset_regmap_config.name = res->name;
99453ed428SSteen Hegelund map = devm_regmap_init_mmio(&pdev->dev, mem, &sparx5_reset_regmap_config);
100453ed428SSteen Hegelund if (IS_ERR(map))
101453ed428SSteen Hegelund return PTR_ERR(map);
102453ed428SSteen Hegelund *target = map;
103453ed428SSteen Hegelund return 0;
104453ed428SSteen Hegelund }
105453ed428SSteen Hegelund
mchp_sparx5_reset_probe(struct platform_device * pdev)106453ed428SSteen Hegelund static int mchp_sparx5_reset_probe(struct platform_device *pdev)
107453ed428SSteen Hegelund {
108453ed428SSteen Hegelund struct device_node *dn = pdev->dev.of_node;
109453ed428SSteen Hegelund struct mchp_reset_context *ctx;
110453ed428SSteen Hegelund int err;
111453ed428SSteen Hegelund
112453ed428SSteen Hegelund ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
113453ed428SSteen Hegelund if (!ctx)
114453ed428SSteen Hegelund return -ENOMEM;
115453ed428SSteen Hegelund
116453ed428SSteen Hegelund err = mchp_sparx5_map_syscon(pdev, "cpu-syscon", &ctx->cpu_ctrl);
117453ed428SSteen Hegelund if (err)
118453ed428SSteen Hegelund return err;
119453ed428SSteen Hegelund err = mchp_sparx5_map_io(pdev, 0, &ctx->gcb_ctrl);
120453ed428SSteen Hegelund if (err)
121453ed428SSteen Hegelund return err;
122453ed428SSteen Hegelund
123453ed428SSteen Hegelund ctx->rcdev.owner = THIS_MODULE;
124453ed428SSteen Hegelund ctx->rcdev.nr_resets = 1;
125453ed428SSteen Hegelund ctx->rcdev.ops = &sparx5_reset_ops;
126453ed428SSteen Hegelund ctx->rcdev.of_node = dn;
1278c81620aSHoratiu Vultur ctx->props = device_get_match_data(&pdev->dev);
128453ed428SSteen Hegelund
12951fd1914SMichael Walle /* Issue the reset very early, our actual reset callback is a noop. */
13051fd1914SMichael Walle err = sparx5_switch_reset(ctx);
13151fd1914SMichael Walle if (err)
13251fd1914SMichael Walle return err;
13351fd1914SMichael Walle
134453ed428SSteen Hegelund return devm_reset_controller_register(&pdev->dev, &ctx->rcdev);
135453ed428SSteen Hegelund }
136453ed428SSteen Hegelund
1378c81620aSHoratiu Vultur static const struct reset_props reset_props_sparx5 = {
1388c81620aSHoratiu Vultur .protect_reg = 0x84,
1398c81620aSHoratiu Vultur .protect_bit = BIT(10),
1408c81620aSHoratiu Vultur .reset_reg = 0x0,
1418c81620aSHoratiu Vultur .reset_bit = BIT(1),
1428c81620aSHoratiu Vultur };
1438c81620aSHoratiu Vultur
1448c81620aSHoratiu Vultur static const struct reset_props reset_props_lan966x = {
1458c81620aSHoratiu Vultur .protect_reg = 0x88,
1468c81620aSHoratiu Vultur .protect_bit = BIT(5),
1478c81620aSHoratiu Vultur .reset_reg = 0x0,
1488c81620aSHoratiu Vultur .reset_bit = BIT(1),
1498c81620aSHoratiu Vultur };
1508c81620aSHoratiu Vultur
151453ed428SSteen Hegelund static const struct of_device_id mchp_sparx5_reset_of_match[] = {
152453ed428SSteen Hegelund {
153453ed428SSteen Hegelund .compatible = "microchip,sparx5-switch-reset",
1548c81620aSHoratiu Vultur .data = &reset_props_sparx5,
1558c81620aSHoratiu Vultur }, {
1568c81620aSHoratiu Vultur .compatible = "microchip,lan966x-switch-reset",
1578c81620aSHoratiu Vultur .data = &reset_props_lan966x,
158453ed428SSteen Hegelund },
159453ed428SSteen Hegelund { }
160453ed428SSteen Hegelund };
161453ed428SSteen Hegelund
162453ed428SSteen Hegelund static struct platform_driver mchp_sparx5_reset_driver = {
163453ed428SSteen Hegelund .probe = mchp_sparx5_reset_probe,
164453ed428SSteen Hegelund .driver = {
165453ed428SSteen Hegelund .name = "sparx5-switch-reset",
166453ed428SSteen Hegelund .of_match_table = mchp_sparx5_reset_of_match,
167453ed428SSteen Hegelund },
168453ed428SSteen Hegelund };
169453ed428SSteen Hegelund
mchp_sparx5_reset_init(void)170453ed428SSteen Hegelund static int __init mchp_sparx5_reset_init(void)
171453ed428SSteen Hegelund {
172453ed428SSteen Hegelund return platform_driver_register(&mchp_sparx5_reset_driver);
173453ed428SSteen Hegelund }
174453ed428SSteen Hegelund
17551fd1914SMichael Walle /*
17651fd1914SMichael Walle * Because this is a global reset, keep this postcore_initcall() to issue the
17751fd1914SMichael Walle * reset as early as possible during the kernel startup.
17851fd1914SMichael Walle */
179453ed428SSteen Hegelund postcore_initcall(mchp_sparx5_reset_init);
180453ed428SSteen Hegelund
181453ed428SSteen Hegelund MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver");
182453ed428SSteen Hegelund MODULE_AUTHOR("Steen Hegelund <steen.hegelund@microchip.com>");
183