1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * AR71xx Reset Controller Driver 4 * Author: Alban Bedel 5 * 6 * Copyright (C) 2015 Alban Bedel <albeu@free.fr> 7 */ 8 9 #include <linux/io.h> 10 #include <linux/init.h> 11 #include <linux/platform_device.h> 12 #include <linux/reset-controller.h> 13 #include <linux/reboot.h> 14 15 struct ath79_reset { 16 struct reset_controller_dev rcdev; 17 void __iomem *base; 18 spinlock_t lock; 19 }; 20 21 #define FULL_CHIP_RESET 24 22 23 static int ath79_reset_update(struct reset_controller_dev *rcdev, 24 unsigned long id, bool assert) 25 { 26 struct ath79_reset *ath79_reset = 27 container_of(rcdev, struct ath79_reset, rcdev); 28 unsigned long flags; 29 u32 val; 30 31 spin_lock_irqsave(&ath79_reset->lock, flags); 32 val = readl(ath79_reset->base); 33 if (assert) 34 val |= BIT(id); 35 else 36 val &= ~BIT(id); 37 writel(val, ath79_reset->base); 38 spin_unlock_irqrestore(&ath79_reset->lock, flags); 39 40 return 0; 41 } 42 43 static int ath79_reset_assert(struct reset_controller_dev *rcdev, 44 unsigned long id) 45 { 46 return ath79_reset_update(rcdev, id, true); 47 } 48 49 static int ath79_reset_deassert(struct reset_controller_dev *rcdev, 50 unsigned long id) 51 { 52 return ath79_reset_update(rcdev, id, false); 53 } 54 55 static int ath79_reset_status(struct reset_controller_dev *rcdev, 56 unsigned long id) 57 { 58 struct ath79_reset *ath79_reset = 59 container_of(rcdev, struct ath79_reset, rcdev); 60 u32 val; 61 62 val = readl(ath79_reset->base); 63 64 return !!(val & BIT(id)); 65 } 66 67 static const struct reset_control_ops ath79_reset_ops = { 68 .assert = ath79_reset_assert, 69 .deassert = ath79_reset_deassert, 70 .status = ath79_reset_status, 71 }; 72 73 static int ath79_reset_restart_handler(struct sys_off_data *data) 74 { 75 struct ath79_reset *ath79_reset = data->cb_data; 76 77 ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET); 78 79 return NOTIFY_DONE; 80 } 81 82 static int ath79_reset_probe(struct platform_device *pdev) 83 { 84 struct ath79_reset *ath79_reset; 85 int err; 86 87 ath79_reset = devm_kzalloc_obj(&pdev->dev, *ath79_reset); 88 if (!ath79_reset) 89 return -ENOMEM; 90 91 ath79_reset->base = devm_platform_ioremap_resource(pdev, 0); 92 if (IS_ERR(ath79_reset->base)) 93 return PTR_ERR(ath79_reset->base); 94 95 spin_lock_init(&ath79_reset->lock); 96 ath79_reset->rcdev.ops = &ath79_reset_ops; 97 ath79_reset->rcdev.owner = THIS_MODULE; 98 ath79_reset->rcdev.of_node = pdev->dev.of_node; 99 ath79_reset->rcdev.of_reset_n_cells = 1; 100 ath79_reset->rcdev.nr_resets = 32; 101 102 err = devm_reset_controller_register(&pdev->dev, &ath79_reset->rcdev); 103 if (err) 104 return err; 105 106 err = devm_register_restart_handler(&pdev->dev, ath79_reset_restart_handler, ath79_reset); 107 if (err) 108 dev_warn(&pdev->dev, "Failed to register restart handler\n"); 109 110 return 0; 111 } 112 113 static const struct of_device_id ath79_reset_dt_ids[] = { 114 { .compatible = "qca,ar7100-reset", }, 115 { }, 116 }; 117 118 static struct platform_driver ath79_reset_driver = { 119 .probe = ath79_reset_probe, 120 .driver = { 121 .name = "ath79-reset", 122 .of_match_table = ath79_reset_dt_ids, 123 .suppress_bind_attrs = true, 124 }, 125 }; 126 builtin_platform_driver(ath79_reset_driver); 127