1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ZynqMP R5 Remote Processor driver 4 * 5 */ 6 7 #include <dt-bindings/power/xlnx-zynqmp-power.h> 8 #include <linux/dma-mapping.h> 9 #include <linux/firmware/xlnx-zynqmp.h> 10 #include <linux/kernel.h> 11 #include <linux/mailbox_client.h> 12 #include <linux/mailbox/zynqmp-ipi-message.h> 13 #include <linux/module.h> 14 #include <linux/of_address.h> 15 #include <linux/of_platform.h> 16 #include <linux/of_reserved_mem.h> 17 #include <linux/platform_device.h> 18 #include <linux/remoteproc.h> 19 20 #include "remoteproc_internal.h" 21 22 /* IPI buffer MAX length */ 23 #define IPI_BUF_LEN_MAX 32U 24 25 /* RX mailbox client buffer max length */ 26 #define MBOX_CLIENT_BUF_MAX (IPI_BUF_LEN_MAX + \ 27 sizeof(struct zynqmp_ipi_message)) 28 29 #define RSC_TBL_XLNX_MAGIC ((uint32_t)'x' << 24 | (uint32_t)'a' << 16 | \ 30 (uint32_t)'m' << 8 | (uint32_t)'p') 31 32 /* 33 * settings for RPU cluster mode which 34 * reflects possible values of xlnx,cluster-mode dt-property 35 */ 36 enum zynqmp_r5_cluster_mode { 37 SPLIT_MODE = 0, /* When cores run as separate processor */ 38 LOCKSTEP_MODE = 1, /* cores execute same code in lockstep,clk-for-clk */ 39 SINGLE_CPU_MODE = 2, /* core0 is held in reset and only core1 runs */ 40 }; 41 42 /** 43 * struct mem_bank_data - Memory Bank description 44 * 45 * @addr: Start address of memory bank 46 * @da: device address 47 * @size: Size of Memory bank 48 * @pm_domain_id: Power-domains id of memory bank for firmware to turn on/off 49 * @bank_name: name of the bank for remoteproc framework 50 */ 51 struct mem_bank_data { 52 phys_addr_t addr; 53 u32 da; 54 size_t size; 55 u32 pm_domain_id; 56 char *bank_name; 57 }; 58 59 /** 60 * struct zynqmp_sram_bank - sram bank description 61 * 62 * @sram_res: sram address region information 63 * @da: device address of sram 64 */ 65 struct zynqmp_sram_bank { 66 struct resource sram_res; 67 u32 da; 68 }; 69 70 /** 71 * struct mbox_info 72 * 73 * @rx_mc_buf: to copy data from mailbox rx channel 74 * @tx_mc_buf: to copy data to mailbox tx channel 75 * @r5_core: this mailbox's corresponding r5_core pointer 76 * @mbox_work: schedule work after receiving data from mailbox 77 * @mbox_cl: mailbox client 78 * @tx_chan: mailbox tx channel 79 * @rx_chan: mailbox rx channel 80 */ 81 struct mbox_info { 82 unsigned char rx_mc_buf[MBOX_CLIENT_BUF_MAX]; 83 unsigned char tx_mc_buf[MBOX_CLIENT_BUF_MAX]; 84 struct zynqmp_r5_core *r5_core; 85 struct work_struct mbox_work; 86 struct mbox_client mbox_cl; 87 struct mbox_chan *tx_chan; 88 struct mbox_chan *rx_chan; 89 }; 90 91 /** 92 * struct rsc_tbl_data 93 * 94 * Platform specific data structure used to sync resource table address. 95 * It's important to maintain order and size of each field on remote side. 96 * 97 * @version: version of data structure 98 * @magic_num: 32-bit magic number. 99 * @comp_magic_num: complement of above magic number 100 * @rsc_tbl_size: resource table size 101 * @rsc_tbl: resource table address 102 */ 103 struct rsc_tbl_data { 104 const int version; 105 const u32 magic_num; 106 const u32 comp_magic_num; 107 const u32 rsc_tbl_size; 108 const uintptr_t rsc_tbl; 109 } __packed; 110 111 /* 112 * Hardcoded TCM bank values. This will stay in driver to maintain backward 113 * compatibility with device-tree that does not have TCM information. 114 */ 115 static const struct mem_bank_data zynqmp_tcm_banks_split[] = { 116 {0xffe00000UL, 0x0, 0x10000UL, PD_R5_0_ATCM, "atcm0"}, /* TCM 64KB each */ 117 {0xffe20000UL, 0x20000, 0x10000UL, PD_R5_0_BTCM, "btcm0"}, 118 {0xffe90000UL, 0x0, 0x10000UL, PD_R5_1_ATCM, "atcm1"}, 119 {0xffeb0000UL, 0x20000, 0x10000UL, PD_R5_1_BTCM, "btcm1"}, 120 }; 121 122 /* In lockstep mode cluster uses each 64KB TCM from second core as well */ 123 static const struct mem_bank_data zynqmp_tcm_banks_lockstep[] = { 124 {0xffe00000UL, 0x0, 0x10000UL, PD_R5_0_ATCM, "atcm0"}, /* TCM 64KB each */ 125 {0xffe20000UL, 0x20000, 0x10000UL, PD_R5_0_BTCM, "btcm0"}, 126 {0xffe10000UL, 0x10000, 0x10000UL, PD_R5_1_ATCM, "atcm1"}, 127 {0xffe30000UL, 0x30000, 0x10000UL, PD_R5_1_BTCM, "btcm1"}, 128 }; 129 130 /** 131 * struct zynqmp_r5_core 132 * 133 * @rsc_tbl_va: resource table virtual address 134 * @sram: Array of sram memories assigned to this core 135 * @num_sram: number of sram for this core 136 * @dev: device of RPU instance 137 * @np: device node of RPU instance 138 * @tcm_bank_count: number TCM banks accessible to this RPU 139 * @tcm_banks: array of each TCM bank data 140 * @rproc: rproc handle 141 * @rsc_tbl_size: resource table size retrieved from remote 142 * @pm_domain_id: RPU CPU power domain id 143 * @ipi: pointer to mailbox information 144 */ 145 struct zynqmp_r5_core { 146 void __iomem *rsc_tbl_va; 147 struct zynqmp_sram_bank *sram; 148 int num_sram; 149 struct device *dev; 150 struct device_node *np; 151 int tcm_bank_count; 152 struct mem_bank_data **tcm_banks; 153 struct rproc *rproc; 154 u32 rsc_tbl_size; 155 u32 pm_domain_id; 156 struct mbox_info *ipi; 157 }; 158 159 /** 160 * struct zynqmp_r5_cluster 161 * 162 * @dev: r5f subsystem cluster device node 163 * @mode: cluster mode of type zynqmp_r5_cluster_mode 164 * @core_count: number of r5 cores used for this cluster mode 165 * @r5_cores: Array of pointers pointing to r5 core 166 */ 167 struct zynqmp_r5_cluster { 168 struct device *dev; 169 enum zynqmp_r5_cluster_mode mode; 170 int core_count; 171 struct zynqmp_r5_core **r5_cores; 172 }; 173 174 /** 175 * event_notified_idr_cb() - callback for vq_interrupt per notifyid 176 * @id: rproc->notify id 177 * @ptr: pointer to idr private data 178 * @data: data passed to idr_for_each callback 179 * 180 * Pass notification to remoteproc virtio 181 * 182 * Return: 0. having return is to satisfy the idr_for_each() function 183 * pointer input argument requirement. 184 **/ 185 static int event_notified_idr_cb(int id, void *ptr, void *data) 186 { 187 struct rproc *rproc = data; 188 189 if (rproc_vq_interrupt(rproc, id) == IRQ_NONE) 190 dev_dbg(&rproc->dev, "data not found for vqid=%d\n", id); 191 192 return 0; 193 } 194 195 /** 196 * handle_event_notified() - remoteproc notification work function 197 * @work: pointer to the work structure 198 * 199 * It checks each registered remoteproc notify IDs. 200 */ 201 static void handle_event_notified(struct work_struct *work) 202 { 203 struct mbox_info *ipi; 204 struct rproc *rproc; 205 206 ipi = container_of(work, struct mbox_info, mbox_work); 207 rproc = ipi->r5_core->rproc; 208 209 /* 210 * We only use IPI for interrupt. The RPU firmware side may or may 211 * not write the notifyid when it trigger IPI. 212 * And thus, we scan through all the registered notifyids and 213 * find which one is valid to get the message. 214 * Even if message from firmware is NULL, we attempt to get vqid 215 */ 216 idr_for_each(&rproc->notifyids, event_notified_idr_cb, rproc); 217 } 218 219 /** 220 * zynqmp_r5_mb_rx_cb() - receive channel mailbox callback 221 * @cl: mailbox client 222 * @msg: message pointer 223 * 224 * Receive data from ipi buffer, ack interrupt and then 225 * it will schedule the R5 notification work. 226 */ 227 static void zynqmp_r5_mb_rx_cb(struct mbox_client *cl, void *msg) 228 { 229 struct zynqmp_ipi_message *ipi_msg, *buf_msg; 230 struct mbox_info *ipi; 231 size_t len; 232 233 ipi = container_of(cl, struct mbox_info, mbox_cl); 234 235 /* copy data from ipi buffer to r5_core */ 236 ipi_msg = (struct zynqmp_ipi_message *)msg; 237 buf_msg = (struct zynqmp_ipi_message *)ipi->rx_mc_buf; 238 len = ipi_msg->len; 239 if (len > IPI_BUF_LEN_MAX) { 240 dev_warn(cl->dev, "msg size exceeded than %d\n", 241 IPI_BUF_LEN_MAX); 242 len = IPI_BUF_LEN_MAX; 243 } 244 buf_msg->len = len; 245 memcpy(buf_msg->data, ipi_msg->data, len); 246 247 /* received and processed interrupt ack */ 248 if (mbox_send_message(ipi->rx_chan, NULL) < 0) 249 dev_err(cl->dev, "ack failed to mbox rx_chan\n"); 250 251 schedule_work(&ipi->mbox_work); 252 } 253 254 /** 255 * zynqmp_r5_setup_mbox() - Setup mailboxes related properties 256 * this is used for each individual R5 core 257 * 258 * @cdev: child node device 259 * 260 * Function to setup mailboxes related properties 261 * return : NULL if failed else pointer to mbox_info 262 */ 263 static struct mbox_info *zynqmp_r5_setup_mbox(struct device *cdev) 264 { 265 struct mbox_client *mbox_cl; 266 struct mbox_info *ipi; 267 268 ipi = kzalloc(sizeof(*ipi), GFP_KERNEL); 269 if (!ipi) 270 return NULL; 271 272 mbox_cl = &ipi->mbox_cl; 273 mbox_cl->rx_callback = zynqmp_r5_mb_rx_cb; 274 mbox_cl->tx_block = false; 275 mbox_cl->knows_txdone = false; 276 mbox_cl->tx_done = NULL; 277 mbox_cl->dev = cdev; 278 279 /* Request TX and RX channels */ 280 ipi->tx_chan = mbox_request_channel_byname(mbox_cl, "tx"); 281 if (IS_ERR(ipi->tx_chan)) { 282 ipi->tx_chan = NULL; 283 kfree(ipi); 284 dev_warn(cdev, "mbox tx channel request failed\n"); 285 return NULL; 286 } 287 288 ipi->rx_chan = mbox_request_channel_byname(mbox_cl, "rx"); 289 if (IS_ERR(ipi->rx_chan)) { 290 mbox_free_channel(ipi->tx_chan); 291 ipi->rx_chan = NULL; 292 ipi->tx_chan = NULL; 293 kfree(ipi); 294 dev_warn(cdev, "mbox rx channel request failed\n"); 295 return NULL; 296 } 297 298 INIT_WORK(&ipi->mbox_work, handle_event_notified); 299 300 return ipi; 301 } 302 303 static void zynqmp_r5_free_mbox(struct mbox_info *ipi) 304 { 305 if (!ipi) 306 return; 307 308 if (ipi->tx_chan) { 309 mbox_free_channel(ipi->tx_chan); 310 ipi->tx_chan = NULL; 311 } 312 313 if (ipi->rx_chan) { 314 mbox_free_channel(ipi->rx_chan); 315 ipi->rx_chan = NULL; 316 } 317 318 kfree(ipi); 319 } 320 321 /* 322 * zynqmp_r5_core_kick() - kick a firmware if mbox is provided 323 * @rproc: r5 core's corresponding rproc structure 324 * @vqid: virtqueue ID 325 */ 326 static void zynqmp_r5_rproc_kick(struct rproc *rproc, int vqid) 327 { 328 struct zynqmp_r5_core *r5_core = rproc->priv; 329 struct device *dev = r5_core->dev; 330 struct zynqmp_ipi_message *mb_msg; 331 struct mbox_info *ipi; 332 int ret; 333 334 ipi = r5_core->ipi; 335 if (!ipi) 336 return; 337 338 mb_msg = (struct zynqmp_ipi_message *)ipi->tx_mc_buf; 339 memcpy(mb_msg->data, &vqid, sizeof(vqid)); 340 mb_msg->len = sizeof(vqid); 341 ret = mbox_send_message(ipi->tx_chan, mb_msg); 342 if (ret < 0) 343 dev_warn(dev, "failed to send message\n"); 344 } 345 346 /* 347 * zynqmp_r5_rproc_start() 348 * @rproc: single R5 core's corresponding rproc instance 349 * 350 * Start R5 Core from designated boot address. 351 * 352 * return 0 on success, otherwise non-zero value on failure 353 */ 354 static int zynqmp_r5_rproc_start(struct rproc *rproc) 355 { 356 struct zynqmp_r5_core *r5_core = rproc->priv; 357 enum rpu_boot_mem bootmem; 358 int ret; 359 360 /* 361 * The exception vector pointers (EVP) refer to the base-address of 362 * exception vectors (for reset, IRQ, FIQ, etc). The reset-vector 363 * starts at the base-address and subsequent vectors are on 4-byte 364 * boundaries. 365 * 366 * Exception vectors can start either from 0x0000_0000 (LOVEC) or 367 * from 0xFFFF_0000 (HIVEC) which is mapped in the OCM (On-Chip Memory) 368 * 369 * Usually firmware will put Exception vectors at LOVEC. 370 * 371 * It is not recommend that you change the exception vector. 372 * Changing the EVP to HIVEC will result in increased interrupt latency 373 * and jitter. Also, if the OCM is secured and the Cortex-R5F processor 374 * is non-secured, then the Cortex-R5F processor cannot access the 375 * HIVEC exception vectors in the OCM. 376 */ 377 bootmem = (rproc->bootaddr >= 0xFFFC0000) ? 378 PM_RPU_BOOTMEM_HIVEC : PM_RPU_BOOTMEM_LOVEC; 379 380 dev_dbg(r5_core->dev, "RPU boot addr 0x%llx from %s.", rproc->bootaddr, 381 bootmem == PM_RPU_BOOTMEM_HIVEC ? "OCM" : "TCM"); 382 383 /* Request node before starting RPU core if new version of API is supported */ 384 if (zynqmp_pm_feature(PM_REQUEST_NODE) > 1) { 385 ret = zynqmp_pm_request_node(r5_core->pm_domain_id, 386 ZYNQMP_PM_CAPABILITY_ACCESS, 0, 387 ZYNQMP_PM_REQUEST_ACK_BLOCKING); 388 if (ret < 0) { 389 dev_err(r5_core->dev, "failed to request 0x%x", 390 r5_core->pm_domain_id); 391 return ret; 392 } 393 } 394 395 ret = zynqmp_pm_request_wake(r5_core->pm_domain_id, 1, 396 bootmem, ZYNQMP_PM_REQUEST_ACK_NO); 397 if (ret) 398 dev_err(r5_core->dev, 399 "failed to start RPU = 0x%x\n", r5_core->pm_domain_id); 400 return ret; 401 } 402 403 /* 404 * zynqmp_r5_rproc_stop() 405 * @rproc: single R5 core's corresponding rproc instance 406 * 407 * Power down R5 Core. 408 * 409 * return 0 on success, otherwise non-zero value on failure 410 */ 411 static int zynqmp_r5_rproc_stop(struct rproc *rproc) 412 { 413 struct zynqmp_r5_core *r5_core = rproc->priv; 414 int ret; 415 416 /* Use release node API to stop core if new version of API is supported */ 417 if (zynqmp_pm_feature(PM_RELEASE_NODE) > 1) { 418 ret = zynqmp_pm_release_node(r5_core->pm_domain_id); 419 if (ret) 420 dev_err(r5_core->dev, "failed to stop remoteproc RPU %d\n", ret); 421 return ret; 422 } 423 424 /* 425 * Check expected version of EEMI call before calling it. This avoids 426 * any error or warning prints from firmware as it is expected that fw 427 * doesn't support it. 428 */ 429 if (zynqmp_pm_feature(PM_FORCE_POWERDOWN) != 1) { 430 dev_dbg(r5_core->dev, "EEMI interface %d ver 1 not supported\n", 431 PM_FORCE_POWERDOWN); 432 return -EOPNOTSUPP; 433 } 434 435 /* maintain force pwr down for backward compatibility */ 436 ret = zynqmp_pm_force_pwrdwn(r5_core->pm_domain_id, 437 ZYNQMP_PM_REQUEST_ACK_BLOCKING); 438 if (ret) 439 dev_err(r5_core->dev, "core force power down failed\n"); 440 441 return ret; 442 } 443 444 /* 445 * zynqmp_r5_mem_region_map() 446 * @rproc: single R5 core's corresponding rproc instance 447 * @mem: mem descriptor to map reserved memory-regions 448 * 449 * Callback to map va for memory-region's carveout. 450 * 451 * return 0 on success, otherwise non-zero value on failure 452 */ 453 static int zynqmp_r5_mem_region_map(struct rproc *rproc, 454 struct rproc_mem_entry *mem) 455 { 456 void __iomem *va; 457 458 va = ioremap_wc(mem->dma, mem->len); 459 if (IS_ERR_OR_NULL(va)) 460 return -ENOMEM; 461 462 mem->va = (void *)va; 463 464 return 0; 465 } 466 467 /* 468 * zynqmp_r5_rproc_mem_unmap 469 * @rproc: single R5 core's corresponding rproc instance 470 * @mem: mem entry to unmap 471 * 472 * Unmap memory-region carveout 473 * 474 * return: always returns 0 475 */ 476 static int zynqmp_r5_mem_region_unmap(struct rproc *rproc, 477 struct rproc_mem_entry *mem) 478 { 479 iounmap((void __iomem *)mem->va); 480 return 0; 481 } 482 483 /* 484 * add_mem_regions_carveout() 485 * @rproc: single R5 core's corresponding rproc instance 486 * 487 * Construct rproc mem carveouts from memory-region property nodes 488 * 489 * return 0 on success, otherwise non-zero value on failure 490 */ 491 static int add_mem_regions_carveout(struct rproc *rproc) 492 { 493 struct rproc_mem_entry *rproc_mem; 494 struct zynqmp_r5_core *r5_core; 495 struct of_phandle_iterator it; 496 struct reserved_mem *rmem; 497 int i = 0; 498 499 r5_core = rproc->priv; 500 501 /* Register associated reserved memory regions */ 502 of_phandle_iterator_init(&it, r5_core->np, "memory-region", NULL, 0); 503 504 while (of_phandle_iterator_next(&it) == 0) { 505 rmem = of_reserved_mem_lookup(it.node); 506 if (!rmem) { 507 of_node_put(it.node); 508 dev_err(&rproc->dev, "unable to acquire memory-region\n"); 509 return -EINVAL; 510 } 511 512 if (!strcmp(it.node->name, "vdev0buffer")) { 513 /* Init reserved memory for vdev buffer */ 514 rproc_mem = rproc_of_resm_mem_entry_init(&rproc->dev, i, 515 rmem->size, 516 rmem->base, 517 it.node->name); 518 } else { 519 /* Register associated reserved memory regions */ 520 rproc_mem = rproc_mem_entry_init(&rproc->dev, NULL, 521 (dma_addr_t)rmem->base, 522 rmem->size, rmem->base, 523 zynqmp_r5_mem_region_map, 524 zynqmp_r5_mem_region_unmap, 525 it.node->name); 526 } 527 528 if (!rproc_mem) { 529 of_node_put(it.node); 530 return -ENOMEM; 531 } 532 533 rproc_add_carveout(rproc, rproc_mem); 534 rproc_coredump_add_segment(rproc, rmem->base, rmem->size); 535 536 dev_dbg(&rproc->dev, "reserved mem carveout %s addr=%llx, size=0x%llx", 537 it.node->name, rmem->base, rmem->size); 538 i++; 539 } 540 541 return 0; 542 } 543 544 static int add_sram_carveouts(struct rproc *rproc) 545 { 546 struct zynqmp_r5_core *r5_core = rproc->priv; 547 struct rproc_mem_entry *rproc_mem; 548 struct zynqmp_sram_bank *sram; 549 dma_addr_t dma_addr; 550 size_t len; 551 int da, i; 552 553 for (i = 0; i < r5_core->num_sram; i++) { 554 sram = &r5_core->sram[i]; 555 556 dma_addr = (dma_addr_t)sram->sram_res.start; 557 558 len = resource_size(&sram->sram_res); 559 da = sram->da; 560 561 rproc_mem = rproc_mem_entry_init(&rproc->dev, NULL, 562 dma_addr, 563 len, da, 564 zynqmp_r5_mem_region_map, 565 zynqmp_r5_mem_region_unmap, 566 sram->sram_res.name); 567 if (!rproc_mem) { 568 dev_err(&rproc->dev, "failed to add sram %s da=0x%x, size=0x%lx", 569 sram->sram_res.name, da, len); 570 return -ENOMEM; 571 } 572 573 rproc_add_carveout(rproc, rproc_mem); 574 rproc_coredump_add_segment(rproc, da, len); 575 576 dev_dbg(&rproc->dev, "sram carveout %s addr=%llx, da=0x%x, size=0x%lx", 577 sram->sram_res.name, dma_addr, da, len); 578 } 579 580 return 0; 581 } 582 583 /* 584 * tcm_mem_unmap() 585 * @rproc: single R5 core's corresponding rproc instance 586 * @mem: tcm mem entry to unmap 587 * 588 * Unmap TCM banks when powering down R5 core. 589 * 590 * return always 0 591 */ 592 static int tcm_mem_unmap(struct rproc *rproc, struct rproc_mem_entry *mem) 593 { 594 iounmap((void __iomem *)mem->va); 595 596 return 0; 597 } 598 599 /* 600 * tcm_mem_map() 601 * @rproc: single R5 core's corresponding rproc instance 602 * @mem: tcm memory entry descriptor 603 * 604 * Given TCM bank entry, this func setup virtual address for TCM bank 605 * remoteproc carveout. It also takes care of va to da address translation 606 * 607 * return 0 on success, otherwise non-zero value on failure 608 */ 609 static int tcm_mem_map(struct rproc *rproc, 610 struct rproc_mem_entry *mem) 611 { 612 void __iomem *va; 613 614 va = ioremap_wc(mem->dma, mem->len); 615 if (IS_ERR_OR_NULL(va)) 616 return -ENOMEM; 617 618 /* Update memory entry va */ 619 mem->va = (void *)va; 620 621 /* clear TCMs */ 622 memset_io(va, 0, mem->len); 623 624 return 0; 625 } 626 627 /* 628 * add_tcm_banks() 629 * @rproc: single R5 core's corresponding rproc instance 630 * 631 * allocate and add remoteproc carveout for TCM memory 632 * 633 * return 0 on success, otherwise non-zero value on failure 634 */ 635 static int add_tcm_banks(struct rproc *rproc) 636 { 637 struct rproc_mem_entry *rproc_mem; 638 struct zynqmp_r5_core *r5_core; 639 int i, num_banks, ret; 640 phys_addr_t bank_addr; 641 struct device *dev; 642 u32 pm_domain_id; 643 size_t bank_size; 644 char *bank_name; 645 u32 da; 646 647 r5_core = rproc->priv; 648 dev = r5_core->dev; 649 num_banks = r5_core->tcm_bank_count; 650 651 /* 652 * Power-on Each 64KB TCM, 653 * register its address space, map and unmap functions 654 * and add carveouts accordingly 655 */ 656 for (i = 0; i < num_banks; i++) { 657 bank_addr = r5_core->tcm_banks[i]->addr; 658 da = r5_core->tcm_banks[i]->da; 659 bank_name = r5_core->tcm_banks[i]->bank_name; 660 bank_size = r5_core->tcm_banks[i]->size; 661 pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; 662 663 ret = zynqmp_pm_request_node(pm_domain_id, 664 ZYNQMP_PM_CAPABILITY_ACCESS, 0, 665 ZYNQMP_PM_REQUEST_ACK_BLOCKING); 666 if (ret < 0) { 667 dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id); 668 goto release_tcm; 669 } 670 671 dev_dbg(dev, "TCM carveout %s addr=%llx, da=0x%x, size=0x%lx", 672 bank_name, bank_addr, da, bank_size); 673 674 /* 675 * In DETACHED state firmware is already running so no need to 676 * request add TCM registers. However, request TCM PD node to let 677 * platform management firmware know that TCM is in use. 678 */ 679 if (rproc->state == RPROC_DETACHED) 680 continue; 681 682 rproc_mem = rproc_mem_entry_init(dev, NULL, bank_addr, 683 bank_size, da, 684 tcm_mem_map, tcm_mem_unmap, 685 bank_name); 686 if (!rproc_mem) { 687 ret = -ENOMEM; 688 zynqmp_pm_release_node(pm_domain_id); 689 goto release_tcm; 690 } 691 692 rproc_add_carveout(rproc, rproc_mem); 693 rproc_coredump_add_segment(rproc, da, bank_size); 694 } 695 696 return 0; 697 698 release_tcm: 699 /* If failed, Turn off all TCM banks turned on before */ 700 for (i--; i >= 0; i--) { 701 pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; 702 zynqmp_pm_release_node(pm_domain_id); 703 } 704 return ret; 705 } 706 707 /* 708 * zynqmp_r5_parse_fw() 709 * @rproc: single R5 core's corresponding rproc instance 710 * @fw: ptr to firmware to be loaded onto r5 core 711 * 712 * get resource table if available 713 * 714 * return 0 on success, otherwise non-zero value on failure 715 */ 716 static int zynqmp_r5_parse_fw(struct rproc *rproc, const struct firmware *fw) 717 { 718 int ret; 719 720 ret = rproc_elf_load_rsc_table(rproc, fw); 721 if (ret == -EINVAL) { 722 /* 723 * resource table only required for IPC. 724 * if not present, this is not necessarily an error; 725 * for example, loading r5 hello world application 726 * so simply inform user and keep going. 727 */ 728 dev_info(&rproc->dev, "no resource table found.\n"); 729 ret = 0; 730 } 731 return ret; 732 } 733 734 /** 735 * zynqmp_r5_rproc_prepare() 736 * adds carveouts for TCM bank and reserved memory regions 737 * 738 * @rproc: Device node of each rproc 739 * 740 * Return: 0 for success else < 0 error code 741 */ 742 static int zynqmp_r5_rproc_prepare(struct rproc *rproc) 743 { 744 int ret; 745 746 ret = add_tcm_banks(rproc); 747 if (ret) { 748 dev_err(&rproc->dev, "failed to get TCM banks, err %d\n", ret); 749 return ret; 750 } 751 752 ret = add_mem_regions_carveout(rproc); 753 if (ret) { 754 dev_err(&rproc->dev, "failed to get reserve mem regions %d\n", ret); 755 return ret; 756 } 757 758 ret = add_sram_carveouts(rproc); 759 if (ret) { 760 dev_err(&rproc->dev, "failed to get sram carveout %d\n", ret); 761 return ret; 762 } 763 764 return 0; 765 } 766 767 /** 768 * zynqmp_r5_rproc_unprepare() 769 * Turns off TCM banks using power-domain id 770 * 771 * @rproc: Device node of each rproc 772 * 773 * Return: always 0 774 */ 775 static int zynqmp_r5_rproc_unprepare(struct rproc *rproc) 776 { 777 struct zynqmp_r5_core *r5_core; 778 u32 pm_domain_id; 779 int i; 780 781 r5_core = rproc->priv; 782 783 for (i = 0; i < r5_core->tcm_bank_count; i++) { 784 pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; 785 if (zynqmp_pm_release_node(pm_domain_id)) 786 dev_warn(r5_core->dev, 787 "can't turn off TCM bank 0x%x", pm_domain_id); 788 } 789 790 return 0; 791 } 792 793 static struct resource_table *zynqmp_r5_get_loaded_rsc_table(struct rproc *rproc, 794 size_t *size) 795 { 796 struct zynqmp_r5_core *r5_core; 797 798 r5_core = rproc->priv; 799 800 *size = r5_core->rsc_tbl_size; 801 802 return (struct resource_table *)r5_core->rsc_tbl_va; 803 } 804 805 static int zynqmp_r5_get_rsc_table_va(struct zynqmp_r5_core *r5_core) 806 { 807 struct resource_table *rsc_tbl_addr; 808 struct device *dev = r5_core->dev; 809 struct rsc_tbl_data *rsc_data_va; 810 struct resource res_mem; 811 struct device_node *np; 812 int ret; 813 814 /* 815 * It is expected from remote processor firmware to provide resource 816 * table address via struct rsc_tbl_data data structure. 817 * Start address of first entry under "memory-region" property list 818 * contains that data structure which holds resource table address, size 819 * and some magic number to validate correct resource table entry. 820 */ 821 np = of_parse_phandle(r5_core->np, "memory-region", 0); 822 if (!np) { 823 dev_err(dev, "failed to get memory region dev node\n"); 824 return -EINVAL; 825 } 826 827 ret = of_address_to_resource(np, 0, &res_mem); 828 of_node_put(np); 829 if (ret) { 830 dev_err(dev, "failed to get memory-region resource addr\n"); 831 return -EINVAL; 832 } 833 834 rsc_data_va = (struct rsc_tbl_data *)ioremap_wc(res_mem.start, 835 sizeof(struct rsc_tbl_data)); 836 if (!rsc_data_va) { 837 dev_err(dev, "failed to map resource table data address\n"); 838 return -EIO; 839 } 840 841 /* 842 * If RSC_TBL_XLNX_MAGIC number and its complement isn't found then 843 * do not consider resource table address valid and don't attach 844 */ 845 if (rsc_data_va->magic_num != RSC_TBL_XLNX_MAGIC || 846 rsc_data_va->comp_magic_num != ~RSC_TBL_XLNX_MAGIC) { 847 dev_dbg(dev, "invalid magic number, won't attach\n"); 848 return -EINVAL; 849 } 850 851 r5_core->rsc_tbl_va = ioremap_wc(rsc_data_va->rsc_tbl, 852 rsc_data_va->rsc_tbl_size); 853 if (!r5_core->rsc_tbl_va) { 854 dev_err(dev, "failed to get resource table va\n"); 855 return -EINVAL; 856 } 857 858 rsc_tbl_addr = (struct resource_table *)r5_core->rsc_tbl_va; 859 860 /* 861 * As of now resource table version 1 is expected. Don't fail to attach 862 * but warn users about it. 863 */ 864 if (rsc_tbl_addr->ver != 1) 865 dev_warn(dev, "unexpected resource table version %d\n", 866 rsc_tbl_addr->ver); 867 868 r5_core->rsc_tbl_size = rsc_data_va->rsc_tbl_size; 869 870 iounmap((void __iomem *)rsc_data_va); 871 872 return 0; 873 } 874 875 static int zynqmp_r5_attach(struct rproc *rproc) 876 { 877 dev_dbg(&rproc->dev, "rproc %d attached\n", rproc->index); 878 879 return 0; 880 } 881 882 static int zynqmp_r5_detach(struct rproc *rproc) 883 { 884 /* 885 * Generate last notification to remote after clearing virtio flag. 886 * Remote can avoid polling on virtio reset flag if kick is generated 887 * during detach by host and check virtio reset flag on kick interrupt. 888 */ 889 zynqmp_r5_rproc_kick(rproc, 0); 890 891 return 0; 892 } 893 894 static const struct rproc_ops zynqmp_r5_rproc_ops = { 895 .prepare = zynqmp_r5_rproc_prepare, 896 .unprepare = zynqmp_r5_rproc_unprepare, 897 .start = zynqmp_r5_rproc_start, 898 .stop = zynqmp_r5_rproc_stop, 899 .load = rproc_elf_load_segments, 900 .parse_fw = zynqmp_r5_parse_fw, 901 .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table, 902 .sanity_check = rproc_elf_sanity_check, 903 .get_boot_addr = rproc_elf_get_boot_addr, 904 .kick = zynqmp_r5_rproc_kick, 905 .get_loaded_rsc_table = zynqmp_r5_get_loaded_rsc_table, 906 .attach = zynqmp_r5_attach, 907 .detach = zynqmp_r5_detach, 908 }; 909 910 /** 911 * zynqmp_r5_add_rproc_core() 912 * Allocate and add struct rproc object for each r5f core 913 * This is called for each individual r5f core 914 * 915 * @cdev: Device node of each r5 core 916 * 917 * Return: zynqmp_r5_core object for success else error code pointer 918 */ 919 static struct zynqmp_r5_core *zynqmp_r5_add_rproc_core(struct device *cdev) 920 { 921 struct zynqmp_r5_core *r5_core; 922 struct rproc *r5_rproc; 923 int ret; 924 925 /* Set up DMA mask */ 926 ret = dma_set_coherent_mask(cdev, DMA_BIT_MASK(32)); 927 if (ret) 928 return ERR_PTR(ret); 929 930 /* Allocate remoteproc instance */ 931 r5_rproc = rproc_alloc(cdev, dev_name(cdev), 932 &zynqmp_r5_rproc_ops, 933 NULL, sizeof(struct zynqmp_r5_core)); 934 if (!r5_rproc) { 935 dev_err(cdev, "failed to allocate memory for rproc instance\n"); 936 return ERR_PTR(-ENOMEM); 937 } 938 939 rproc_coredump_set_elf_info(r5_rproc, ELFCLASS32, EM_ARM); 940 941 r5_rproc->auto_boot = false; 942 r5_core = r5_rproc->priv; 943 r5_core->dev = cdev; 944 r5_core->np = dev_of_node(cdev); 945 if (!r5_core->np) { 946 dev_err(cdev, "can't get device node for r5 core\n"); 947 ret = -EINVAL; 948 goto free_rproc; 949 } 950 951 /* Add R5 remoteproc core */ 952 ret = rproc_add(r5_rproc); 953 if (ret) { 954 dev_err(cdev, "failed to add r5 remoteproc\n"); 955 goto free_rproc; 956 } 957 958 /* 959 * If firmware is already available in the memory then move rproc state 960 * to DETACHED. Firmware can be preloaded via debugger or by any other 961 * agent (processors) in the system. 962 * If firmware isn't available in the memory and resource table isn't 963 * found, then rproc state remains OFFLINE. 964 */ 965 if (!zynqmp_r5_get_rsc_table_va(r5_core)) 966 r5_rproc->state = RPROC_DETACHED; 967 968 r5_core->rproc = r5_rproc; 969 return r5_core; 970 971 free_rproc: 972 rproc_free(r5_rproc); 973 return ERR_PTR(ret); 974 } 975 976 static int zynqmp_r5_get_sram_banks(struct zynqmp_r5_core *r5_core) 977 { 978 struct device_node *np = r5_core->np; 979 struct device *dev = r5_core->dev; 980 struct zynqmp_sram_bank *sram; 981 struct device_node *sram_np; 982 int num_sram, i, ret; 983 u64 abs_addr, size; 984 985 /* "sram" is optional property. Do not fail, if unavailable. */ 986 if (!of_property_present(r5_core->np, "sram")) 987 return 0; 988 989 num_sram = of_property_count_elems_of_size(np, "sram", sizeof(phandle)); 990 if (num_sram <= 0) { 991 dev_err(dev, "Invalid sram property, ret = %d\n", 992 num_sram); 993 return -EINVAL; 994 } 995 996 sram = devm_kcalloc(dev, num_sram, 997 sizeof(struct zynqmp_sram_bank), GFP_KERNEL); 998 if (!sram) 999 return -ENOMEM; 1000 1001 for (i = 0; i < num_sram; i++) { 1002 sram_np = of_parse_phandle(np, "sram", i); 1003 if (!sram_np) { 1004 dev_err(dev, "failed to get sram %d phandle\n", i); 1005 return -EINVAL; 1006 } 1007 1008 if (!of_device_is_available(sram_np)) { 1009 dev_err(dev, "sram device not available\n"); 1010 ret = -EINVAL; 1011 goto fail_sram_get; 1012 } 1013 1014 ret = of_address_to_resource(sram_np, 0, &sram[i].sram_res); 1015 if (ret) { 1016 dev_err(dev, "addr to res failed\n"); 1017 goto fail_sram_get; 1018 } 1019 1020 /* Get SRAM device address */ 1021 ret = of_property_read_reg(sram_np, i, &abs_addr, &size); 1022 if (ret) { 1023 dev_err(dev, "failed to get reg property\n"); 1024 goto fail_sram_get; 1025 } 1026 1027 sram[i].da = (u32)abs_addr; 1028 1029 of_node_put(sram_np); 1030 1031 dev_dbg(dev, "sram %d: name=%s, addr=0x%llx, da=0x%x, size=0x%llx\n", 1032 i, sram[i].sram_res.name, sram[i].sram_res.start, 1033 sram[i].da, resource_size(&sram[i].sram_res)); 1034 } 1035 1036 r5_core->sram = sram; 1037 r5_core->num_sram = num_sram; 1038 1039 return 0; 1040 1041 fail_sram_get: 1042 of_node_put(sram_np); 1043 1044 return ret; 1045 } 1046 1047 static int zynqmp_r5_get_tcm_node_from_dt(struct zynqmp_r5_cluster *cluster) 1048 { 1049 int i, j, tcm_bank_count, ret, tcm_pd_idx, pd_count; 1050 struct of_phandle_args out_args; 1051 struct zynqmp_r5_core *r5_core; 1052 struct platform_device *cpdev; 1053 struct mem_bank_data *tcm; 1054 struct device_node *np; 1055 struct resource *res; 1056 u64 abs_addr, size; 1057 struct device *dev; 1058 1059 for (i = 0; i < cluster->core_count; i++) { 1060 r5_core = cluster->r5_cores[i]; 1061 dev = r5_core->dev; 1062 np = r5_core->np; 1063 1064 pd_count = of_count_phandle_with_args(np, "power-domains", 1065 "#power-domain-cells"); 1066 1067 if (pd_count <= 0) { 1068 dev_err(dev, "invalid power-domains property, %d\n", pd_count); 1069 return -EINVAL; 1070 } 1071 1072 /* First entry in power-domains list is for r5 core, rest for TCM. */ 1073 tcm_bank_count = pd_count - 1; 1074 1075 if (tcm_bank_count <= 0) { 1076 dev_err(dev, "invalid TCM count %d\n", tcm_bank_count); 1077 return -EINVAL; 1078 } 1079 1080 r5_core->tcm_banks = devm_kcalloc(dev, tcm_bank_count, 1081 sizeof(struct mem_bank_data *), 1082 GFP_KERNEL); 1083 if (!r5_core->tcm_banks) 1084 return -ENOMEM; 1085 1086 r5_core->tcm_bank_count = tcm_bank_count; 1087 for (j = 0, tcm_pd_idx = 1; j < tcm_bank_count; j++, tcm_pd_idx++) { 1088 tcm = devm_kzalloc(dev, sizeof(struct mem_bank_data), 1089 GFP_KERNEL); 1090 if (!tcm) 1091 return -ENOMEM; 1092 1093 r5_core->tcm_banks[j] = tcm; 1094 1095 /* Get power-domains id of TCM. */ 1096 ret = of_parse_phandle_with_args(np, "power-domains", 1097 "#power-domain-cells", 1098 tcm_pd_idx, &out_args); 1099 if (ret) { 1100 dev_err(r5_core->dev, 1101 "failed to get tcm %d pm domain, ret %d\n", 1102 tcm_pd_idx, ret); 1103 return ret; 1104 } 1105 tcm->pm_domain_id = out_args.args[0]; 1106 of_node_put(out_args.np); 1107 1108 /* Get TCM address without translation. */ 1109 ret = of_property_read_reg(np, j, &abs_addr, &size); 1110 if (ret) { 1111 dev_err(dev, "failed to get reg property\n"); 1112 return ret; 1113 } 1114 1115 /* 1116 * Remote processor can address only 32 bits 1117 * so convert 64-bits into 32-bits. This will discard 1118 * any unwanted upper 32-bits. 1119 */ 1120 tcm->da = (u32)abs_addr; 1121 tcm->size = (u32)size; 1122 1123 cpdev = to_platform_device(dev); 1124 res = platform_get_resource(cpdev, IORESOURCE_MEM, j); 1125 if (!res) { 1126 dev_err(dev, "failed to get tcm resource\n"); 1127 return -EINVAL; 1128 } 1129 1130 tcm->addr = (u32)res->start; 1131 tcm->bank_name = (char *)res->name; 1132 res = devm_request_mem_region(dev, tcm->addr, tcm->size, 1133 tcm->bank_name); 1134 if (!res) { 1135 dev_err(dev, "failed to request tcm resource\n"); 1136 return -EINVAL; 1137 } 1138 } 1139 } 1140 1141 return 0; 1142 } 1143 1144 /** 1145 * zynqmp_r5_get_tcm_node() 1146 * Ideally this function should parse tcm node and store information 1147 * in r5_core instance. For now, Hardcoded TCM information is used. 1148 * This approach is used as TCM bindings for system-dt is being developed 1149 * 1150 * @cluster: pointer to zynqmp_r5_cluster type object 1151 * 1152 * Return: 0 for success and < 0 error code for failure. 1153 */ 1154 static int zynqmp_r5_get_tcm_node(struct zynqmp_r5_cluster *cluster) 1155 { 1156 const struct mem_bank_data *zynqmp_tcm_banks; 1157 struct device *dev = cluster->dev; 1158 struct zynqmp_r5_core *r5_core; 1159 int tcm_bank_count, tcm_node; 1160 int i, j; 1161 1162 if (cluster->mode == SPLIT_MODE) { 1163 zynqmp_tcm_banks = zynqmp_tcm_banks_split; 1164 tcm_bank_count = ARRAY_SIZE(zynqmp_tcm_banks_split); 1165 } else { 1166 zynqmp_tcm_banks = zynqmp_tcm_banks_lockstep; 1167 tcm_bank_count = ARRAY_SIZE(zynqmp_tcm_banks_lockstep); 1168 } 1169 1170 /* count per core tcm banks */ 1171 tcm_bank_count = tcm_bank_count / cluster->core_count; 1172 1173 /* 1174 * r5 core 0 will use all of TCM banks in lockstep mode. 1175 * In split mode, r5 core0 will use 128k and r5 core1 will use another 1176 * 128k. Assign TCM banks to each core accordingly 1177 */ 1178 tcm_node = 0; 1179 for (i = 0; i < cluster->core_count; i++) { 1180 r5_core = cluster->r5_cores[i]; 1181 r5_core->tcm_banks = devm_kcalloc(dev, tcm_bank_count, 1182 sizeof(struct mem_bank_data *), 1183 GFP_KERNEL); 1184 if (!r5_core->tcm_banks) 1185 return -ENOMEM; 1186 1187 for (j = 0; j < tcm_bank_count; j++) { 1188 /* 1189 * Use pre-defined TCM reg values. 1190 * Eventually this should be replaced by values 1191 * parsed from dts. 1192 */ 1193 r5_core->tcm_banks[j] = 1194 (struct mem_bank_data *)&zynqmp_tcm_banks[tcm_node]; 1195 tcm_node++; 1196 } 1197 1198 r5_core->tcm_bank_count = tcm_bank_count; 1199 } 1200 1201 return 0; 1202 } 1203 1204 /* 1205 * zynqmp_r5_core_init() 1206 * Create and initialize zynqmp_r5_core type object 1207 * 1208 * @cluster: pointer to zynqmp_r5_cluster type object 1209 * @fw_reg_val: value expected by firmware to configure RPU cluster mode 1210 * @tcm_mode: value expected by fw to configure TCM mode (lockstep or split) 1211 * 1212 * Return: 0 for success and error code for failure. 1213 */ 1214 static int zynqmp_r5_core_init(struct zynqmp_r5_cluster *cluster, 1215 enum rpu_oper_mode fw_reg_val, 1216 enum rpu_tcm_comb tcm_mode) 1217 { 1218 struct device *dev = cluster->dev; 1219 struct zynqmp_r5_core *r5_core; 1220 int ret = -EINVAL, i; 1221 1222 r5_core = cluster->r5_cores[0]; 1223 1224 /* Maintain backward compatibility for zynqmp by using hardcode TCM address. */ 1225 if (of_property_present(r5_core->np, "reg")) 1226 ret = zynqmp_r5_get_tcm_node_from_dt(cluster); 1227 else if (device_is_compatible(dev, "xlnx,zynqmp-r5fss")) 1228 ret = zynqmp_r5_get_tcm_node(cluster); 1229 1230 if (ret) { 1231 dev_err(dev, "can't get tcm, err %d\n", ret); 1232 return ret; 1233 } 1234 1235 for (i = 0; i < cluster->core_count; i++) { 1236 r5_core = cluster->r5_cores[i]; 1237 1238 /* Initialize r5 cores with power-domains parsed from dts */ 1239 ret = of_property_read_u32_index(r5_core->np, "power-domains", 1240 1, &r5_core->pm_domain_id); 1241 if (ret) { 1242 dev_err(dev, "failed to get power-domains property\n"); 1243 return ret; 1244 } 1245 1246 ret = zynqmp_pm_set_rpu_mode(r5_core->pm_domain_id, fw_reg_val); 1247 if (ret < 0) { 1248 dev_err(r5_core->dev, "failed to set RPU mode\n"); 1249 return ret; 1250 } 1251 1252 if (of_property_present(dev_of_node(dev), "xlnx,tcm-mode") || 1253 device_is_compatible(dev, "xlnx,zynqmp-r5fss")) { 1254 ret = zynqmp_pm_set_tcm_config(r5_core->pm_domain_id, 1255 tcm_mode); 1256 if (ret < 0) { 1257 dev_err(r5_core->dev, "failed to configure TCM\n"); 1258 return ret; 1259 } 1260 } 1261 1262 ret = zynqmp_r5_get_sram_banks(r5_core); 1263 if (ret) 1264 return ret; 1265 } 1266 1267 return 0; 1268 } 1269 1270 /* 1271 * zynqmp_r5_cluster_init() 1272 * Create and initialize zynqmp_r5_cluster type object 1273 * 1274 * @cluster: pointer to zynqmp_r5_cluster type object 1275 * 1276 * Return: 0 for success and error code for failure. 1277 */ 1278 static int zynqmp_r5_cluster_init(struct zynqmp_r5_cluster *cluster) 1279 { 1280 enum zynqmp_r5_cluster_mode cluster_mode = LOCKSTEP_MODE; 1281 struct device *dev = cluster->dev; 1282 struct device_node *dev_node = dev_of_node(dev); 1283 struct platform_device *child_pdev; 1284 struct zynqmp_r5_core **r5_cores; 1285 enum rpu_oper_mode fw_reg_val; 1286 struct device **child_devs; 1287 struct device_node *child; 1288 enum rpu_tcm_comb tcm_mode; 1289 int core_count, ret, i; 1290 struct mbox_info *ipi; 1291 1292 ret = of_property_read_u32(dev_node, "xlnx,cluster-mode", &cluster_mode); 1293 1294 /* 1295 * on success returns 0, if not defined then returns -EINVAL, 1296 * In that case, default is LOCKSTEP mode. Other than that 1297 * returns relative error code < 0. 1298 */ 1299 if (ret != -EINVAL && ret != 0) { 1300 dev_err(dev, "Invalid xlnx,cluster-mode property\n"); 1301 return ret; 1302 } 1303 1304 /* 1305 * For now driver only supports split mode and lockstep mode. 1306 * fail driver probe if either of that is not set in dts. 1307 */ 1308 if (cluster_mode == LOCKSTEP_MODE) { 1309 fw_reg_val = PM_RPU_MODE_LOCKSTEP; 1310 } else if (cluster_mode == SPLIT_MODE) { 1311 fw_reg_val = PM_RPU_MODE_SPLIT; 1312 } else { 1313 dev_err(dev, "driver does not support cluster mode %d\n", cluster_mode); 1314 return -EINVAL; 1315 } 1316 1317 if (of_property_present(dev_node, "xlnx,tcm-mode")) { 1318 ret = of_property_read_u32(dev_node, "xlnx,tcm-mode", (u32 *)&tcm_mode); 1319 if (ret) 1320 return ret; 1321 } else if (device_is_compatible(dev, "xlnx,zynqmp-r5fss")) { 1322 if (cluster_mode == LOCKSTEP_MODE) 1323 tcm_mode = PM_RPU_TCM_COMB; 1324 else 1325 tcm_mode = PM_RPU_TCM_SPLIT; 1326 } else { 1327 tcm_mode = PM_RPU_TCM_COMB; 1328 } 1329 1330 /* 1331 * Number of cores is decided by number of child nodes of 1332 * r5f subsystem node in dts. If Split mode is used in dts 1333 * 2 child nodes are expected. 1334 * In lockstep mode if two child nodes are available, 1335 * only use first child node and consider it as core0 1336 * and ignore core1 dt node. 1337 */ 1338 core_count = of_get_available_child_count(dev_node); 1339 if (core_count == 0) { 1340 dev_err(dev, "Invalid number of r5 cores %d", core_count); 1341 return -EINVAL; 1342 } else if (cluster_mode == SPLIT_MODE && core_count != 2) { 1343 dev_err(dev, "Invalid number of r5 cores for split mode\n"); 1344 return -EINVAL; 1345 } else if (cluster_mode == LOCKSTEP_MODE && core_count == 2) { 1346 dev_warn(dev, "Only r5 core0 will be used\n"); 1347 core_count = 1; 1348 } 1349 1350 child_devs = kcalloc(core_count, sizeof(struct device *), GFP_KERNEL); 1351 if (!child_devs) 1352 return -ENOMEM; 1353 1354 r5_cores = kcalloc(core_count, 1355 sizeof(struct zynqmp_r5_core *), GFP_KERNEL); 1356 if (!r5_cores) { 1357 kfree(child_devs); 1358 return -ENOMEM; 1359 } 1360 1361 i = 0; 1362 for_each_available_child_of_node(dev_node, child) { 1363 child_pdev = of_find_device_by_node(child); 1364 if (!child_pdev) { 1365 of_node_put(child); 1366 ret = -ENODEV; 1367 goto release_r5_cores; 1368 } 1369 1370 child_devs[i] = &child_pdev->dev; 1371 1372 /* create and add remoteproc instance of type struct rproc */ 1373 r5_cores[i] = zynqmp_r5_add_rproc_core(&child_pdev->dev); 1374 if (IS_ERR(r5_cores[i])) { 1375 of_node_put(child); 1376 ret = PTR_ERR(r5_cores[i]); 1377 r5_cores[i] = NULL; 1378 goto release_r5_cores; 1379 } 1380 1381 /* 1382 * If mailbox nodes are disabled using "status" property then 1383 * setting up mailbox channels will fail. 1384 */ 1385 ipi = zynqmp_r5_setup_mbox(&child_pdev->dev); 1386 if (ipi) { 1387 r5_cores[i]->ipi = ipi; 1388 ipi->r5_core = r5_cores[i]; 1389 } 1390 1391 /* 1392 * If two child nodes are available in dts in lockstep mode, 1393 * then ignore second child node. 1394 */ 1395 if (cluster_mode == LOCKSTEP_MODE) { 1396 of_node_put(child); 1397 break; 1398 } 1399 1400 i++; 1401 } 1402 1403 cluster->mode = cluster_mode; 1404 cluster->core_count = core_count; 1405 cluster->r5_cores = r5_cores; 1406 1407 ret = zynqmp_r5_core_init(cluster, fw_reg_val, tcm_mode); 1408 if (ret < 0) { 1409 dev_err(dev, "failed to init r5 core err %d\n", ret); 1410 cluster->core_count = 0; 1411 cluster->r5_cores = NULL; 1412 1413 /* 1414 * at this point rproc resources for each core are allocated. 1415 * adjust index to free resources in reverse order 1416 */ 1417 i = core_count - 1; 1418 goto release_r5_cores; 1419 } 1420 1421 kfree(child_devs); 1422 return 0; 1423 1424 release_r5_cores: 1425 while (i >= 0) { 1426 put_device(child_devs[i]); 1427 if (r5_cores[i]) { 1428 zynqmp_r5_free_mbox(r5_cores[i]->ipi); 1429 of_reserved_mem_device_release(r5_cores[i]->dev); 1430 rproc_del(r5_cores[i]->rproc); 1431 rproc_free(r5_cores[i]->rproc); 1432 } 1433 i--; 1434 } 1435 kfree(r5_cores); 1436 kfree(child_devs); 1437 return ret; 1438 } 1439 1440 static void zynqmp_r5_cluster_exit(void *data) 1441 { 1442 struct platform_device *pdev = data; 1443 struct zynqmp_r5_cluster *cluster; 1444 struct zynqmp_r5_core *r5_core; 1445 int i; 1446 1447 cluster = platform_get_drvdata(pdev); 1448 if (!cluster) 1449 return; 1450 1451 for (i = 0; i < cluster->core_count; i++) { 1452 r5_core = cluster->r5_cores[i]; 1453 zynqmp_r5_free_mbox(r5_core->ipi); 1454 iounmap(r5_core->rsc_tbl_va); 1455 of_reserved_mem_device_release(r5_core->dev); 1456 put_device(r5_core->dev); 1457 rproc_del(r5_core->rproc); 1458 rproc_free(r5_core->rproc); 1459 } 1460 1461 kfree(cluster->r5_cores); 1462 kfree(cluster); 1463 platform_set_drvdata(pdev, NULL); 1464 } 1465 1466 /* 1467 * zynqmp_r5_remoteproc_probe() 1468 * parse device-tree, initialize hardware and allocate required resources 1469 * and remoteproc ops 1470 * 1471 * @pdev: domain platform device for R5 cluster 1472 * 1473 * Return: 0 for success and < 0 for failure. 1474 */ 1475 static int zynqmp_r5_remoteproc_probe(struct platform_device *pdev) 1476 { 1477 struct zynqmp_r5_cluster *cluster; 1478 struct device *dev = &pdev->dev; 1479 int ret; 1480 1481 cluster = kzalloc(sizeof(*cluster), GFP_KERNEL); 1482 if (!cluster) 1483 return -ENOMEM; 1484 1485 cluster->dev = dev; 1486 1487 ret = devm_of_platform_populate(dev); 1488 if (ret) { 1489 dev_err_probe(dev, ret, "failed to populate platform dev\n"); 1490 kfree(cluster); 1491 return ret; 1492 } 1493 1494 /* wire in so each core can be cleaned up at driver remove */ 1495 platform_set_drvdata(pdev, cluster); 1496 1497 ret = zynqmp_r5_cluster_init(cluster); 1498 if (ret) { 1499 kfree(cluster); 1500 platform_set_drvdata(pdev, NULL); 1501 dev_err_probe(dev, ret, "Invalid r5f subsystem device tree\n"); 1502 return ret; 1503 } 1504 1505 ret = devm_add_action_or_reset(dev, zynqmp_r5_cluster_exit, pdev); 1506 if (ret) 1507 return ret; 1508 1509 return 0; 1510 } 1511 1512 /* Match table for OF platform binding */ 1513 static const struct of_device_id zynqmp_r5_remoteproc_match[] = { 1514 { .compatible = "xlnx,versal-net-r52fss", }, 1515 { .compatible = "xlnx,versal-r5fss", }, 1516 { .compatible = "xlnx,zynqmp-r5fss", }, 1517 { /* end of list */ }, 1518 }; 1519 MODULE_DEVICE_TABLE(of, zynqmp_r5_remoteproc_match); 1520 1521 static struct platform_driver zynqmp_r5_remoteproc_driver = { 1522 .probe = zynqmp_r5_remoteproc_probe, 1523 .driver = { 1524 .name = "zynqmp_r5_remoteproc", 1525 .of_match_table = zynqmp_r5_remoteproc_match, 1526 }, 1527 }; 1528 module_platform_driver(zynqmp_r5_remoteproc_driver); 1529 1530 MODULE_DESCRIPTION("Xilinx R5F remote processor driver"); 1531 MODULE_AUTHOR("Xilinx Inc."); 1532 MODULE_LICENSE("GPL"); 1533