1 /* 2 * ST's Remote Processor Control Driver 3 * 4 * Copyright (C) 2015 STMicroelectronics - All Rights Reserved 5 * 6 * Author: Ludovic Barre <ludovic.barre@st.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/clk.h> 14 #include <linux/dma-mapping.h> 15 #include <linux/err.h> 16 #include <linux/interrupt.h> 17 #include <linux/kernel.h> 18 #include <linux/mfd/syscon.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/of_device.h> 22 #include <linux/of_reserved_mem.h> 23 #include <linux/platform_device.h> 24 #include <linux/regmap.h> 25 #include <linux/remoteproc.h> 26 #include <linux/reset.h> 27 28 struct st_rproc_config { 29 bool sw_reset; 30 bool pwr_reset; 31 unsigned long bootaddr_mask; 32 }; 33 34 struct st_rproc { 35 struct st_rproc_config *config; 36 struct reset_control *sw_reset; 37 struct reset_control *pwr_reset; 38 struct clk *clk; 39 u32 clk_rate; 40 struct regmap *boot_base; 41 u32 boot_offset; 42 }; 43 44 static int st_rproc_start(struct rproc *rproc) 45 { 46 struct st_rproc *ddata = rproc->priv; 47 int err; 48 49 regmap_update_bits(ddata->boot_base, ddata->boot_offset, 50 ddata->config->bootaddr_mask, rproc->bootaddr); 51 52 err = clk_enable(ddata->clk); 53 if (err) { 54 dev_err(&rproc->dev, "Failed to enable clock\n"); 55 return err; 56 } 57 58 if (ddata->config->sw_reset) { 59 err = reset_control_deassert(ddata->sw_reset); 60 if (err) { 61 dev_err(&rproc->dev, "Failed to deassert S/W Reset\n"); 62 goto sw_reset_fail; 63 } 64 } 65 66 if (ddata->config->pwr_reset) { 67 err = reset_control_deassert(ddata->pwr_reset); 68 if (err) { 69 dev_err(&rproc->dev, "Failed to deassert Power Reset\n"); 70 goto pwr_reset_fail; 71 } 72 } 73 74 dev_info(&rproc->dev, "Started from 0x%x\n", rproc->bootaddr); 75 76 return 0; 77 78 79 pwr_reset_fail: 80 if (ddata->config->pwr_reset) 81 reset_control_assert(ddata->sw_reset); 82 sw_reset_fail: 83 clk_disable(ddata->clk); 84 85 return err; 86 } 87 88 static int st_rproc_stop(struct rproc *rproc) 89 { 90 struct st_rproc *ddata = rproc->priv; 91 int sw_err = 0, pwr_err = 0; 92 93 if (ddata->config->sw_reset) { 94 sw_err = reset_control_assert(ddata->sw_reset); 95 if (sw_err) 96 dev_err(&rproc->dev, "Failed to assert S/W Reset\n"); 97 } 98 99 if (ddata->config->pwr_reset) { 100 pwr_err = reset_control_assert(ddata->pwr_reset); 101 if (pwr_err) 102 dev_err(&rproc->dev, "Failed to assert Power Reset\n"); 103 } 104 105 clk_disable(ddata->clk); 106 107 return sw_err ?: pwr_err; 108 } 109 110 static struct rproc_ops st_rproc_ops = { 111 .start = st_rproc_start, 112 .stop = st_rproc_stop, 113 }; 114 115 /* 116 * Fetch state of the processor: 0 is off, 1 is on. 117 */ 118 static int st_rproc_state(struct platform_device *pdev) 119 { 120 struct rproc *rproc = platform_get_drvdata(pdev); 121 struct st_rproc *ddata = rproc->priv; 122 int reset_sw = 0, reset_pwr = 0; 123 124 if (ddata->config->sw_reset) 125 reset_sw = reset_control_status(ddata->sw_reset); 126 127 if (ddata->config->pwr_reset) 128 reset_pwr = reset_control_status(ddata->pwr_reset); 129 130 if (reset_sw < 0 || reset_pwr < 0) 131 return -EINVAL; 132 133 return !reset_sw && !reset_pwr; 134 } 135 136 static const struct st_rproc_config st40_rproc_cfg = { 137 .sw_reset = true, 138 .pwr_reset = true, 139 .bootaddr_mask = GENMASK(28, 1), 140 }; 141 142 static const struct st_rproc_config st231_rproc_cfg = { 143 .sw_reset = true, 144 .pwr_reset = false, 145 .bootaddr_mask = GENMASK(31, 6), 146 }; 147 148 static const struct of_device_id st_rproc_match[] = { 149 { .compatible = "st,st40-rproc", .data = &st40_rproc_cfg }, 150 { .compatible = "st,st231-rproc", .data = &st231_rproc_cfg }, 151 {}, 152 }; 153 MODULE_DEVICE_TABLE(of, st_rproc_match); 154 155 static int st_rproc_parse_dt(struct platform_device *pdev) 156 { 157 struct device *dev = &pdev->dev; 158 struct rproc *rproc = platform_get_drvdata(pdev); 159 struct st_rproc *ddata = rproc->priv; 160 struct device_node *np = dev->of_node; 161 int err; 162 163 if (ddata->config->sw_reset) { 164 ddata->sw_reset = devm_reset_control_get(dev, "sw_reset"); 165 if (IS_ERR(ddata->sw_reset)) { 166 dev_err(dev, "Failed to get S/W Reset\n"); 167 return PTR_ERR(ddata->sw_reset); 168 } 169 } 170 171 if (ddata->config->pwr_reset) { 172 ddata->pwr_reset = devm_reset_control_get(dev, "pwr_reset"); 173 if (IS_ERR(ddata->pwr_reset)) { 174 dev_err(dev, "Failed to get Power Reset\n"); 175 return PTR_ERR(ddata->pwr_reset); 176 } 177 } 178 179 ddata->clk = devm_clk_get(dev, NULL); 180 if (IS_ERR(ddata->clk)) { 181 dev_err(dev, "Failed to get clock\n"); 182 return PTR_ERR(ddata->clk); 183 } 184 185 err = of_property_read_u32(np, "clock-frequency", &ddata->clk_rate); 186 if (err) { 187 dev_err(dev, "failed to get clock frequency\n"); 188 return err; 189 } 190 191 ddata->boot_base = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); 192 if (IS_ERR(ddata->boot_base)) { 193 dev_err(dev, "Boot base not found\n"); 194 return PTR_ERR(ddata->boot_base); 195 } 196 197 err = of_property_read_u32_index(np, "st,syscfg", 1, 198 &ddata->boot_offset); 199 if (err) { 200 dev_err(dev, "Boot offset not found\n"); 201 return -EINVAL; 202 } 203 204 err = of_reserved_mem_device_init(dev); 205 if (err) { 206 dev_err(dev, "Failed to obtain shared memory\n"); 207 return err; 208 } 209 210 err = clk_prepare(ddata->clk); 211 if (err) 212 dev_err(dev, "failed to get clock\n"); 213 214 return err; 215 } 216 217 static int st_rproc_probe(struct platform_device *pdev) 218 { 219 struct device *dev = &pdev->dev; 220 const struct of_device_id *match; 221 struct st_rproc *ddata; 222 struct device_node *np = dev->of_node; 223 struct rproc *rproc; 224 int enabled; 225 int ret; 226 227 match = of_match_device(st_rproc_match, dev); 228 if (!match || !match->data) { 229 dev_err(dev, "No device match found\n"); 230 return -ENODEV; 231 } 232 233 rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata)); 234 if (!rproc) 235 return -ENOMEM; 236 237 rproc->has_iommu = false; 238 ddata = rproc->priv; 239 ddata->config = (struct st_rproc_config *)match->data; 240 241 platform_set_drvdata(pdev, rproc); 242 243 ret = st_rproc_parse_dt(pdev); 244 if (ret) 245 goto free_rproc; 246 247 enabled = st_rproc_state(pdev); 248 if (enabled < 0) 249 goto free_rproc; 250 251 if (enabled) { 252 atomic_inc(&rproc->power); 253 rproc->state = RPROC_RUNNING; 254 } else { 255 clk_set_rate(ddata->clk, ddata->clk_rate); 256 } 257 258 ret = rproc_add(rproc); 259 if (ret) 260 goto free_rproc; 261 262 return 0; 263 264 free_rproc: 265 rproc_put(rproc); 266 return ret; 267 } 268 269 static int st_rproc_remove(struct platform_device *pdev) 270 { 271 struct rproc *rproc = platform_get_drvdata(pdev); 272 struct st_rproc *ddata = rproc->priv; 273 274 rproc_del(rproc); 275 276 clk_disable_unprepare(ddata->clk); 277 278 of_reserved_mem_device_release(&pdev->dev); 279 280 rproc_put(rproc); 281 282 return 0; 283 } 284 285 static struct platform_driver st_rproc_driver = { 286 .probe = st_rproc_probe, 287 .remove = st_rproc_remove, 288 .driver = { 289 .name = "st-rproc", 290 .of_match_table = of_match_ptr(st_rproc_match), 291 }, 292 }; 293 module_platform_driver(st_rproc_driver); 294 295 MODULE_DESCRIPTION("ST Remote Processor Control Driver"); 296 MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>"); 297 MODULE_LICENSE("GPL v2"); 298