1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * PRU-ICSS remoteproc driver for various TI SoCs 4 * 5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - https://www.ti.com/ 6 * 7 * Author(s): 8 * Suman Anna <s-anna@ti.com> 9 * Andrew F. Davis <afd@ti.com> 10 * Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> for Texas Instruments 11 */ 12 13 #include <linux/bitops.h> 14 #include <linux/debugfs.h> 15 #include <linux/irqdomain.h> 16 #include <linux/module.h> 17 #include <linux/of_device.h> 18 #include <linux/of_irq.h> 19 #include <linux/pruss_driver.h> 20 #include <linux/remoteproc.h> 21 22 #include "remoteproc_internal.h" 23 #include "remoteproc_elf_helpers.h" 24 #include "pru_rproc.h" 25 26 /* PRU_ICSS_PRU_CTRL registers */ 27 #define PRU_CTRL_CTRL 0x0000 28 #define PRU_CTRL_STS 0x0004 29 #define PRU_CTRL_WAKEUP_EN 0x0008 30 #define PRU_CTRL_CYCLE 0x000C 31 #define PRU_CTRL_STALL 0x0010 32 #define PRU_CTRL_CTBIR0 0x0020 33 #define PRU_CTRL_CTBIR1 0x0024 34 #define PRU_CTRL_CTPPR0 0x0028 35 #define PRU_CTRL_CTPPR1 0x002C 36 37 /* CTRL register bit-fields */ 38 #define CTRL_CTRL_SOFT_RST_N BIT(0) 39 #define CTRL_CTRL_EN BIT(1) 40 #define CTRL_CTRL_SLEEPING BIT(2) 41 #define CTRL_CTRL_CTR_EN BIT(3) 42 #define CTRL_CTRL_SINGLE_STEP BIT(8) 43 #define CTRL_CTRL_RUNSTATE BIT(15) 44 45 /* PRU_ICSS_PRU_DEBUG registers */ 46 #define PRU_DEBUG_GPREG(x) (0x0000 + (x) * 4) 47 #define PRU_DEBUG_CT_REG(x) (0x0080 + (x) * 4) 48 49 /* PRU/RTU/Tx_PRU Core IRAM address masks */ 50 #define PRU_IRAM_ADDR_MASK 0x3ffff 51 #define PRU0_IRAM_ADDR_MASK 0x34000 52 #define PRU1_IRAM_ADDR_MASK 0x38000 53 #define RTU0_IRAM_ADDR_MASK 0x4000 54 #define RTU1_IRAM_ADDR_MASK 0x6000 55 #define TX_PRU0_IRAM_ADDR_MASK 0xa000 56 #define TX_PRU1_IRAM_ADDR_MASK 0xc000 57 58 /* PRU device addresses for various type of PRU RAMs */ 59 #define PRU_IRAM_DA 0 /* Instruction RAM */ 60 #define PRU_PDRAM_DA 0 /* Primary Data RAM */ 61 #define PRU_SDRAM_DA 0x2000 /* Secondary Data RAM */ 62 #define PRU_SHRDRAM_DA 0x10000 /* Shared Data RAM */ 63 64 #define MAX_PRU_SYS_EVENTS 160 65 66 /** 67 * enum pru_iomem - PRU core memory/register range identifiers 68 * 69 * @PRU_IOMEM_IRAM: PRU Instruction RAM range 70 * @PRU_IOMEM_CTRL: PRU Control register range 71 * @PRU_IOMEM_DEBUG: PRU Debug register range 72 * @PRU_IOMEM_MAX: just keep this one at the end 73 */ 74 enum pru_iomem { 75 PRU_IOMEM_IRAM = 0, 76 PRU_IOMEM_CTRL, 77 PRU_IOMEM_DEBUG, 78 PRU_IOMEM_MAX, 79 }; 80 81 /** 82 * enum pru_type - PRU core type identifier 83 * 84 * @PRU_TYPE_PRU: Programmable Real-time Unit 85 * @PRU_TYPE_RTU: Auxiliary Programmable Real-Time Unit 86 * @PRU_TYPE_TX_PRU: Transmit Programmable Real-Time Unit 87 * @PRU_TYPE_MAX: just keep this one at the end 88 */ 89 enum pru_type { 90 PRU_TYPE_PRU = 0, 91 PRU_TYPE_RTU, 92 PRU_TYPE_TX_PRU, 93 PRU_TYPE_MAX, 94 }; 95 96 /** 97 * struct pru_private_data - device data for a PRU core 98 * @type: type of the PRU core (PRU, RTU, Tx_PRU) 99 * @is_k3: flag used to identify the need for special load handling 100 */ 101 struct pru_private_data { 102 enum pru_type type; 103 unsigned int is_k3 : 1; 104 }; 105 106 /** 107 * struct pru_rproc - PRU remoteproc structure 108 * @id: id of the PRU core within the PRUSS 109 * @dev: PRU core device pointer 110 * @pruss: back-reference to parent PRUSS structure 111 * @rproc: remoteproc pointer for this PRU core 112 * @data: PRU core specific data 113 * @mem_regions: data for each of the PRU memory regions 114 * @fw_name: name of firmware image used during loading 115 * @mapped_irq: virtual interrupt numbers of created fw specific mapping 116 * @pru_interrupt_map: pointer to interrupt mapping description (firmware) 117 * @pru_interrupt_map_sz: pru_interrupt_map size 118 * @dbg_single_step: debug state variable to set PRU into single step mode 119 * @dbg_continuous: debug state variable to restore PRU execution mode 120 * @evt_count: number of mapped events 121 */ 122 struct pru_rproc { 123 int id; 124 struct device *dev; 125 struct pruss *pruss; 126 struct rproc *rproc; 127 const struct pru_private_data *data; 128 struct pruss_mem_region mem_regions[PRU_IOMEM_MAX]; 129 const char *fw_name; 130 unsigned int *mapped_irq; 131 struct pru_irq_rsc *pru_interrupt_map; 132 size_t pru_interrupt_map_sz; 133 u32 dbg_single_step; 134 u32 dbg_continuous; 135 u8 evt_count; 136 }; 137 138 static inline u32 pru_control_read_reg(struct pru_rproc *pru, unsigned int reg) 139 { 140 return readl_relaxed(pru->mem_regions[PRU_IOMEM_CTRL].va + reg); 141 } 142 143 static inline 144 void pru_control_write_reg(struct pru_rproc *pru, unsigned int reg, u32 val) 145 { 146 writel_relaxed(val, pru->mem_regions[PRU_IOMEM_CTRL].va + reg); 147 } 148 149 static inline u32 pru_debug_read_reg(struct pru_rproc *pru, unsigned int reg) 150 { 151 return readl_relaxed(pru->mem_regions[PRU_IOMEM_DEBUG].va + reg); 152 } 153 154 static int regs_show(struct seq_file *s, void *data) 155 { 156 struct rproc *rproc = s->private; 157 struct pru_rproc *pru = rproc->priv; 158 int i, nregs = 32; 159 u32 pru_sts; 160 int pru_is_running; 161 162 seq_puts(s, "============== Control Registers ==============\n"); 163 seq_printf(s, "CTRL := 0x%08x\n", 164 pru_control_read_reg(pru, PRU_CTRL_CTRL)); 165 pru_sts = pru_control_read_reg(pru, PRU_CTRL_STS); 166 seq_printf(s, "STS (PC) := 0x%08x (0x%08x)\n", pru_sts, pru_sts << 2); 167 seq_printf(s, "WAKEUP_EN := 0x%08x\n", 168 pru_control_read_reg(pru, PRU_CTRL_WAKEUP_EN)); 169 seq_printf(s, "CYCLE := 0x%08x\n", 170 pru_control_read_reg(pru, PRU_CTRL_CYCLE)); 171 seq_printf(s, "STALL := 0x%08x\n", 172 pru_control_read_reg(pru, PRU_CTRL_STALL)); 173 seq_printf(s, "CTBIR0 := 0x%08x\n", 174 pru_control_read_reg(pru, PRU_CTRL_CTBIR0)); 175 seq_printf(s, "CTBIR1 := 0x%08x\n", 176 pru_control_read_reg(pru, PRU_CTRL_CTBIR1)); 177 seq_printf(s, "CTPPR0 := 0x%08x\n", 178 pru_control_read_reg(pru, PRU_CTRL_CTPPR0)); 179 seq_printf(s, "CTPPR1 := 0x%08x\n", 180 pru_control_read_reg(pru, PRU_CTRL_CTPPR1)); 181 182 seq_puts(s, "=============== Debug Registers ===============\n"); 183 pru_is_running = pru_control_read_reg(pru, PRU_CTRL_CTRL) & 184 CTRL_CTRL_RUNSTATE; 185 if (pru_is_running) { 186 seq_puts(s, "PRU is executing, cannot print/access debug registers.\n"); 187 return 0; 188 } 189 190 for (i = 0; i < nregs; i++) { 191 seq_printf(s, "GPREG%-2d := 0x%08x\tCT_REG%-2d := 0x%08x\n", 192 i, pru_debug_read_reg(pru, PRU_DEBUG_GPREG(i)), 193 i, pru_debug_read_reg(pru, PRU_DEBUG_CT_REG(i))); 194 } 195 196 return 0; 197 } 198 DEFINE_SHOW_ATTRIBUTE(regs); 199 200 /* 201 * Control PRU single-step mode 202 * 203 * This is a debug helper function used for controlling the single-step 204 * mode of the PRU. The PRU Debug registers are not accessible when the 205 * PRU is in RUNNING state. 206 * 207 * Writing a non-zero value sets the PRU into single-step mode irrespective 208 * of its previous state. The PRU mode is saved only on the first set into 209 * a single-step mode. Writing a zero value will restore the PRU into its 210 * original mode. 211 */ 212 static int pru_rproc_debug_ss_set(void *data, u64 val) 213 { 214 struct rproc *rproc = data; 215 struct pru_rproc *pru = rproc->priv; 216 u32 reg_val; 217 218 val = val ? 1 : 0; 219 if (!val && !pru->dbg_single_step) 220 return 0; 221 222 reg_val = pru_control_read_reg(pru, PRU_CTRL_CTRL); 223 224 if (val && !pru->dbg_single_step) 225 pru->dbg_continuous = reg_val; 226 227 if (val) 228 reg_val |= CTRL_CTRL_SINGLE_STEP | CTRL_CTRL_EN; 229 else 230 reg_val = pru->dbg_continuous; 231 232 pru->dbg_single_step = val; 233 pru_control_write_reg(pru, PRU_CTRL_CTRL, reg_val); 234 235 return 0; 236 } 237 238 static int pru_rproc_debug_ss_get(void *data, u64 *val) 239 { 240 struct rproc *rproc = data; 241 struct pru_rproc *pru = rproc->priv; 242 243 *val = pru->dbg_single_step; 244 245 return 0; 246 } 247 DEFINE_DEBUGFS_ATTRIBUTE(pru_rproc_debug_ss_fops, pru_rproc_debug_ss_get, 248 pru_rproc_debug_ss_set, "%llu\n"); 249 250 /* 251 * Create PRU-specific debugfs entries 252 * 253 * The entries are created only if the parent remoteproc debugfs directory 254 * exists, and will be cleaned up by the remoteproc core. 255 */ 256 static void pru_rproc_create_debug_entries(struct rproc *rproc) 257 { 258 if (!rproc->dbg_dir) 259 return; 260 261 debugfs_create_file("regs", 0400, rproc->dbg_dir, 262 rproc, ®s_fops); 263 debugfs_create_file("single_step", 0600, rproc->dbg_dir, 264 rproc, &pru_rproc_debug_ss_fops); 265 } 266 267 static void pru_dispose_irq_mapping(struct pru_rproc *pru) 268 { 269 if (!pru->mapped_irq) 270 return; 271 272 while (pru->evt_count) { 273 pru->evt_count--; 274 if (pru->mapped_irq[pru->evt_count] > 0) 275 irq_dispose_mapping(pru->mapped_irq[pru->evt_count]); 276 } 277 278 kfree(pru->mapped_irq); 279 pru->mapped_irq = NULL; 280 } 281 282 /* 283 * Parse the custom PRU interrupt map resource and configure the INTC 284 * appropriately. 285 */ 286 static int pru_handle_intrmap(struct rproc *rproc) 287 { 288 struct device *dev = rproc->dev.parent; 289 struct pru_rproc *pru = rproc->priv; 290 struct pru_irq_rsc *rsc = pru->pru_interrupt_map; 291 struct irq_fwspec fwspec; 292 struct device_node *parent, *irq_parent; 293 int i, ret = 0; 294 295 /* not having pru_interrupt_map is not an error */ 296 if (!rsc) 297 return 0; 298 299 /* currently supporting only type 0 */ 300 if (rsc->type != 0) { 301 dev_err(dev, "unsupported rsc type: %d\n", rsc->type); 302 return -EINVAL; 303 } 304 305 if (rsc->num_evts > MAX_PRU_SYS_EVENTS) 306 return -EINVAL; 307 308 if (sizeof(*rsc) + rsc->num_evts * sizeof(struct pruss_int_map) != 309 pru->pru_interrupt_map_sz) 310 return -EINVAL; 311 312 pru->evt_count = rsc->num_evts; 313 pru->mapped_irq = kcalloc(pru->evt_count, sizeof(unsigned int), 314 GFP_KERNEL); 315 if (!pru->mapped_irq) { 316 pru->evt_count = 0; 317 return -ENOMEM; 318 } 319 320 /* 321 * parse and fill in system event to interrupt channel and 322 * channel-to-host mapping. The interrupt controller to be used 323 * for these mappings for a given PRU remoteproc is always its 324 * corresponding sibling PRUSS INTC node. 325 */ 326 parent = of_get_parent(dev_of_node(pru->dev)); 327 if (!parent) { 328 kfree(pru->mapped_irq); 329 pru->mapped_irq = NULL; 330 pru->evt_count = 0; 331 return -ENODEV; 332 } 333 334 irq_parent = of_get_child_by_name(parent, "interrupt-controller"); 335 of_node_put(parent); 336 if (!irq_parent) { 337 kfree(pru->mapped_irq); 338 pru->mapped_irq = NULL; 339 pru->evt_count = 0; 340 return -ENODEV; 341 } 342 343 fwspec.fwnode = of_node_to_fwnode(irq_parent); 344 fwspec.param_count = 3; 345 for (i = 0; i < pru->evt_count; i++) { 346 fwspec.param[0] = rsc->pru_intc_map[i].event; 347 fwspec.param[1] = rsc->pru_intc_map[i].chnl; 348 fwspec.param[2] = rsc->pru_intc_map[i].host; 349 350 dev_dbg(dev, "mapping%d: event %d, chnl %d, host %d\n", 351 i, fwspec.param[0], fwspec.param[1], fwspec.param[2]); 352 353 pru->mapped_irq[i] = irq_create_fwspec_mapping(&fwspec); 354 if (!pru->mapped_irq[i]) { 355 dev_err(dev, "failed to get virq for fw mapping %d: event %d chnl %d host %d\n", 356 i, fwspec.param[0], fwspec.param[1], 357 fwspec.param[2]); 358 ret = -EINVAL; 359 goto map_fail; 360 } 361 } 362 of_node_put(irq_parent); 363 364 return ret; 365 366 map_fail: 367 pru_dispose_irq_mapping(pru); 368 of_node_put(irq_parent); 369 370 return ret; 371 } 372 373 static int pru_rproc_start(struct rproc *rproc) 374 { 375 struct device *dev = &rproc->dev; 376 struct pru_rproc *pru = rproc->priv; 377 const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" }; 378 u32 val; 379 int ret; 380 381 dev_dbg(dev, "starting %s%d: entry-point = 0x%llx\n", 382 names[pru->data->type], pru->id, (rproc->bootaddr >> 2)); 383 384 ret = pru_handle_intrmap(rproc); 385 /* 386 * reset references to pru interrupt map - they will stop being valid 387 * after rproc_start returns 388 */ 389 pru->pru_interrupt_map = NULL; 390 pru->pru_interrupt_map_sz = 0; 391 if (ret) 392 return ret; 393 394 val = CTRL_CTRL_EN | ((rproc->bootaddr >> 2) << 16); 395 pru_control_write_reg(pru, PRU_CTRL_CTRL, val); 396 397 return 0; 398 } 399 400 static int pru_rproc_stop(struct rproc *rproc) 401 { 402 struct device *dev = &rproc->dev; 403 struct pru_rproc *pru = rproc->priv; 404 const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" }; 405 u32 val; 406 407 dev_dbg(dev, "stopping %s%d\n", names[pru->data->type], pru->id); 408 409 val = pru_control_read_reg(pru, PRU_CTRL_CTRL); 410 val &= ~CTRL_CTRL_EN; 411 pru_control_write_reg(pru, PRU_CTRL_CTRL, val); 412 413 /* dispose irq mapping - new firmware can provide new mapping */ 414 pru_dispose_irq_mapping(pru); 415 416 return 0; 417 } 418 419 /* 420 * Convert PRU device address (data spaces only) to kernel virtual address. 421 * 422 * Each PRU has access to all data memories within the PRUSS, accessible at 423 * different ranges. So, look through both its primary and secondary Data 424 * RAMs as well as any shared Data RAM to convert a PRU device address to 425 * kernel virtual address. Data RAM0 is primary Data RAM for PRU0 and Data 426 * RAM1 is primary Data RAM for PRU1. 427 */ 428 static void *pru_d_da_to_va(struct pru_rproc *pru, u32 da, size_t len) 429 { 430 struct pruss_mem_region dram0, dram1, shrd_ram; 431 struct pruss *pruss = pru->pruss; 432 u32 offset; 433 void *va = NULL; 434 435 if (len == 0) 436 return NULL; 437 438 dram0 = pruss->mem_regions[PRUSS_MEM_DRAM0]; 439 dram1 = pruss->mem_regions[PRUSS_MEM_DRAM1]; 440 /* PRU1 has its local RAM addresses reversed */ 441 if (pru->id == 1) 442 swap(dram0, dram1); 443 shrd_ram = pruss->mem_regions[PRUSS_MEM_SHRD_RAM2]; 444 445 if (da >= PRU_PDRAM_DA && da + len <= PRU_PDRAM_DA + dram0.size) { 446 offset = da - PRU_PDRAM_DA; 447 va = (__force void *)(dram0.va + offset); 448 } else if (da >= PRU_SDRAM_DA && 449 da + len <= PRU_SDRAM_DA + dram1.size) { 450 offset = da - PRU_SDRAM_DA; 451 va = (__force void *)(dram1.va + offset); 452 } else if (da >= PRU_SHRDRAM_DA && 453 da + len <= PRU_SHRDRAM_DA + shrd_ram.size) { 454 offset = da - PRU_SHRDRAM_DA; 455 va = (__force void *)(shrd_ram.va + offset); 456 } 457 458 return va; 459 } 460 461 /* 462 * Convert PRU device address (instruction space) to kernel virtual address. 463 * 464 * A PRU does not have an unified address space. Each PRU has its very own 465 * private Instruction RAM, and its device address is identical to that of 466 * its primary Data RAM device address. 467 */ 468 static void *pru_i_da_to_va(struct pru_rproc *pru, u32 da, size_t len) 469 { 470 u32 offset; 471 void *va = NULL; 472 473 if (len == 0) 474 return NULL; 475 476 /* 477 * GNU binutils do not support multiple address spaces. The GNU 478 * linker's default linker script places IRAM at an arbitrary high 479 * offset, in order to differentiate it from DRAM. Hence we need to 480 * strip the artificial offset in the IRAM addresses coming from the 481 * ELF file. 482 * 483 * The TI proprietary linker would never set those higher IRAM address 484 * bits anyway. PRU architecture limits the program counter to 16-bit 485 * word-address range. This in turn corresponds to 18-bit IRAM 486 * byte-address range for ELF. 487 * 488 * Two more bits are added just in case to make the final 20-bit mask. 489 * Idea is to have a safeguard in case TI decides to add banking 490 * in future SoCs. 491 */ 492 da &= 0xfffff; 493 494 if (da >= PRU_IRAM_DA && 495 da + len <= PRU_IRAM_DA + pru->mem_regions[PRU_IOMEM_IRAM].size) { 496 offset = da - PRU_IRAM_DA; 497 va = (__force void *)(pru->mem_regions[PRU_IOMEM_IRAM].va + 498 offset); 499 } 500 501 return va; 502 } 503 504 /* 505 * Provide address translations for only PRU Data RAMs through the remoteproc 506 * core for any PRU client drivers. The PRU Instruction RAM access is restricted 507 * only to the PRU loader code. 508 */ 509 static void *pru_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 510 { 511 struct pru_rproc *pru = rproc->priv; 512 513 return pru_d_da_to_va(pru, da, len); 514 } 515 516 /* PRU-specific address translator used by PRU loader. */ 517 static void *pru_da_to_va(struct rproc *rproc, u64 da, size_t len, bool is_iram) 518 { 519 struct pru_rproc *pru = rproc->priv; 520 void *va; 521 522 if (is_iram) 523 va = pru_i_da_to_va(pru, da, len); 524 else 525 va = pru_d_da_to_va(pru, da, len); 526 527 return va; 528 } 529 530 static struct rproc_ops pru_rproc_ops = { 531 .start = pru_rproc_start, 532 .stop = pru_rproc_stop, 533 .da_to_va = pru_rproc_da_to_va, 534 }; 535 536 /* 537 * Custom memory copy implementation for ICSSG PRU/RTU/Tx_PRU Cores 538 * 539 * The ICSSG PRU/RTU/Tx_PRU cores have a memory copying issue with IRAM 540 * memories, that is not seen on previous generation SoCs. The data is reflected 541 * properly in the IRAM memories only for integer (4-byte) copies. Any unaligned 542 * copies result in all the other pre-existing bytes zeroed out within that 543 * 4-byte boundary, thereby resulting in wrong text/code in the IRAMs. Also, the 544 * IRAM memory port interface does not allow any 8-byte copies (as commonly used 545 * by ARM64 memcpy implementation) and throws an exception. The DRAM memory 546 * ports do not show this behavior. 547 */ 548 static int pru_rproc_memcpy(void *dest, const void *src, size_t count) 549 { 550 const u32 *s = src; 551 u32 *d = dest; 552 size_t size = count / 4; 553 u32 *tmp_src = NULL; 554 555 /* 556 * TODO: relax limitation of 4-byte aligned dest addresses and copy 557 * sizes 558 */ 559 if ((long)dest % 4 || count % 4) 560 return -EINVAL; 561 562 /* src offsets in ELF firmware image can be non-aligned */ 563 if ((long)src % 4) { 564 tmp_src = kmemdup(src, count, GFP_KERNEL); 565 if (!tmp_src) 566 return -ENOMEM; 567 s = tmp_src; 568 } 569 570 while (size--) 571 *d++ = *s++; 572 573 kfree(tmp_src); 574 575 return 0; 576 } 577 578 static int 579 pru_rproc_load_elf_segments(struct rproc *rproc, const struct firmware *fw) 580 { 581 struct pru_rproc *pru = rproc->priv; 582 struct device *dev = &rproc->dev; 583 struct elf32_hdr *ehdr; 584 struct elf32_phdr *phdr; 585 int i, ret = 0; 586 const u8 *elf_data = fw->data; 587 588 ehdr = (struct elf32_hdr *)elf_data; 589 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff); 590 591 /* go through the available ELF segments */ 592 for (i = 0; i < ehdr->e_phnum; i++, phdr++) { 593 u32 da = phdr->p_paddr; 594 u32 memsz = phdr->p_memsz; 595 u32 filesz = phdr->p_filesz; 596 u32 offset = phdr->p_offset; 597 bool is_iram; 598 void *ptr; 599 600 if (phdr->p_type != PT_LOAD || !filesz) 601 continue; 602 603 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n", 604 phdr->p_type, da, memsz, filesz); 605 606 if (filesz > memsz) { 607 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n", 608 filesz, memsz); 609 ret = -EINVAL; 610 break; 611 } 612 613 if (offset + filesz > fw->size) { 614 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n", 615 offset + filesz, fw->size); 616 ret = -EINVAL; 617 break; 618 } 619 620 /* grab the kernel address for this device address */ 621 is_iram = phdr->p_flags & PF_X; 622 ptr = pru_da_to_va(rproc, da, memsz, is_iram); 623 if (!ptr) { 624 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz); 625 ret = -EINVAL; 626 break; 627 } 628 629 if (pru->data->is_k3) { 630 ret = pru_rproc_memcpy(ptr, elf_data + phdr->p_offset, 631 filesz); 632 if (ret) { 633 dev_err(dev, "PRU memory copy failed for da 0x%x memsz 0x%x\n", 634 da, memsz); 635 break; 636 } 637 } else { 638 memcpy(ptr, elf_data + phdr->p_offset, filesz); 639 } 640 641 /* skip the memzero logic performed by remoteproc ELF loader */ 642 } 643 644 return ret; 645 } 646 647 static const void * 648 pru_rproc_find_interrupt_map(struct device *dev, const struct firmware *fw) 649 { 650 struct elf32_shdr *shdr, *name_table_shdr; 651 const char *name_table; 652 const u8 *elf_data = fw->data; 653 struct elf32_hdr *ehdr = (struct elf32_hdr *)elf_data; 654 u16 shnum = ehdr->e_shnum; 655 u16 shstrndx = ehdr->e_shstrndx; 656 int i; 657 658 /* first, get the section header */ 659 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff); 660 /* compute name table section header entry in shdr array */ 661 name_table_shdr = shdr + shstrndx; 662 /* finally, compute the name table section address in elf */ 663 name_table = elf_data + name_table_shdr->sh_offset; 664 665 for (i = 0; i < shnum; i++, shdr++) { 666 u32 size = shdr->sh_size; 667 u32 offset = shdr->sh_offset; 668 u32 name = shdr->sh_name; 669 670 if (strcmp(name_table + name, ".pru_irq_map")) 671 continue; 672 673 /* make sure we have the entire irq map */ 674 if (offset + size > fw->size || offset + size < size) { 675 dev_err(dev, ".pru_irq_map section truncated\n"); 676 return ERR_PTR(-EINVAL); 677 } 678 679 /* make sure irq map has at least the header */ 680 if (sizeof(struct pru_irq_rsc) > size) { 681 dev_err(dev, "header-less .pru_irq_map section\n"); 682 return ERR_PTR(-EINVAL); 683 } 684 685 return shdr; 686 } 687 688 dev_dbg(dev, "no .pru_irq_map section found for this fw\n"); 689 690 return NULL; 691 } 692 693 /* 694 * Use a custom parse_fw callback function for dealing with PRU firmware 695 * specific sections. 696 * 697 * The firmware blob can contain optional ELF sections: .resource_table section 698 * and .pru_irq_map one. The second one contains the PRUSS interrupt mapping 699 * description, which needs to be setup before powering on the PRU core. To 700 * avoid RAM wastage this ELF section is not mapped to any ELF segment (by the 701 * firmware linker) and therefore is not loaded to PRU memory. 702 */ 703 static int pru_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw) 704 { 705 struct device *dev = &rproc->dev; 706 struct pru_rproc *pru = rproc->priv; 707 const u8 *elf_data = fw->data; 708 const void *shdr; 709 u8 class = fw_elf_get_class(fw); 710 u64 sh_offset; 711 int ret; 712 713 /* load optional rsc table */ 714 ret = rproc_elf_load_rsc_table(rproc, fw); 715 if (ret == -EINVAL) 716 dev_dbg(&rproc->dev, "no resource table found for this fw\n"); 717 else if (ret) 718 return ret; 719 720 /* find .pru_interrupt_map section, not having it is not an error */ 721 shdr = pru_rproc_find_interrupt_map(dev, fw); 722 if (IS_ERR(shdr)) 723 return PTR_ERR(shdr); 724 725 if (!shdr) 726 return 0; 727 728 /* preserve pointer to PRU interrupt map together with it size */ 729 sh_offset = elf_shdr_get_sh_offset(class, shdr); 730 pru->pru_interrupt_map = (struct pru_irq_rsc *)(elf_data + sh_offset); 731 pru->pru_interrupt_map_sz = elf_shdr_get_sh_size(class, shdr); 732 733 return 0; 734 } 735 736 /* 737 * Compute PRU id based on the IRAM addresses. The PRU IRAMs are 738 * always at a particular offset within the PRUSS address space. 739 */ 740 static int pru_rproc_set_id(struct pru_rproc *pru) 741 { 742 int ret = 0; 743 744 switch (pru->mem_regions[PRU_IOMEM_IRAM].pa & PRU_IRAM_ADDR_MASK) { 745 case TX_PRU0_IRAM_ADDR_MASK: 746 fallthrough; 747 case RTU0_IRAM_ADDR_MASK: 748 fallthrough; 749 case PRU0_IRAM_ADDR_MASK: 750 pru->id = 0; 751 break; 752 case TX_PRU1_IRAM_ADDR_MASK: 753 fallthrough; 754 case RTU1_IRAM_ADDR_MASK: 755 fallthrough; 756 case PRU1_IRAM_ADDR_MASK: 757 pru->id = 1; 758 break; 759 default: 760 ret = -EINVAL; 761 } 762 763 return ret; 764 } 765 766 static int pru_rproc_probe(struct platform_device *pdev) 767 { 768 struct device *dev = &pdev->dev; 769 struct device_node *np = dev->of_node; 770 struct platform_device *ppdev = to_platform_device(dev->parent); 771 struct pru_rproc *pru; 772 const char *fw_name; 773 struct rproc *rproc = NULL; 774 struct resource *res; 775 int i, ret; 776 const struct pru_private_data *data; 777 const char *mem_names[PRU_IOMEM_MAX] = { "iram", "control", "debug" }; 778 779 data = of_device_get_match_data(&pdev->dev); 780 if (!data) 781 return -ENODEV; 782 783 ret = of_property_read_string(np, "firmware-name", &fw_name); 784 if (ret) { 785 dev_err(dev, "unable to retrieve firmware-name %d\n", ret); 786 return ret; 787 } 788 789 rproc = devm_rproc_alloc(dev, pdev->name, &pru_rproc_ops, fw_name, 790 sizeof(*pru)); 791 if (!rproc) { 792 dev_err(dev, "rproc_alloc failed\n"); 793 return -ENOMEM; 794 } 795 /* use a custom load function to deal with PRU-specific quirks */ 796 rproc->ops->load = pru_rproc_load_elf_segments; 797 798 /* use a custom parse function to deal with PRU-specific resources */ 799 rproc->ops->parse_fw = pru_rproc_parse_fw; 800 801 /* error recovery is not supported for PRUs */ 802 rproc->recovery_disabled = true; 803 804 /* 805 * rproc_add will auto-boot the processor normally, but this is not 806 * desired with PRU client driven boot-flow methodology. A PRU 807 * application/client driver will boot the corresponding PRU 808 * remote-processor as part of its state machine either through the 809 * remoteproc sysfs interface or through the equivalent kernel API. 810 */ 811 rproc->auto_boot = false; 812 813 pru = rproc->priv; 814 pru->dev = dev; 815 pru->data = data; 816 pru->pruss = platform_get_drvdata(ppdev); 817 pru->rproc = rproc; 818 pru->fw_name = fw_name; 819 820 for (i = 0; i < ARRAY_SIZE(mem_names); i++) { 821 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 822 mem_names[i]); 823 pru->mem_regions[i].va = devm_ioremap_resource(dev, res); 824 if (IS_ERR(pru->mem_regions[i].va)) { 825 dev_err(dev, "failed to parse and map memory resource %d %s\n", 826 i, mem_names[i]); 827 ret = PTR_ERR(pru->mem_regions[i].va); 828 return ret; 829 } 830 pru->mem_regions[i].pa = res->start; 831 pru->mem_regions[i].size = resource_size(res); 832 833 dev_dbg(dev, "memory %8s: pa %pa size 0x%zx va %pK\n", 834 mem_names[i], &pru->mem_regions[i].pa, 835 pru->mem_regions[i].size, pru->mem_regions[i].va); 836 } 837 838 ret = pru_rproc_set_id(pru); 839 if (ret < 0) 840 return ret; 841 842 platform_set_drvdata(pdev, rproc); 843 844 ret = devm_rproc_add(dev, pru->rproc); 845 if (ret) { 846 dev_err(dev, "rproc_add failed: %d\n", ret); 847 return ret; 848 } 849 850 pru_rproc_create_debug_entries(rproc); 851 852 dev_dbg(dev, "PRU rproc node %pOF probed successfully\n", np); 853 854 return 0; 855 } 856 857 static int pru_rproc_remove(struct platform_device *pdev) 858 { 859 struct device *dev = &pdev->dev; 860 struct rproc *rproc = platform_get_drvdata(pdev); 861 862 dev_dbg(dev, "%s: removing rproc %s\n", __func__, rproc->name); 863 864 return 0; 865 } 866 867 static const struct pru_private_data pru_data = { 868 .type = PRU_TYPE_PRU, 869 }; 870 871 static const struct pru_private_data k3_pru_data = { 872 .type = PRU_TYPE_PRU, 873 .is_k3 = 1, 874 }; 875 876 static const struct pru_private_data k3_rtu_data = { 877 .type = PRU_TYPE_RTU, 878 .is_k3 = 1, 879 }; 880 881 static const struct pru_private_data k3_tx_pru_data = { 882 .type = PRU_TYPE_TX_PRU, 883 .is_k3 = 1, 884 }; 885 886 static const struct of_device_id pru_rproc_match[] = { 887 { .compatible = "ti,am3356-pru", .data = &pru_data }, 888 { .compatible = "ti,am4376-pru", .data = &pru_data }, 889 { .compatible = "ti,am5728-pru", .data = &pru_data }, 890 { .compatible = "ti,am642-pru", .data = &k3_pru_data }, 891 { .compatible = "ti,am642-rtu", .data = &k3_rtu_data }, 892 { .compatible = "ti,am642-tx-pru", .data = &k3_tx_pru_data }, 893 { .compatible = "ti,k2g-pru", .data = &pru_data }, 894 { .compatible = "ti,am654-pru", .data = &k3_pru_data }, 895 { .compatible = "ti,am654-rtu", .data = &k3_rtu_data }, 896 { .compatible = "ti,am654-tx-pru", .data = &k3_tx_pru_data }, 897 { .compatible = "ti,j721e-pru", .data = &k3_pru_data }, 898 { .compatible = "ti,j721e-rtu", .data = &k3_rtu_data }, 899 { .compatible = "ti,j721e-tx-pru", .data = &k3_tx_pru_data }, 900 { .compatible = "ti,am625-pru", .data = &k3_pru_data }, 901 {}, 902 }; 903 MODULE_DEVICE_TABLE(of, pru_rproc_match); 904 905 static struct platform_driver pru_rproc_driver = { 906 .driver = { 907 .name = "pru-rproc", 908 .of_match_table = pru_rproc_match, 909 .suppress_bind_attrs = true, 910 }, 911 .probe = pru_rproc_probe, 912 .remove = pru_rproc_remove, 913 }; 914 module_platform_driver(pru_rproc_driver); 915 916 MODULE_AUTHOR("Suman Anna <s-anna@ti.com>"); 917 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 918 MODULE_AUTHOR("Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>"); 919 MODULE_DESCRIPTION("PRU-ICSS Remote Processor Driver"); 920 MODULE_LICENSE("GPL v2"); 921