1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de> 4 * Copyright 2021 NXP 5 */ 6 7 #ifndef _IMX_RPROC_H 8 #define _IMX_RPROC_H 9 10 /* address translation table */ 11 struct imx_rproc_att { 12 u32 da; /* device address (From Cortex M4 view)*/ 13 u32 sa; /* system bus address */ 14 u32 size; /* size of reg range */ 15 int flags; 16 }; 17 18 /* dcfg flags */ 19 #define IMX_RPROC_NEED_SYSTEM_OFF BIT(0) 20 #define IMX_RPROC_NEED_CLKS BIT(1) 21 22 struct imx_rproc_plat_ops { 23 int (*start)(struct rproc *rproc); 24 int (*stop)(struct rproc *rproc); 25 int (*detach)(struct rproc *rproc); 26 int (*detect_mode)(struct rproc *rproc); 27 int (*prepare)(struct rproc *rproc); 28 }; 29 30 struct imx_rproc_dcfg { 31 u32 src_reg; 32 u32 src_mask; 33 u32 src_start; 34 u32 src_stop; 35 u32 gpr_reg; 36 u32 gpr_wait; 37 const struct imx_rproc_att *att; 38 size_t att_size; 39 u32 flags; 40 const struct imx_rproc_plat_ops *ops; 41 /* For System Manager(SM) based SoCs */ 42 u32 cpuid; /* ID of the remote core */ 43 u32 lmid; /* ID of the Logcial Machine */ 44 }; 45 46 #endif /* _IMX_RPROC_H */ 47