1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de> 4 */ 5 6 #include <dt-bindings/firmware/imx/rsrc.h> 7 #include <linux/arm-smccc.h> 8 #include <linux/clk.h> 9 #include <linux/err.h> 10 #include <linux/firmware/imx/sci.h> 11 #include <linux/firmware/imx/sm.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/mailbox_client.h> 15 #include <linux/mfd/syscon.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_address.h> 19 #include <linux/of_reserved_mem.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm_domain.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/reboot.h> 24 #include <linux/regmap.h> 25 #include <linux/remoteproc.h> 26 #include <linux/scmi_imx_protocol.h> 27 #include <linux/workqueue.h> 28 29 #include "imx_rproc.h" 30 #include "remoteproc_internal.h" 31 32 #define IMX7D_SRC_SCR 0x0C 33 #define IMX7D_ENABLE_M4 BIT(3) 34 #define IMX7D_SW_M4P_RST BIT(2) 35 #define IMX7D_SW_M4C_RST BIT(1) 36 #define IMX7D_SW_M4C_NON_SCLR_RST BIT(0) 37 38 #define IMX7D_M4_RST_MASK (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \ 39 | IMX7D_SW_M4C_RST \ 40 | IMX7D_SW_M4C_NON_SCLR_RST) 41 42 #define IMX7D_M4_START (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \ 43 | IMX7D_SW_M4C_RST) 44 #define IMX7D_M4_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST | \ 45 IMX7D_SW_M4C_NON_SCLR_RST) 46 47 #define IMX8M_M7_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST) 48 #define IMX8M_M7_POLL IMX7D_ENABLE_M4 49 50 #define IMX8M_GPR22 0x58 51 #define IMX8M_GPR22_CM7_CPUWAIT BIT(0) 52 53 /* Address: 0x020D8000 */ 54 #define IMX6SX_SRC_SCR 0x00 55 #define IMX6SX_ENABLE_M4 BIT(22) 56 #define IMX6SX_SW_M4P_RST BIT(12) 57 #define IMX6SX_SW_M4C_NON_SCLR_RST BIT(4) 58 #define IMX6SX_SW_M4C_RST BIT(3) 59 60 #define IMX6SX_M4_START (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \ 61 | IMX6SX_SW_M4C_RST) 62 #define IMX6SX_M4_STOP (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4C_RST | \ 63 IMX6SX_SW_M4C_NON_SCLR_RST) 64 #define IMX6SX_M4_RST_MASK (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \ 65 | IMX6SX_SW_M4C_NON_SCLR_RST \ 66 | IMX6SX_SW_M4C_RST) 67 68 #define IMX_RPROC_MEM_MAX 32 69 70 #define IMX_SIP_RPROC 0xC2000005 71 #define IMX_SIP_RPROC_START 0x00 72 #define IMX_SIP_RPROC_STARTED 0x01 73 #define IMX_SIP_RPROC_STOP 0x02 74 75 #define IMX_SC_IRQ_GROUP_REBOOTED 5 76 77 /** 78 * struct imx_rproc_mem - slim internal memory structure 79 * @cpu_addr: MPU virtual address of the memory region 80 * @sys_addr: Bus address used to access the memory region 81 * @size: Size of the memory region 82 */ 83 struct imx_rproc_mem { 84 void __iomem *cpu_addr; 85 phys_addr_t sys_addr; 86 size_t size; 87 }; 88 89 /* att flags: lower 16 bits specifying core, higher 16 bits for flags */ 90 /* M4 own area. Can be mapped at probe */ 91 #define ATT_OWN BIT(31) 92 #define ATT_IOMEM BIT(30) 93 94 #define ATT_CORE_MASK 0xffff 95 #define ATT_CORE(I) BIT((I)) 96 97 /* Linux has permission to handle the Logical Machine of remote cores */ 98 #define IMX_RPROC_FLAGS_SM_LMM_CTRL BIT(0) 99 100 static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block); 101 static void imx_rproc_free_mbox(void *data); 102 103 /* Forward declarations for platform operations */ 104 static const struct imx_rproc_plat_ops imx_rproc_ops_sm_lmm; 105 static const struct imx_rproc_plat_ops imx_rproc_ops_sm_cpu; 106 107 struct imx_rproc { 108 struct device *dev; 109 struct regmap *regmap; 110 struct regmap *gpr; 111 struct rproc *rproc; 112 const struct imx_rproc_dcfg *dcfg; 113 struct imx_rproc_mem mem[IMX_RPROC_MEM_MAX]; 114 struct clk *clk; 115 struct mbox_client cl; 116 struct mbox_chan *tx_ch; 117 struct mbox_chan *rx_ch; 118 struct work_struct rproc_work; 119 struct workqueue_struct *workqueue; 120 void __iomem *rsc_table; 121 struct imx_sc_ipc *ipc_handle; 122 struct notifier_block rproc_nb; 123 u32 rproc_pt; /* partition id */ 124 u32 rsrc_id; /* resource id */ 125 u32 entry; /* cpu start address */ 126 u32 core_index; 127 struct dev_pm_domain_list *pd_list; 128 const struct imx_rproc_plat_ops *ops; 129 /* 130 * For i.MX System Manager based systems 131 * BIT 0: IMX_RPROC_FLAGS_SM_LMM_CTRL(RPROC LM is under Linux control ) 132 */ 133 u32 flags; 134 }; 135 136 static const struct imx_rproc_att imx_rproc_att_imx95_m7[] = { 137 /* dev addr , sys addr , size , flags */ 138 /* TCM CODE NON-SECURE */ 139 { 0x00000000, 0x203C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 140 141 /* TCM SYS NON-SECURE*/ 142 { 0x20000000, 0x20400000, 0x00040000, ATT_OWN | ATT_IOMEM }, 143 144 /* DDR */ 145 { 0x80000000, 0x80000000, 0x50000000, 0 }, 146 }; 147 148 static const struct imx_rproc_att imx_rproc_att_imx93[] = { 149 /* dev addr , sys addr , size , flags */ 150 /* TCM CODE NON-SECURE */ 151 { 0x0FFC0000, 0x201C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 152 153 /* TCM CODE SECURE */ 154 { 0x1FFC0000, 0x201C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 155 156 /* TCM SYS NON-SECURE*/ 157 { 0x20000000, 0x20200000, 0x00040000, ATT_OWN | ATT_IOMEM }, 158 159 /* TCM SYS SECURE*/ 160 { 0x30000000, 0x20200000, 0x00040000, ATT_OWN | ATT_IOMEM }, 161 162 /* DDR */ 163 { 0x80000000, 0x80000000, 0x10000000, 0 }, 164 { 0x90000000, 0x80000000, 0x10000000, 0 }, 165 166 { 0xC0000000, 0xC0000000, 0x10000000, 0 }, 167 { 0xD0000000, 0xC0000000, 0x10000000, 0 }, 168 }; 169 170 static const struct imx_rproc_att imx_rproc_att_imx8qm[] = { 171 /* dev addr , sys addr , size , flags */ 172 { 0x08000000, 0x08000000, 0x10000000, 0}, 173 /* TCML */ 174 { 0x1FFE0000, 0x34FE0000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(0)}, 175 { 0x1FFE0000, 0x38FE0000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(1)}, 176 /* TCMU */ 177 { 0x20000000, 0x35000000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(0)}, 178 { 0x20000000, 0x39000000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(1)}, 179 /* DDR (Data) */ 180 { 0x80000000, 0x80000000, 0x60000000, 0 }, 181 }; 182 183 static const struct imx_rproc_att imx_rproc_att_imx8qxp[] = { 184 { 0x08000000, 0x08000000, 0x10000000, 0 }, 185 /* TCML/U */ 186 { 0x1FFE0000, 0x34FE0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 187 /* OCRAM(Low 96KB) */ 188 { 0x21000000, 0x00100000, 0x00018000, 0 }, 189 /* OCRAM */ 190 { 0x21100000, 0x00100000, 0x00040000, 0 }, 191 /* DDR (Data) */ 192 { 0x80000000, 0x80000000, 0x60000000, 0 }, 193 }; 194 195 static const struct imx_rproc_att imx_rproc_att_imx8mn[] = { 196 /* dev addr , sys addr , size , flags */ 197 /* ITCM */ 198 { 0x00000000, 0x007E0000, 0x00020000, ATT_OWN | ATT_IOMEM }, 199 /* OCRAM_S */ 200 { 0x00180000, 0x00180000, 0x00009000, 0 }, 201 /* OCRAM */ 202 { 0x00900000, 0x00900000, 0x00020000, 0 }, 203 /* OCRAM */ 204 { 0x00920000, 0x00920000, 0x00020000, 0 }, 205 /* OCRAM */ 206 { 0x00940000, 0x00940000, 0x00050000, 0 }, 207 /* QSPI Code - alias */ 208 { 0x08000000, 0x08000000, 0x08000000, 0 }, 209 /* DDR (Code) - alias */ 210 { 0x10000000, 0x40000000, 0x0FFE0000, 0 }, 211 /* DTCM */ 212 { 0x20000000, 0x00800000, 0x00020000, ATT_OWN | ATT_IOMEM }, 213 /* OCRAM_S - alias */ 214 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN }, 215 /* OCRAM */ 216 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN }, 217 /* OCRAM */ 218 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN }, 219 /* OCRAM */ 220 { 0x20240000, 0x00940000, 0x00040000, ATT_OWN }, 221 /* DDR (Data) */ 222 { 0x40000000, 0x40000000, 0x80000000, 0 }, 223 }; 224 225 static const struct imx_rproc_att imx_rproc_att_imx8mq[] = { 226 /* dev addr , sys addr , size , flags */ 227 /* TCML - alias */ 228 { 0x00000000, 0x007e0000, 0x00020000, ATT_IOMEM}, 229 /* OCRAM_S */ 230 { 0x00180000, 0x00180000, 0x00008000, 0 }, 231 /* OCRAM */ 232 { 0x00900000, 0x00900000, 0x00020000, 0 }, 233 /* OCRAM */ 234 { 0x00920000, 0x00920000, 0x00020000, 0 }, 235 /* QSPI Code - alias */ 236 { 0x08000000, 0x08000000, 0x08000000, 0 }, 237 /* DDR (Code) - alias */ 238 { 0x10000000, 0x40000000, 0x0FFE0000, 0 }, 239 /* TCML/U */ 240 { 0x1FFE0000, 0x007E0000, 0x00040000, ATT_OWN | ATT_IOMEM}, 241 /* OCRAM_S */ 242 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN }, 243 /* OCRAM */ 244 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN }, 245 /* OCRAM */ 246 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN }, 247 /* DDR (Data) */ 248 { 0x40000000, 0x40000000, 0x80000000, 0 }, 249 }; 250 251 static const struct imx_rproc_att imx_rproc_att_imx8ulp[] = { 252 {0x1FFC0000, 0x1FFC0000, 0xC0000, ATT_OWN}, 253 {0x21000000, 0x21000000, 0x10000, ATT_OWN}, 254 {0x80000000, 0x80000000, 0x60000000, 0} 255 }; 256 257 static const struct imx_rproc_att imx_rproc_att_imx7ulp[] = { 258 {0x1FFD0000, 0x1FFD0000, 0x30000, ATT_OWN}, 259 {0x20000000, 0x20000000, 0x10000, ATT_OWN}, 260 {0x2F000000, 0x2F000000, 0x20000, ATT_OWN}, 261 {0x2F020000, 0x2F020000, 0x20000, ATT_OWN}, 262 {0x60000000, 0x60000000, 0x40000000, 0} 263 }; 264 265 static const struct imx_rproc_att imx_rproc_att_imx7d[] = { 266 /* dev addr , sys addr , size , flags */ 267 /* OCRAM_S (M4 Boot code) - alias */ 268 { 0x00000000, 0x00180000, 0x00008000, 0 }, 269 /* OCRAM_S (Code) */ 270 { 0x00180000, 0x00180000, 0x00008000, ATT_OWN }, 271 /* OCRAM (Code) - alias */ 272 { 0x00900000, 0x00900000, 0x00020000, 0 }, 273 /* OCRAM_EPDC (Code) - alias */ 274 { 0x00920000, 0x00920000, 0x00020000, 0 }, 275 /* OCRAM_PXP (Code) - alias */ 276 { 0x00940000, 0x00940000, 0x00008000, 0 }, 277 /* TCML (Code) */ 278 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM }, 279 /* DDR (Code) - alias, first part of DDR (Data) */ 280 { 0x10000000, 0x80000000, 0x0FFF0000, 0 }, 281 282 /* TCMU (Data) */ 283 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM }, 284 /* OCRAM (Data) */ 285 { 0x20200000, 0x00900000, 0x00020000, 0 }, 286 /* OCRAM_EPDC (Data) */ 287 { 0x20220000, 0x00920000, 0x00020000, 0 }, 288 /* OCRAM_PXP (Data) */ 289 { 0x20240000, 0x00940000, 0x00008000, 0 }, 290 /* DDR (Data) */ 291 { 0x80000000, 0x80000000, 0x60000000, 0 }, 292 }; 293 294 static const struct imx_rproc_att imx_rproc_att_imx6sx[] = { 295 /* dev addr , sys addr , size , flags */ 296 /* TCML (M4 Boot Code) - alias */ 297 { 0x00000000, 0x007F8000, 0x00008000, ATT_IOMEM }, 298 /* OCRAM_S (Code) */ 299 { 0x00180000, 0x008F8000, 0x00004000, 0 }, 300 /* OCRAM_S (Code) - alias */ 301 { 0x00180000, 0x008FC000, 0x00004000, 0 }, 302 /* TCML (Code) */ 303 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM }, 304 /* DDR (Code) - alias, first part of DDR (Data) */ 305 { 0x10000000, 0x80000000, 0x0FFF8000, 0 }, 306 307 /* TCMU (Data) */ 308 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM }, 309 /* OCRAM_S (Data) - alias? */ 310 { 0x208F8000, 0x008F8000, 0x00004000, 0 }, 311 /* DDR (Data) */ 312 { 0x80000000, 0x80000000, 0x60000000, 0 }, 313 }; 314 315 static int imx_rproc_arm_smc_start(struct rproc *rproc) 316 { 317 struct arm_smccc_res res; 318 319 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res); 320 321 return res.a0; 322 } 323 324 static int imx_rproc_mmio_start(struct rproc *rproc) 325 { 326 struct imx_rproc *priv = rproc->priv; 327 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 328 329 if (priv->gpr) 330 return regmap_clear_bits(priv->gpr, dcfg->gpr_reg, dcfg->gpr_wait); 331 332 return regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask, dcfg->src_start); 333 } 334 335 static int imx_rproc_scu_api_start(struct rproc *rproc) 336 { 337 struct imx_rproc *priv = rproc->priv; 338 339 return imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, true, priv->entry); 340 } 341 342 static int imx_rproc_sm_cpu_start(struct rproc *rproc) 343 { 344 struct imx_rproc *priv = rproc->priv; 345 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 346 int ret; 347 348 ret = scmi_imx_cpu_reset_vector_set(dcfg->cpuid, 0, true, false, false); 349 if (ret) { 350 dev_err(priv->dev, "Failed to set reset vector cpuid(%u): %d\n", dcfg->cpuid, ret); 351 return ret; 352 } 353 354 return scmi_imx_cpu_start(dcfg->cpuid, true); 355 } 356 357 static int imx_rproc_sm_lmm_start(struct rproc *rproc) 358 { 359 struct imx_rproc *priv = rproc->priv; 360 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 361 struct device *dev = priv->dev; 362 int ret; 363 364 /* 365 * If the remoteproc core can't start the M7, it will already be 366 * handled in imx_rproc_sm_lmm_prepare(). 367 */ 368 ret = scmi_imx_lmm_reset_vector_set(dcfg->lmid, dcfg->cpuid, 0, 0); 369 if (ret) { 370 dev_err(dev, "Failed to set reset vector lmid(%u), cpuid(%u): %d\n", 371 dcfg->lmid, dcfg->cpuid, ret); 372 return ret; 373 } 374 375 ret = scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_BOOT, 0); 376 if (ret) { 377 dev_err(dev, "Failed to boot lmm(%d): %d\n", dcfg->lmid, ret); 378 return ret; 379 } 380 381 return 0; 382 } 383 384 static int imx_rproc_start(struct rproc *rproc) 385 { 386 struct imx_rproc *priv = rproc->priv; 387 struct device *dev = priv->dev; 388 int ret; 389 390 ret = imx_rproc_xtr_mbox_init(rproc, true); 391 if (ret) 392 return ret; 393 394 if (!priv->ops || !priv->ops->start) 395 return -EOPNOTSUPP; 396 397 ret = priv->ops->start(rproc); 398 if (ret) 399 dev_err(dev, "Failed to enable remote core!\n"); 400 401 return ret; 402 } 403 404 static int imx_rproc_arm_smc_stop(struct rproc *rproc) 405 { 406 struct imx_rproc *priv = rproc->priv; 407 struct arm_smccc_res res; 408 409 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STOP, 0, 0, 0, 0, 0, 0, &res); 410 if (res.a1) 411 dev_info(priv->dev, "Not in wfi, force stopped\n"); 412 413 return res.a0; 414 } 415 416 static int imx_rproc_mmio_stop(struct rproc *rproc) 417 { 418 struct imx_rproc *priv = rproc->priv; 419 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 420 int ret; 421 422 if (priv->gpr) { 423 ret = regmap_set_bits(priv->gpr, dcfg->gpr_reg, dcfg->gpr_wait); 424 if (ret) { 425 dev_err(priv->dev, "Failed to quiescence M4 platform!\n"); 426 return ret; 427 } 428 } 429 430 return regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask, dcfg->src_stop); 431 } 432 433 static int imx_rproc_scu_api_stop(struct rproc *rproc) 434 { 435 struct imx_rproc *priv = rproc->priv; 436 437 return imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, false, priv->entry); 438 } 439 440 static int imx_rproc_sm_cpu_stop(struct rproc *rproc) 441 { 442 struct imx_rproc *priv = rproc->priv; 443 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 444 445 return scmi_imx_cpu_start(dcfg->cpuid, false); 446 } 447 448 static int imx_rproc_sm_lmm_stop(struct rproc *rproc) 449 { 450 struct imx_rproc *priv = rproc->priv; 451 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 452 453 if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_CTRL)) 454 return -EACCES; 455 456 return scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_SHUTDOWN, 0); 457 } 458 459 static int imx_rproc_stop(struct rproc *rproc) 460 { 461 struct imx_rproc *priv = rproc->priv; 462 struct device *dev = priv->dev; 463 int ret; 464 465 if (!priv->ops || !priv->ops->stop) 466 return -EOPNOTSUPP; 467 468 ret = priv->ops->stop(rproc); 469 if (ret) 470 dev_err(dev, "Failed to stop remote core\n"); 471 else 472 imx_rproc_free_mbox(rproc); 473 474 return ret; 475 } 476 477 static int imx_rproc_da_to_sys(struct imx_rproc *priv, u64 da, 478 size_t len, u64 *sys, bool *is_iomem) 479 { 480 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 481 int i; 482 483 /* parse address translation table */ 484 for (i = 0; i < dcfg->att_size; i++) { 485 const struct imx_rproc_att *att = &dcfg->att[i]; 486 487 /* 488 * Ignore entries not belong to current core: 489 * i.MX8QM has dual general M4_[0,1] cores, M4_0's own entries 490 * has "ATT_CORE(0) & BIT(0)" true, M4_1's own entries has 491 * "ATT_CORE(1) & BIT(1)" true. 492 */ 493 if (att->flags & ATT_CORE_MASK) { 494 if (!((BIT(priv->core_index)) & (att->flags & ATT_CORE_MASK))) 495 continue; 496 } 497 498 if (da >= att->da && da + len < att->da + att->size) { 499 unsigned int offset = da - att->da; 500 501 *sys = att->sa + offset; 502 if (is_iomem) 503 *is_iomem = att->flags & ATT_IOMEM; 504 return 0; 505 } 506 } 507 508 dev_warn(priv->dev, "Translation failed: da = 0x%llx len = 0x%zx\n", 509 da, len); 510 return -ENOENT; 511 } 512 513 static void *imx_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 514 { 515 struct imx_rproc *priv = rproc->priv; 516 void *va = NULL; 517 u64 sys; 518 int i; 519 520 if (len == 0) 521 return NULL; 522 523 /* 524 * On device side we have many aliases, so we need to convert device 525 * address (M4) to system bus address first. 526 */ 527 if (imx_rproc_da_to_sys(priv, da, len, &sys, is_iomem)) 528 return NULL; 529 530 for (i = 0; i < IMX_RPROC_MEM_MAX; i++) { 531 if (sys >= priv->mem[i].sys_addr && sys + len < 532 priv->mem[i].sys_addr + priv->mem[i].size) { 533 unsigned int offset = sys - priv->mem[i].sys_addr; 534 /* __force to make sparse happy with type conversion */ 535 va = (__force void *)(priv->mem[i].cpu_addr + offset); 536 break; 537 } 538 } 539 540 dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%zx va = 0x%p\n", 541 da, len, va); 542 543 return va; 544 } 545 546 static int imx_rproc_mem_alloc(struct rproc *rproc, 547 struct rproc_mem_entry *mem) 548 { 549 struct device *dev = rproc->dev.parent; 550 void *va; 551 552 dev_dbg(dev, "map memory: %p+%zx\n", &mem->dma, mem->len); 553 va = ioremap_wc(mem->dma, mem->len); 554 if (IS_ERR_OR_NULL(va)) { 555 dev_err(dev, "Unable to map memory region: %p+%zx\n", 556 &mem->dma, mem->len); 557 return -ENOMEM; 558 } 559 560 /* Update memory entry va */ 561 mem->va = va; 562 563 return 0; 564 } 565 566 static int imx_rproc_mem_release(struct rproc *rproc, 567 struct rproc_mem_entry *mem) 568 { 569 dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma); 570 iounmap(mem->va); 571 572 return 0; 573 } 574 575 static int imx_rproc_sm_lmm_prepare(struct rproc *rproc) 576 { 577 struct imx_rproc *priv = rproc->priv; 578 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 579 int ret; 580 581 /* 582 * IMX_RPROC_FLAGS_SM_LMM_CTRL not set indicates Linux is not able 583 * to start/stop M7, then if rproc is not in detached state, 584 * prepare should fail. If in detached state, this is in rproc_attach() 585 * path. 586 */ 587 if (rproc->state == RPROC_DETACHED) 588 return 0; 589 590 if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_CTRL)) 591 return -EACCES; 592 593 /* Power on the Logical Machine to make sure TCM is available. */ 594 ret = scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_POWER_ON, 0); 595 if (ret) { 596 dev_err(priv->dev, "Failed to power on lmm(%d): %d\n", dcfg->lmid, ret); 597 return ret; 598 } 599 600 dev_info(priv->dev, "lmm(%d) powered on by Linux\n", dcfg->lmid); 601 602 return 0; 603 } 604 605 static int imx_rproc_prepare(struct rproc *rproc) 606 { 607 struct imx_rproc *priv = rproc->priv; 608 struct device_node *np = priv->dev->of_node; 609 struct rproc_mem_entry *mem; 610 int i = 0; 611 u32 da; 612 613 /* Register associated reserved memory regions */ 614 while (1) { 615 int err; 616 struct resource res; 617 618 err = of_reserved_mem_region_to_resource(np, i++, &res); 619 if (err) 620 return 0; 621 622 /* 623 * Ignore the first memory region which will be used vdev buffer. 624 * No need to do extra handlings, rproc_add_virtio_dev will handle it. 625 */ 626 if (strstarts(res.name, "vdev0buffer")) 627 continue; 628 629 if (strstarts(res.name, "rsc-table")) 630 continue; 631 632 /* No need to translate pa to da, i.MX use same map */ 633 da = res.start; 634 635 /* Register memory region */ 636 mem = rproc_mem_entry_init(priv->dev, NULL, (dma_addr_t)res.start, 637 resource_size(&res), da, 638 imx_rproc_mem_alloc, imx_rproc_mem_release, 639 "%.*s", strchrnul(res.name, '@') - res.name, 640 res.name); 641 if (!mem) 642 return -ENOMEM; 643 644 rproc_coredump_add_segment(rproc, da, resource_size(&res)); 645 rproc_add_carveout(rproc, mem); 646 } 647 648 if (priv->ops && priv->ops->prepare) 649 return priv->ops->prepare(rproc); 650 651 return 0; 652 } 653 654 static int imx_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw) 655 { 656 int ret; 657 658 ret = rproc_elf_load_rsc_table(rproc, fw); 659 if (ret) 660 dev_info(&rproc->dev, "No resource table in elf\n"); 661 662 return 0; 663 } 664 665 static void imx_rproc_kick(struct rproc *rproc, int vqid) 666 { 667 struct imx_rproc *priv = rproc->priv; 668 int err; 669 __u32 mmsg; 670 671 if (!priv->tx_ch) { 672 dev_err(priv->dev, "No initialized mbox tx channel\n"); 673 return; 674 } 675 676 /* 677 * Send the index of the triggered virtqueue as the mu payload. 678 * Let remote processor know which virtqueue is used. 679 */ 680 mmsg = vqid << 16; 681 682 err = mbox_send_message(priv->tx_ch, (void *)&mmsg); 683 if (err < 0) 684 dev_err(priv->dev, "%s: failed (%d, err:%d)\n", 685 __func__, vqid, err); 686 } 687 688 static int imx_rproc_attach(struct rproc *rproc) 689 { 690 return imx_rproc_xtr_mbox_init(rproc, true); 691 } 692 693 static int imx_rproc_scu_api_detach(struct rproc *rproc) 694 { 695 struct imx_rproc *priv = rproc->priv; 696 697 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) 698 return -EOPNOTSUPP; 699 700 imx_rproc_free_mbox(rproc); 701 702 return 0; 703 } 704 705 static int imx_rproc_detach(struct rproc *rproc) 706 { 707 struct imx_rproc *priv = rproc->priv; 708 709 if (!priv->ops || !priv->ops->detach) 710 return -EOPNOTSUPP; 711 712 return priv->ops->detach(rproc); 713 } 714 715 static struct resource_table *imx_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz) 716 { 717 struct imx_rproc *priv = rproc->priv; 718 719 /* The resource table has already been mapped in imx_rproc_addr_init */ 720 if (!priv->rsc_table) 721 return NULL; 722 723 *table_sz = SZ_1K; 724 return (struct resource_table *)priv->rsc_table; 725 } 726 727 static struct resource_table * 728 imx_rproc_elf_find_loaded_rsc_table(struct rproc *rproc, const struct firmware *fw) 729 { 730 struct imx_rproc *priv = rproc->priv; 731 732 /* No resource table in the firmware */ 733 if (!rproc->table_ptr) 734 return NULL; 735 736 if (priv->rsc_table) 737 return (struct resource_table *)priv->rsc_table; 738 739 return rproc_elf_find_loaded_rsc_table(rproc, fw); 740 } 741 742 static const struct rproc_ops imx_rproc_ops = { 743 .prepare = imx_rproc_prepare, 744 .attach = imx_rproc_attach, 745 .detach = imx_rproc_detach, 746 .start = imx_rproc_start, 747 .stop = imx_rproc_stop, 748 .kick = imx_rproc_kick, 749 .da_to_va = imx_rproc_da_to_va, 750 .load = rproc_elf_load_segments, 751 .parse_fw = imx_rproc_parse_fw, 752 .find_loaded_rsc_table = imx_rproc_elf_find_loaded_rsc_table, 753 .get_loaded_rsc_table = imx_rproc_get_loaded_rsc_table, 754 .sanity_check = rproc_elf_sanity_check, 755 .get_boot_addr = rproc_elf_get_boot_addr, 756 }; 757 758 static int imx_rproc_addr_init(struct imx_rproc *priv, 759 struct platform_device *pdev) 760 { 761 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 762 struct device *dev = &pdev->dev; 763 struct device_node *np = dev->of_node; 764 int a, b = 0, err, nph; 765 766 /* remap required addresses */ 767 for (a = 0; a < dcfg->att_size; a++) { 768 const struct imx_rproc_att *att = &dcfg->att[a]; 769 770 if (!(att->flags & ATT_OWN)) 771 continue; 772 773 if (b >= IMX_RPROC_MEM_MAX) 774 break; 775 776 if (att->flags & ATT_IOMEM) 777 priv->mem[b].cpu_addr = devm_ioremap(&pdev->dev, 778 att->sa, att->size); 779 else 780 priv->mem[b].cpu_addr = devm_ioremap_wc(&pdev->dev, 781 att->sa, att->size); 782 if (!priv->mem[b].cpu_addr) { 783 dev_err(dev, "failed to remap %#x bytes from %#x\n", att->size, att->sa); 784 return -ENOMEM; 785 } 786 priv->mem[b].sys_addr = att->sa; 787 priv->mem[b].size = att->size; 788 b++; 789 } 790 791 /* memory-region is optional property */ 792 nph = of_reserved_mem_region_count(np); 793 if (nph <= 0) 794 return 0; 795 796 /* remap optional addresses */ 797 for (a = 0; a < nph; a++) { 798 struct resource res; 799 800 err = of_reserved_mem_region_to_resource(np, a, &res); 801 if (err) { 802 dev_err(dev, "unable to resolve memory region\n"); 803 return err; 804 } 805 806 /* Not map vdevbuffer, vdevring region */ 807 if (strstarts(res.name, "vdev")) 808 continue; 809 810 if (b >= IMX_RPROC_MEM_MAX) 811 break; 812 813 /* Not use resource version, because we might share region */ 814 priv->mem[b].cpu_addr = devm_ioremap_resource_wc(&pdev->dev, &res); 815 if (!priv->mem[b].cpu_addr) { 816 dev_err(dev, "failed to remap %pr\n", &res); 817 return -ENOMEM; 818 } 819 priv->mem[b].sys_addr = res.start; 820 priv->mem[b].size = resource_size(&res); 821 if (strstarts(res.name, "rsc-table")) 822 priv->rsc_table = priv->mem[b].cpu_addr; 823 b++; 824 } 825 826 return 0; 827 } 828 829 static int imx_rproc_notified_idr_cb(int id, void *ptr, void *data) 830 { 831 struct rproc *rproc = data; 832 833 rproc_vq_interrupt(rproc, id); 834 835 return 0; 836 } 837 838 static void imx_rproc_vq_work(struct work_struct *work) 839 { 840 struct imx_rproc *priv = container_of(work, struct imx_rproc, 841 rproc_work); 842 struct rproc *rproc = priv->rproc; 843 844 idr_for_each(&rproc->notifyids, imx_rproc_notified_idr_cb, rproc); 845 } 846 847 static void imx_rproc_rx_callback(struct mbox_client *cl, void *msg) 848 { 849 struct rproc *rproc = dev_get_drvdata(cl->dev); 850 struct imx_rproc *priv = rproc->priv; 851 852 queue_work(priv->workqueue, &priv->rproc_work); 853 } 854 855 static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block) 856 { 857 struct imx_rproc *priv = rproc->priv; 858 struct device *dev = priv->dev; 859 struct mbox_client *cl; 860 861 /* 862 * stop() and detach() will free the mbox channels, so need 863 * to request mbox channels in start() and attach(). 864 * 865 * Because start() and attach() not able to handle mbox defer 866 * probe, imx_rproc_xtr_mbox_init is also called in probe(). 867 * The check is to avoid request mbox again when start() or 868 * attach() after probe() returns success. 869 */ 870 if (priv->tx_ch && priv->rx_ch) 871 return 0; 872 873 if (!of_property_present(dev->of_node, "mbox-names")) 874 return 0; 875 876 cl = &priv->cl; 877 cl->dev = dev; 878 cl->tx_block = tx_block; 879 cl->tx_tout = 100; 880 cl->knows_txdone = false; 881 cl->rx_callback = imx_rproc_rx_callback; 882 883 priv->tx_ch = mbox_request_channel_byname(cl, "tx"); 884 if (IS_ERR(priv->tx_ch)) 885 return dev_err_probe(cl->dev, PTR_ERR(priv->tx_ch), 886 "failed to request tx mailbox channel\n"); 887 888 priv->rx_ch = mbox_request_channel_byname(cl, "rx"); 889 if (IS_ERR(priv->rx_ch)) { 890 mbox_free_channel(priv->tx_ch); 891 return dev_err_probe(cl->dev, PTR_ERR(priv->rx_ch), 892 "failed to request rx mailbox channel\n"); 893 } 894 895 return 0; 896 } 897 898 static void imx_rproc_free_mbox(void *data) 899 { 900 struct rproc *rproc = data; 901 struct imx_rproc *priv = rproc->priv; 902 903 if (priv->tx_ch) { 904 mbox_free_channel(priv->tx_ch); 905 priv->tx_ch = NULL; 906 } 907 908 if (priv->rx_ch) { 909 mbox_free_channel(priv->rx_ch); 910 priv->rx_ch = NULL; 911 } 912 } 913 914 static void imx_rproc_put_scu(void *data) 915 { 916 struct imx_rproc *priv = data; 917 918 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) { 919 dev_pm_domain_detach_list(priv->pd_list); 920 return; 921 } 922 923 imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_REBOOTED, BIT(priv->rproc_pt), false); 924 imx_scu_irq_unregister_notifier(&priv->rproc_nb); 925 } 926 927 static int imx_rproc_partition_notify(struct notifier_block *nb, 928 unsigned long event, void *group) 929 { 930 struct imx_rproc *priv = container_of(nb, struct imx_rproc, rproc_nb); 931 932 /* Ignore other irqs */ 933 if (!((event & BIT(priv->rproc_pt)) && (*(u8 *)group == IMX_SC_IRQ_GROUP_REBOOTED))) 934 return 0; 935 936 rproc_report_crash(priv->rproc, RPROC_WATCHDOG); 937 938 pr_info("Partition%d reset!\n", priv->rproc_pt); 939 940 return 0; 941 } 942 943 static int imx_rproc_attach_pd(struct imx_rproc *priv) 944 { 945 struct device *dev = priv->dev; 946 int ret, i; 947 bool detached = true; 948 949 /* 950 * If there is only one power-domain entry, the platform driver framework 951 * will handle it, no need handle it in this driver. 952 */ 953 if (dev->pm_domain) 954 return 0; 955 956 ret = dev_pm_domain_attach_list(dev, NULL, &priv->pd_list); 957 if (ret < 0) 958 return ret; 959 /* 960 * If all the power domain devices are already turned on, the remote 961 * core is already powered up and running when the kernel booted (e.g., 962 * started by U-Boot's bootaux command). In this case attach to it. 963 */ 964 for (i = 0; i < ret; i++) { 965 if (!dev_pm_genpd_is_on(priv->pd_list->pd_devs[i])) { 966 detached = false; 967 break; 968 } 969 } 970 971 if (detached) 972 priv->rproc->state = RPROC_DETACHED; 973 974 return 0; 975 } 976 977 static int imx_rproc_arm_smc_detect_mode(struct rproc *rproc) 978 { 979 struct imx_rproc *priv = rproc->priv; 980 struct arm_smccc_res res; 981 982 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STARTED, 0, 0, 0, 0, 0, 0, &res); 983 if (res.a0) 984 priv->rproc->state = RPROC_DETACHED; 985 986 return 0; 987 } 988 989 static int imx_rproc_mmio_detect_mode(struct rproc *rproc) 990 { 991 const struct regmap_config config = { .name = "imx-rproc" }; 992 struct imx_rproc *priv = rproc->priv; 993 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 994 struct device *dev = priv->dev; 995 struct regmap *regmap; 996 u32 val; 997 int ret; 998 999 priv->gpr = syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,iomuxc-gpr"); 1000 if (IS_ERR(priv->gpr)) 1001 priv->gpr = NULL; 1002 1003 regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); 1004 if (IS_ERR(regmap)) { 1005 dev_err(dev, "failed to find syscon\n"); 1006 return PTR_ERR(regmap); 1007 } 1008 1009 priv->regmap = regmap; 1010 regmap_attach_dev(dev, regmap, &config); 1011 1012 if (priv->gpr) { 1013 ret = regmap_read(priv->gpr, dcfg->gpr_reg, &val); 1014 if (val & dcfg->gpr_wait) { 1015 /* 1016 * After cold boot, the CM indicates its in wait 1017 * state, but not fully powered off. Power it off 1018 * fully so firmware can be loaded into it. 1019 */ 1020 imx_rproc_stop(priv->rproc); 1021 return 0; 1022 } 1023 } 1024 1025 ret = regmap_read(regmap, dcfg->src_reg, &val); 1026 if (ret) { 1027 dev_err(dev, "Failed to read src\n"); 1028 return ret; 1029 } 1030 1031 if ((val & dcfg->src_mask) != dcfg->src_stop) 1032 priv->rproc->state = RPROC_DETACHED; 1033 1034 return 0; 1035 } 1036 1037 static int imx_rproc_scu_api_detect_mode(struct rproc *rproc) 1038 { 1039 struct imx_rproc *priv = rproc->priv; 1040 struct device *dev = priv->dev; 1041 int ret; 1042 u8 pt; 1043 1044 ret = imx_scu_get_handle(&priv->ipc_handle); 1045 if (ret) 1046 return ret; 1047 ret = of_property_read_u32(dev->of_node, "fsl,resource-id", &priv->rsrc_id); 1048 if (ret) { 1049 dev_err(dev, "No fsl,resource-id property\n"); 1050 return ret; 1051 } 1052 1053 if (priv->rsrc_id == IMX_SC_R_M4_1_PID0) 1054 priv->core_index = 1; 1055 else 1056 priv->core_index = 0; 1057 1058 ret = devm_add_action_or_reset(dev, imx_rproc_put_scu, priv); 1059 if (ret) 1060 return dev_err_probe(dev, ret, "Failed to add action for put scu\n"); 1061 1062 /* 1063 * If Mcore resource is not owned by Acore partition, It is kicked by ROM, 1064 * and Linux could only do IPC with Mcore and nothing else. 1065 */ 1066 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) { 1067 if (of_property_read_u32(dev->of_node, "fsl,entry-address", &priv->entry)) 1068 return -EINVAL; 1069 1070 return imx_rproc_attach_pd(priv); 1071 } 1072 1073 priv->rproc->state = RPROC_DETACHED; 1074 priv->rproc->recovery_disabled = false; 1075 rproc_set_feature(priv->rproc, RPROC_FEAT_ATTACH_ON_RECOVERY); 1076 1077 /* Get partition id and enable irq in SCFW */ 1078 ret = imx_sc_rm_get_resource_owner(priv->ipc_handle, priv->rsrc_id, &pt); 1079 if (ret) { 1080 dev_err(dev, "not able to get resource owner\n"); 1081 return ret; 1082 } 1083 1084 priv->rproc_pt = pt; 1085 priv->rproc_nb.notifier_call = imx_rproc_partition_notify; 1086 1087 ret = imx_scu_irq_register_notifier(&priv->rproc_nb); 1088 if (ret) { 1089 dev_err(dev, "register scu notifier failed, %d\n", ret); 1090 return ret; 1091 } 1092 1093 ret = imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_REBOOTED, BIT(priv->rproc_pt), 1094 true); 1095 if (ret) { 1096 imx_scu_irq_unregister_notifier(&priv->rproc_nb); 1097 dev_err(dev, "Enable irq failed, %d\n", ret); 1098 return ret; 1099 } 1100 1101 return 0; 1102 } 1103 1104 /* Check whether remoteproc core is responsible for M7 lifecycle */ 1105 static int imx_rproc_sm_lmm_check(struct rproc *rproc, bool started) 1106 { 1107 struct imx_rproc *priv = rproc->priv; 1108 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 1109 struct device *dev = priv->dev; 1110 int ret; 1111 1112 ret = scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_POWER_ON, 0); 1113 if (ret) { 1114 if (ret == -EACCES) { 1115 /* 1116 * M7 is booted before Linux and not under Linux Control, so only 1117 * do IPC between RPROC and Linux, not return failure 1118 */ 1119 dev_info(dev, "lmm(%d) not under Linux Control\n", dcfg->lmid); 1120 return 0; 1121 } 1122 1123 dev_err(dev, "power on lmm(%d) failed: %d\n", dcfg->lmid, ret); 1124 return ret; 1125 } 1126 1127 /* Shutdown remote processor if not started */ 1128 if (!started) { 1129 ret = scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_SHUTDOWN, 0); 1130 if (ret) { 1131 dev_err(dev, "shutdown lmm(%d) failed: %d\n", dcfg->lmid, ret); 1132 return ret; 1133 } 1134 } 1135 1136 priv->flags |= IMX_RPROC_FLAGS_SM_LMM_CTRL; 1137 1138 return 0; 1139 } 1140 1141 static int imx_rproc_sm_detect_mode(struct rproc *rproc) 1142 { 1143 struct imx_rproc *priv = rproc->priv; 1144 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 1145 struct device *dev = priv->dev; 1146 struct scmi_imx_lmm_info info; 1147 bool started = false; 1148 int ret; 1149 1150 ret = scmi_imx_cpu_started(dcfg->cpuid, &started); 1151 if (ret) { 1152 dev_err(dev, "Failed to detect cpu(%d) status: %d\n", dcfg->cpuid, ret); 1153 return ret; 1154 } 1155 1156 if (started) 1157 priv->rproc->state = RPROC_DETACHED; 1158 1159 /* Get current Linux Logical Machine ID */ 1160 ret = scmi_imx_lmm_info(LMM_ID_DISCOVER, &info); 1161 if (ret) { 1162 dev_err(dev, "Failed to get current LMM ID err: %d\n", ret); 1163 return ret; 1164 } 1165 1166 /* 1167 * Check whether M7 is in the same LM as host core(running Linux) 1168 * If yes, use CPU protocol API to manage M7. 1169 * If no, use Logical Machine API to manage M7. 1170 */ 1171 if (dcfg->lmid == info.lmid) { 1172 priv->ops = &imx_rproc_ops_sm_cpu; 1173 dev_info(dev, "Using CPU Protocol OPS\n"); 1174 return 0; 1175 } 1176 1177 priv->ops = &imx_rproc_ops_sm_lmm; 1178 dev_info(dev, "Using LMM Protocol OPS\n"); 1179 1180 return imx_rproc_sm_lmm_check(rproc, started); 1181 } 1182 1183 static int imx_rproc_detect_mode(struct imx_rproc *priv) 1184 { 1185 /* 1186 * To i.MX{7,8} ULP, Linux is under control of RTOS, no need 1187 * priv->ops or priv->ops->detect_mode, it is state RPROC_DETACHED. 1188 */ 1189 if (!priv->ops || !priv->ops->detect_mode) { 1190 priv->rproc->state = RPROC_DETACHED; 1191 return 0; 1192 } 1193 1194 return priv->ops->detect_mode(priv->rproc); 1195 } 1196 1197 static int imx_rproc_sys_off_handler(struct sys_off_data *data) 1198 { 1199 struct rproc *rproc = data->cb_data; 1200 int ret; 1201 1202 imx_rproc_free_mbox(rproc); 1203 1204 ret = imx_rproc_xtr_mbox_init(rproc, false); 1205 if (ret) { 1206 dev_err(&rproc->dev, "Failed to request non-blocking mbox\n"); 1207 return NOTIFY_BAD; 1208 } 1209 1210 return NOTIFY_DONE; 1211 } 1212 1213 static void imx_rproc_destroy_workqueue(void *data) 1214 { 1215 struct workqueue_struct *workqueue = data; 1216 1217 destroy_workqueue(workqueue); 1218 } 1219 1220 static int imx_rproc_probe(struct platform_device *pdev) 1221 { 1222 struct device *dev = &pdev->dev; 1223 struct device_node *np = dev->of_node; 1224 struct imx_rproc *priv; 1225 struct rproc *rproc; 1226 const struct imx_rproc_dcfg *dcfg; 1227 int ret; 1228 1229 /* set some other name then imx */ 1230 rproc = devm_rproc_alloc(dev, "imx-rproc", &imx_rproc_ops, 1231 NULL, sizeof(*priv)); 1232 if (!rproc) 1233 return -ENOMEM; 1234 1235 dcfg = of_device_get_match_data(dev); 1236 if (!dcfg) 1237 return -EINVAL; 1238 1239 priv = rproc->priv; 1240 priv->rproc = rproc; 1241 priv->dcfg = dcfg; 1242 priv->dev = dev; 1243 1244 if (dcfg->ops) 1245 priv->ops = dcfg->ops; 1246 1247 dev_set_drvdata(dev, rproc); 1248 priv->workqueue = create_workqueue(dev_name(dev)); 1249 if (!priv->workqueue) { 1250 dev_err(dev, "cannot create workqueue\n"); 1251 return -ENOMEM; 1252 } 1253 1254 ret = devm_add_action_or_reset(dev, imx_rproc_destroy_workqueue, priv->workqueue); 1255 if (ret) 1256 return dev_err_probe(dev, ret, "Failed to add devm destroy workqueue action\n"); 1257 1258 INIT_WORK(&priv->rproc_work, imx_rproc_vq_work); 1259 1260 ret = imx_rproc_xtr_mbox_init(rproc, true); 1261 if (ret) 1262 return ret; 1263 1264 ret = devm_add_action_or_reset(dev, imx_rproc_free_mbox, rproc); 1265 if (ret) 1266 return dev_err_probe(dev, ret, 1267 "Failed to add devm free mbox action: %d\n", ret); 1268 1269 ret = imx_rproc_addr_init(priv, pdev); 1270 if (ret) 1271 return dev_err_probe(dev, ret, "failed on imx_rproc_addr_init\n"); 1272 1273 ret = imx_rproc_detect_mode(priv); 1274 if (ret) 1275 return dev_err_probe(dev, ret, "failed on detect mode\n"); 1276 1277 /* 1278 * Handle clocks when remote core is under control of Linux AND the 1279 * clocks are not managed by system firmware. 1280 */ 1281 if (dcfg->flags & IMX_RPROC_NEED_CLKS) { 1282 priv->clk = devm_clk_get_enabled(dev, NULL); 1283 if (IS_ERR(priv->clk)) 1284 return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to enable clock\n"); 1285 } 1286 1287 if (rproc->state != RPROC_DETACHED) 1288 rproc->auto_boot = of_property_read_bool(np, "fsl,auto-boot"); 1289 1290 if (dcfg->flags & IMX_RPROC_NEED_SYSTEM_OFF) { 1291 /* 1292 * setup mailbox to non-blocking mode in 1293 * [SYS_OFF_MODE_POWER_OFF_PREPARE, SYS_OFF_MODE_RESTART_PREPARE] 1294 * phase before invoking [SYS_OFF_MODE_POWER_OFF, SYS_OFF_MODE_RESTART] 1295 * atomic chain, see kernel/reboot.c. 1296 */ 1297 ret = devm_register_sys_off_handler(dev, SYS_OFF_MODE_POWER_OFF_PREPARE, 1298 SYS_OFF_PRIO_DEFAULT, 1299 imx_rproc_sys_off_handler, rproc); 1300 if (ret) 1301 return dev_err_probe(dev, ret, "register power off handler failure\n"); 1302 1303 ret = devm_register_sys_off_handler(dev, SYS_OFF_MODE_RESTART_PREPARE, 1304 SYS_OFF_PRIO_DEFAULT, 1305 imx_rproc_sys_off_handler, rproc); 1306 if (ret) 1307 return dev_err_probe(dev, ret, "register restart handler failure\n"); 1308 } 1309 1310 pm_runtime_enable(dev); 1311 ret = pm_runtime_resume_and_get(dev); 1312 if (ret) 1313 return dev_err_probe(dev, ret, "pm_runtime get failed\n"); 1314 1315 ret = devm_rproc_add(dev, rproc); 1316 if (ret) { 1317 dev_err(dev, "rproc_add failed\n"); 1318 goto err_put_pm; 1319 } 1320 1321 return 0; 1322 1323 err_put_pm: 1324 pm_runtime_disable(dev); 1325 pm_runtime_put_noidle(dev); 1326 1327 return ret; 1328 } 1329 1330 static void imx_rproc_remove(struct platform_device *pdev) 1331 { 1332 struct rproc *rproc = platform_get_drvdata(pdev); 1333 struct imx_rproc *priv = rproc->priv; 1334 1335 pm_runtime_disable(priv->dev); 1336 pm_runtime_put_noidle(priv->dev); 1337 } 1338 1339 static const struct imx_rproc_plat_ops imx_rproc_ops_arm_smc = { 1340 .start = imx_rproc_arm_smc_start, 1341 .stop = imx_rproc_arm_smc_stop, 1342 .detect_mode = imx_rproc_arm_smc_detect_mode, 1343 }; 1344 1345 static const struct imx_rproc_plat_ops imx_rproc_ops_mmio = { 1346 .start = imx_rproc_mmio_start, 1347 .stop = imx_rproc_mmio_stop, 1348 .detect_mode = imx_rproc_mmio_detect_mode, 1349 }; 1350 1351 static const struct imx_rproc_plat_ops imx_rproc_ops_scu_api = { 1352 .start = imx_rproc_scu_api_start, 1353 .stop = imx_rproc_scu_api_stop, 1354 .detach = imx_rproc_scu_api_detach, 1355 .detect_mode = imx_rproc_scu_api_detect_mode, 1356 }; 1357 1358 static const struct imx_rproc_plat_ops imx_rproc_ops_sm_lmm = { 1359 .detect_mode = imx_rproc_sm_detect_mode, 1360 .prepare = imx_rproc_sm_lmm_prepare, 1361 .start = imx_rproc_sm_lmm_start, 1362 .stop = imx_rproc_sm_lmm_stop, 1363 }; 1364 1365 static const struct imx_rproc_plat_ops imx_rproc_ops_sm_cpu = { 1366 .detect_mode = imx_rproc_sm_detect_mode, 1367 .start = imx_rproc_sm_cpu_start, 1368 .stop = imx_rproc_sm_cpu_stop, 1369 }; 1370 1371 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = { 1372 .src_reg = IMX7D_SRC_SCR, 1373 .src_mask = IMX7D_M4_RST_MASK, 1374 .src_start = IMX7D_M4_START, 1375 .src_stop = IMX8M_M7_STOP, 1376 .gpr_reg = IMX8M_GPR22, 1377 .gpr_wait = IMX8M_GPR22_CM7_CPUWAIT, 1378 .att = imx_rproc_att_imx8mn, 1379 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 1380 .ops = &imx_rproc_ops_mmio, 1381 .flags = IMX_RPROC_NEED_CLKS, 1382 }; 1383 1384 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = { 1385 .att = imx_rproc_att_imx8mn, 1386 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 1387 .ops = &imx_rproc_ops_arm_smc, 1388 .flags = IMX_RPROC_NEED_CLKS, 1389 }; 1390 1391 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = { 1392 .src_reg = IMX7D_SRC_SCR, 1393 .src_mask = IMX7D_M4_RST_MASK, 1394 .src_start = IMX7D_M4_START, 1395 .src_stop = IMX7D_M4_STOP, 1396 .att = imx_rproc_att_imx8mq, 1397 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq), 1398 .ops = &imx_rproc_ops_mmio, 1399 .flags = IMX_RPROC_NEED_CLKS, 1400 }; 1401 1402 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = { 1403 .att = imx_rproc_att_imx8qm, 1404 .att_size = ARRAY_SIZE(imx_rproc_att_imx8qm), 1405 .ops = &imx_rproc_ops_scu_api, 1406 }; 1407 1408 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = { 1409 .att = imx_rproc_att_imx8qxp, 1410 .att_size = ARRAY_SIZE(imx_rproc_att_imx8qxp), 1411 .ops = &imx_rproc_ops_scu_api, 1412 }; 1413 1414 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = { 1415 .att = imx_rproc_att_imx8ulp, 1416 .att_size = ARRAY_SIZE(imx_rproc_att_imx8ulp), 1417 }; 1418 1419 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = { 1420 .att = imx_rproc_att_imx7ulp, 1421 .att_size = ARRAY_SIZE(imx_rproc_att_imx7ulp), 1422 .flags = IMX_RPROC_NEED_SYSTEM_OFF, 1423 }; 1424 1425 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = { 1426 .src_reg = IMX7D_SRC_SCR, 1427 .src_mask = IMX7D_M4_RST_MASK, 1428 .src_start = IMX7D_M4_START, 1429 .src_stop = IMX7D_M4_STOP, 1430 .att = imx_rproc_att_imx7d, 1431 .att_size = ARRAY_SIZE(imx_rproc_att_imx7d), 1432 .ops = &imx_rproc_ops_mmio, 1433 .flags = IMX_RPROC_NEED_CLKS, 1434 }; 1435 1436 static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = { 1437 .src_reg = IMX6SX_SRC_SCR, 1438 .src_mask = IMX6SX_M4_RST_MASK, 1439 .src_start = IMX6SX_M4_START, 1440 .src_stop = IMX6SX_M4_STOP, 1441 .att = imx_rproc_att_imx6sx, 1442 .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx), 1443 .ops = &imx_rproc_ops_mmio, 1444 .flags = IMX_RPROC_NEED_CLKS, 1445 }; 1446 1447 static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = { 1448 .att = imx_rproc_att_imx93, 1449 .att_size = ARRAY_SIZE(imx_rproc_att_imx93), 1450 .ops = &imx_rproc_ops_arm_smc, 1451 .flags = IMX_RPROC_NEED_CLKS, 1452 }; 1453 1454 static const struct imx_rproc_dcfg imx_rproc_cfg_imx95_m7 = { 1455 .att = imx_rproc_att_imx95_m7, 1456 .att_size = ARRAY_SIZE(imx_rproc_att_imx95_m7), 1457 .ops = &imx_rproc_ops_sm_lmm, 1458 /* Must align with System Manager Firmware */ 1459 .cpuid = 1, /* Use 1 as cpu id for M7 core */ 1460 .lmid = 1, /* Use 1 as Logical Machine ID where M7 resides */ 1461 }; 1462 1463 static const struct of_device_id imx_rproc_of_match[] = { 1464 { .compatible = "fsl,imx7ulp-cm4", .data = &imx_rproc_cfg_imx7ulp }, 1465 { .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d }, 1466 { .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx }, 1467 { .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq }, 1468 { .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq }, 1469 { .compatible = "fsl,imx8mn-cm7", .data = &imx_rproc_cfg_imx8mn }, 1470 { .compatible = "fsl,imx8mp-cm7", .data = &imx_rproc_cfg_imx8mn }, 1471 { .compatible = "fsl,imx8mn-cm7-mmio", .data = &imx_rproc_cfg_imx8mn_mmio }, 1472 { .compatible = "fsl,imx8mp-cm7-mmio", .data = &imx_rproc_cfg_imx8mn_mmio }, 1473 { .compatible = "fsl,imx8qxp-cm4", .data = &imx_rproc_cfg_imx8qxp }, 1474 { .compatible = "fsl,imx8qm-cm4", .data = &imx_rproc_cfg_imx8qm }, 1475 { .compatible = "fsl,imx8ulp-cm33", .data = &imx_rproc_cfg_imx8ulp }, 1476 { .compatible = "fsl,imx93-cm33", .data = &imx_rproc_cfg_imx93 }, 1477 { .compatible = "fsl,imx95-cm7", .data = &imx_rproc_cfg_imx95_m7 }, 1478 {}, 1479 }; 1480 MODULE_DEVICE_TABLE(of, imx_rproc_of_match); 1481 1482 static struct platform_driver imx_rproc_driver = { 1483 .probe = imx_rproc_probe, 1484 .remove = imx_rproc_remove, 1485 .driver = { 1486 .name = "imx-rproc", 1487 .of_match_table = imx_rproc_of_match, 1488 }, 1489 }; 1490 1491 module_platform_driver(imx_rproc_driver); 1492 1493 MODULE_LICENSE("GPL v2"); 1494 MODULE_DESCRIPTION("i.MX remote processor control driver"); 1495 MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>"); 1496