1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // Copyright (c) 2012-2014 Samsung Electronics Co., Ltd 4 // http://www.samsung.com 5 6 #include <dt-bindings/regulator/samsung,s2mpg10-regulator.h> 7 #include <linux/bug.h> 8 #include <linux/cleanup.h> 9 #include <linux/err.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/slab.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/regmap.h> 15 #include <linux/platform_device.h> 16 #include <linux/regulator/driver.h> 17 #include <linux/regulator/machine.h> 18 #include <linux/regulator/of_regulator.h> 19 #include <linux/mfd/samsung/core.h> 20 #include <linux/mfd/samsung/s2mpg10.h> 21 #include <linux/mfd/samsung/s2mpg11.h> 22 #include <linux/mfd/samsung/s2mps11.h> 23 #include <linux/mfd/samsung/s2mps13.h> 24 #include <linux/mfd/samsung/s2mps14.h> 25 #include <linux/mfd/samsung/s2mps15.h> 26 #include <linux/mfd/samsung/s2mpu02.h> 27 #include <linux/mfd/samsung/s2mpu05.h> 28 29 enum { 30 S2MPG10_REGULATOR_OPS_STD, 31 S2MPG10_REGULATOR_OPS_EXTCONTROL, 32 }; 33 34 /* The highest number of possible regulators for supported devices. */ 35 #define S2MPS_REGULATOR_MAX S2MPS13_REGULATOR_MAX 36 struct s2mps11_info { 37 int ramp_delay2; 38 int ramp_delay34; 39 int ramp_delay5; 40 int ramp_delay16; 41 int ramp_delay7810; 42 int ramp_delay9; 43 44 enum sec_device_type dev_type; 45 46 /* 47 * One bit for each S2MPS11/S2MPS13/S2MPS14/S2MPU02 regulator whether 48 * the suspend mode was enabled. 49 */ 50 DECLARE_BITMAP(suspend_state, S2MPS_REGULATOR_MAX); 51 }; 52 53 #define to_s2mpg10_regulator_desc(x) container_of((x), struct s2mpg10_regulator_desc, desc) 54 55 struct s2mpg10_regulator_desc { 56 struct regulator_desc desc; 57 58 /* Ramp rate during enable, valid for bucks only. */ 59 unsigned int enable_ramp_rate; 60 61 /* Registers for external control of rail. */ 62 unsigned int pctrlsel_reg; 63 unsigned int pctrlsel_mask; 64 /* Populated from DT. */ 65 unsigned int pctrlsel_val; 66 }; 67 68 static int get_ramp_delay(int ramp_delay) 69 { 70 unsigned char cnt = 0; 71 72 ramp_delay /= 6250; 73 74 while (true) { 75 ramp_delay = ramp_delay >> 1; 76 if (ramp_delay == 0) 77 break; 78 cnt++; 79 } 80 81 if (cnt > 3) 82 cnt = 3; 83 84 return cnt; 85 } 86 87 static int s2mps11_regulator_set_voltage_time_sel(struct regulator_dev *rdev, 88 unsigned int old_selector, 89 unsigned int new_selector) 90 { 91 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 92 int rdev_id = rdev_get_id(rdev); 93 unsigned int ramp_delay = 0; 94 int old_volt, new_volt; 95 96 switch (rdev_id) { 97 case S2MPS11_BUCK2: 98 ramp_delay = s2mps11->ramp_delay2; 99 break; 100 case S2MPS11_BUCK3: 101 case S2MPS11_BUCK4: 102 ramp_delay = s2mps11->ramp_delay34; 103 break; 104 case S2MPS11_BUCK5: 105 ramp_delay = s2mps11->ramp_delay5; 106 break; 107 case S2MPS11_BUCK6: 108 case S2MPS11_BUCK1: 109 ramp_delay = s2mps11->ramp_delay16; 110 break; 111 case S2MPS11_BUCK7: 112 case S2MPS11_BUCK8: 113 case S2MPS11_BUCK10: 114 ramp_delay = s2mps11->ramp_delay7810; 115 break; 116 case S2MPS11_BUCK9: 117 ramp_delay = s2mps11->ramp_delay9; 118 } 119 120 if (ramp_delay == 0) 121 ramp_delay = rdev->desc->ramp_delay; 122 123 old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector); 124 new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector); 125 126 return DIV_ROUND_UP(abs(new_volt - old_volt), ramp_delay); 127 } 128 129 static int s2mps11_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) 130 { 131 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 132 unsigned int ramp_val, ramp_shift, ramp_reg = S2MPS11_REG_RAMP_BUCK; 133 unsigned int ramp_enable = 1, enable_shift = 0; 134 int rdev_id = rdev_get_id(rdev); 135 int ret; 136 137 switch (rdev_id) { 138 case S2MPS11_BUCK1: 139 if (ramp_delay > s2mps11->ramp_delay16) 140 s2mps11->ramp_delay16 = ramp_delay; 141 else 142 ramp_delay = s2mps11->ramp_delay16; 143 144 ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT; 145 break; 146 case S2MPS11_BUCK2: 147 enable_shift = S2MPS11_BUCK2_RAMP_EN_SHIFT; 148 if (!ramp_delay) { 149 ramp_enable = 0; 150 break; 151 } 152 153 s2mps11->ramp_delay2 = ramp_delay; 154 ramp_shift = S2MPS11_BUCK2_RAMP_SHIFT; 155 ramp_reg = S2MPS11_REG_RAMP; 156 break; 157 case S2MPS11_BUCK3: 158 enable_shift = S2MPS11_BUCK3_RAMP_EN_SHIFT; 159 if (!ramp_delay) { 160 ramp_enable = 0; 161 break; 162 } 163 164 if (ramp_delay > s2mps11->ramp_delay34) 165 s2mps11->ramp_delay34 = ramp_delay; 166 else 167 ramp_delay = s2mps11->ramp_delay34; 168 169 ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT; 170 ramp_reg = S2MPS11_REG_RAMP; 171 break; 172 case S2MPS11_BUCK4: 173 enable_shift = S2MPS11_BUCK4_RAMP_EN_SHIFT; 174 if (!ramp_delay) { 175 ramp_enable = 0; 176 break; 177 } 178 179 if (ramp_delay > s2mps11->ramp_delay34) 180 s2mps11->ramp_delay34 = ramp_delay; 181 else 182 ramp_delay = s2mps11->ramp_delay34; 183 184 ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT; 185 ramp_reg = S2MPS11_REG_RAMP; 186 break; 187 case S2MPS11_BUCK5: 188 s2mps11->ramp_delay5 = ramp_delay; 189 ramp_shift = S2MPS11_BUCK5_RAMP_SHIFT; 190 break; 191 case S2MPS11_BUCK6: 192 enable_shift = S2MPS11_BUCK6_RAMP_EN_SHIFT; 193 if (!ramp_delay) { 194 ramp_enable = 0; 195 break; 196 } 197 198 if (ramp_delay > s2mps11->ramp_delay16) 199 s2mps11->ramp_delay16 = ramp_delay; 200 else 201 ramp_delay = s2mps11->ramp_delay16; 202 203 ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT; 204 break; 205 case S2MPS11_BUCK7: 206 case S2MPS11_BUCK8: 207 case S2MPS11_BUCK10: 208 if (ramp_delay > s2mps11->ramp_delay7810) 209 s2mps11->ramp_delay7810 = ramp_delay; 210 else 211 ramp_delay = s2mps11->ramp_delay7810; 212 213 ramp_shift = S2MPS11_BUCK7810_RAMP_SHIFT; 214 break; 215 case S2MPS11_BUCK9: 216 s2mps11->ramp_delay9 = ramp_delay; 217 ramp_shift = S2MPS11_BUCK9_RAMP_SHIFT; 218 break; 219 default: 220 return 0; 221 } 222 223 if (!ramp_enable) 224 goto ramp_disable; 225 226 /* Ramp delay can be enabled/disabled only for buck[2346] */ 227 if ((rdev_id >= S2MPS11_BUCK2 && rdev_id <= S2MPS11_BUCK4) || 228 rdev_id == S2MPS11_BUCK6) { 229 ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, 230 1 << enable_shift, 1 << enable_shift); 231 if (ret) { 232 dev_err(&rdev->dev, "failed to enable ramp rate\n"); 233 return ret; 234 } 235 } 236 237 ramp_val = get_ramp_delay(ramp_delay); 238 239 return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift, 240 ramp_val << ramp_shift); 241 242 ramp_disable: 243 return regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, 244 1 << enable_shift, 0); 245 } 246 247 static int s2mps11_regulator_enable(struct regulator_dev *rdev) 248 { 249 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 250 int rdev_id = rdev_get_id(rdev); 251 unsigned int val; 252 253 switch (s2mps11->dev_type) { 254 case S2MPS11X: 255 if (test_bit(rdev_id, s2mps11->suspend_state)) 256 val = S2MPS14_ENABLE_SUSPEND; 257 else 258 val = rdev->desc->enable_mask; 259 break; 260 case S2MPS13X: 261 case S2MPS14X: 262 if (test_bit(rdev_id, s2mps11->suspend_state)) 263 val = S2MPS14_ENABLE_SUSPEND; 264 else if (rdev->ena_pin) 265 val = S2MPS14_ENABLE_EXT_CONTROL; 266 else 267 val = rdev->desc->enable_mask; 268 break; 269 case S2MPU02: 270 if (test_bit(rdev_id, s2mps11->suspend_state)) 271 val = S2MPU02_ENABLE_SUSPEND; 272 else 273 val = rdev->desc->enable_mask; 274 break; 275 case S2MPU05: 276 val = rdev->desc->enable_mask; 277 break; 278 default: 279 return -EINVAL; 280 } 281 282 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 283 rdev->desc->enable_mask, val); 284 } 285 286 static int s2mps11_regulator_set_suspend_disable(struct regulator_dev *rdev) 287 { 288 int ret; 289 unsigned int val, state; 290 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 291 int rdev_id = rdev_get_id(rdev); 292 293 /* Below LDO should be always on or does not support suspend mode. */ 294 switch (s2mps11->dev_type) { 295 case S2MPS11X: 296 switch (rdev_id) { 297 case S2MPS11_LDO2: 298 case S2MPS11_LDO36: 299 case S2MPS11_LDO37: 300 case S2MPS11_LDO38: 301 return 0; 302 default: 303 state = S2MPS14_ENABLE_SUSPEND; 304 break; 305 } 306 break; 307 case S2MPS13X: 308 case S2MPS14X: 309 switch (rdev_id) { 310 case S2MPS14_LDO3: 311 return 0; 312 default: 313 state = S2MPS14_ENABLE_SUSPEND; 314 break; 315 } 316 break; 317 case S2MPU02: 318 switch (rdev_id) { 319 case S2MPU02_LDO13: 320 case S2MPU02_LDO14: 321 case S2MPU02_LDO15: 322 case S2MPU02_LDO17: 323 case S2MPU02_BUCK7: 324 state = S2MPU02_DISABLE_SUSPEND; 325 break; 326 default: 327 state = S2MPU02_ENABLE_SUSPEND; 328 break; 329 } 330 break; 331 default: 332 return -EINVAL; 333 } 334 335 ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); 336 if (ret < 0) 337 return ret; 338 339 set_bit(rdev_id, s2mps11->suspend_state); 340 /* 341 * Don't enable suspend mode if regulator is already disabled because 342 * this would effectively for a short time turn on the regulator after 343 * resuming. 344 * However we still want to toggle the suspend_state bit for regulator 345 * in case if it got enabled before suspending the system. 346 */ 347 if (!(val & rdev->desc->enable_mask)) 348 return 0; 349 350 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 351 rdev->desc->enable_mask, state); 352 } 353 354 static int s2mps11_of_parse_gpiod(struct device_node *np, 355 const char *con_id, bool optional, 356 const struct regulator_desc *desc, 357 struct regulator_config *config) 358 { 359 struct gpio_desc *ena_gpiod; 360 int ret; 361 362 ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), con_id, 0, 363 GPIOD_OUT_HIGH | 364 GPIOD_FLAGS_BIT_NONEXCLUSIVE, 365 desc->name 366 ? : dev_name(config->dev)); 367 if (IS_ERR(ena_gpiod)) { 368 ret = PTR_ERR(ena_gpiod); 369 370 /* Ignore all errors except probe defer. */ 371 if (ret == -EPROBE_DEFER) 372 return ret; 373 374 if (ret == -ENOENT) { 375 if (optional) 376 return 0; 377 378 dev_info(config->dev, 379 "No entry for control GPIO for %d/%s in node %pOF\n", 380 desc->id, desc->name, np); 381 } else { 382 dev_warn_probe(config->dev, ret, 383 "Failed to get control GPIO for %d/%s in node %pOF\n", 384 desc->id, desc->name, np); 385 } 386 387 return 0; 388 } 389 390 dev_info(config->dev, "Using GPIO for ext-control over %d/%s\n", 391 desc->id, desc->name); 392 393 config->ena_gpiod = ena_gpiod; 394 395 return 0; 396 } 397 398 static int s2mps11_of_parse_cb(struct device_node *np, 399 const struct regulator_desc *desc, 400 struct regulator_config *config) 401 { 402 const struct s2mps11_info *s2mps11 = config->driver_data; 403 404 if (s2mps11->dev_type == S2MPS14X) 405 switch (desc->id) { 406 case S2MPS14_LDO10: 407 case S2MPS14_LDO11: 408 case S2MPS14_LDO12: 409 break; 410 411 default: 412 return 0; 413 } 414 else 415 return 0; 416 417 return s2mps11_of_parse_gpiod(np, "samsung,ext-control", false, desc, 418 config); 419 } 420 421 static int s2mpg10_of_parse_cb(struct device_node *np, 422 const struct regulator_desc *desc, 423 struct regulator_config *config) 424 { 425 const struct s2mps11_info *s2mps11 = config->driver_data; 426 struct s2mpg10_regulator_desc *s2mpg10_desc = to_s2mpg10_regulator_desc(desc); 427 static const u32 ext_control_s2mpg10[] = { 428 [S2MPG10_EXTCTRL_PWREN] = S2MPG10_PCTRLSEL_PWREN, 429 [S2MPG10_EXTCTRL_PWREN_MIF] = S2MPG10_PCTRLSEL_PWREN_MIF, 430 [S2MPG10_EXTCTRL_AP_ACTIVE_N] = S2MPG10_PCTRLSEL_AP_ACTIVE_N, 431 [S2MPG10_EXTCTRL_CPUCL1_EN] = S2MPG10_PCTRLSEL_CPUCL1_EN, 432 [S2MPG10_EXTCTRL_CPUCL1_EN2] = S2MPG10_PCTRLSEL_CPUCL1_EN2, 433 [S2MPG10_EXTCTRL_CPUCL2_EN] = S2MPG10_PCTRLSEL_CPUCL2_EN, 434 [S2MPG10_EXTCTRL_CPUCL2_EN2] = S2MPG10_PCTRLSEL_CPUCL2_EN2, 435 [S2MPG10_EXTCTRL_TPU_EN] = S2MPG10_PCTRLSEL_TPU_EN, 436 [S2MPG10_EXTCTRL_TPU_EN2] = S2MPG10_PCTRLSEL_TPU_EN2, 437 [S2MPG10_EXTCTRL_TCXO_ON] = S2MPG10_PCTRLSEL_TCXO_ON, 438 [S2MPG10_EXTCTRL_TCXO_ON2] = S2MPG10_PCTRLSEL_TCXO_ON2, 439 [S2MPG10_EXTCTRL_LDO20M_EN2] = S2MPG10_PCTRLSEL_LDO20M_EN2, 440 [S2MPG10_EXTCTRL_LDO20M_EN] = S2MPG10_PCTRLSEL_LDO20M_EN, 441 }; 442 static const u32 ext_control_s2mpg11[] = { 443 [S2MPG11_EXTCTRL_PWREN] = S2MPG10_PCTRLSEL_PWREN, 444 [S2MPG11_EXTCTRL_PWREN_MIF] = S2MPG10_PCTRLSEL_PWREN_MIF, 445 [S2MPG11_EXTCTRL_AP_ACTIVE_N] = S2MPG10_PCTRLSEL_AP_ACTIVE_N, 446 [S2MPG11_EXTCTRL_G3D_EN] = S2MPG10_PCTRLSEL_CPUCL1_EN, 447 [S2MPG11_EXTCTRL_G3D_EN2] = S2MPG10_PCTRLSEL_CPUCL1_EN2, 448 [S2MPG11_EXTCTRL_AOC_VDD] = S2MPG10_PCTRLSEL_CPUCL2_EN, 449 [S2MPG11_EXTCTRL_AOC_RET] = S2MPG10_PCTRLSEL_CPUCL2_EN2, 450 [S2MPG11_EXTCTRL_UFS_EN] = S2MPG10_PCTRLSEL_TPU_EN, 451 [S2MPG11_EXTCTRL_LDO13S_EN] = S2MPG10_PCTRLSEL_TPU_EN2, 452 }; 453 u32 ext_control; 454 455 if (s2mps11->dev_type != S2MPG10 && s2mps11->dev_type != S2MPG11) 456 return 0; 457 458 if (of_property_read_u32(np, "samsung,ext-control", &ext_control)) 459 return 0; 460 461 switch (s2mps11->dev_type) { 462 case S2MPG10: 463 switch (desc->id) { 464 case S2MPG10_BUCK1 ... S2MPG10_BUCK7: 465 case S2MPG10_BUCK10: 466 case S2MPG10_LDO3 ... S2MPG10_LDO19: 467 if (ext_control > S2MPG10_EXTCTRL_TCXO_ON2) 468 return -EINVAL; 469 break; 470 471 case S2MPG10_LDO20: 472 if (ext_control < S2MPG10_EXTCTRL_LDO20M_EN2 || 473 ext_control > S2MPG10_EXTCTRL_LDO20M_EN) 474 return -EINVAL; 475 break; 476 477 default: 478 return -EINVAL; 479 } 480 481 if (ext_control > ARRAY_SIZE(ext_control_s2mpg10)) 482 return -EINVAL; 483 ext_control = ext_control_s2mpg10[ext_control]; 484 break; 485 486 case S2MPG11: 487 switch (desc->id) { 488 case S2MPG11_BUCK1 ... S2MPG11_BUCK3: 489 case S2MPG11_BUCK5: 490 case S2MPG11_BUCK8: 491 case S2MPG11_BUCK9: 492 case S2MPG11_BUCKD: 493 case S2MPG11_BUCKA: 494 case S2MPG11_LDO1: 495 case S2MPG11_LDO2: 496 case S2MPG11_LDO8: 497 case S2MPG11_LDO13: 498 if (ext_control > S2MPG11_EXTCTRL_LDO13S_EN) 499 return -EINVAL; 500 break; 501 502 default: 503 return -EINVAL; 504 } 505 506 if (ext_control > ARRAY_SIZE(ext_control_s2mpg11)) 507 return -EINVAL; 508 ext_control = ext_control_s2mpg11[ext_control]; 509 break; 510 511 default: 512 return -EINVAL; 513 } 514 515 /* 516 * If the regulator should be configured for external control, then: 517 * 1) the PCTRLSELx register needs to be set accordingly 518 * 2) regulator_desc::enable_val needs to be: 519 * a) updated and 520 * b) written to the hardware 521 * 3) we switch to the ::ops that provide an empty ::enable() and no 522 * ::disable() implementations 523 * 524 * Points 1) and 2b) will be handled in _probe(), after 525 * devm_regulator_register() returns, so that we can properly act on 526 * failures, since the regulator core ignores most return values from 527 * this parse callback. 528 */ 529 s2mpg10_desc->pctrlsel_val = ext_control; 530 s2mpg10_desc->pctrlsel_val <<= (ffs(s2mpg10_desc->pctrlsel_mask) - 1); 531 532 s2mpg10_desc->desc.enable_val = S2MPG10_PMIC_CTRL_ENABLE_EXT; 533 s2mpg10_desc->desc.enable_val <<= (ffs(desc->enable_mask) - 1); 534 535 ++s2mpg10_desc->desc.ops; 536 537 return s2mps11_of_parse_gpiod(np, "enable", true, desc, config); 538 } 539 540 static int s2mpg10_enable_ext_control(struct s2mps11_info *s2mps11, 541 struct regulator_dev *rdev) 542 { 543 const struct s2mpg10_regulator_desc *s2mpg10_desc; 544 int ret; 545 546 switch (s2mps11->dev_type) { 547 case S2MPG10: 548 case S2MPG11: 549 s2mpg10_desc = to_s2mpg10_regulator_desc(rdev->desc); 550 break; 551 552 default: 553 return 0; 554 } 555 556 ret = regmap_update_bits(rdev_get_regmap(rdev), 557 s2mpg10_desc->pctrlsel_reg, 558 s2mpg10_desc->pctrlsel_mask, 559 s2mpg10_desc->pctrlsel_val); 560 if (ret) 561 return dev_err_probe(rdev_get_dev(rdev), ret, 562 "failed to configure pctrlsel for %s\n", 563 rdev->desc->name); 564 565 /* 566 * When using external control, the enable bit of the regulator still 567 * needs to be set. The actual state will still be determined by the 568 * external signal. 569 */ 570 ret = regulator_enable_regmap(rdev); 571 if (ret) 572 return dev_err_probe(rdev_get_dev(rdev), ret, 573 "failed to enable regulator %s\n", 574 rdev->desc->name); 575 576 return 0; 577 } 578 579 static int s2mpg10_regulator_enable_nop(struct regulator_dev *rdev) 580 { 581 /* 582 * We need to provide this, otherwise the regulator core's enable on 583 * this regulator will return a failure and subsequently disable our 584 * parent regulator. 585 */ 586 return 0; 587 } 588 589 static int s2mpg10_regulator_buck_enable_time(struct regulator_dev *rdev) 590 { 591 const struct s2mpg10_regulator_desc * const s2mpg10_desc = 592 to_s2mpg10_regulator_desc(rdev->desc); 593 const struct regulator_ops * const ops = rdev->desc->ops; 594 int vsel, curr_uV; 595 596 vsel = ops->get_voltage_sel(rdev); 597 if (vsel < 0) 598 return vsel; 599 600 curr_uV = ops->list_voltage(rdev, vsel); 601 if (curr_uV < 0) 602 return curr_uV; 603 604 return (rdev->desc->enable_time 605 + DIV_ROUND_UP(curr_uV, s2mpg10_desc->enable_ramp_rate)); 606 } 607 608 static int s2mpg1x_regulator_buck_set_voltage_time(struct regulator_dev *rdev, 609 int old_uV, int new_uV, 610 unsigned int ramp_reg, 611 unsigned int ramp_mask) 612 { 613 unsigned int ramp_sel, ramp_rate; 614 int ret; 615 616 if (old_uV == new_uV) 617 return 0; 618 619 ret = regmap_read(rdev->regmap, ramp_reg, &ramp_sel); 620 if (ret) 621 return ret; 622 623 ramp_sel &= ramp_mask; 624 ramp_sel >>= ffs(ramp_mask) - 1; 625 if (ramp_sel >= rdev->desc->n_ramp_values || 626 !rdev->desc->ramp_delay_table) 627 return -EINVAL; 628 629 ramp_rate = rdev->desc->ramp_delay_table[ramp_sel]; 630 631 return DIV_ROUND_UP(abs(new_uV - old_uV), ramp_rate); 632 } 633 634 static int s2mpg10_regulator_buck_set_voltage_time(struct regulator_dev *rdev, 635 int old_uV, int new_uV) 636 { 637 unsigned int ramp_reg; 638 639 ramp_reg = rdev->desc->ramp_reg; 640 if (old_uV > new_uV) 641 /* The downwards ramp is at a different offset. */ 642 ramp_reg += S2MPG10_PMIC_DVS_RAMP4 - S2MPG10_PMIC_DVS_RAMP1; 643 644 return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV, 645 ramp_reg, 646 rdev->desc->ramp_mask); 647 } 648 649 static int s2mpg11_regulator_buck_set_voltage_time(struct regulator_dev *rdev, 650 int old_uV, int new_uV) 651 { 652 unsigned int ramp_mask; 653 654 ramp_mask = rdev->desc->ramp_mask; 655 if (old_uV > new_uV) 656 /* The downwards mask is at a different position. */ 657 ramp_mask >>= 2; 658 659 return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV, 660 rdev->desc->ramp_reg, 661 ramp_mask); 662 } 663 664 /* 665 * We assign both, ::set_voltage_time() and ::set_voltage_time_sel(), because 666 * only if the latter is != NULL, the regulator core will call neither during 667 * DVS if the regulator is disabled. If the latter is NULL, the core always 668 * calls the ::set_voltage_time() callback, which would give incorrect results 669 * if the regulator is off. 670 * At the same time, we do need ::set_voltage_time() due to differing upwards 671 * and downwards ramps and we can not make that code dependent on the regulator 672 * enable state, as that would break regulator_set_voltage_time() which 673 * expects a correct result no matter the enable state. 674 */ 675 static const struct regulator_ops s2mpg10_reg_buck_ops[] = { 676 [S2MPG10_REGULATOR_OPS_STD] = { 677 .list_voltage = regulator_list_voltage_linear_range, 678 .map_voltage = regulator_map_voltage_linear_range, 679 .is_enabled = regulator_is_enabled_regmap, 680 .enable = regulator_enable_regmap, 681 .disable = regulator_disable_regmap, 682 .enable_time = s2mpg10_regulator_buck_enable_time, 683 .get_voltage_sel = regulator_get_voltage_sel_regmap, 684 .set_voltage_sel = regulator_set_voltage_sel_regmap, 685 .set_voltage_time = s2mpg10_regulator_buck_set_voltage_time, 686 .set_voltage_time_sel = regulator_set_voltage_time_sel, 687 .set_ramp_delay = regulator_set_ramp_delay_regmap, 688 }, 689 [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { 690 .list_voltage = regulator_list_voltage_linear_range, 691 .map_voltage = regulator_map_voltage_linear_range, 692 .enable = s2mpg10_regulator_enable_nop, 693 .get_voltage_sel = regulator_get_voltage_sel_regmap, 694 .set_voltage_sel = regulator_set_voltage_sel_regmap, 695 .set_voltage_time = s2mpg10_regulator_buck_set_voltage_time, 696 .set_voltage_time_sel = regulator_set_voltage_time_sel, 697 .set_ramp_delay = regulator_set_ramp_delay_regmap, 698 } 699 }; 700 701 #define s2mpg10_buck_to_ramp_mask(n) (GENMASK(1, 0) << (((n) % 4) * 2)) 702 703 /* 704 * The ramp_delay during enable is fixed (12.5mV/μs), while the ramp during 705 * DVS can be adjusted. Linux can adjust the ramp delay via DT, in which case 706 * the regulator core will modify the regulator's constraints and call our 707 * .set_ramp_delay() which updates the DVS ramp in ramp_reg. 708 * For enable, our .enable_time() unconditionally uses enable_ramp_rate 709 * (12.5mV/μs) while our ::set_voltage_time() takes the value in ramp_reg 710 * into account. 711 */ 712 #define regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, _ops, \ 713 _vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \ 714 _r_reg, _r_mask, _r_table, _r_table_sz, \ 715 _en_time) { \ 716 .name = "buck" _name, \ 717 .supply_name = _supply, \ 718 .of_match = of_match_ptr("buck" _name), \ 719 .regulators_node = of_match_ptr("regulators"), \ 720 .of_parse_cb = s2mpg10_of_parse_cb, \ 721 .id = _id, \ 722 .ops = &(_ops)[0], \ 723 .type = REGULATOR_VOLTAGE, \ 724 .owner = THIS_MODULE, \ 725 .linear_ranges = _vrange, \ 726 .n_linear_ranges = ARRAY_SIZE(_vrange), \ 727 .n_voltages = _vrange##_count, \ 728 .vsel_reg = _vsel_reg, \ 729 .vsel_mask = _vsel_mask, \ 730 .enable_reg = _en_reg, \ 731 .enable_mask = _en_mask, \ 732 .ramp_reg = _r_reg, \ 733 .ramp_mask = _r_mask, \ 734 .ramp_delay_table = _r_table, \ 735 .n_ramp_values = _r_table_sz, \ 736 .enable_time = _en_time, /* + V/enable_ramp_rate */ \ 737 } 738 739 #define regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg) \ 740 regulator_desc_s2mpg1x_buck_cmn(#_num "m", S2MPG10_BUCK##_num, \ 741 "vinb"#_num "m", s2mpg10_reg_buck_ops, _vrange, \ 742 S2MPG10_PMIC_B##_num##M_OUT1, GENMASK(7, 0), \ 743 S2MPG10_PMIC_B##_num##M_CTRL, GENMASK(7, 6), \ 744 S2MPG10_PMIC_##_r_reg, \ 745 s2mpg10_buck_to_ramp_mask(S2MPG10_BUCK##_num \ 746 - S2MPG10_BUCK1), \ 747 s2mpg10_buck_ramp_table, \ 748 ARRAY_SIZE(s2mpg10_buck_ramp_table), 30) 749 750 #define s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg) \ 751 .desc = regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg), \ 752 .enable_ramp_rate = 12500 753 754 #define s2mpg10_regulator_desc_buck_gpio(_num, _vrange, _r_reg, \ 755 _pc_reg, _pc_mask) \ 756 [S2MPG10_BUCK##_num] = { \ 757 s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \ 758 .pctrlsel_reg = S2MPG10_PMIC_##_pc_reg, \ 759 .pctrlsel_mask = _pc_mask, \ 760 } 761 762 #define s2mpg10_regulator_desc_buck(_num, _vrange, _r_reg) \ 763 [S2MPG10_BUCK##_num] = { \ 764 s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \ 765 } 766 767 /* ops for S2MPG1x LDO regulators without ramp control */ 768 static const struct regulator_ops s2mpg10_reg_ldo_ops[] = { 769 [S2MPG10_REGULATOR_OPS_STD] = { 770 .list_voltage = regulator_list_voltage_linear_range, 771 .map_voltage = regulator_map_voltage_linear_range, 772 .is_enabled = regulator_is_enabled_regmap, 773 .enable = regulator_enable_regmap, 774 .disable = regulator_disable_regmap, 775 .get_voltage_sel = regulator_get_voltage_sel_regmap, 776 .set_voltage_sel = regulator_set_voltage_sel_regmap, 777 .set_voltage_time_sel = regulator_set_voltage_time_sel, 778 }, 779 [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { 780 .list_voltage = regulator_list_voltage_linear_range, 781 .map_voltage = regulator_map_voltage_linear_range, 782 .enable = s2mpg10_regulator_enable_nop, 783 .get_voltage_sel = regulator_get_voltage_sel_regmap, 784 .set_voltage_sel = regulator_set_voltage_sel_regmap, 785 .set_voltage_time_sel = regulator_set_voltage_time_sel, 786 } 787 }; 788 789 /* ops for S2MPG1x LDO regulators that have ramp control */ 790 static const struct regulator_ops s2mpg10_reg_ldo_ramp_ops[] = { 791 [S2MPG10_REGULATOR_OPS_STD] = { 792 .list_voltage = regulator_list_voltage_linear_range, 793 .map_voltage = regulator_map_voltage_linear_range, 794 .is_enabled = regulator_is_enabled_regmap, 795 .enable = regulator_enable_regmap, 796 .disable = regulator_disable_regmap, 797 .get_voltage_sel = regulator_get_voltage_sel_regmap, 798 .set_voltage_sel = regulator_set_voltage_sel_regmap, 799 .set_voltage_time_sel = regulator_set_voltage_time_sel, 800 .set_ramp_delay = regulator_set_ramp_delay_regmap, 801 }, 802 [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { 803 .list_voltage = regulator_list_voltage_linear_range, 804 .map_voltage = regulator_map_voltage_linear_range, 805 .enable = s2mpg10_regulator_enable_nop, 806 .get_voltage_sel = regulator_get_voltage_sel_regmap, 807 .set_voltage_sel = regulator_set_voltage_sel_regmap, 808 .set_voltage_time_sel = regulator_set_voltage_time_sel, 809 .set_ramp_delay = regulator_set_ramp_delay_regmap, 810 } 811 }; 812 813 #define regulator_desc_s2mpg1x_ldo_cmn(_name, _id, _supply, _ops, \ 814 _vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \ 815 _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz) { \ 816 .name = "ldo" _name, \ 817 .supply_name = _supply, \ 818 .of_match = of_match_ptr("ldo" _name), \ 819 .regulators_node = of_match_ptr("regulators"), \ 820 .of_parse_cb = s2mpg10_of_parse_cb, \ 821 .id = _id, \ 822 .ops = &(_ops)[0], \ 823 .type = REGULATOR_VOLTAGE, \ 824 .owner = THIS_MODULE, \ 825 .linear_ranges = _vrange, \ 826 .n_linear_ranges = ARRAY_SIZE(_vrange), \ 827 .n_voltages = _vrange##_count, \ 828 .vsel_reg = _vsel_reg, \ 829 .vsel_mask = _vsel_mask, \ 830 .enable_reg = _en_reg, \ 831 .enable_mask = _en_mask, \ 832 .ramp_delay = _ramp_delay, \ 833 .ramp_reg = _r_reg, \ 834 .ramp_mask = _r_mask, \ 835 .ramp_delay_table = _r_table, \ 836 .n_ramp_values = _r_table_sz, \ 837 .enable_time = 130, /* startup 20+-10 + ramp 30..100μs */ \ 838 } 839 840 #define s2mpg10_regulator_desc_ldo_cmn(_num, _supply, _ops, _vrange, \ 841 _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \ 842 _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \ 843 _pc_reg, _pc_mask) \ 844 [S2MPG10_LDO##_num] = { \ 845 .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "m", \ 846 S2MPG10_LDO##_num, _supply, _ops, \ 847 _vrange, \ 848 S2MPG10_PMIC_L##_num##M_##_vsel_reg_sfx, \ 849 _vsel_mask, \ 850 S2MPG10_PMIC_##_en_reg, _en_mask, \ 851 _ramp_delay, _r_reg, _r_mask, _r_table, \ 852 _r_table_sz), \ 853 .pctrlsel_reg = _pc_reg, \ 854 .pctrlsel_mask = _pc_mask, \ 855 } 856 857 /* standard LDO via LxM_CTRL */ 858 #define s2mpg10_regulator_desc_ldo(_num, _supply, _vrange) \ 859 s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ 860 s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ 861 L##_num##M_CTRL, BIT(7), \ 862 0, 0, 0, NULL, 0, \ 863 0, 0) 864 865 /* standard LDO but possibly GPIO controlled */ 866 #define s2mpg10_regulator_desc_ldo_gpio(_num, _supply, _vrange, \ 867 _pc_reg, _pc_mask) \ 868 s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ 869 s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ 870 L##_num##M_CTRL, GENMASK(7, 6), \ 871 0, 0, 0, NULL, 0, \ 872 S2MPG10_PMIC_##_pc_reg, _pc_mask) 873 874 /* LDO with ramp support and possibly GPIO controlled */ 875 #define s2mpg10_regulator_desc_ldo_ramp(_num, _supply, _vrange, \ 876 _en_mask, _r_reg, _pc_reg, _pc_mask) \ 877 s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ 878 s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \ 879 LDO_CTRL2, _en_mask, \ 880 6250, S2MPG10_PMIC_##_r_reg, GENMASK(1, 0), \ 881 s2mpg10_ldo_ramp_table, \ 882 ARRAY_SIZE(s2mpg10_ldo_ramp_table), \ 883 S2MPG10_PMIC_##_pc_reg, _pc_mask) 884 885 #define S2MPG10_VOLTAGE_RANGE(_prefix, _idx, _offs_uV, _min_uV, \ 886 _max_uV, _step_uV) \ 887 static const struct linear_range _prefix##_vranges##_idx[] = { \ 888 REGULATOR_LINEAR_VRANGE(_offs_uV, _min_uV, _max_uV, _step_uV) \ 889 }; \ 890 static const unsigned int _prefix##_vranges##_idx##_count = \ 891 ((((_max_uV) - (_offs_uV)) / (_step_uV)) + 1) 892 893 /* voltage range for s2mpg10 BUCK 1, 2, 3, 4, 5, 7, 8, 9, 10 */ 894 S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV); 895 896 /* voltage range for s2mpg10 BUCK 6 */ 897 S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 6, 200000, 450000, 1350000, STEP_6_25_MV); 898 899 static const unsigned int s2mpg10_buck_ramp_table[] = { 900 6250, 12500, 25000 901 }; 902 903 /* voltage range for s2mpg10 LDO 1, 11, 12 */ 904 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 1, 300000, 700000, 1300000, STEP_12_5_MV); 905 906 /* voltage range for s2mpg10 LDO 2, 4, 9, 14, 18, 19, 20, 23, 25, 29, 30, 31 */ 907 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 2, 700000, 1600000, 1950000, STEP_25_MV); 908 909 /* voltage range for s2mpg10 LDO 3, 5, 6, 8, 16, 17, 24, 28 */ 910 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 3, 725000, 725000, 1300000, STEP_12_5_MV); 911 912 /* voltage range for s2mpg10 LDO 7 */ 913 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 7, 300000, 450000, 1300000, STEP_12_5_MV); 914 915 /* voltage range for s2mpg10 LDO 13, 15 */ 916 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 13, 300000, 450000, 950000, STEP_12_5_MV); 917 918 /* voltage range for s2mpg10 LDO 10 */ 919 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 10, 1800000, 1800000, 3350000, STEP_25_MV); 920 921 /* voltage range for s2mpg10 LDO 21, 22, 26, 27 */ 922 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 21, 1800000, 2500000, 3300000, STEP_25_MV); 923 924 /* possible ramp values for s2mpg10 LDO 1, 7, 11, 12, 13, 15 */ 925 static const unsigned int s2mpg10_ldo_ramp_table[] = { 926 6250, 12500 927 }; 928 929 static const struct s2mpg10_regulator_desc s2mpg10_regulators[] = { 930 s2mpg10_regulator_desc_buck_gpio(1, s2mpg10_buck_vranges1, DVS_RAMP1, 931 PCTRLSEL1, GENMASK(3, 0)), 932 s2mpg10_regulator_desc_buck_gpio(2, s2mpg10_buck_vranges1, DVS_RAMP1, 933 PCTRLSEL1, GENMASK(7, 4)), 934 s2mpg10_regulator_desc_buck_gpio(3, s2mpg10_buck_vranges1, DVS_RAMP1, 935 PCTRLSEL2, GENMASK(3, 0)), 936 s2mpg10_regulator_desc_buck_gpio(4, s2mpg10_buck_vranges1, DVS_RAMP1, 937 PCTRLSEL2, GENMASK(7, 4)), 938 s2mpg10_regulator_desc_buck_gpio(5, s2mpg10_buck_vranges1, DVS_RAMP2, 939 PCTRLSEL3, GENMASK(3, 0)), 940 s2mpg10_regulator_desc_buck_gpio(6, s2mpg10_buck_vranges6, DVS_RAMP2, 941 PCTRLSEL3, GENMASK(7, 4)), 942 s2mpg10_regulator_desc_buck_gpio(7, s2mpg10_buck_vranges1, DVS_RAMP2, 943 PCTRLSEL4, GENMASK(3, 0)), 944 s2mpg10_regulator_desc_buck(8, s2mpg10_buck_vranges1, DVS_RAMP2), 945 s2mpg10_regulator_desc_buck(9, s2mpg10_buck_vranges1, DVS_RAMP3), 946 s2mpg10_regulator_desc_buck_gpio(10, s2mpg10_buck_vranges1, DVS_RAMP3, 947 PCTRLSEL4, GENMASK(7, 4)), 948 /* 949 * Standard LDO via LxM_CTRL but non-standard (greater) V-range and with 950 * ramp support. 951 */ 952 s2mpg10_regulator_desc_ldo_cmn(1, "vinl3m", s2mpg10_reg_ldo_ramp_ops, 953 s2mpg10_ldo_vranges1, 954 CTRL, GENMASK(6, 0), 955 L1M_CTRL, BIT(7), 956 6250, S2MPG10_PMIC_DVS_RAMP6, 957 GENMASK(5, 4), s2mpg10_ldo_ramp_table, 958 ARRAY_SIZE(s2mpg10_ldo_ramp_table), 959 0, 0), 960 s2mpg10_regulator_desc_ldo(2, "vinl9m", s2mpg10_ldo_vranges2), 961 s2mpg10_regulator_desc_ldo_gpio(3, "vinl4m", s2mpg10_ldo_vranges3, 962 PCTRLSEL5, GENMASK(3, 0)), 963 s2mpg10_regulator_desc_ldo_gpio(4, "vinl9m", s2mpg10_ldo_vranges2, 964 PCTRLSEL5, GENMASK(7, 4)), 965 s2mpg10_regulator_desc_ldo_gpio(5, "vinl3m", s2mpg10_ldo_vranges3, 966 PCTRLSEL6, GENMASK(3, 0)), 967 s2mpg10_regulator_desc_ldo_gpio(6, "vinl7m", s2mpg10_ldo_vranges3, 968 PCTRLSEL6, GENMASK(7, 4)), 969 /* 970 * Ramp support, possibly GPIO controlled, non-standard (greater) V- 971 * range and enable reg & mask. 972 */ 973 s2mpg10_regulator_desc_ldo_cmn(7, "vinl3m", s2mpg10_reg_ldo_ramp_ops, 974 s2mpg10_ldo_vranges7, 975 CTRL, GENMASK(6, 0), 976 LDO_CTRL1, GENMASK(4, 3), 977 6250, S2MPG10_PMIC_DVS_RAMP6, 978 GENMASK(7, 6), s2mpg10_ldo_ramp_table, 979 ARRAY_SIZE(s2mpg10_ldo_ramp_table), 980 S2MPG10_PMIC_PCTRLSEL7, GENMASK(3, 0)), 981 s2mpg10_regulator_desc_ldo_gpio(8, "vinl4m", s2mpg10_ldo_vranges3, 982 PCTRLSEL7, GENMASK(7, 4)), 983 s2mpg10_regulator_desc_ldo_gpio(9, "vinl10m", s2mpg10_ldo_vranges2, 984 PCTRLSEL8, GENMASK(3, 0)), 985 s2mpg10_regulator_desc_ldo_gpio(10, "vinl15m", s2mpg10_ldo_vranges10, 986 PCTRLSEL8, GENMASK(7, 4)), 987 s2mpg10_regulator_desc_ldo_ramp(11, "vinl7m", s2mpg10_ldo_vranges1, 988 GENMASK(1, 0), DVS_SYNC_CTRL3, 989 PCTRLSEL9, GENMASK(3, 0)), 990 s2mpg10_regulator_desc_ldo_ramp(12, "vinl8m", s2mpg10_ldo_vranges1, 991 GENMASK(3, 2), DVS_SYNC_CTRL4, 992 PCTRLSEL9, GENMASK(7, 4)), 993 s2mpg10_regulator_desc_ldo_ramp(13, "vinl1m", s2mpg10_ldo_vranges13, 994 GENMASK(5, 4), DVS_SYNC_CTRL5, 995 PCTRLSEL10, GENMASK(3, 0)), 996 s2mpg10_regulator_desc_ldo_gpio(14, "vinl10m", s2mpg10_ldo_vranges2, 997 PCTRLSEL10, GENMASK(7, 4)), 998 s2mpg10_regulator_desc_ldo_ramp(15, "vinl2m", s2mpg10_ldo_vranges13, 999 GENMASK(7, 6), DVS_SYNC_CTRL6, 1000 PCTRLSEL11, GENMASK(3, 0)), 1001 s2mpg10_regulator_desc_ldo_gpio(16, "vinl5m", s2mpg10_ldo_vranges3, 1002 PCTRLSEL11, GENMASK(7, 4)), 1003 s2mpg10_regulator_desc_ldo_gpio(17, "vinl6m", s2mpg10_ldo_vranges3, 1004 PCTRLSEL12, GENMASK(3, 0)), 1005 s2mpg10_regulator_desc_ldo_gpio(18, "vinl10m", s2mpg10_ldo_vranges2, 1006 PCTRLSEL12, GENMASK(7, 4)), 1007 s2mpg10_regulator_desc_ldo_gpio(19, "vinl10m", s2mpg10_ldo_vranges2, 1008 PCTRLSEL13, GENMASK(3, 0)), 1009 s2mpg10_regulator_desc_ldo_gpio(20, "vinl10m", s2mpg10_ldo_vranges2, 1010 PCTRLSEL13, GENMASK(7, 4)), 1011 s2mpg10_regulator_desc_ldo(21, "vinl14m", s2mpg10_ldo_vranges21), 1012 s2mpg10_regulator_desc_ldo(22, "vinl15m", s2mpg10_ldo_vranges21), 1013 s2mpg10_regulator_desc_ldo(23, "vinl11m", s2mpg10_ldo_vranges2), 1014 s2mpg10_regulator_desc_ldo(24, "vinl7m", s2mpg10_ldo_vranges3), 1015 s2mpg10_regulator_desc_ldo(25, "vinl10m", s2mpg10_ldo_vranges2), 1016 s2mpg10_regulator_desc_ldo(26, "vinl15m", s2mpg10_ldo_vranges21), 1017 s2mpg10_regulator_desc_ldo(27, "vinl15m", s2mpg10_ldo_vranges21), 1018 s2mpg10_regulator_desc_ldo(28, "vinl7m", s2mpg10_ldo_vranges3), 1019 s2mpg10_regulator_desc_ldo(29, "vinl12m", s2mpg10_ldo_vranges2), 1020 s2mpg10_regulator_desc_ldo(30, "vinl13m", s2mpg10_ldo_vranges2), 1021 s2mpg10_regulator_desc_ldo(31, "vinl11m", s2mpg10_ldo_vranges2) 1022 }; 1023 1024 static const struct regulator_ops s2mpg11_reg_buck_ops[] = { 1025 [S2MPG10_REGULATOR_OPS_STD] = { 1026 .list_voltage = regulator_list_voltage_linear_range, 1027 .map_voltage = regulator_map_voltage_linear_range, 1028 .is_enabled = regulator_is_enabled_regmap, 1029 .enable = regulator_enable_regmap, 1030 .disable = regulator_disable_regmap, 1031 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1032 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1033 .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time, 1034 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1035 .enable_time = s2mpg10_regulator_buck_enable_time, 1036 .set_ramp_delay = regulator_set_ramp_delay_regmap, 1037 }, 1038 [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { 1039 .list_voltage = regulator_list_voltage_linear_range, 1040 .map_voltage = regulator_map_voltage_linear_range, 1041 .enable = s2mpg10_regulator_enable_nop, 1042 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1043 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1044 .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time, 1045 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1046 .enable_time = s2mpg10_regulator_buck_enable_time, 1047 .set_ramp_delay = regulator_set_ramp_delay_regmap, 1048 } 1049 }; 1050 1051 #define s2mpg11_buck_to_ramp_mask(n) (GENMASK(3, 2) << (((n) % 2) * 4)) 1052 1053 #define regulator_desc_s2mpg11_buckx(_name, _id, _supply, _vrange, \ 1054 _vsel_reg, _en_reg, _en_mask, _r_reg) \ 1055 regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, \ 1056 s2mpg11_reg_buck_ops, _vrange, \ 1057 S2MPG11_PMIC_##_vsel_reg, GENMASK(7, 0), \ 1058 S2MPG11_PMIC_##_en_reg, _en_mask, \ 1059 S2MPG11_PMIC_##_r_reg, \ 1060 s2mpg11_buck_to_ramp_mask(_id - S2MPG11_BUCK1), \ 1061 s2mpg10_buck_ramp_table, \ 1062 ARRAY_SIZE(s2mpg10_buck_ramp_table), 30) 1063 1064 #define s2mpg11_regulator_desc_buck_xm(_num, _vrange, _vsel_reg_sfx, \ 1065 _en_mask, _r_reg, _en_rrate) \ 1066 .desc = regulator_desc_s2mpg11_buckx(#_num"s", \ 1067 S2MPG11_BUCK##_num, "vinb"#_num"s", \ 1068 _vrange, \ 1069 B##_num##S_##_vsel_reg_sfx, \ 1070 B##_num##S_CTRL, _en_mask, \ 1071 _r_reg), \ 1072 .enable_ramp_rate = _en_rrate 1073 1074 #define s2mpg11_regulator_desc_buck_cm(_num, _vrange, _vsel_reg_sfx, \ 1075 _en_mask, _r_reg) \ 1076 [S2MPG11_BUCK##_num] = { \ 1077 s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ 1078 _vsel_reg_sfx, _en_mask, _r_reg, 12500), \ 1079 } 1080 1081 #define s2mpg11_regulator_desc_buckn_cm_gpio(_num, _vrange, \ 1082 _vsel_reg_sfx, _en_mask, _r_reg, _pc_reg, _pc_mask) \ 1083 [S2MPG11_BUCK##_num] = { \ 1084 s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ 1085 _vsel_reg_sfx, _en_mask, _r_reg, 12500), \ 1086 .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \ 1087 .pctrlsel_mask = _pc_mask, \ 1088 } 1089 1090 #define s2mpg11_regulator_desc_buck_vm(_num, _vrange, _vsel_reg_sfx, \ 1091 _en_mask, _r_reg) \ 1092 [S2MPG11_BUCK##_num] = { \ 1093 s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ 1094 _vsel_reg_sfx, _en_mask, _r_reg, 25000), \ 1095 } 1096 1097 #define s2mpg11_regulator_desc_bucka(_num, _num_lower, _r_reg, \ 1098 _pc_reg, _pc_mask) \ 1099 [S2MPG11_BUCK##_num] = { \ 1100 .desc = regulator_desc_s2mpg11_buckx(#_num_lower, \ 1101 S2MPG11_BUCK##_num, "vinb"#_num_lower, \ 1102 s2mpg11_buck_vranges##_num_lower, \ 1103 BUCK##_num##_OUT, \ 1104 BUCK##_num##_CTRL, GENMASK(7, 6), \ 1105 _r_reg), \ 1106 .enable_ramp_rate = 25000, \ 1107 .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \ 1108 .pctrlsel_mask = _pc_mask, \ 1109 } 1110 1111 #define s2mpg11_regulator_desc_buckboost() \ 1112 [S2MPG11_BUCKBOOST] = { \ 1113 .desc = regulator_desc_s2mpg1x_buck_cmn("boost", \ 1114 S2MPG11_BUCKBOOST, "vinbb", \ 1115 s2mpg10_reg_ldo_ops, \ 1116 s2mpg11_buck_vrangesboost, \ 1117 S2MPG11_PMIC_BB_OUT1, GENMASK(6, 0), \ 1118 S2MPG11_PMIC_BB_CTRL, BIT(7), \ 1119 0, 0, NULL, 0, 35), \ 1120 .enable_ramp_rate = 17500, \ 1121 } 1122 1123 #define s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _ops, \ 1124 _vrange, _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \ 1125 _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \ 1126 _pc_reg, _pc_mask) \ 1127 [S2MPG11_LDO##_num] = { \ 1128 .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "s", \ 1129 S2MPG11_LDO##_num, _supply, _ops, \ 1130 _vrange, \ 1131 S2MPG11_PMIC_L##_num##S_##_vsel_reg_sfx, \ 1132 _vsel_mask, \ 1133 S2MPG11_PMIC_##_en_reg, _en_mask, \ 1134 _ramp_delay, _r_reg, _r_mask, _r_table, \ 1135 _r_table_sz), \ 1136 .pctrlsel_reg = _pc_reg, \ 1137 .pctrlsel_mask = _pc_mask, \ 1138 } 1139 1140 /* standard LDO via LxM_CTRL */ 1141 #define s2mpg11_regulator_desc_ldo(_num, _supply, _vrange) \ 1142 s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ 1143 s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ 1144 L##_num##S_CTRL, BIT(7), \ 1145 0, 0, 0, NULL, 0, \ 1146 0, 0) 1147 1148 /* standard LDO but possibly GPIO controlled */ 1149 #define s2mpg11_regulator_desc_ldo_gpio(_num, _supply, _vrange, \ 1150 _pc_reg, _pc_mask) \ 1151 s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ 1152 s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ 1153 L##_num##S_CTRL, GENMASK(7, 6), \ 1154 0, 0, 0, NULL, 0, \ 1155 S2MPG11_PMIC_##_pc_reg, _pc_mask) 1156 1157 /* LDO with ramp support and possibly GPIO controlled */ 1158 #define s2mpg11_regulator_desc_ldo_ramp(_num, _supply, _vrange, \ 1159 _en_mask, _r_reg, _pc_reg, _pc_mask) \ 1160 s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ 1161 s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \ 1162 LDO_CTRL1, _en_mask, \ 1163 6250, S2MPG11_PMIC_##_r_reg, GENMASK(1, 0), \ 1164 s2mpg10_ldo_ramp_table, \ 1165 ARRAY_SIZE(s2mpg10_ldo_ramp_table), \ 1166 S2MPG11_PMIC_##_pc_reg, _pc_mask) 1167 1168 /* voltage range for s2mpg11 BUCK 1, 2, 3, 4, 8, 9, 10 */ 1169 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV); 1170 1171 /* voltage range for s2mpg11 BUCK 5 */ 1172 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 5, 200000, 400000, 1300000, STEP_6_25_MV); 1173 1174 /* voltage range for s2mpg11 BUCK 6 */ 1175 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 6, 200000, 1000000, 1500000, STEP_6_25_MV); 1176 1177 /* voltage range for s2mpg11 BUCK 7 */ 1178 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 7, 600000, 1500000, 2200000, STEP_12_5_MV); 1179 1180 /* voltage range for s2mpg11 BUCK D */ 1181 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, d, 600000, 2400000, 3300000, STEP_12_5_MV); 1182 1183 /* voltage range for s2mpg11 BUCK A */ 1184 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, a, 600000, 1700000, 2100000, STEP_12_5_MV); 1185 1186 /* voltage range for s2mpg11 BUCK BOOST */ 1187 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, boost, 1188 2600000, 3000000, 3600000, STEP_12_5_MV); 1189 1190 /* voltage range for s2mpg11 LDO 1, 2 */ 1191 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 1, 300000, 450000, 950000, STEP_12_5_MV); 1192 1193 /* voltage range for s2mpg11 LDO 3, 7, 10, 11, 12, 14, 15 */ 1194 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 3, 700000, 1600000, 1950000, STEP_25_MV); 1195 1196 /* voltage range for s2mpg11 LDO 4, 6 */ 1197 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 4, 1800000, 2500000, 3300000, STEP_25_MV); 1198 1199 /* voltage range for s2mpg11 LDO 5 */ 1200 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 5, 1600000, 1600000, 1950000, STEP_12_5_MV); 1201 1202 /* voltage range for s2mpg11 LDO 8 */ 1203 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 8, 979600, 1130400, 1281200, 5800); 1204 1205 /* voltage range for s2mpg11 LDO 9 */ 1206 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 9, 725000, 725000, 1300000, STEP_12_5_MV); 1207 1208 /* voltage range for s2mpg11 LDO 13 */ 1209 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 13, 1800000, 1800000, 3350000, STEP_25_MV); 1210 1211 static const struct s2mpg10_regulator_desc s2mpg11_regulators[] = { 1212 s2mpg11_regulator_desc_buckboost(), 1213 s2mpg11_regulator_desc_buckn_cm_gpio(1, s2mpg11_buck_vranges1, 1214 OUT1, GENMASK(7, 6), DVS_RAMP1, 1215 PCTRLSEL1, GENMASK(3, 0)), 1216 s2mpg11_regulator_desc_buckn_cm_gpio(2, s2mpg11_buck_vranges1, 1217 OUT1, GENMASK(7, 6), DVS_RAMP1, 1218 PCTRLSEL1, GENMASK(7, 4)), 1219 s2mpg11_regulator_desc_buckn_cm_gpio(3, s2mpg11_buck_vranges1, 1220 OUT1, GENMASK(7, 6), DVS_RAMP2, 1221 PCTRLSEL2, GENMASK(3, 0)), 1222 s2mpg11_regulator_desc_buck_cm(4, s2mpg11_buck_vranges1, 1223 OUT, BIT(7), DVS_RAMP2), 1224 s2mpg11_regulator_desc_buckn_cm_gpio(5, s2mpg11_buck_vranges5, 1225 OUT, GENMASK(7, 6), DVS_RAMP3, 1226 PCTRLSEL2, GENMASK(7, 4)), 1227 s2mpg11_regulator_desc_buck_cm(6, s2mpg11_buck_vranges6, 1228 OUT1, BIT(7), DVS_RAMP3), 1229 s2mpg11_regulator_desc_buck_vm(7, s2mpg11_buck_vranges7, 1230 OUT1, BIT(7), DVS_RAMP4), 1231 s2mpg11_regulator_desc_buckn_cm_gpio(8, s2mpg11_buck_vranges1, 1232 OUT1, GENMASK(7, 6), DVS_RAMP4, 1233 PCTRLSEL3, GENMASK(3, 0)), 1234 s2mpg11_regulator_desc_buckn_cm_gpio(9, s2mpg11_buck_vranges1, 1235 OUT1, GENMASK(7, 6), DVS_RAMP5, 1236 PCTRLSEL3, GENMASK(7, 4)), 1237 s2mpg11_regulator_desc_buck_cm(10, s2mpg11_buck_vranges1, 1238 OUT, BIT(7), DVS_RAMP5), 1239 s2mpg11_regulator_desc_bucka(D, d, DVS_RAMP6, PCTRLSEL4, GENMASK(3, 0)), 1240 s2mpg11_regulator_desc_bucka(A, a, DVS_RAMP6, PCTRLSEL4, GENMASK(7, 4)), 1241 s2mpg11_regulator_desc_ldo_ramp(1, "vinl1s", s2mpg11_ldo_vranges1, 1242 GENMASK(5, 4), DVS_SYNC_CTRL1, 1243 PCTRLSEL5, GENMASK(3, 0)), 1244 s2mpg11_regulator_desc_ldo_ramp(2, "vinl1s", s2mpg11_ldo_vranges1, 1245 GENMASK(7, 6), DVS_SYNC_CTRL2, 1246 PCTRLSEL5, GENMASK(7, 4)), 1247 s2mpg11_regulator_desc_ldo(3, "vinl3s", s2mpg11_ldo_vranges3), 1248 s2mpg11_regulator_desc_ldo(4, "vinl5s", s2mpg11_ldo_vranges4), 1249 s2mpg11_regulator_desc_ldo(5, "vinl3s", s2mpg11_ldo_vranges5), 1250 s2mpg11_regulator_desc_ldo(6, "vinl5s", s2mpg11_ldo_vranges4), 1251 s2mpg11_regulator_desc_ldo(7, "vinl3s", s2mpg11_ldo_vranges3), 1252 s2mpg11_regulator_desc_ldo_gpio(8, "vinl2s", s2mpg11_ldo_vranges8, 1253 PCTRLSEL6, GENMASK(3, 0)), 1254 s2mpg11_regulator_desc_ldo(9, "vinl2s", s2mpg11_ldo_vranges9), 1255 s2mpg11_regulator_desc_ldo(10, "vinl4s", s2mpg11_ldo_vranges3), 1256 s2mpg11_regulator_desc_ldo(11, "vinl4s", s2mpg11_ldo_vranges3), 1257 s2mpg11_regulator_desc_ldo(12, "vinl4s", s2mpg11_ldo_vranges3), 1258 s2mpg11_regulator_desc_ldo_gpio(13, "vinl6s", s2mpg11_ldo_vranges13, 1259 PCTRLSEL6, GENMASK(7, 4)), 1260 s2mpg11_regulator_desc_ldo(14, "vinl4s", s2mpg11_ldo_vranges3), 1261 s2mpg11_regulator_desc_ldo(15, "vinl3s", s2mpg11_ldo_vranges3) 1262 }; 1263 1264 static const struct regulator_ops s2mps11_ldo_ops = { 1265 .list_voltage = regulator_list_voltage_linear, 1266 .map_voltage = regulator_map_voltage_linear, 1267 .is_enabled = regulator_is_enabled_regmap, 1268 .enable = s2mps11_regulator_enable, 1269 .disable = regulator_disable_regmap, 1270 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1271 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1272 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1273 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1274 }; 1275 1276 static const struct regulator_ops s2mps11_buck_ops = { 1277 .list_voltage = regulator_list_voltage_linear, 1278 .map_voltage = regulator_map_voltage_linear, 1279 .is_enabled = regulator_is_enabled_regmap, 1280 .enable = s2mps11_regulator_enable, 1281 .disable = regulator_disable_regmap, 1282 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1283 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1284 .set_voltage_time_sel = s2mps11_regulator_set_voltage_time_sel, 1285 .set_ramp_delay = s2mps11_set_ramp_delay, 1286 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1287 }; 1288 1289 #define regulator_desc_s2mps11_ldo(num, step) { \ 1290 .name = "LDO"#num, \ 1291 .id = S2MPS11_LDO##num, \ 1292 .of_match = of_match_ptr("LDO"#num), \ 1293 .regulators_node = of_match_ptr("regulators"), \ 1294 .ops = &s2mps11_ldo_ops, \ 1295 .type = REGULATOR_VOLTAGE, \ 1296 .owner = THIS_MODULE, \ 1297 .ramp_delay = RAMP_DELAY_12_MVUS, \ 1298 .min_uV = MIN_800_MV, \ 1299 .uV_step = step, \ 1300 .n_voltages = S2MPS11_LDO_N_VOLTAGES, \ 1301 .vsel_reg = S2MPS11_REG_L1CTRL + num - 1, \ 1302 .vsel_mask = S2MPS11_LDO_VSEL_MASK, \ 1303 .enable_reg = S2MPS11_REG_L1CTRL + num - 1, \ 1304 .enable_mask = S2MPS11_ENABLE_MASK \ 1305 } 1306 1307 #define regulator_desc_s2mps11_buck1_4(num) { \ 1308 .name = "BUCK"#num, \ 1309 .id = S2MPS11_BUCK##num, \ 1310 .of_match = of_match_ptr("BUCK"#num), \ 1311 .regulators_node = of_match_ptr("regulators"), \ 1312 .ops = &s2mps11_buck_ops, \ 1313 .type = REGULATOR_VOLTAGE, \ 1314 .owner = THIS_MODULE, \ 1315 .min_uV = MIN_650_MV, \ 1316 .uV_step = STEP_6_25_MV, \ 1317 .linear_min_sel = 8, \ 1318 .n_voltages = S2MPS11_BUCK12346_N_VOLTAGES, \ 1319 .ramp_delay = S2MPS11_RAMP_DELAY, \ 1320 .vsel_reg = S2MPS11_REG_B1CTRL2 + (num - 1) * 2, \ 1321 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ 1322 .enable_reg = S2MPS11_REG_B1CTRL1 + (num - 1) * 2, \ 1323 .enable_mask = S2MPS11_ENABLE_MASK \ 1324 } 1325 1326 #define regulator_desc_s2mps11_buck5 { \ 1327 .name = "BUCK5", \ 1328 .id = S2MPS11_BUCK5, \ 1329 .of_match = of_match_ptr("BUCK5"), \ 1330 .regulators_node = of_match_ptr("regulators"), \ 1331 .ops = &s2mps11_buck_ops, \ 1332 .type = REGULATOR_VOLTAGE, \ 1333 .owner = THIS_MODULE, \ 1334 .min_uV = MIN_650_MV, \ 1335 .uV_step = STEP_6_25_MV, \ 1336 .linear_min_sel = 8, \ 1337 .n_voltages = S2MPS11_BUCK5_N_VOLTAGES, \ 1338 .ramp_delay = S2MPS11_RAMP_DELAY, \ 1339 .vsel_reg = S2MPS11_REG_B5CTRL2, \ 1340 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ 1341 .enable_reg = S2MPS11_REG_B5CTRL1, \ 1342 .enable_mask = S2MPS11_ENABLE_MASK \ 1343 } 1344 1345 #define regulator_desc_s2mps11_buck67810(num, min, step, min_sel, voltages) { \ 1346 .name = "BUCK"#num, \ 1347 .id = S2MPS11_BUCK##num, \ 1348 .of_match = of_match_ptr("BUCK"#num), \ 1349 .regulators_node = of_match_ptr("regulators"), \ 1350 .ops = &s2mps11_buck_ops, \ 1351 .type = REGULATOR_VOLTAGE, \ 1352 .owner = THIS_MODULE, \ 1353 .min_uV = min, \ 1354 .uV_step = step, \ 1355 .linear_min_sel = min_sel, \ 1356 .n_voltages = voltages, \ 1357 .ramp_delay = S2MPS11_RAMP_DELAY, \ 1358 .vsel_reg = S2MPS11_REG_B6CTRL2 + (num - 6) * 2, \ 1359 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ 1360 .enable_reg = S2MPS11_REG_B6CTRL1 + (num - 6) * 2, \ 1361 .enable_mask = S2MPS11_ENABLE_MASK \ 1362 } 1363 1364 #define regulator_desc_s2mps11_buck9 { \ 1365 .name = "BUCK9", \ 1366 .id = S2MPS11_BUCK9, \ 1367 .of_match = of_match_ptr("BUCK9"), \ 1368 .regulators_node = of_match_ptr("regulators"), \ 1369 .ops = &s2mps11_buck_ops, \ 1370 .type = REGULATOR_VOLTAGE, \ 1371 .owner = THIS_MODULE, \ 1372 .min_uV = MIN_3000_MV, \ 1373 .uV_step = STEP_25_MV, \ 1374 .n_voltages = S2MPS11_BUCK9_N_VOLTAGES, \ 1375 .ramp_delay = S2MPS11_RAMP_DELAY, \ 1376 .vsel_reg = S2MPS11_REG_B9CTRL2, \ 1377 .vsel_mask = S2MPS11_BUCK9_VSEL_MASK, \ 1378 .enable_reg = S2MPS11_REG_B9CTRL1, \ 1379 .enable_mask = S2MPS11_ENABLE_MASK \ 1380 } 1381 1382 static const struct regulator_desc s2mps11_regulators[] = { 1383 regulator_desc_s2mps11_ldo(1, STEP_25_MV), 1384 regulator_desc_s2mps11_ldo(2, STEP_50_MV), 1385 regulator_desc_s2mps11_ldo(3, STEP_50_MV), 1386 regulator_desc_s2mps11_ldo(4, STEP_50_MV), 1387 regulator_desc_s2mps11_ldo(5, STEP_50_MV), 1388 regulator_desc_s2mps11_ldo(6, STEP_25_MV), 1389 regulator_desc_s2mps11_ldo(7, STEP_50_MV), 1390 regulator_desc_s2mps11_ldo(8, STEP_50_MV), 1391 regulator_desc_s2mps11_ldo(9, STEP_50_MV), 1392 regulator_desc_s2mps11_ldo(10, STEP_50_MV), 1393 regulator_desc_s2mps11_ldo(11, STEP_25_MV), 1394 regulator_desc_s2mps11_ldo(12, STEP_50_MV), 1395 regulator_desc_s2mps11_ldo(13, STEP_50_MV), 1396 regulator_desc_s2mps11_ldo(14, STEP_50_MV), 1397 regulator_desc_s2mps11_ldo(15, STEP_50_MV), 1398 regulator_desc_s2mps11_ldo(16, STEP_50_MV), 1399 regulator_desc_s2mps11_ldo(17, STEP_50_MV), 1400 regulator_desc_s2mps11_ldo(18, STEP_50_MV), 1401 regulator_desc_s2mps11_ldo(19, STEP_50_MV), 1402 regulator_desc_s2mps11_ldo(20, STEP_50_MV), 1403 regulator_desc_s2mps11_ldo(21, STEP_50_MV), 1404 regulator_desc_s2mps11_ldo(22, STEP_25_MV), 1405 regulator_desc_s2mps11_ldo(23, STEP_25_MV), 1406 regulator_desc_s2mps11_ldo(24, STEP_50_MV), 1407 regulator_desc_s2mps11_ldo(25, STEP_50_MV), 1408 regulator_desc_s2mps11_ldo(26, STEP_50_MV), 1409 regulator_desc_s2mps11_ldo(27, STEP_25_MV), 1410 regulator_desc_s2mps11_ldo(28, STEP_50_MV), 1411 regulator_desc_s2mps11_ldo(29, STEP_50_MV), 1412 regulator_desc_s2mps11_ldo(30, STEP_50_MV), 1413 regulator_desc_s2mps11_ldo(31, STEP_50_MV), 1414 regulator_desc_s2mps11_ldo(32, STEP_50_MV), 1415 regulator_desc_s2mps11_ldo(33, STEP_50_MV), 1416 regulator_desc_s2mps11_ldo(34, STEP_50_MV), 1417 regulator_desc_s2mps11_ldo(35, STEP_25_MV), 1418 regulator_desc_s2mps11_ldo(36, STEP_50_MV), 1419 regulator_desc_s2mps11_ldo(37, STEP_50_MV), 1420 regulator_desc_s2mps11_ldo(38, STEP_50_MV), 1421 regulator_desc_s2mps11_buck1_4(1), 1422 regulator_desc_s2mps11_buck1_4(2), 1423 regulator_desc_s2mps11_buck1_4(3), 1424 regulator_desc_s2mps11_buck1_4(4), 1425 regulator_desc_s2mps11_buck5, 1426 regulator_desc_s2mps11_buck67810(6, MIN_650_MV, STEP_6_25_MV, 8, 1427 S2MPS11_BUCK12346_N_VOLTAGES), 1428 regulator_desc_s2mps11_buck67810(7, MIN_750_MV, STEP_12_5_MV, 0, 1429 S2MPS11_BUCK7810_N_VOLTAGES), 1430 regulator_desc_s2mps11_buck67810(8, MIN_750_MV, STEP_12_5_MV, 0, 1431 S2MPS11_BUCK7810_N_VOLTAGES), 1432 regulator_desc_s2mps11_buck9, 1433 regulator_desc_s2mps11_buck67810(10, MIN_750_MV, STEP_12_5_MV, 0, 1434 S2MPS11_BUCK7810_N_VOLTAGES), 1435 }; 1436 1437 static const struct regulator_ops s2mps14_reg_ops; 1438 1439 #define regulator_desc_s2mps13_ldo(num, min, step, min_sel) { \ 1440 .name = "LDO"#num, \ 1441 .id = S2MPS13_LDO##num, \ 1442 .of_match = of_match_ptr("LDO"#num), \ 1443 .regulators_node = of_match_ptr("regulators"), \ 1444 .ops = &s2mps14_reg_ops, \ 1445 .type = REGULATOR_VOLTAGE, \ 1446 .owner = THIS_MODULE, \ 1447 .min_uV = min, \ 1448 .uV_step = step, \ 1449 .linear_min_sel = min_sel, \ 1450 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \ 1451 .vsel_reg = S2MPS13_REG_L1CTRL + num - 1, \ 1452 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \ 1453 .enable_reg = S2MPS13_REG_L1CTRL + num - 1, \ 1454 .enable_mask = S2MPS14_ENABLE_MASK \ 1455 } 1456 1457 #define regulator_desc_s2mps13_buck(num, min, step, min_sel) { \ 1458 .name = "BUCK"#num, \ 1459 .id = S2MPS13_BUCK##num, \ 1460 .of_match = of_match_ptr("BUCK"#num), \ 1461 .regulators_node = of_match_ptr("regulators"), \ 1462 .ops = &s2mps14_reg_ops, \ 1463 .type = REGULATOR_VOLTAGE, \ 1464 .owner = THIS_MODULE, \ 1465 .min_uV = min, \ 1466 .uV_step = step, \ 1467 .linear_min_sel = min_sel, \ 1468 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 1469 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ 1470 .vsel_reg = S2MPS13_REG_B1OUT + (num - 1) * 2, \ 1471 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ 1472 .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \ 1473 .enable_mask = S2MPS14_ENABLE_MASK \ 1474 } 1475 1476 #define regulator_desc_s2mps13_buck7(num, min, step, min_sel) { \ 1477 .name = "BUCK"#num, \ 1478 .id = S2MPS13_BUCK##num, \ 1479 .of_match = of_match_ptr("BUCK"#num), \ 1480 .regulators_node = of_match_ptr("regulators"), \ 1481 .ops = &s2mps14_reg_ops, \ 1482 .type = REGULATOR_VOLTAGE, \ 1483 .owner = THIS_MODULE, \ 1484 .min_uV = min, \ 1485 .uV_step = step, \ 1486 .linear_min_sel = min_sel, \ 1487 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 1488 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ 1489 .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \ 1490 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ 1491 .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \ 1492 .enable_mask = S2MPS14_ENABLE_MASK \ 1493 } 1494 1495 #define regulator_desc_s2mps13_buck8_10(num, min, step, min_sel) { \ 1496 .name = "BUCK"#num, \ 1497 .id = S2MPS13_BUCK##num, \ 1498 .of_match = of_match_ptr("BUCK"#num), \ 1499 .regulators_node = of_match_ptr("regulators"), \ 1500 .ops = &s2mps14_reg_ops, \ 1501 .type = REGULATOR_VOLTAGE, \ 1502 .owner = THIS_MODULE, \ 1503 .min_uV = min, \ 1504 .uV_step = step, \ 1505 .linear_min_sel = min_sel, \ 1506 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 1507 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ 1508 .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \ 1509 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ 1510 .enable_reg = S2MPS13_REG_B1CTRL + (num) * 2 - 1, \ 1511 .enable_mask = S2MPS14_ENABLE_MASK \ 1512 } 1513 1514 static const struct regulator_desc s2mps13_regulators[] = { 1515 regulator_desc_s2mps13_ldo(1, MIN_800_MV, STEP_12_5_MV, 0x00), 1516 regulator_desc_s2mps13_ldo(2, MIN_1400_MV, STEP_50_MV, 0x0C), 1517 regulator_desc_s2mps13_ldo(3, MIN_1000_MV, STEP_25_MV, 0x08), 1518 regulator_desc_s2mps13_ldo(4, MIN_800_MV, STEP_12_5_MV, 0x00), 1519 regulator_desc_s2mps13_ldo(5, MIN_800_MV, STEP_12_5_MV, 0x00), 1520 regulator_desc_s2mps13_ldo(6, MIN_800_MV, STEP_12_5_MV, 0x00), 1521 regulator_desc_s2mps13_ldo(7, MIN_1000_MV, STEP_25_MV, 0x08), 1522 regulator_desc_s2mps13_ldo(8, MIN_1000_MV, STEP_25_MV, 0x08), 1523 regulator_desc_s2mps13_ldo(9, MIN_1000_MV, STEP_25_MV, 0x08), 1524 regulator_desc_s2mps13_ldo(10, MIN_1400_MV, STEP_50_MV, 0x0C), 1525 regulator_desc_s2mps13_ldo(11, MIN_800_MV, STEP_25_MV, 0x10), 1526 regulator_desc_s2mps13_ldo(12, MIN_800_MV, STEP_25_MV, 0x10), 1527 regulator_desc_s2mps13_ldo(13, MIN_800_MV, STEP_25_MV, 0x10), 1528 regulator_desc_s2mps13_ldo(14, MIN_800_MV, STEP_12_5_MV, 0x00), 1529 regulator_desc_s2mps13_ldo(15, MIN_800_MV, STEP_12_5_MV, 0x00), 1530 regulator_desc_s2mps13_ldo(16, MIN_1400_MV, STEP_50_MV, 0x0C), 1531 regulator_desc_s2mps13_ldo(17, MIN_1400_MV, STEP_50_MV, 0x0C), 1532 regulator_desc_s2mps13_ldo(18, MIN_1000_MV, STEP_25_MV, 0x08), 1533 regulator_desc_s2mps13_ldo(19, MIN_1000_MV, STEP_25_MV, 0x08), 1534 regulator_desc_s2mps13_ldo(20, MIN_1400_MV, STEP_50_MV, 0x0C), 1535 regulator_desc_s2mps13_ldo(21, MIN_1000_MV, STEP_25_MV, 0x08), 1536 regulator_desc_s2mps13_ldo(22, MIN_1000_MV, STEP_25_MV, 0x08), 1537 regulator_desc_s2mps13_ldo(23, MIN_800_MV, STEP_12_5_MV, 0x00), 1538 regulator_desc_s2mps13_ldo(24, MIN_800_MV, STEP_12_5_MV, 0x00), 1539 regulator_desc_s2mps13_ldo(25, MIN_1400_MV, STEP_50_MV, 0x0C), 1540 regulator_desc_s2mps13_ldo(26, MIN_1400_MV, STEP_50_MV, 0x0C), 1541 regulator_desc_s2mps13_ldo(27, MIN_1400_MV, STEP_50_MV, 0x0C), 1542 regulator_desc_s2mps13_ldo(28, MIN_1000_MV, STEP_25_MV, 0x08), 1543 regulator_desc_s2mps13_ldo(29, MIN_1400_MV, STEP_50_MV, 0x0C), 1544 regulator_desc_s2mps13_ldo(30, MIN_1400_MV, STEP_50_MV, 0x0C), 1545 regulator_desc_s2mps13_ldo(31, MIN_1000_MV, STEP_25_MV, 0x08), 1546 regulator_desc_s2mps13_ldo(32, MIN_1000_MV, STEP_25_MV, 0x08), 1547 regulator_desc_s2mps13_ldo(33, MIN_1400_MV, STEP_50_MV, 0x0C), 1548 regulator_desc_s2mps13_ldo(34, MIN_1000_MV, STEP_25_MV, 0x08), 1549 regulator_desc_s2mps13_ldo(35, MIN_1400_MV, STEP_50_MV, 0x0C), 1550 regulator_desc_s2mps13_ldo(36, MIN_800_MV, STEP_12_5_MV, 0x00), 1551 regulator_desc_s2mps13_ldo(37, MIN_1000_MV, STEP_25_MV, 0x08), 1552 regulator_desc_s2mps13_ldo(38, MIN_1400_MV, STEP_50_MV, 0x0C), 1553 regulator_desc_s2mps13_ldo(39, MIN_1000_MV, STEP_25_MV, 0x08), 1554 regulator_desc_s2mps13_ldo(40, MIN_1400_MV, STEP_50_MV, 0x0C), 1555 regulator_desc_s2mps13_buck(1, MIN_500_MV, STEP_6_25_MV, 0x10), 1556 regulator_desc_s2mps13_buck(2, MIN_500_MV, STEP_6_25_MV, 0x10), 1557 regulator_desc_s2mps13_buck(3, MIN_500_MV, STEP_6_25_MV, 0x10), 1558 regulator_desc_s2mps13_buck(4, MIN_500_MV, STEP_6_25_MV, 0x10), 1559 regulator_desc_s2mps13_buck(5, MIN_500_MV, STEP_6_25_MV, 0x10), 1560 regulator_desc_s2mps13_buck(6, MIN_500_MV, STEP_6_25_MV, 0x10), 1561 regulator_desc_s2mps13_buck7(7, MIN_500_MV, STEP_6_25_MV, 0x10), 1562 regulator_desc_s2mps13_buck8_10(8, MIN_1000_MV, STEP_12_5_MV, 0x20), 1563 regulator_desc_s2mps13_buck8_10(9, MIN_1000_MV, STEP_12_5_MV, 0x20), 1564 regulator_desc_s2mps13_buck8_10(10, MIN_500_MV, STEP_6_25_MV, 0x10), 1565 }; 1566 1567 static const struct regulator_ops s2mps14_reg_ops = { 1568 .list_voltage = regulator_list_voltage_linear, 1569 .map_voltage = regulator_map_voltage_linear, 1570 .is_enabled = regulator_is_enabled_regmap, 1571 .enable = s2mps11_regulator_enable, 1572 .disable = regulator_disable_regmap, 1573 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1574 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1575 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1576 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1577 }; 1578 1579 #define regulator_desc_s2mps14_ldo(num, min, step) { \ 1580 .name = "LDO"#num, \ 1581 .id = S2MPS14_LDO##num, \ 1582 .of_match = of_match_ptr("LDO"#num), \ 1583 .regulators_node = of_match_ptr("regulators"), \ 1584 .of_parse_cb = s2mps11_of_parse_cb, \ 1585 .ops = &s2mps14_reg_ops, \ 1586 .type = REGULATOR_VOLTAGE, \ 1587 .owner = THIS_MODULE, \ 1588 .min_uV = min, \ 1589 .uV_step = step, \ 1590 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \ 1591 .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \ 1592 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \ 1593 .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \ 1594 .enable_mask = S2MPS14_ENABLE_MASK \ 1595 } 1596 1597 #define regulator_desc_s2mps14_buck(num, min, step, min_sel) { \ 1598 .name = "BUCK"#num, \ 1599 .id = S2MPS14_BUCK##num, \ 1600 .of_match = of_match_ptr("BUCK"#num), \ 1601 .regulators_node = of_match_ptr("regulators"), \ 1602 .of_parse_cb = s2mps11_of_parse_cb, \ 1603 .ops = &s2mps14_reg_ops, \ 1604 .type = REGULATOR_VOLTAGE, \ 1605 .owner = THIS_MODULE, \ 1606 .min_uV = min, \ 1607 .uV_step = step, \ 1608 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 1609 .linear_min_sel = min_sel, \ 1610 .ramp_delay = S2MPS14_BUCK_RAMP_DELAY, \ 1611 .vsel_reg = S2MPS14_REG_B1CTRL2 + (num - 1) * 2, \ 1612 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ 1613 .enable_reg = S2MPS14_REG_B1CTRL1 + (num - 1) * 2, \ 1614 .enable_mask = S2MPS14_ENABLE_MASK \ 1615 } 1616 1617 static const struct regulator_desc s2mps14_regulators[] = { 1618 regulator_desc_s2mps14_ldo(1, MIN_800_MV, STEP_12_5_MV), 1619 regulator_desc_s2mps14_ldo(2, MIN_800_MV, STEP_12_5_MV), 1620 regulator_desc_s2mps14_ldo(3, MIN_800_MV, STEP_25_MV), 1621 regulator_desc_s2mps14_ldo(4, MIN_800_MV, STEP_25_MV), 1622 regulator_desc_s2mps14_ldo(5, MIN_800_MV, STEP_12_5_MV), 1623 regulator_desc_s2mps14_ldo(6, MIN_800_MV, STEP_12_5_MV), 1624 regulator_desc_s2mps14_ldo(7, MIN_800_MV, STEP_25_MV), 1625 regulator_desc_s2mps14_ldo(8, MIN_1800_MV, STEP_25_MV), 1626 regulator_desc_s2mps14_ldo(9, MIN_800_MV, STEP_12_5_MV), 1627 regulator_desc_s2mps14_ldo(10, MIN_800_MV, STEP_12_5_MV), 1628 regulator_desc_s2mps14_ldo(11, MIN_800_MV, STEP_25_MV), 1629 regulator_desc_s2mps14_ldo(12, MIN_1800_MV, STEP_25_MV), 1630 regulator_desc_s2mps14_ldo(13, MIN_1800_MV, STEP_25_MV), 1631 regulator_desc_s2mps14_ldo(14, MIN_1800_MV, STEP_25_MV), 1632 regulator_desc_s2mps14_ldo(15, MIN_1800_MV, STEP_25_MV), 1633 regulator_desc_s2mps14_ldo(16, MIN_1800_MV, STEP_25_MV), 1634 regulator_desc_s2mps14_ldo(17, MIN_1800_MV, STEP_25_MV), 1635 regulator_desc_s2mps14_ldo(18, MIN_1800_MV, STEP_25_MV), 1636 regulator_desc_s2mps14_ldo(19, MIN_800_MV, STEP_25_MV), 1637 regulator_desc_s2mps14_ldo(20, MIN_800_MV, STEP_25_MV), 1638 regulator_desc_s2mps14_ldo(21, MIN_800_MV, STEP_25_MV), 1639 regulator_desc_s2mps14_ldo(22, MIN_800_MV, STEP_12_5_MV), 1640 regulator_desc_s2mps14_ldo(23, MIN_800_MV, STEP_25_MV), 1641 regulator_desc_s2mps14_ldo(24, MIN_1800_MV, STEP_25_MV), 1642 regulator_desc_s2mps14_ldo(25, MIN_1800_MV, STEP_25_MV), 1643 regulator_desc_s2mps14_buck(1, MIN_600_MV, STEP_6_25_MV, 1644 S2MPS14_BUCK1235_START_SEL), 1645 regulator_desc_s2mps14_buck(2, MIN_600_MV, STEP_6_25_MV, 1646 S2MPS14_BUCK1235_START_SEL), 1647 regulator_desc_s2mps14_buck(3, MIN_600_MV, STEP_6_25_MV, 1648 S2MPS14_BUCK1235_START_SEL), 1649 regulator_desc_s2mps14_buck(4, MIN_1400_MV, STEP_12_5_MV, 1650 S2MPS14_BUCK4_START_SEL), 1651 regulator_desc_s2mps14_buck(5, MIN_600_MV, STEP_6_25_MV, 1652 S2MPS14_BUCK1235_START_SEL), 1653 }; 1654 1655 static const struct regulator_ops s2mps15_reg_ldo_ops = { 1656 .list_voltage = regulator_list_voltage_linear_range, 1657 .map_voltage = regulator_map_voltage_linear_range, 1658 .is_enabled = regulator_is_enabled_regmap, 1659 .enable = regulator_enable_regmap, 1660 .disable = regulator_disable_regmap, 1661 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1662 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1663 }; 1664 1665 static const struct regulator_ops s2mps15_reg_buck_ops = { 1666 .list_voltage = regulator_list_voltage_linear_range, 1667 .map_voltage = regulator_map_voltage_linear_range, 1668 .is_enabled = regulator_is_enabled_regmap, 1669 .enable = regulator_enable_regmap, 1670 .disable = regulator_disable_regmap, 1671 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1672 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1673 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1674 }; 1675 1676 #define regulator_desc_s2mps15_ldo(num, range) { \ 1677 .name = "LDO"#num, \ 1678 .id = S2MPS15_LDO##num, \ 1679 .of_match = of_match_ptr("LDO"#num), \ 1680 .regulators_node = of_match_ptr("regulators"), \ 1681 .ops = &s2mps15_reg_ldo_ops, \ 1682 .type = REGULATOR_VOLTAGE, \ 1683 .owner = THIS_MODULE, \ 1684 .linear_ranges = range, \ 1685 .n_linear_ranges = ARRAY_SIZE(range), \ 1686 .n_voltages = S2MPS15_LDO_N_VOLTAGES, \ 1687 .vsel_reg = S2MPS15_REG_L1CTRL + num - 1, \ 1688 .vsel_mask = S2MPS15_LDO_VSEL_MASK, \ 1689 .enable_reg = S2MPS15_REG_L1CTRL + num - 1, \ 1690 .enable_mask = S2MPS15_ENABLE_MASK \ 1691 } 1692 1693 #define regulator_desc_s2mps15_buck(num, range) { \ 1694 .name = "BUCK"#num, \ 1695 .id = S2MPS15_BUCK##num, \ 1696 .of_match = of_match_ptr("BUCK"#num), \ 1697 .regulators_node = of_match_ptr("regulators"), \ 1698 .ops = &s2mps15_reg_buck_ops, \ 1699 .type = REGULATOR_VOLTAGE, \ 1700 .owner = THIS_MODULE, \ 1701 .linear_ranges = range, \ 1702 .n_linear_ranges = ARRAY_SIZE(range), \ 1703 .ramp_delay = 12500, \ 1704 .n_voltages = S2MPS15_BUCK_N_VOLTAGES, \ 1705 .vsel_reg = S2MPS15_REG_B1CTRL2 + ((num - 1) * 2), \ 1706 .vsel_mask = S2MPS15_BUCK_VSEL_MASK, \ 1707 .enable_reg = S2MPS15_REG_B1CTRL1 + ((num - 1) * 2), \ 1708 .enable_mask = S2MPS15_ENABLE_MASK \ 1709 } 1710 1711 /* voltage range for s2mps15 LDO 3, 5, 15, 16, 18, 20, 23 and 27 */ 1712 static const struct linear_range s2mps15_ldo_voltage_ranges1[] = { 1713 REGULATOR_LINEAR_RANGE(1000000, 0xc, 0x38, 25000), 1714 }; 1715 1716 /* voltage range for s2mps15 LDO 2, 6, 14, 17, 19, 21, 24 and 25 */ 1717 static const struct linear_range s2mps15_ldo_voltage_ranges2[] = { 1718 REGULATOR_LINEAR_RANGE(1800000, 0x0, 0x3f, 25000), 1719 }; 1720 1721 /* voltage range for s2mps15 LDO 4, 11, 12, 13, 22 and 26 */ 1722 static const struct linear_range s2mps15_ldo_voltage_ranges3[] = { 1723 REGULATOR_LINEAR_RANGE(700000, 0x0, 0x34, 12500), 1724 }; 1725 1726 /* voltage range for s2mps15 LDO 7, 8, 9 and 10 */ 1727 static const struct linear_range s2mps15_ldo_voltage_ranges4[] = { 1728 REGULATOR_LINEAR_RANGE(700000, 0x10, 0x20, 25000), 1729 }; 1730 1731 /* voltage range for s2mps15 LDO 1 */ 1732 static const struct linear_range s2mps15_ldo_voltage_ranges5[] = { 1733 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x20, 12500), 1734 }; 1735 1736 /* voltage range for s2mps15 BUCK 1, 2, 3, 4, 5, 6 and 7 */ 1737 static const struct linear_range s2mps15_buck_voltage_ranges1[] = { 1738 REGULATOR_LINEAR_RANGE(500000, 0x20, 0xc0, 6250), 1739 }; 1740 1741 /* voltage range for s2mps15 BUCK 8, 9 and 10 */ 1742 static const struct linear_range s2mps15_buck_voltage_ranges2[] = { 1743 REGULATOR_LINEAR_RANGE(1000000, 0x20, 0x78, 12500), 1744 }; 1745 1746 static const struct regulator_desc s2mps15_regulators[] = { 1747 regulator_desc_s2mps15_ldo(1, s2mps15_ldo_voltage_ranges5), 1748 regulator_desc_s2mps15_ldo(2, s2mps15_ldo_voltage_ranges2), 1749 regulator_desc_s2mps15_ldo(3, s2mps15_ldo_voltage_ranges1), 1750 regulator_desc_s2mps15_ldo(4, s2mps15_ldo_voltage_ranges3), 1751 regulator_desc_s2mps15_ldo(5, s2mps15_ldo_voltage_ranges1), 1752 regulator_desc_s2mps15_ldo(6, s2mps15_ldo_voltage_ranges2), 1753 regulator_desc_s2mps15_ldo(7, s2mps15_ldo_voltage_ranges4), 1754 regulator_desc_s2mps15_ldo(8, s2mps15_ldo_voltage_ranges4), 1755 regulator_desc_s2mps15_ldo(9, s2mps15_ldo_voltage_ranges4), 1756 regulator_desc_s2mps15_ldo(10, s2mps15_ldo_voltage_ranges4), 1757 regulator_desc_s2mps15_ldo(11, s2mps15_ldo_voltage_ranges3), 1758 regulator_desc_s2mps15_ldo(12, s2mps15_ldo_voltage_ranges3), 1759 regulator_desc_s2mps15_ldo(13, s2mps15_ldo_voltage_ranges3), 1760 regulator_desc_s2mps15_ldo(14, s2mps15_ldo_voltage_ranges2), 1761 regulator_desc_s2mps15_ldo(15, s2mps15_ldo_voltage_ranges1), 1762 regulator_desc_s2mps15_ldo(16, s2mps15_ldo_voltage_ranges1), 1763 regulator_desc_s2mps15_ldo(17, s2mps15_ldo_voltage_ranges2), 1764 regulator_desc_s2mps15_ldo(18, s2mps15_ldo_voltage_ranges1), 1765 regulator_desc_s2mps15_ldo(19, s2mps15_ldo_voltage_ranges2), 1766 regulator_desc_s2mps15_ldo(20, s2mps15_ldo_voltage_ranges1), 1767 regulator_desc_s2mps15_ldo(21, s2mps15_ldo_voltage_ranges2), 1768 regulator_desc_s2mps15_ldo(22, s2mps15_ldo_voltage_ranges3), 1769 regulator_desc_s2mps15_ldo(23, s2mps15_ldo_voltage_ranges1), 1770 regulator_desc_s2mps15_ldo(24, s2mps15_ldo_voltage_ranges2), 1771 regulator_desc_s2mps15_ldo(25, s2mps15_ldo_voltage_ranges2), 1772 regulator_desc_s2mps15_ldo(26, s2mps15_ldo_voltage_ranges3), 1773 regulator_desc_s2mps15_ldo(27, s2mps15_ldo_voltage_ranges1), 1774 regulator_desc_s2mps15_buck(1, s2mps15_buck_voltage_ranges1), 1775 regulator_desc_s2mps15_buck(2, s2mps15_buck_voltage_ranges1), 1776 regulator_desc_s2mps15_buck(3, s2mps15_buck_voltage_ranges1), 1777 regulator_desc_s2mps15_buck(4, s2mps15_buck_voltage_ranges1), 1778 regulator_desc_s2mps15_buck(5, s2mps15_buck_voltage_ranges1), 1779 regulator_desc_s2mps15_buck(6, s2mps15_buck_voltage_ranges1), 1780 regulator_desc_s2mps15_buck(7, s2mps15_buck_voltage_ranges1), 1781 regulator_desc_s2mps15_buck(8, s2mps15_buck_voltage_ranges2), 1782 regulator_desc_s2mps15_buck(9, s2mps15_buck_voltage_ranges2), 1783 regulator_desc_s2mps15_buck(10, s2mps15_buck_voltage_ranges2), 1784 }; 1785 1786 static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11, 1787 struct regulator_dev *rdev) 1788 { 1789 int ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 1790 rdev->desc->enable_mask, 1791 S2MPS14_ENABLE_EXT_CONTROL); 1792 if (ret < 0) 1793 return dev_err_probe(rdev_get_dev(rdev), ret, 1794 "failed to enable GPIO control over %d/%s\n", 1795 rdev->desc->id, rdev->desc->name); 1796 return 0; 1797 } 1798 1799 static int s2mpu02_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) 1800 { 1801 unsigned int ramp_val, ramp_shift, ramp_reg; 1802 int rdev_id = rdev_get_id(rdev); 1803 1804 switch (rdev_id) { 1805 case S2MPU02_BUCK1: 1806 ramp_shift = S2MPU02_BUCK1_RAMP_SHIFT; 1807 break; 1808 case S2MPU02_BUCK2: 1809 ramp_shift = S2MPU02_BUCK2_RAMP_SHIFT; 1810 break; 1811 case S2MPU02_BUCK3: 1812 ramp_shift = S2MPU02_BUCK3_RAMP_SHIFT; 1813 break; 1814 case S2MPU02_BUCK4: 1815 ramp_shift = S2MPU02_BUCK4_RAMP_SHIFT; 1816 break; 1817 default: 1818 return 0; 1819 } 1820 ramp_reg = S2MPU02_REG_RAMP1; 1821 ramp_val = get_ramp_delay(ramp_delay); 1822 1823 return regmap_update_bits(rdev->regmap, ramp_reg, 1824 S2MPU02_BUCK1234_RAMP_MASK << ramp_shift, 1825 ramp_val << ramp_shift); 1826 } 1827 1828 static const struct regulator_ops s2mpu02_ldo_ops = { 1829 .list_voltage = regulator_list_voltage_linear, 1830 .map_voltage = regulator_map_voltage_linear, 1831 .is_enabled = regulator_is_enabled_regmap, 1832 .enable = s2mps11_regulator_enable, 1833 .disable = regulator_disable_regmap, 1834 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1835 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1836 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1837 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1838 }; 1839 1840 static const struct regulator_ops s2mpu02_buck_ops = { 1841 .list_voltage = regulator_list_voltage_linear, 1842 .map_voltage = regulator_map_voltage_linear, 1843 .is_enabled = regulator_is_enabled_regmap, 1844 .enable = s2mps11_regulator_enable, 1845 .disable = regulator_disable_regmap, 1846 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1847 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1848 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1849 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1850 .set_ramp_delay = s2mpu02_set_ramp_delay, 1851 }; 1852 1853 #define regulator_desc_s2mpu02_ldo1(num) { \ 1854 .name = "LDO"#num, \ 1855 .id = S2MPU02_LDO##num, \ 1856 .of_match = of_match_ptr("LDO"#num), \ 1857 .regulators_node = of_match_ptr("regulators"), \ 1858 .ops = &s2mpu02_ldo_ops, \ 1859 .type = REGULATOR_VOLTAGE, \ 1860 .owner = THIS_MODULE, \ 1861 .min_uV = S2MPU02_LDO_MIN_900MV, \ 1862 .uV_step = S2MPU02_LDO_STEP_12_5MV, \ 1863 .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \ 1864 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1865 .vsel_reg = S2MPU02_REG_L1CTRL, \ 1866 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1867 .enable_reg = S2MPU02_REG_L1CTRL, \ 1868 .enable_mask = S2MPU02_ENABLE_MASK \ 1869 } 1870 #define regulator_desc_s2mpu02_ldo2(num) { \ 1871 .name = "LDO"#num, \ 1872 .id = S2MPU02_LDO##num, \ 1873 .of_match = of_match_ptr("LDO"#num), \ 1874 .regulators_node = of_match_ptr("regulators"), \ 1875 .ops = &s2mpu02_ldo_ops, \ 1876 .type = REGULATOR_VOLTAGE, \ 1877 .owner = THIS_MODULE, \ 1878 .min_uV = S2MPU02_LDO_MIN_1050MV, \ 1879 .uV_step = S2MPU02_LDO_STEP_25MV, \ 1880 .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \ 1881 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1882 .vsel_reg = S2MPU02_REG_L2CTRL1, \ 1883 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1884 .enable_reg = S2MPU02_REG_L2CTRL1, \ 1885 .enable_mask = S2MPU02_ENABLE_MASK \ 1886 } 1887 #define regulator_desc_s2mpu02_ldo3(num) { \ 1888 .name = "LDO"#num, \ 1889 .id = S2MPU02_LDO##num, \ 1890 .of_match = of_match_ptr("LDO"#num), \ 1891 .regulators_node = of_match_ptr("regulators"), \ 1892 .ops = &s2mpu02_ldo_ops, \ 1893 .type = REGULATOR_VOLTAGE, \ 1894 .owner = THIS_MODULE, \ 1895 .min_uV = S2MPU02_LDO_MIN_900MV, \ 1896 .uV_step = S2MPU02_LDO_STEP_12_5MV, \ 1897 .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \ 1898 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1899 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1900 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1901 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1902 .enable_mask = S2MPU02_ENABLE_MASK \ 1903 } 1904 #define regulator_desc_s2mpu02_ldo4(num) { \ 1905 .name = "LDO"#num, \ 1906 .id = S2MPU02_LDO##num, \ 1907 .of_match = of_match_ptr("LDO"#num), \ 1908 .regulators_node = of_match_ptr("regulators"), \ 1909 .ops = &s2mpu02_ldo_ops, \ 1910 .type = REGULATOR_VOLTAGE, \ 1911 .owner = THIS_MODULE, \ 1912 .min_uV = S2MPU02_LDO_MIN_1050MV, \ 1913 .uV_step = S2MPU02_LDO_STEP_25MV, \ 1914 .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \ 1915 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1916 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1917 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1918 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1919 .enable_mask = S2MPU02_ENABLE_MASK \ 1920 } 1921 #define regulator_desc_s2mpu02_ldo5(num) { \ 1922 .name = "LDO"#num, \ 1923 .id = S2MPU02_LDO##num, \ 1924 .of_match = of_match_ptr("LDO"#num), \ 1925 .regulators_node = of_match_ptr("regulators"), \ 1926 .ops = &s2mpu02_ldo_ops, \ 1927 .type = REGULATOR_VOLTAGE, \ 1928 .owner = THIS_MODULE, \ 1929 .min_uV = S2MPU02_LDO_MIN_1600MV, \ 1930 .uV_step = S2MPU02_LDO_STEP_50MV, \ 1931 .linear_min_sel = S2MPU02_LDO_GROUP3_START_SEL, \ 1932 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1933 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1934 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1935 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1936 .enable_mask = S2MPU02_ENABLE_MASK \ 1937 } 1938 1939 #define regulator_desc_s2mpu02_buck1234(num) { \ 1940 .name = "BUCK"#num, \ 1941 .id = S2MPU02_BUCK##num, \ 1942 .of_match = of_match_ptr("BUCK"#num), \ 1943 .regulators_node = of_match_ptr("regulators"), \ 1944 .ops = &s2mpu02_buck_ops, \ 1945 .type = REGULATOR_VOLTAGE, \ 1946 .owner = THIS_MODULE, \ 1947 .min_uV = S2MPU02_BUCK1234_MIN_600MV, \ 1948 .uV_step = S2MPU02_BUCK1234_STEP_6_25MV, \ 1949 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ 1950 .linear_min_sel = S2MPU02_BUCK1234_START_SEL, \ 1951 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ 1952 .vsel_reg = S2MPU02_REG_B1CTRL2 + (num - 1) * 2, \ 1953 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ 1954 .enable_reg = S2MPU02_REG_B1CTRL1 + (num - 1) * 2, \ 1955 .enable_mask = S2MPU02_ENABLE_MASK \ 1956 } 1957 #define regulator_desc_s2mpu02_buck5(num) { \ 1958 .name = "BUCK"#num, \ 1959 .id = S2MPU02_BUCK##num, \ 1960 .of_match = of_match_ptr("BUCK"#num), \ 1961 .regulators_node = of_match_ptr("regulators"), \ 1962 .ops = &s2mpu02_ldo_ops, \ 1963 .type = REGULATOR_VOLTAGE, \ 1964 .owner = THIS_MODULE, \ 1965 .min_uV = S2MPU02_BUCK5_MIN_1081_25MV, \ 1966 .uV_step = S2MPU02_BUCK5_STEP_6_25MV, \ 1967 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ 1968 .linear_min_sel = S2MPU02_BUCK5_START_SEL, \ 1969 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ 1970 .vsel_reg = S2MPU02_REG_B5CTRL2, \ 1971 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ 1972 .enable_reg = S2MPU02_REG_B5CTRL1, \ 1973 .enable_mask = S2MPU02_ENABLE_MASK \ 1974 } 1975 #define regulator_desc_s2mpu02_buck6(num) { \ 1976 .name = "BUCK"#num, \ 1977 .id = S2MPU02_BUCK##num, \ 1978 .of_match = of_match_ptr("BUCK"#num), \ 1979 .regulators_node = of_match_ptr("regulators"), \ 1980 .ops = &s2mpu02_ldo_ops, \ 1981 .type = REGULATOR_VOLTAGE, \ 1982 .owner = THIS_MODULE, \ 1983 .min_uV = S2MPU02_BUCK6_MIN_1700MV, \ 1984 .uV_step = S2MPU02_BUCK6_STEP_2_50MV, \ 1985 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ 1986 .linear_min_sel = S2MPU02_BUCK6_START_SEL, \ 1987 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ 1988 .vsel_reg = S2MPU02_REG_B6CTRL2, \ 1989 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ 1990 .enable_reg = S2MPU02_REG_B6CTRL1, \ 1991 .enable_mask = S2MPU02_ENABLE_MASK \ 1992 } 1993 #define regulator_desc_s2mpu02_buck7(num) { \ 1994 .name = "BUCK"#num, \ 1995 .id = S2MPU02_BUCK##num, \ 1996 .of_match = of_match_ptr("BUCK"#num), \ 1997 .regulators_node = of_match_ptr("regulators"), \ 1998 .ops = &s2mpu02_ldo_ops, \ 1999 .type = REGULATOR_VOLTAGE, \ 2000 .owner = THIS_MODULE, \ 2001 .min_uV = S2MPU02_BUCK7_MIN_900MV, \ 2002 .uV_step = S2MPU02_BUCK7_STEP_6_25MV, \ 2003 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ 2004 .linear_min_sel = S2MPU02_BUCK7_START_SEL, \ 2005 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ 2006 .vsel_reg = S2MPU02_REG_B7CTRL2, \ 2007 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ 2008 .enable_reg = S2MPU02_REG_B7CTRL1, \ 2009 .enable_mask = S2MPU02_ENABLE_MASK \ 2010 } 2011 2012 static const struct regulator_desc s2mpu02_regulators[] = { 2013 regulator_desc_s2mpu02_ldo1(1), 2014 regulator_desc_s2mpu02_ldo2(2), 2015 regulator_desc_s2mpu02_ldo4(3), 2016 regulator_desc_s2mpu02_ldo5(4), 2017 regulator_desc_s2mpu02_ldo4(5), 2018 regulator_desc_s2mpu02_ldo3(6), 2019 regulator_desc_s2mpu02_ldo3(7), 2020 regulator_desc_s2mpu02_ldo4(8), 2021 regulator_desc_s2mpu02_ldo5(9), 2022 regulator_desc_s2mpu02_ldo3(10), 2023 regulator_desc_s2mpu02_ldo4(11), 2024 regulator_desc_s2mpu02_ldo5(12), 2025 regulator_desc_s2mpu02_ldo5(13), 2026 regulator_desc_s2mpu02_ldo5(14), 2027 regulator_desc_s2mpu02_ldo5(15), 2028 regulator_desc_s2mpu02_ldo5(16), 2029 regulator_desc_s2mpu02_ldo4(17), 2030 regulator_desc_s2mpu02_ldo5(18), 2031 regulator_desc_s2mpu02_ldo3(19), 2032 regulator_desc_s2mpu02_ldo4(20), 2033 regulator_desc_s2mpu02_ldo5(21), 2034 regulator_desc_s2mpu02_ldo5(22), 2035 regulator_desc_s2mpu02_ldo5(23), 2036 regulator_desc_s2mpu02_ldo4(24), 2037 regulator_desc_s2mpu02_ldo5(25), 2038 regulator_desc_s2mpu02_ldo4(26), 2039 regulator_desc_s2mpu02_ldo5(27), 2040 regulator_desc_s2mpu02_ldo5(28), 2041 regulator_desc_s2mpu02_buck1234(1), 2042 regulator_desc_s2mpu02_buck1234(2), 2043 regulator_desc_s2mpu02_buck1234(3), 2044 regulator_desc_s2mpu02_buck1234(4), 2045 regulator_desc_s2mpu02_buck5(5), 2046 regulator_desc_s2mpu02_buck6(6), 2047 regulator_desc_s2mpu02_buck7(7), 2048 }; 2049 2050 #define regulator_desc_s2mpu05_ldo_reg(num, min, step, reg) { \ 2051 .name = "ldo"#num, \ 2052 .id = S2MPU05_LDO##num, \ 2053 .of_match = of_match_ptr("ldo"#num), \ 2054 .regulators_node = of_match_ptr("regulators"), \ 2055 .ops = &s2mpu02_ldo_ops, \ 2056 .type = REGULATOR_VOLTAGE, \ 2057 .owner = THIS_MODULE, \ 2058 .min_uV = min, \ 2059 .uV_step = step, \ 2060 .n_voltages = S2MPU05_LDO_N_VOLTAGES, \ 2061 .vsel_reg = reg, \ 2062 .vsel_mask = S2MPU05_LDO_VSEL_MASK, \ 2063 .enable_reg = reg, \ 2064 .enable_mask = S2MPU05_ENABLE_MASK, \ 2065 .enable_time = S2MPU05_ENABLE_TIME_LDO \ 2066 } 2067 2068 #define regulator_desc_s2mpu05_ldo(num, reg, min, step) \ 2069 regulator_desc_s2mpu05_ldo_reg(num, min, step, S2MPU05_REG_L##num##reg) 2070 2071 #define regulator_desc_s2mpu05_ldo1(num, reg) \ 2072 regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN1, S2MPU05_LDO_STEP1) 2073 2074 #define regulator_desc_s2mpu05_ldo2(num, reg) \ 2075 regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN1, S2MPU05_LDO_STEP2) 2076 2077 #define regulator_desc_s2mpu05_ldo3(num, reg) \ 2078 regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN2, S2MPU05_LDO_STEP2) 2079 2080 #define regulator_desc_s2mpu05_ldo4(num, reg) \ 2081 regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN3, S2MPU05_LDO_STEP2) 2082 2083 #define regulator_desc_s2mpu05_buck(num, which) { \ 2084 .name = "buck"#num, \ 2085 .id = S2MPU05_BUCK##num, \ 2086 .of_match = of_match_ptr("buck"#num), \ 2087 .regulators_node = of_match_ptr("regulators"), \ 2088 .ops = &s2mpu02_buck_ops, \ 2089 .type = REGULATOR_VOLTAGE, \ 2090 .owner = THIS_MODULE, \ 2091 .min_uV = S2MPU05_BUCK_MIN##which, \ 2092 .uV_step = S2MPU05_BUCK_STEP##which, \ 2093 .n_voltages = S2MPU05_BUCK_N_VOLTAGES, \ 2094 .vsel_reg = S2MPU05_REG_B##num##CTRL2, \ 2095 .vsel_mask = S2MPU05_BUCK_VSEL_MASK, \ 2096 .enable_reg = S2MPU05_REG_B##num##CTRL1, \ 2097 .enable_mask = S2MPU05_ENABLE_MASK, \ 2098 .enable_time = S2MPU05_ENABLE_TIME_BUCK##num \ 2099 } 2100 2101 #define regulator_desc_s2mpu05_buck123(num) regulator_desc_s2mpu05_buck(num, 1) 2102 #define regulator_desc_s2mpu05_buck45(num) regulator_desc_s2mpu05_buck(num, 2) 2103 2104 static const struct regulator_desc s2mpu05_regulators[] = { 2105 regulator_desc_s2mpu05_ldo4(1, CTRL), 2106 regulator_desc_s2mpu05_ldo3(2, CTRL), 2107 regulator_desc_s2mpu05_ldo2(3, CTRL), 2108 regulator_desc_s2mpu05_ldo1(4, CTRL), 2109 regulator_desc_s2mpu05_ldo1(5, CTRL), 2110 regulator_desc_s2mpu05_ldo1(6, CTRL), 2111 regulator_desc_s2mpu05_ldo2(7, CTRL), 2112 regulator_desc_s2mpu05_ldo3(8, CTRL), 2113 regulator_desc_s2mpu05_ldo4(9, CTRL1), 2114 regulator_desc_s2mpu05_ldo4(10, CTRL), 2115 /* LDOs 11-24 are used for CP. They aren't documented. */ 2116 regulator_desc_s2mpu05_ldo2(25, CTRL), 2117 regulator_desc_s2mpu05_ldo3(26, CTRL), 2118 regulator_desc_s2mpu05_ldo2(27, CTRL), 2119 regulator_desc_s2mpu05_ldo3(28, CTRL), 2120 regulator_desc_s2mpu05_ldo3(29, CTRL), 2121 regulator_desc_s2mpu05_ldo2(30, CTRL), 2122 regulator_desc_s2mpu05_ldo3(31, CTRL), 2123 regulator_desc_s2mpu05_ldo3(32, CTRL), 2124 regulator_desc_s2mpu05_ldo3(33, CTRL), 2125 regulator_desc_s2mpu05_ldo3(34, CTRL), 2126 regulator_desc_s2mpu05_ldo3(35, CTRL), 2127 regulator_desc_s2mpu05_buck123(1), 2128 regulator_desc_s2mpu05_buck123(2), 2129 regulator_desc_s2mpu05_buck123(3), 2130 regulator_desc_s2mpu05_buck45(4), 2131 regulator_desc_s2mpu05_buck45(5), 2132 }; 2133 2134 static int s2mps11_handle_ext_control(struct s2mps11_info *s2mps11, 2135 struct regulator_dev *rdev) 2136 { 2137 int ret; 2138 2139 switch (s2mps11->dev_type) { 2140 case S2MPS14X: 2141 if (!rdev->ena_pin) 2142 return 0; 2143 2144 ret = s2mps14_pmic_enable_ext_control(s2mps11, rdev); 2145 break; 2146 2147 case S2MPG10: 2148 case S2MPG11: 2149 /* 2150 * If desc.enable_val is != 0, then external control was 2151 * requested. We can not test s2mpg10_desc::ext_control, 2152 * because 0 is a valid value. 2153 */ 2154 if (!rdev->desc->enable_val) 2155 return 0; 2156 2157 ret = s2mpg10_enable_ext_control(s2mps11, rdev); 2158 break; 2159 2160 default: 2161 return 0; 2162 } 2163 2164 return ret; 2165 } 2166 2167 static int s2mps11_pmic_probe(struct platform_device *pdev) 2168 { 2169 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 2170 struct regulator_config config = { }; 2171 struct s2mps11_info *s2mps11; 2172 unsigned int rdev_num; 2173 int i, ret; 2174 const struct regulator_desc *regulators; 2175 const struct s2mpg10_regulator_desc *s2mpg1x_regulators = NULL; 2176 2177 s2mps11 = devm_kzalloc(&pdev->dev, sizeof(struct s2mps11_info), 2178 GFP_KERNEL); 2179 if (!s2mps11) 2180 return -ENOMEM; 2181 2182 s2mps11->dev_type = platform_get_device_id(pdev)->driver_data; 2183 switch (s2mps11->dev_type) { 2184 case S2MPG10: 2185 rdev_num = ARRAY_SIZE(s2mpg10_regulators); 2186 s2mpg1x_regulators = s2mpg10_regulators; 2187 BUILD_BUG_ON(ARRAY_SIZE(s2mpg10_regulators) > S2MPS_REGULATOR_MAX); 2188 break; 2189 case S2MPG11: 2190 rdev_num = ARRAY_SIZE(s2mpg11_regulators); 2191 s2mpg1x_regulators = s2mpg11_regulators; 2192 BUILD_BUG_ON(ARRAY_SIZE(s2mpg11_regulators) > S2MPS_REGULATOR_MAX); 2193 break; 2194 case S2MPS11X: 2195 rdev_num = ARRAY_SIZE(s2mps11_regulators); 2196 regulators = s2mps11_regulators; 2197 BUILD_BUG_ON(ARRAY_SIZE(s2mps11_regulators) > S2MPS_REGULATOR_MAX); 2198 break; 2199 case S2MPS13X: 2200 rdev_num = ARRAY_SIZE(s2mps13_regulators); 2201 regulators = s2mps13_regulators; 2202 BUILD_BUG_ON(ARRAY_SIZE(s2mps13_regulators) > S2MPS_REGULATOR_MAX); 2203 break; 2204 case S2MPS14X: 2205 rdev_num = ARRAY_SIZE(s2mps14_regulators); 2206 regulators = s2mps14_regulators; 2207 BUILD_BUG_ON(ARRAY_SIZE(s2mps14_regulators) > S2MPS_REGULATOR_MAX); 2208 break; 2209 case S2MPS15X: 2210 rdev_num = ARRAY_SIZE(s2mps15_regulators); 2211 regulators = s2mps15_regulators; 2212 BUILD_BUG_ON(ARRAY_SIZE(s2mps15_regulators) > S2MPS_REGULATOR_MAX); 2213 break; 2214 case S2MPU02: 2215 rdev_num = ARRAY_SIZE(s2mpu02_regulators); 2216 regulators = s2mpu02_regulators; 2217 BUILD_BUG_ON(ARRAY_SIZE(s2mpu02_regulators) > S2MPS_REGULATOR_MAX); 2218 break; 2219 case S2MPU05: 2220 rdev_num = ARRAY_SIZE(s2mpu05_regulators); 2221 regulators = s2mpu05_regulators; 2222 BUILD_BUG_ON(ARRAY_SIZE(s2mpu05_regulators) > S2MPS_REGULATOR_MAX); 2223 break; 2224 default: 2225 return dev_err_probe(&pdev->dev, -ENODEV, 2226 "Unsupported device type %d\n", 2227 s2mps11->dev_type); 2228 } 2229 2230 if (s2mpg1x_regulators) { 2231 size_t regulators_sz = rdev_num * sizeof(*s2mpg1x_regulators); 2232 2233 s2mpg1x_regulators = devm_kmemdup(&pdev->dev, 2234 s2mpg1x_regulators, 2235 regulators_sz, 2236 GFP_KERNEL); 2237 if (!s2mpg1x_regulators) 2238 return -ENOMEM; 2239 } 2240 2241 device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); 2242 2243 platform_set_drvdata(pdev, s2mps11); 2244 2245 config.dev = &pdev->dev; 2246 config.regmap = iodev->regmap_pmic; 2247 config.driver_data = s2mps11; 2248 for (i = 0; i < rdev_num; i++) { 2249 const struct regulator_desc *rdesc; 2250 struct regulator_dev *regulator; 2251 2252 if (s2mpg1x_regulators) 2253 rdesc = &s2mpg1x_regulators[i].desc; 2254 else 2255 rdesc = ®ulators[i]; 2256 2257 regulator = devm_regulator_register(&pdev->dev, 2258 rdesc, &config); 2259 if (IS_ERR(regulator)) 2260 return dev_err_probe(&pdev->dev, PTR_ERR(regulator), 2261 "regulator init failed for %d/%s\n", 2262 rdesc->id, rdesc->name); 2263 2264 ret = s2mps11_handle_ext_control(s2mps11, regulator); 2265 if (ret < 0) 2266 return ret; 2267 } 2268 2269 return 0; 2270 } 2271 2272 static const struct platform_device_id s2mps11_pmic_id[] = { 2273 { "s2mpg10-regulator", S2MPG10}, 2274 { "s2mpg11-regulator", S2MPG11}, 2275 { "s2mps11-regulator", S2MPS11X}, 2276 { "s2mps13-regulator", S2MPS13X}, 2277 { "s2mps14-regulator", S2MPS14X}, 2278 { "s2mps15-regulator", S2MPS15X}, 2279 { "s2mpu02-regulator", S2MPU02}, 2280 { "s2mpu05-regulator", S2MPU05}, 2281 { }, 2282 }; 2283 MODULE_DEVICE_TABLE(platform, s2mps11_pmic_id); 2284 2285 static struct platform_driver s2mps11_pmic_driver = { 2286 .driver = { 2287 .name = "s2mps11-pmic", 2288 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 2289 }, 2290 .probe = s2mps11_pmic_probe, 2291 .id_table = s2mps11_pmic_id, 2292 }; 2293 2294 module_platform_driver(s2mps11_pmic_driver); 2295 2296 /* Module information */ 2297 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); 2298 MODULE_DESCRIPTION("Samsung S2MPS11/14/15/S2MPU02/05 Regulator Driver"); 2299 MODULE_LICENSE("GPL"); 2300